LT1469CDF-PBF [Linear]
Dual 90MHz, 22V/μs 16-Bit Accurate Operational Amplifi er; 双90MHz的， 22V /μs的16位精度运算功率放大器儿
| 型号： | LT1469CDF-PBF |
| 厂家： | 
Linear |
| 描述： | Dual 90MHz, 22V/μs 16-Bit Accurate Operational Amplifi er |
| 文件： | 总20页 (文件大小：238K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1469
Dual 90MHz, 22V/µs
16-Bit Accurate Operational Amplifier
FEATURES
DESCRIPTION
The LT®1469 is a dual, precision high speed operational
amplifierwith16-bitaccuracyand900nssettlingto150μV
for 10V steps. This unique blend of precision and AC
performance makes the LT1469 the optimum choice for
highaccuracyapplicationssuchasDACcurrent-to-voltage
conversion and ADC buffers. The initial accuracy and drift
characteristicsoftheinputoffsetvoltageandinvertinginput
bias current are tailored for inverting applications.
n
90MHz Gain Bandwidth, f = 100kHz
n
n
n
n
n
n
n
n
n
n
n
n
n
Maximum Input Offset Voltage: 125μV
Settling Time: 900ns (A = –1, 150μV, 10V Step)
V
22V/μs Slew Rate
Low Distortion: –96.5dB for 100kHz, 10V
P-P
Maximum Input Offset Voltage Drift: 3μV/°C
Maximum Inverting Input Bias Current: 10nA
Minimum DC Gain: 300V/mV
Minimum Output Swing into 2k: 12.8V
Unity-Gain Stable
Input Noise Voltage: 5nV/√Hz
Input Noise Current: 0.6pA/√Hz
Total Input Noise Optimized for 1kΩ < R < 20kΩ
Specified at 5V and 15V Supplies
The 90MHz gain bandwidth ensures high open-loop gain
at frequency for reducing distortion. In noninverting ap-
plications such as an ADC buffer, the low distortion and
DC accuracy allow full 16-bit AC and DC performance.
S
The 22V/μs slew rate of the LT1469 improves large signal
performance compared to other precision op amps in
applications such as active filters and instrumentation
amplifiers.
APPLICATIONS
n
Precision Instrumentation
The LT1469 is available in a space saving 4mm × 4mm
leadless package, as well as in small outline and DIP pack-
ages. A single version, the LT1468, is also available.
n
High Accuracy Data Acquisition Systems
n
16-Bit DAC Current-to-Voltage Converter
n
ADC Buffer
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
n
Low Distortion Active Filters
n
Photodiode Amplifiers
TYPICAL APPLICATION
16-Bit DAC I-to-V Converter and Reference Inverter for Bipolar Output Swing (VOUT = –10V to 10V)
15V
Bipolar Multiplying Mode (LTC1597)
Signal-to-(Noise + Distortion)
V
REF
40
+
DAC INPUT CODE = ALL ZEROS
1/2 LT1469
50
60
V
= 20V
REF
P-P
2.4μs SETTLING TIME
TO 1LSB ON 20V STEP
–
15pF
70
15pF
80
12k 12k
12k
12k
500kHz FILTER
–
16 BITS
DAC INPUTS
LTC1597
90
R
LPF
1/2 LT1469
+
V
OUT
100
110
80kHz FILTER
C
30kHz
FILTER
LPF
10
100
1k
10k
100k
–15V
1469 TA01
FREQUENCY (Hz)
1469 TA01a
1469fa
1
LT1469
(Note 1)
ABSOLUTE MAXIMUM RATINGS
+
–
Total Supply Voltage (V to V ).................................36V
Input Current (Note 2).......................................... 10mA
Output Short-Circuit Duration (Note 3) ............ Indefinite
Operating Temperature Range (Note 4).... –40°C to 85°C
Specified Temperature Range (Note 5) .... –40°C to 85°C
Maximum Junction Temperature........................... 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
S8 and N8 Package........................................... 300°C
PIN CONFIGURATION
TOP VIEW
+
TOP VIEW
1
2
3
4
5
6
V
12
OUT A
–IN A
+IN A
+
V
OUT A
–IN A
+IN A
1
2
3
4
8
7
6
5
11 OUT B
A
OUT B
–IN B
+IN B
–IN B
+IN B
N/C
10
9
A
B
–
V
13
B
8
N/C
N/C
–
V
7
N/C
N8 PACKAGE
8-LEAD PDIP 8-LEAD PLASTIC SO
= 150°C, θ = 130°C/W (N8)
S8 PACKAGE
DF PACKAGE
12-LEAD (4mm × 4mm) PLASTIC DFN
T
JMAX
T
JA
T
= 150°C, θ = 43°C/W
JMAX
JA
= 150°C, θ = 190°C/W (S8)
JMAX
JA
–
EXPOSED PAD (PIN 13) MUST BE CONNECTED TO V
ORDER INFORMATION
LEAD FREE FINISH
LT1469CN8#PBF
LT1469IN8#PBF
LT1469CS8#PBF
LT1469IS8#PBF
LT1469ACDF#PBF
LT1469AIDF#PBF
LT1469CDF#PBF
LT1469IDF#PBF
LEAD BASED FINISH
LT1469CN8
TAPE AND REEL
PART MARKING*
LT1469CN8
LT1469IN8
1469
PACKAGE DESCRIPTION
8-Lead PDIP
TEMPERATURE RANGE
0°C to 70°C
NA
NA
8-Lead PDIP
–40°C to 85°C
0°C to 70°C
LT1469CS8#TRPBF
LT1469IS8#TRPBF
LT1469ACDF#TRPBF
LT1469AIDF#TRPBF
LT1469CDF#TRPBF
LT1469IDF#TRPBF
TAPE AND REEL
NA
8-Lead Plastic Small Outline
8-Lead Plastic Small Outline
12-Lead (4mm × 4mm) Plastic DFN
12-Lead (4mm × 4mm) Plastic DFN
12-Lead (4mm × 4mm) Plastic DFN
12-Lead (4mm × 4mm) Plastic DFN
PACKAGE DESCRIPTION
8-Lead PDIP
1469I
–40°C to 85°C
0°C to 70°C
1469
1469
–40°C to 85°C
0°C to 70°C
1469
1469
–40°C to 85°C
TEMPERATURE RANGE
0°C to 70°C
PART MARKING
LT1469CN8
LT1469IN8
1469
LT1469IN8
NA
8-Lead PDIP
–40°C to 85°C
0°C to 70°C
LT1469CS8
LT1469CS8#TR
LT1469IS8#TR
8-Lead Plastic Small Outline
8-Lead Plastic Small Outline
LT1469IS8
1469I
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
1469fa
2
LT1469
ELECTRICAL CHARACTERISTICS TA = 25°C, VCM = 0V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
V
MIN
TYP
MAX
UNITS
SUPPLY
V
Input Offset Voltage
N8, S8 Packages
15V
5V
50
50
125
200
μV
μV
OS
LT1469A, DF Package
LT1469, DF Package
15V
5V
50
50
125
200
μV
μV
15V
5V
100
150
225
300
μV
μV
I
Input Offset Current
5V to 15V
5V to 15V
5V to 15V
5V to 15V
5V to 15V
5V to 15V
13
3
50
10
40
nA
nA
nA
OS
I –
Inverting Input Bias Current
Noninverting Input Bias Current
Input Noise Voltage
B
I +
–10
0.3
5
B
0.1Hz to 10Hz
f = 10kHz
μV
P-P
e
Input Noise Voltage Density
Input Noise Current Density
Input Resistance
nV/√Hz
pA/√Hz
n
i
f = 10kHz
0.6
n
R
Common Mode, V
Differential
=
CM
12.5V
15V
15V
100
50
240
150
MΩ
kΩ
IN
C
V
Input Capacitance
15V
4
pF
IN
Input Voltage Range (Positive)
Guaranteed by CMRR
Guaranteed by CMRR
15V
5V
12.5
2.5
13.5
3.6
V
V
CM
Input Voltage Range (Negative)
Common Mode Rejection Ratio
15V
5V
–14.3
–4.4
–12.5
–2.5
V
V
CMRR
PSRR
V
CM
V
CM
=
=
12.5V
2.5V
15V
5V
96
96
110
112
dB
dB
Minimum Supply Voltage
Power Supply Rejection Ratio
Large-Signal Voltage Gain
Guaranteed by PSRR
V = 4.5V to 15V
2.5
4.5
V
100
112
dB
S
A
VOL
V
OUT
V
OUT
V
OUT
V
OUT
=
=
=
=
12.5V, R = 10k
15V
15V
5V
300
300
200
200
2000
2000
8000
8000
V/mV
V/mV
V/mV
V/mV
L
12.5V, R = 2k
L
2.5V, R = 10k
L
2.5V, R = 2k
5V
L
V
OUT
Maximum Output Swing
R = 10k, 1mV Overdrive
15V
15V
5V
13.0
12.8
3.0
13.6
13.5
3.7
V
V
V
V
L
R = 2k, 1mV Overdrive
L
R = 10k, 1mV Overdrive
L
R = 2k, 1mV Overdrive
5V
2.8
3.6
L
I
I
Maximum Output Current
V
V
=
=
12.5V, 1mV Overdrive
2.5V, 1mV Overdrive
15V
5V
15
15
22
22
mA
mA
OUT
OUT
OUT
Output Short-Circuit Current
Slew Rate
V
OUT
= 0V, 0.2V Overdrive (Note 3)
15V
25
40
mA
SC
SR
A = –10, R = 2k (Note 6)
V
15V
5V
15
11
22
17
V/μs
V/μs
L
FPBW
GBW
Full-Power Bandwidth
Gain Bandwidth Product
Rise Time, Fall Time
Overshoot
10V Peak, (Note 7)
3V Peak, (Note 7)
15V
5V
350
900
kHz
kHz
f = 100kHz, R = 2k
15V
5V
60
55
90
88
MHz
MHz
L
t , t
A = 1, 10% to 90%, 0.1V Step
V
15V
5V
11
12
ns
ns
r
f
OS
A = 1, 0.1V Step
V
15V
5V
30
35
%
%
t
PD
Propagation Delay
A = 1, 50% V to 50% V , 0.1V Step
15V
5V
9
10
ns
ns
V
IN
OUT
1469fa
3
LT1469
ELECTRICAL CHARACTERISTICS TA = 25°C. VCM = 0V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
V
MIN
TYP
MAX
UNITS
SUPPLY
t
Settling Time
10V Step, 0.01%, A = –1
15V
15V
5V
760
900
770
ns
ns
ns
S
V
10V Step, 150μV, A = –1
V
5V Step, 0.01%, A = –1
V
THD
Total Harmonic Distortion
A = –1, V
= 10V , f = 100kHz
15V
15V
–96.5
–125
dB
dB
V
OUT
P-P
A = 1, V
= 20V , f = 1kHz
V
OUT
P-P
R
Output Resistance
Channel Separation
A = 1, f = 100kHz
15V
0.02
Ω
OUT
V
V
OUT
V
OUT
=
=
12.5V, R = 2k
15V
5V
100
100
130
130
dB
dB
L
2.5V, R = 2k
L
I
S
Supply Current
Per Amplifier
15V
5V
4.1
3.8
5.2
5
mA
mA
ΔV
OS
Input Offset Voltage Match
S8, DF A-Grade
15V
5V
30
50
225
350
μV
μV
ΔI –
Inverting Input Bias Current Match
Noninverting Input Bias Current Match
Common Mode Rejection Match
5V to 15V
5V to 15V
2
5
18
78
nA
nA
B
ΔI +
B
ΔCMRR
V
CM
V
CM
=
=
12.5V (Note 9)
2.5V (Note 9)
15V
5V
93
93
113
115
dB
dB
ΔPSRR
Power Supply Rejection Match
V = 4.5V to 15V (Note 9)
S
97
115
dB
The l denotes the specifications which apply over the full operating temperature range, 0°C ≤ TA ≤ 70°C. VCM = 0V unless otherwise noted.
SYMBOL PARAMETER
Input Offset Voltage
CONDITIONS
V
MIN
TYP
MAX
UNITS
SUPPLY
V
N8, S8 Packages
15V
5V
●
●
350
350
μV
μV
OS
LT1469A, DF Package
LT1469, DF Package
(Note 8)
15V
5V
●
●
225
275
μV
μV
15V
5V
●
●
450
450
μV
μV
ΔV /ΔT Input Offset Voltage Drift
OS
15V
5V
●
●
1
1
5
3
μV/°C
μV/°C
I
Input Offset Current
5V to 15V
5V to 15V
5V to 15V
5V to 15V
5V to 15V
●
●
●
●
●
80
20
60
nA
pA/°C
nA
OS
ΔI /ΔT
Input Offset Current Drift
(Note 8)
(Note 8)
60
40
OS
I –
Inverting Input Bias Current
Inverting Input Bias Current Drift
Noninverting Input Bias Current
Input Voltage Range (Positive)
B
ΔI –/ΔT
pA/°C
nA
B
I +
B
V
Guaranteed by CMRR
Guaranteed by CMRR
15V
5V
●
●
12.5
2.5
V
V
CM
Input Voltage Range (Negative)
Common Mode Rejection Ratio
15V
5V
●
●
–12.5
–2.5
V
V
CMRR
PSRR
V
V
=
=
12.5V
2.5V
15V
5V
●
●
●
●
94
94
dB
dB
V
CM
CM
Minimum Supply Voltage
Power Supply Rejection Ratio
Large-Signal Voltage Gain
Guaranteed by PSRR
V = 4.5V to 15V
4.5
95
dB
S
A
V
OUT
V
OUT
V
OUT
V
OUT
=
=
=
=
12.5V, R = 10k
15V
15V
5V
●
●
●
●
100
100
100
100
V/mV
V/mV
V/mV
V/mV
VOL
L
12.5V, R = 2k
L
2.5V, R = 10k
L
2.5V, R = 2k
5V
L
1469fa
4
LT1469
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, 0°C ≤ TA ≤ 70°C. VCM = 0V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS
R = 10k, 1mV Overdrive
V
MIN
TYP
MAX
UNITS
SUPPLY
V
Maximum Output Swing
15V
15V
5V
●
●
●
●
12.9
12.7
2.9
V
V
V
V
OUT
L
R = 2k, 1mV Overdrive
L
R = 10k, 1mV Overdrive
L
R = 2k, 1mV Overdrive
5V
2.7
L
I
I
Maximum Output Current
Output Short-Circuit Current
Slew Rate
V
V
=
=
12.5V, 1mV Overdrive
2.5V, 1mV Overdrive
15V
5V
●
●
12.5
12.5
mA
mA
OUT
SC
OUT
OUT
V
= 0V, 0.2V Overdrive
15V
●
17
mA
OUT
(Note 3)
SR
A = –10, R = 2k (Note 6)
V
15V
5V
●
●
13
9
V/μs
V/μs
L
GBW
Gain Bandwidth Product
Channel Separation
Supply Current
f = 100kHz, R = 2k
15V
5V
●
●
55
50
MHz
MHz
L
V
OUT
V
OUT
=
=
12.5V, R = 2k
15V
5V
●
●
98
98
dB
dB
L
2.5V, R = 2k
L
I
S
Per Amplifier
15V
5V
●
●
6.5
6.3
mA
mA
ΔV
OS
Input Offset Voltage Match
S8, DF A-Grade
15V
5V
●
●
600
600
μV
μV
ΔI –
Inverting Input Bias Current Match
Noninverting Input Bias Current Match
Common Mode Rejection Match
5V to 15V
5V to 15V
●
●
38
nA
nA
B
ΔI +
B
118
ΔCMRR
V
CM
V
CM
=
=
12.5V (Note 9)
2.5V (Note 9)
15V
5V
●
●
91
91
dB
dB
ΔPSRR
Power Supply Rejection Match
V = 4.5V to 15V (Note 9)
S
●
92
dB
The l denotes the specifications which apply over the full operating temperature range, –40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise
noted. (Note 5)
SYMBOL PARAMETER
Input Offset Voltage
CONDITIONS
V
MIN
TYP
MAX
UNITS
SUPPLY
V
N8, S8 Packages
15V
5V
●
●
500
500
μV
μV
OS
LT1469A, DF Package
LT1469, DF Package
(Note 8)
15V
5V
●
●
300
350
μV
μV
15V
5V
●
●
600
600
μV
μV
ΔV /ΔT Input Offset Voltage Drift
OS
15V
5V
●
●
1
1
6
5
μV/°C
μV/°C
I
Input Offset Current
5V to 15V
5V to 15V
5V to 15V
5V to 15V
5V to 15V
●
●
●
●
●
120
nA
pA/°C
nA
OS
ΔI /ΔT
Input Offset Current Drift
(Note 8)
(Note 8)
120
80
OS
I –
Inverting Input Bias Current
Inverting Input Bias Current Drift
Noninverting Input Bias Current
Input Voltage Range (Positive)
40
B
ΔI –/ΔT
pA/°C
nA
B
I +
80
B
V
Guaranteed by CMRR
Guaranteed by CMRR
15V
5V
●
●
12.5
2.5
V
V
CM
Input Voltage Range (Negative)
15V
5V
●
●
–12.5
–2.5
V
V
1469fa
5
LT1469
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, –40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
V
MIN
TYP
MAX
UNITS
SUPPLY
CMRR
Common Mode Rejection Ratio
V
CM
V
CM
=
=
12.5V
2.5V
15V
5V
●
●
92
92
dB
dB
4.5
Minimum Supply Voltage
Power Supply Rejection Ratio
Large-Signal Voltage Gain
Guaranteed by PSRR
V = 4.5V to 15V
●
●
V
PSRR
93
dB
S
A
VOL
V
OUT
V
OUT
V
OUT
V
OUT
=
=
=
=
12,5V, R = 10k
15V
15V
5V
●
●
●
●
75
75
75
75
V/mV
V/mV
V/mV
V/mV
L
12.5V, R = 2k
L
2.5V, R = 10k
L
2.5V, R = 2k
5V
L
V
Maximum Output Swing
Maximum Output Current
R = 10k, 1mV Overdrive
15V
15V
5V
●
●
●
●
12.8
12.6
2.8
V
V
V
V
OUT
L
R = 2k, 1mV Overdrive
L
R = 10k, 1mV Overdrive
L
R = 2k, 1mV Overdrive
5V
2.6
L
I
I
V
OUT
V
OUT
=
=
12.5V, 1mV Overdrive
2.5V, 1mV Overdrive
15V
5V
●
●
7
7
mA
mA
OUT
Output Short-Circuit Current
Slew Rate
V
OUT
= 0V, 0.2V Overdrive (Note 3)
15V
●
12
mA
SC
SR
A = –10, R = 2k (Note 6)
15V
5V
●
●
9
6
V/μs
V/μs
V
L
GBW
Gain Bandwidth Product
Channel Separation
f = 100kHz, R = 2k
15V
5V
●
●
45
40
MHz
MHz
L
V
OUT
V
OUT
=
=
12.5V, R = 2k
15V
5V
●
●
96
96
dB
dB
L
2.5V, R = 2k
L
I
S
Supply Current
Per Amplifier
15V
5V
●
●
7
6.8
mA
mA
ΔV
Input Offset Voltage Match
Inverting Input Bias Current Match
S8, DF A-Grade
15V
5V
●
●
800
800
μV
μV
OS
ΔI –
B
5V to 15V
5V to 15V
●
●
78
nA
nA
ΔI +
B
Noninverting Input Bias Current
Match
158
ΔCMRR
ΔPSRR
Common Mode Rejection Match
V
V
=
=
12.5V (Note 9)
2.5V (Note 9)
15V
5V
●
●
89
89
dB
dB
CM
CM
Power Supply Rejection Match
V = 4.5V to 15V (Note 9)
S
●
90
dB
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The inputs are protected by back-to-back diodes and two 100Ω
series resistors. If the differential input voltage exceeds 0.7V, the input
current should be limited to less than 10mA. Input voltages outside the
supplies will be clamped by ESD protection devices and input currents
should also be limited to less than 10mA.
Note 5: The LT1469C is guaranteed to meet specified performance from
0°C to 70°C and is designed, characterized and expected to meet specified
performance from –40°C to 85°C but is not tested or QA sampled at these
temperatures. The LT1469I is guaranteed to meet specified performance
from –40°C to 85°C.
Note 6: Slew rate is measured between 8V on the output with 12V
swing for 15V supplies and 2V on the output with 3V swing for 5V
supplies.
Note 7: Full-power bandwidth is calculated from the slew rate. FPBW =
Note 3: A heat sink may be required to keep the junction temperature
SR/2πV .
P
below absolute maximum when the output is shorted indefinitely.
Note 8: This parameter is not 100% tested.
Note 4: The LT1469C and LT1469I are guaranteed functional over the
operating temperature range of –40°C to 85°C.
Note 9: ΔCMRR and ΔPSRR are defined as follows: 1) CMRR and PSRR
are measured in μV/V on each amplifier; 2) the difference between the two
sides is calculated in μV/V; 3) the result is converted to dB.
1469fa
6
LT1469
TYPICAL PERFORMANCE CHARACTERISTICS
Distribution of Input Offset
Voltage
Distribution of Inverting Input
Bias Current
Supply Current vs Supply Voltage
and Temperature
40
30
20
10
0
50
40
30
20
10
0
6
5
4
3
2
1
V
T
=
15V
V
T
=
15V
S
A
S
A
85°C
25°C
= 25°C
= 25°C
–40°C
–10 –7.5 –5 –2.5
0
2.5
5
7.5 10
–175 –125 –75 –25 25
75 125 175
0
5
10
15
20
INVERTING INPUT BIAS CURRENT (nA)
SUPPLY VOLTAGE ( V)
INPUT OFFSET VOLTAGE (μV)
1469 G02
1469 G01
1469 G03
Total Noise vs Unmatched
Source Resistance
Input Noise Spectral Density
0.1Hz to 10Hz Voltage Noise
100
1000
100
10
1
V
T
=
15V
V
T
=
15V
= 25°C
S
A
V
=
15V
S
A
S
A
V
= 25°C
T
= 25°C
= 101
f = 10kHz
A
R
= 100k FOR i
S
n
TOTAL
NOISE
i
n
10
1
RESISTOR
NOISE ONLY
e
n
10
1
0.1
R
S
+
–
0.1
0.01
1
10
100
1k
10k
100k
TIME (1s/DIV)
10
100
1k
10k
100k
FREQUENCY (Hz)
SOURCE RESISTANCE, R (ꢀ)
1469 G05
S
1469 G06
1469 G04
Input Bias Current
vs Temperature
Input Bias Current
vs Input Common Mode Voltage
Input Common Mode Range
vs Supply Voltage
+
30
20
80
60
V
T
= 25°C
OS
V
= 15V
A
S
V
T
=
15V
S
A
–0.5
–1.0
–1.5
–2.0
ΔV < 100μV
= 25°C
40
10
–
+
I
I
B
20
0
–
I
B
0
+
I
B
–10
–20
–30
–40
2.0
1.5
1.0
0.5
–20
–40
–60
–80
B
–
V
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
–10
–5
5
0
3
6
9
12
15
18
–15
10
15
0
SUPPLY VOLTAGE ( V)
INPUT COMMON MODE VOLTAGE (V)
1469 G07
1469 G09
1469 G08
1469fa
7
LT1469
TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage Swing
vs Supply Voltage
Output Voltage Swing
vs Load Current
Output Short-Circuit Current
vs Temperature
+
+
V
60
55
50
45
40
35
30
25
20
15
10
V
–0.5
–1.0
–1.5
–2.0
–2.5
R
= 10k
L
V
= 15V
V
V
=
S
IN
15V
0.2V
S
85°C
25°C
–1
–2
–3
–4
4
=
R
L
= 2k
–40°C
SOURCE
SINK
2.5
2.0
1.5
1.0
3
–40°C
85°C
2
R
= 2k
L
25°C
1
R
= 10k
L
T
A
= 25°C
–
–
V
V
0.5
0
5
10
15
20
–50
0
25
50
75 100 125
–25
–20
0
10 15
–15 –10 –5
5
20
SUPPLY VOLTAGE ( V)
TEMPERATURE (°C)
OUTPUT CURRENT (mA)
1469 G10
1469 G12
1469 G11
Settling Time to 0.01%
vs Output Step, VS = 15V
Settling Time to 0.01%
vs Output Step, VS = 5V
Settling Time to 150μV
vs Output Step
10
8
5
4
10
8
V
=
15V
V
=
5V
V
=
15V
S
A
L
S
A
L
S
A
V
F
F
T
= 25°C
= 1k
T
= 25°C
= 1k
T
= 25°C
= –1
A
= –1
A = 1
V
A
= 1
A = –1
V
V
V
R
R
A
R
C
6
3
6
= R = 2k
= 8pF
G
4
2
4
2
1
2
0
0
0
–2
–4
–6
–8
–10
–1
–2
–3
–4
–5
–2
–4
–6
–8
–10
A
= –1
A
= 1
V
V
A
= 1
A = –1
V
V
0
200
400
600
800
1000
300
400
500
600
700
800
0
200
400
600
800
1000
SETTLING TIME (ns)
SETTLING TIME (ns)
SETTLING TIME (ns)
1469 G13
1469 G14
1469 G15
Open-Loop Gain
vs Resistive Load
Open-Loop Gain
vs Temperature
Open-Loop Gain
vs Frequency
160
150
140
135
130
125
120
115
110
140
120
100
80
R
= 2k
T
= 25°C
L
A
T
= 25°C
A
V
F
F
L
A
= –1
R
= R = 5.1k
V
S
=
5V
G
S
V
V
=
=
5V
S
S
C
= 5pF
= 2k
140
130
120
110
100
R
60
15V
V
=
15V
V
=
5V
V = 15V
S
S
40
20
0
90
–20
50
100 125
–50 –25
0
25
75
10
100
1k
10k
10 100 1k 10k 100k 1M 10M 100M
LOAD RESISTANCE (ꢀ)
TEMPERATURE (°C)
FREQUENCY (Hz)
1469 G17
1469 G16
1469 G18
1469fa
8
LT1469
TYPICAL PERFORMANCE CHARACTERISTICS
Open-Loop Gain and Phase vs
Frequency
Gain Bandwidth and Phase
Margin vs Supply Voltage
Gain Bandwidth and Phase
Margin vs Temperature
70
60
50
40
30
20
10
0
100
80
42
40
38
36
34
32
30
40
38
36
34
32
T
= 25°C
= –1
A
V
F
F
L
A
PHASE MARGIN
R
= R = 5.1k
PHASE
15V
G
V
=
S
15V
5V
PHASE MARGIN
C
= 5pF
= 2k
60
R
92
90
88
86
84
82
40
V
=
S
5V
20
94
92
90
88
86
84
GAIN
V
=
15V
5V
0
S
GAIN BANDWIDTH
GAIN BANDWIDTH
15V
T
= 25°C
= –1
A
V
F
F
–20
–40
–60
A
5V
R
C
R
= R = 5.1k
V =
S
G
= 5pF
= 2k
L
–10
10k
100k
1M
FREQUENCY (Hz)
10M
100M
10
SUPPLY VOLTAGE ( V)
0
5
15
20
50
TEMPERATURE (°C)
125
–55
0
25
75 100
–25
1469 G19
1469 G20
1469 G21
Gain vs Frequency, AV = 1
Gain vs Frequency, AV = –1
Gain vs Frequency, AV = 1
5
4
3
2
5
4
3
2
14
12
10
8
T
= 25°C
= 1
= 2k
V
=
15V
A
V
L
S
A
V
A
T
= 25°C
= 1
R
V
V
= R = 2k
=
=
F
S
S
G
R
A
NO R
5V
L
15V
R
F
= R = 5.1k
G
100pF
50pF
20pF
V
=
5V
S
V
= 5V
S
V
=
15V
1
0
1
0
S
6
4
V
= 15V
S
–1
–2
–3
–4
–5
–1
–2
–3
–4
–5
2
0
10pF
T
= 25°C
= –1
A
V
L
F
–2
–4
–6
A
R
C
= 2k
= 5pF
100k
1M
10M
100M
100k
1M
10M
100M
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
1469 G22
1469 G23
1469 G24
Gain vs Frequency, AV = –1
Slew Rate vs Supply Voltage
Slew Rate vs Temperature
14
12
10
8
45
30
28
26
24
22
20
18
16
14
V
T
=
15V
T
= 25°C
A = –1
V
V
A
= 15V
= –1
= 2k
S
A
V
F
F
A
S
V
L
= 25°C
= –1
40
35
A
R
= 2k
L
R
–SR
R
C
NO R
= R = 5.1k
= 5pF
G
300pF
–SR
+SR
L
30
25
20
15
10
6
4
+SR
200pF
2
0
100pF
50pF
–2
–4
–6
5
100k
1M
10M
100M
0
10
SUPPLY VOLTAGE ( V)
20
–50 –25
0
25
50
75 100 125
5
15
FREQUENCY (Hz)
TEMPERATURE (°C)
1469 G25
1469 G26
1469 G27
1469fa
9
LT1469
TYPICAL PERFORMANCE CHARACTERISTICS
Power Supply Rejection Ratio
vs Frequency
Common Mode Rejection Ratio
vs Frequency
Channel Separation
vs Frequency
120
100
80
60
40
20
0
140
120
100
80
160
140
120
100
V
T
= 15V
= 25°C
= 2k
V
T
= 15V
= 25°C
= 2k
V
T
= 15V
= 25°C
= 2k
S
S
S
A
A
A
R
R
R
L
L
L
+PSRR
–PSRR
80
60
60
40
40
20
0
20
0
1k
10k
1M
100
1k
10k
100k 1M
10M 100M
100
1k
10k 100k
1M
10M 100M
100
10M 100M
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
1469 G29
1469 G30
1469 G28
Undistorted Output Swing
vs Frequency, VS = 5V
Undistorted Output Swing
vs Frequency, VS = 15V
Output Impedance vs Frequency
10
9
100
10
30
25
20
15
10
5
V
T
= 5V
= 25°C
= 2k
V
T
=
15V
S
S
A
= 25°C
A
R
L
8
A
= 1
THD < 1%
V
A
= 100
= 10
V
A
= 1
V
7
1
6
5
A
= –1
V
A
= –1
V
A
V
4
3
2
1
0
0.1
A
= 1
V
V
T
= 15V
= 25°C
= 2k
S
0.01
0.001
A
R
L
THD < 1%
0
10k
100k
1M
FREQUENCY (Hz)
10M
100M
1
10
100
1000
1
10
100
1000
FREQUENCY (kHz)
FREQUENCY (kHz)
1469 G33
1469 G31
1469 G32
Total Harmonic Distortion
vs Frequency
Total Harmonic Distortion + Noise
vs Amplitude
Warm-Up Drift vs Time
–80
–90
–50
–60
10
0
V
A
R
V
=
15V
S
V
L
= 2
= 2k
OUT
N8 5V
= 10V
–10
–20
–30
–40
–50
–60
–70
–80
P-P
V
=
5V
S
S0-8 5V
–70
–100
–110
–120
–130
V
=
15V
S
–80
N8 15V
–90
T
= 25°C
= 1
A
V
L
A
S0-8 15V
–100
R
= 600ꢀ
f = 10kHz
NOISE BW = 80kHz
–110
100
1k
10k
100k
0.01
0.1
OUTPUT SIGNAL (V
1
10
0
20
40
60
80 100 120 140
)
FREQUENCY (Hz)
RMS
TIME AFTER POWER UP (s)
1469 G34
1469 G35
1469 G36
1469fa
10
LT1469
TYPICAL PERFORMANCE CHARACTERISTICS
Small-Signal Transient, AV = 1
Small-Signal Transient, AV = –1
1469 G38
1469 G37
V
= 15V
V
= 15V
S
S
Large-Signal Transient, AV = 1
Large-Signal Transient, AV = –1
1469 G39
1469 G40
V
=
15V
V = 15V
S
S
APPLICATIONS INFORMATION
Layout and Passive Components
Board leakage can be minimized by encircling the input
circuitry with a guard ring operated at a potential close
to that of the inputs: for inverting configurations tie the
ring to ground, in noninverting connections tie the ring
to the inverting input (note the input capacitance will
increase which may require a compensating capacitor as
discussed below).
The LT1469 requires attention to detail in board layout
in order to maximize DC and AC performance. For best
AC results (for example, fast settling time) use a ground
plane, short lead lengths and RF quality bypass capacitors
(0.01μF to 0.1μF) in parallel with low ESR bypass capaci-
tors(1μFto10μFtantalum). ForbestDCperformance, use
“star” grounding techniques, equalize input trace lengths
and minimize leakage (e.g., 1.5GΩ of leakage between an
input and a 15V supply will generate 10nA—equal to the
Microvolt level error voltages can also be generated in
the external circuitry. Thermocouple effects caused by
temperature gradients across dissimilar metals at the
contacts to the inputs can exceed the inherent drift of
maximum I – specification).
B
1469fa
11
LT1469
APPLICATIONS INFORMATION
the amplifier. Air currents over device leads should be
minimized, package leads should be short and the two
input leads should be as close together as possible and
maintained at the same temperature.
TheLT1469employsbiascurrentcancellationattheinputs.
The inverting input current is trimmed at zero common
mode voltage to minimize errors in inverting applications
such as I-to-V converters. The noninverting input current
is not trimmed and has a wider variation and therefore a
larger maximum value. As the input offset current can be
greaterthaneitherinputcurrent,theuseofbalancedsource
resistance is NOT recommended as it actually degrades
DC accuracy and also increases noise.
The parallel combination of the feedback resistor and gain
settingresistorontheinvertinginputcancombinewiththe
input capacitance to form a pole which can cause peaking
or even oscillations. For feedback resistors greater than
2k, a feedback capacitor of value C > R • C /R should
F
G
IN
F
be used to cancel the input pole and optimize dynamic
The input bias currents vary with common mode voltage.
The cancellation circuitry was not designed to track this
common mode voltage because the settling time would
have been adversely affected.
performance. For applications where the DC noise gain is
one, and a large feedback resistor is used, C should be
F
greater than or equal to C . An example would be a DAC
IN
I-to-V converter as shown on the front page of the data
sheet where the DAC can have many tens of picofarads
of output capacitance. Another example would be a gain
of –1 with 5k resistors; a 5pF to 10pF capacitor should
be added across the feedback resistor.
The LT1469 inputs can be driven to the negative supply
and to within 0.5V of the positive supply without phase
reversal. As the input moves closer than 0.5V to the posi-
tive supply, the output reverses phase.
Total Input Noise
Input Considerations
ThetotalinputnoiseoftheLT1469isoptimizedforasource
resistance between 1k and 20k. Within this range, the
total input noise is dominated by the noise of the source
resistance itself. When the source resistance is below
1k, voltage noise of the amplifier dominates. When the
source resistance is above 20k, the input noise current is
the dominant contributor.
Each input of the LT1469 is protected with a 100Ω series
resistor and back-to-back diodes across the bases of
the input devices. If large differential input voltages are
anticipated, limit the input current to less than 10mA with
an external series resistor. Each input also has two ESD
clamp diodes—one to each supply. If an input is driven
beyond the supply, limit the current with an external resis-
tor to less than 10mA.
+
V
C
F
R
R1
100ꢀ
R1
100ꢀ
F
R
G
Q1
Q2
–
+IN
–IN
C
IN
1/2 LT1469
V
OUT
V
IN
+
1469 F01
Figure 1. Nulling Input Capacitance
1469 F02
–
V
Figure 2. Input Stage Protection
1469fa
12
LT1469
APPLICATIONS INFORMATION
Capacitive Loading
measurements—ApplicationNotes47and74.AppendixB
of AN47 is a vital primer on 12-bit settling measurements
andAN74extendsthestate-of-the-artwhileconcentrating
on settling time with a 16-bit current output DAC input.
TheLT1469drivescapacitiveloadsofupto100pFinunity-
gain and 300pF in a gain of –1. When there is a need to
drivealargercapacitiveload,asmallseriesresistorshould
be inserted between the output and the load. In addition,
a capacitor should be added between the output and the
inverting input as shown in Figure 3.
The settling of the DAC I-to-V converter on the front page
was measured using the exact methods of AN74. The
optimum nulling of the DAC output capacitance requires
15pFacrossthe12kfeedbackresistor.Thetheoreticallimit
for 16-bit settling is 11.1 times this RC time constant or
2μs. The actual settling time is 2.4μs at the output of the
LT1469.
Settling Time
The LT1469 is a single stage amplifier with an optimal
thermal layout that leads to outstanding settling per-
formance. Measuring settling even at the 12-bit level is
very challenging, and at the 16-bit level requires a great
deal of subtlety and expertise. Fortunately, there are two
excellent Linear Technology reference sources for settling
The RC output noise filter adds a slight settling time delay
butreducesthenoisebandwidthto1.6MHzwhichincreases
the output resolution for 16-bit accuracy.
R
F
R
R
F
≥ (1 + R /R )/(2Č • C • 5MHz)
F G L
O
F
≥ 10R
O
C
= (2R /R )C
O
F
L
C
R
F
G
–
R
O
1/2 LT1469
V
OUT
C
L
V
IN
+
1469 F03
Figure 3. Driving Capacitive Loads
1469fa
13
LT1469
TYPICAL APPLICATIONS
Ultralow Distortion Balanced Audio Line Driver
+
1/2 LT1364
–
10k
2.1k
22pF
33.2ꢀ
+
820pF
30.1ꢀ
1/2 LT1469
10k
50 FEET SHIELDED
TWISTED PAIR CABLE
–
1k
INPUT
22pF
600ꢀ
Z
= 10kꢀ
IN
+
THD + N
MEASURED HERE
820pF
30.1ꢀ
33.2ꢀ
1/2 LT1469
–
20k
22.1k
22pF
V
=
15V
PARALLEL COMPOSITE TOPOLOGY:
LT1364 PROVIDES OUTPUT CURRENT;
LT1469 PRESERVES LINEARITY
S
GAIN = 6dB
+
1/2 LT1364
–
20k
24.3k
22pF
TOTAL HARMONIC DISTORTION + NOISE
V
FREQUENCY
1kHz
MEASUREMENT BANDWIDTH
OUT
0.00025%
0.0008%
0.0006%
10V
10V
22kHz
80kHz
RMS
RMS
20Hz TO 20kHz
1kHz
26dBu
22kHz
1469 TA02
*1dBu = 1 milliwatt into 600ꢀ
1469fa
14
LT1469
TYPICAL APPLICATIONS
Extending 16-Bit DAC Performance to 200V Output Swing
125V
1μF
510ꢀ
330ꢀ
V
= 200V
= 25mA
OUT
OUT
P-P
Q1
2N5415
I
15V
THD + N = –90dB at 100Hz
330pF
Q3
10k
2N3440*
V
REF
1k
1k
Q5
50k
50k
1M
1M
2N2222
R
FB
–
27ꢀ
27ꢀ
1N4148
100pF
R
***
SELECT
–
TYPICAL
6ꢀ
1/2 LT1469
+
16 BITS
LTC1597
OUTPUT
19.994k**
1N4148
1/2 LT1469
+
Q6
2N2907
–15V
Q3
2N5415*
Q2
2N3440
*HEAT SINK
**VISHAY S102 RESISTOR 0.01%
***1% METAL FILM RESISTOR
510ꢀ
1μF
330ꢀ
NOTE: FOR FURTHER EXPLANATION,
REFER TO APPLICATION NOTE 74, APPENDIX H
–125V
50k** 50k** 50k** 50k**
15pF
1469 TA03
1469fa
15
LT1469
SIMPLIFIED SCHEMATIC
+
V
I1
I2
I5
Q10
Q11
Q8
Q9
OUT
+IN
Q1
Q2
–IN Q5
Q3
Q6
Q7
Q4
C
BIAS
I3
I4
I6
–
V
1469 SS
1469fa
16
LT1469
PACKAGE DESCRIPTION
DF Package
12-Lead Plastic DFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1773 Rev Ø)
2.50 REF
0.70 0.05
3.38 0.05
2.65 0.05
4.50 0.05
3.10 0.05
PACKAGE OUTLINE
0.25 0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
4.00 0.10
(4 SIDES)
2.50 REF
7
12
0.40 0.10
3.38 0.10
2.65 0.10
PIN 1 NOTCH
R = 0.20 TYP OR
0.35 × 45°
PIN 1
TOP MARK
(NOTE 6)
CHAMFER
(DF12) DFN 0806 REV Ø
6
R = 0.115
TYP
1
0.25 0.05
0.50 BSC
0.200 REF
0.75 0.05
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING IS PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220
VARIATION (WGGD-X)—TO BE APPROVED
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
1469fa
17
LT1469
PACKAGE DESCRIPTION
N8 Package
8-Lead PDIP (Narrow 0.300)
(Reference LTC DWG # 05-08-1510)
.400*
(10.160)
MAX
8
7
6
5
4
.255 ± .015*
(6.477 ± 0.381)
1
2
3
.130 ± .005
.300 – .325
.045 – .065
(3.302 ± 0.127)
(1.143 – 1.651)
(7.620 – 8.255)
.065
(1.651)
TYP
.008 – .015
(0.203 – 0.381)
.120
.020
(0.508)
MIN
(3.048)
MIN
+.035
.325
–.015
.018 ± .003
(0.457 ± 0.076)
.100
(2.54)
BSC
+0.889
8.255
(
)
N8 1002
–0.381
NOTE:
INCHES
MILLIMETERS
1. DIMENSIONS ARE
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
1469fa
18
LT1469
PACKAGE DESCRIPTION
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
.045 ±.005
.160 ±.005
NOTE 3
.050 BSC
7
5
8
6
.245
MIN
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
1469fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT1469
TYPICAL APPLICATION
16-Bit Accurate Single Ended to Differential ADC Buffer
5V
4096 Point FFT of ADC Output
R
S
V
+
IN
0
–20
100ꢀ
1/2 LT1469
f
= 333ksps
SAMPLE
IN
IN
5V
V
=
1.25V
–
f
V
= 100kHz
= 5V
S
3000pF
–40
+IN
10pF
2k
16 BITS
–60
2k
LTC1604
–5V
333ksps
ADC OUTPUTS
–80
–IN
3000pF
100ꢀ
–100
–120
–140
1469 TA04
–
1/2 LT1469
+
0
20 40 60 80 100 120 140 160
FREQUENCY (kHz)
–5V
1469 TA04a
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1167
Precision Instrumentation Amplifier
Single Resistor Gain Set, 0.04% Max Gain Error, 10ppm Max Gain
Nonlinearity
LT1468
Single 90MHz, 22V/μs, 16-Bit Accurate Op Amp
Single 200MHz, 30V/μs, 16-Bit Accurate A ≥ 2 Op Amp
75μV V
75μV V
75μV V
Single Version of LT1469
OS(MAX),
OS(MAX)
OS(MAX)
LT1468-2
LT1469-2
V
Dual 200MHz, 30V/μs, 16-Bit Accurate A ≥ 2 Op Amp
V
LTC1595/LTC1596 16-Bit Serial Multiplying I
DAC
1LSB Max INL/DNL, Low Glitch, DAC8043 16-Bit Upgrade
1LSB Max INL/DNL, Low Glitch, On-Chip Bipolar Resistors
2.5V Input, SINAD = 90dB, THD = –100dB
OUT
LTC1597
LTC1604
LTC1605
LT1723
16-Bit Parallel Multiplying I
DAC
OUT
16-Bit, 333ksps Sampling ADC
Single 5V, 16-Bit, 100ksps Sampling ADC
Low Power, 10V Inputs, Parallel/Byte Interface
Dual 200MHz, 70V/μs Low Noise Precision Op Amp
V ≤ 5V, e = 3.8nV/√Hz, –85dBc at 1MHz
S n
LT1801
Dual 80MHz, 25V/μs Low Power Rail-to-Rail Precision Op V ≤ 5V, I = 1.6mA, V ≤ 350μV
S CC OS
Amp
LT6221
Dual 60MHz, 20V/μs Low Power Rail-to-Rail Precision Op V ≤ 5V, I = 0.9mA, V ≤ 350μV
S CC OS
Amp
LTC6244HV
Dual 50MHz, Low Noise, Precision CMOS Op Amp
V ≤ 5V, V ≤ 100μV, I ≤ 75pA
S OS B
1469fa
LT 0808 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
© LINEAR TECHNOLOGY CORPORATION 2000
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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