LT1764ET-2.5#PBF [Linear]
LT1764 - 3A, Fast Transient Response, Low Noise, LDO Regulators; Package: TO-220; Pins: 5; Temperature Range: -40°C to 85°C;
| 型号： | LT1764ET-2.5#PBF |
| 厂家： | 
Linear |
| 描述： | LT1764 - 3A, Fast Transient Response, Low Noise, LDO Regulators; Package: TO-220; Pins: 5; Temperature Range: -40°C to 85°C 局域网 输出元件 调节器 |
| 文件： | 总20页 (文件大小：286K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1764 Series
3A, Fast Transient
Response, Low Noise,
LDO Regulators
U
FEATURES
DESCRIPTIO
The LT®1764 is a low dropout regulator optimized for fast
transient response. The device is capable of supplying 3A
of output current with a dropout voltage of 340mV. Oper-
ating quiescent current is 1mA, dropping to <1µA in
shutdown. Quiescentcurrentiswellcontrolled;itdoesnot
rise in dropout as it does with many other regulators. In
addition to fast transient response, the LT1764 has very
low output voltage noise which makes the device ideal for
sensitive RF supply applications.
■
Optimized for Fast Transient Response
■
Output Current: 3A
■
Dropout Voltage: 340mV at 3A
■
Low Noise: 40µVRMS (10Hz to 100kHz)
■
■
■
■
■
■
■
■
■
■
■
■
1mA Quiescent Current
Wide Input Voltage Range: 2.7V to 20V
No Protection Diodes Needed
Controlled Quiescent Current in Dropout
Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V
Adjustable Output from 1.21V to 20V
<1µA Quiescent Current in Shutdown
Stable with 10µF Output Capacitor
Reverse Battery Protection
Output voltage range is from 1.21V to 20V. The LT1764
regulatorsarestablewithoutputcapacitorsaslowas10µF.
Internal protection circuitry includes reverse battery pro-
tection, current limiting, thermal limiting and reverse cur-
rent protection. The device is available in fixed output
voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an adjustable
device with a 1.21V reference voltage. The LT1764 regu-
lators are available in 5-lead TO-220, DD and Exposed Pad
16-lead TSSOP packages.
No Reverse Current
Thermal Limiting
Available in 5-Lead TO-220, DD and 16-Lead
TSSOP Packages
U
APPLICATIO S
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by U.S. Patents,
including 6144250, 6118263.
■
3.3V to 2.5V Logic Power Supply
Post Regulator for Switching Supplies
■
U
TYPICAL APPLICATIO
Dropout Voltage
400
350
300
250
200
150
100
50
3.3V to 2.5V
Regulator
OUT
IN
2.5V
3A
IN
OUT
+
+
V
IN
> 3V
10µF
10µF
LT1764-2.5
SHDN SENSE
GND
1764 TA01
0
2.5
0
0.5
1.0
1.5
2.0
3.0
LOAD CURRENT (A)
1764 TA02
1764fb
1
LT1764 Series
W W U W
ABSOLUTE MAXIMUM RATINGS (Note 1)
SHDN Pin Voltage................................................. ±20V
Output Short-Circuit Duration ......................... Indefinite
Operating Junction Temperature Range –40°C to 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
IN Pin Voltage........................................................ ±20V
OUT Pin Voltage .................................................... ±20V
Input to Output Differential Voltage (Note 12) ....... ±20V
SENSE Pin Voltage ............................................... ±20V
ADJ Pin Voltage ...................................................... ±7V
U
W U
PACKAGE/ORDER INFORMATION
TOP VIEW
GND
NC
1
2
3
4
5
6
7
8
16 GND
15 NC
14 IN
FRONT VIEW
FRONT VIEW
SENSE/
ADJ*
5
4
3
2
1
SENSE/ADJ*
OUT
5
4
3
2
1
OUT
OUT
GND
IN
OUT
13 IN
17
TAB IS
GND
GND
OUT
12 IN
IN
SENSE/ADJ*
GND
11 NC
10 SHDN
SHDN
SHDN
TAB IS
GND
T PACKAGE
5-LEAD PLASTIC TO-220
Q PACKAGE
5-LEAD PLASTIC DD
GND
9
GND
FE PACKAGE
*PIN 5 = SENSE FOR LT1764-1.5/LT1764-1.8/
LT1764-2.5/LT1764-3.3
*PIN 5 = SENSE FOR LT1764-1.5/LT1764-1.8/
LT1764-2.5/LT1764-3.3
16-LEAD PLASTIC TSSOP
EXPOSED PAD (PIN 17) IS GND. MUST BE
SOLDERED TO THE PCB.
= ADJ FOR LT1764
= ADJ FOR LT1764
*PIN 6 = SENSE FOR LT1764-1.5/
LT1764-1.8/LT1764-2.5/
LT1764-3.3
TJMAX = 150°C, θJA = 50°C/ W
TJMAX = 150°C, θJA = 30°C/ W
= ADJ FOR LT1764
TJMAX = 150°C, θJA = 38°C/ W
FE PART
MARKING
ORDER PART NUMBER
ORDER PART NUMBER
ORDER PART
NUMBER
1764EFE
LT1764EQ
LT1764ET
LT1764EFE
1764EFE15
1764EFE18
1764EFE25
1764EFE33
LT1764EQ-1.5
LT1764EQ-1.8
LT1764EQ-2.5
LT1764EQ-3.3
LT1764ET-1.5
LT1764ET-1.8
LT1764ET-2.5
LT1764ET-3.3
LT1764EFE-1.5
LT1764EFE-1.8
LT1764EFE-2.5
LT1764EFE-3.3
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
1764fb
2
LT1764 Series
ELECTRICAL CHARACTERISTICS
The
●
denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25°C. (Note 2)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Minimum Input Voltage
(Notes 3, 11)
I
I
I
I
= 0.5A
= 1.5A
1.7
1.9
2.3
2.3
V
V
V
V
LOAD
LOAD
LOAD
LOAD
= 2.7A, 110°C < T ≤ 125°C
2.7
2.7
J
= 3A, –40°C ≤ T ≤ 110°C
J
Regulated Output Voltage
(Note 4)
LT1764-1.5
LT1764-1.8
LT1764-2.5
LT1764-3.3
LT1764
V
= 2.21V, I
= 1mA
1.477
1.447
1.447
1.500
1.500
1.500
1.523
1.545
1.545
V
V
V
IN
LOAD
2.7V < V < 20V, 1mA < I
< 3A, –40°C ≤ T ≤ 110°C
J
IN
LOAD
LOAD
2.7V < V < 20V, 1mA < I
< 2.7A, 110°C < T ≤ 125°C
J
IN
V
= 2.3V, I
= 1mA
LOAD
1.773
1.737
1.737
1.800
1.800
1.800
1.827
1.854
1.854
V
V
V
IN
2.8V < V < 20V, 1mA < I
< 3A, –40°C ≤ T ≤ 110°C
J
< 2.7A, 110°C < T ≤ 125°C
J
IN
LOAD
LOAD
2.8V < V < 20V, 1mA < I
IN
V
= 3V, I
= 1mA
2.462
2.412
2.412
2.500
2.500
2.500
2.538
2.575
2.575
V
V
V
IN
LOAD
3.5V < V < 20V, 1mA < I
< 3A, –40°C ≤ T ≤ 110°C
J
< 2.7A, 110°C < T ≤ 125°C
J
IN
LOAD
LOAD
3.5V < V < 20V, 1mA < I
IN
V
= 3.8V, I
= 1mA
LOAD
3.250
3.183
3.183
3.300
3.300
3.300
3.350
3.400
3.400
V
V
V
IN
4.3V < V < 20V, 1mA < I
< 3A, –40°C ≤ T ≤ 110°C
J
< 2.7A, 110°C < T ≤ 125°C
J
IN
IN
LOAD
LOAD
4.3V < V < 20V, 1mA < I
ADJ Pin Voltage
(Notes 3, 4)
V
= 2.21V, I
= 1mA
1.192
1.168
1.168
1.210
1.210
1.210
1.228
1.246
1.246
V
V
V
IN
LOAD
2.7V < V < 20V, 1mA < I
< 3A, –40°C ≤ T ≤ 110°C
J
IN
IN
LOAD
LOAD
2.7V < V < 20V, 1mA < I
< 2.7A, 110°C < T ≤ 125°C
J
Line Regulation
LT1764-1.5
LT1764-1.8
LT1764-2.5
LT1764-3.3
∆V = 2.21V to 20V, I
= 1mA
●
●
●
●
●
2.5
3
10
10
10
10
10
mV
mV
mV
mV
mV
IN
LOAD
∆V = 2.3V to 20V, I
= 1mA
IN
LOAD
∆V = 3V to 20V, I
IN
= 1mA
= 1mA
= 1mA
4
IN
LOAD
∆V = 3.8V to 20V, I
4.5
2
LOAD
LOAD
LT1764 (Note 3) ∆V = 2.21V to 20V, I
IN
Load Regulation
LT1764-1.5
LT1764-1.8
LT1764-2.5
LT1764-3.3
LT1764 (Note 3)
V
V
V
= 2.7V, ∆I
= 2.7V, ∆I
= 2.7V, ∆I
= 1mA to 3A
3
4
4
4
2
7
23
23
mV
mV
mV
IN
IN
IN
LOAD
LOAD
LOAD
= 1mA to 3A, –40°C ≤ T ≤ 110°C
J
= 1mA to 2.7A, 110°C < T ≤ 125°C
J
V
V
V
= 2.8V, ∆I
= 2.8V, ∆I
= 2.8V, ∆I
= 1mA to 3A
8
25
25
mV
mV
mV
IN
IN
IN
LOAD
LOAD
LOAD
= 1mA to 3A, –40°C ≤ T ≤ 110°C
J
= 1mA to 2.7A, 110°C < T ≤ 125°C
J
V
V
V
= 3.5V, ∆I
= 3.5V, ∆I
= 3.5V, ∆I
= 1mA to 3A
10
30
30
mV
mV
mV
IN
IN
IN
LOAD
LOAD
LOAD
= 1mA to 3A, –40°C ≤ T ≤ 110°C
J
= 1mA to 2.7A, 110°C < T ≤ 125°C
J
V
V
V
= 4.3V, ∆I
= 4.3V, ∆I
= 4.3V, ∆I
= 1mA to 3A
12
40
40
mV
mV
mV
IN
IN
IN
LOAD
LOAD
LOAD
= 1mA to 3A, –40°C ≤ T ≤ 110°C
J
= 1mA to 2.7A, 110°C < T ≤ 125°C
J
V
V
V
= 2.7V, ∆I
= 2.7V, ∆I
= 2.7V, ∆I
= 1mA to 3A
5
20
20
mV
mV
mV
IN
IN
IN
LOAD
LOAD
LOAD
= 1mA to 3A, –40°C ≤ T ≤ 110°C
J
= 1mA to 2.7A, 110°C < T ≤ 125°C
J
Dropout Voltage
I
I
= 1mA
= 1mA
0.02
0.07
0.14
0.25
0.05
0.10
V
V
LOAD
LOAD
V
= V
●
●
●
●
IN
OUT(NOMINAL)
(Notes 5, 6, 11)
I
I
= 100mA
= 100mA
0.13
0.18
V
V
LOAD
LOAD
I
I
= 500mA
= 500mA
0.20
0.27
V
V
LOAD
LOAD
I
I
= 1.5A
= 1.5A
0.33
0.40
V
V
LOAD
LOAD
I
= 2.7A, 110°C < T ≤ 125°C
0.66
V
LOAD
J
I
I
= 3A
0.34
0.45
0.66
V
V
LOAD
LOAD
= 3A, –40°C ≤ T ≤ 110°C
J
1764fb
3
LT1764 Series
ELECTRICAL CHARACTERISTICS
The
●
denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25°C. (Note 2)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
GND Pin Current
I
I
I
I
I
I
I
= 0mA
= 1mA
= 100mA
= 500mA
= 1.5A
= 2.7A, 110°C < T ≤ 125°C
= 3A, –40°C ≤ T ≤ 110°C
●
●
●
●
●
1
1.5
1.6
5
18
75
200
200
mA
mA
mA
mA
mA
mA
mA
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
V
= V
+ 1V
1.1
3.5
11
40
120
120
IN
OUT(NOMINAL)
(Notes 5, 7)
J
J
Output Voltage Noise
ADJ Pin Bias Current
Shutdown Threshold
C
= 10µF, I
= 3A, BW = 10Hz to 100kHz
40
3
µV
RMS
OUT
LOAD
(Notes 3, 8)
10
2
µA
V
V
= Off to On
= On to Off
●
●
0.9
0.75
V
V
OUT
OUT
0.25
55
SHDN Pin Current
(Note 9)
V
V
= 0V
= 20V
0.01
7
1
30
µA
µA
SHDN
SHDN
Quiescent Current in Shutdown
Ripple Rejection
V
= 6V, V
= 0V
0.01
63
1
µA
IN
SHDN
V
– V
= 1.5V (Avg), V
= 0.5V ,
P-P
dB
IN
OUT
RIPPLE
f
= 120Hz, I
= 1.5A
RIPPLE
LOAD
Current Limit
V
= 7V, V
= 0V
4
A
IN
OUT
LT1764-1.8, LT1764-2.5, LT1764-3.3
V
V
= V
= V
+ 1V, ∆V
+ 1V, ∆V
= –0.1V, –40°C ≤ T ≤ 110°C
3.1
2.8
A
A
IN
OUT(NOMINAL)
OUT
J
= –0.1V, 110°C < T ≤ 125°C
IN
OUT(NOMINAL)
OUT
J
LT1764, LT1764-1.5
V
V
= 2.7V, ∆V
= 2.7V, ∆V
= –0.1V, –40°C ≤ T ≤ 110°C
3.1
2.8
A
A
IN
OUT
J
= –0.1V, 110°C < T ≤ 125°C
IN
OUT
J
Input Reverse Leakage Current
V
= –20V, V
= 0V
●
1
mA
IN
OUT
Reverse Output Current (Note 10) LT1764-1.5 V
= 1.5V, V < 1.5V
600
600
600
600
300
1200
1200
1200
1200
600
µA
µA
µA
µA
µA
OUT
OUT
OUT
OUT
IN
LT1764-1.8 V
LT1764-2.5 V
LT1764-3.3 V
= 1.8V, V < 1.8V
IN
= 2.5V, V < 2.5V
IN
= 3.3V, V < 3.3V
IN
LT1764 (Note 3) V
= 1.21V, V < 1.21V
IN
OUT
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 6: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: V – V
.
IN
DROPOUT
Note 7: GND pin current is tested with V = V
+ 1V or
IN
OUT(NOMINAL)
Note 2: The LT1764 regulators are tested and specified under pulse load
V = 2.7V (whichever is greater) and a current source load. The GND pin
IN
conditions such that T ≈ T . The LT1764 is 100% tested at T = 25°C.
current will decrease at higher input voltages.
Note 8: ADJ pin bias current flows into the ADJ pin.
Note 9: SHDN pin current flows into the SHDN pin.
Note 10: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 11. For the LT1764, LT1764-1.5 and LT1764-1.8 dropout voltage will
be limited by the minimum input voltage specification under some output
voltage/load conditions.
J
A
A
Performance at –40°C and 125°C is assured by design, characterization
and correlation with statistical process controls.
Note 3: The LT1764 (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.
Note 4. Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 5: To satisfy requirements for minimum input voltage, the LT1764
(adjustable version) is tested and specified for these conditions with an
external resistor divider (two 4.12k resistors) for an output voltage of 2.42V.
The external resistor divider will add a 300µA DC load on the output.
Note 12. All combinations of absolute maximum input voltage and
absolute maximum output voltage cannot be achieved. The absolute
maximum differential from input to output is ± 20V. For example, with
V
IN
= 20V, V
cannot be pulled below ground.
OUT
1764fb
4
LT1764 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Typical Dropout Voltage
Guaranteed Dropout Voltage
Dropout Voltage
600
500
400
300
200
100
0
700
600
500
400
300
200
100
0
600
500
400
300
= TEST POINTS
T
≤ 125°C
J
T
= 125°C
J
I
L
= 3A
I
L
= 1.5A
T
≤ 25°C
J
200
100
0
T
= 25°C
I
L
= 0.5A
J
I
L
= 100mA
I
L
= 1mA
0
1.0
1.5
2.0
2.5
3.0
0.5
2.0
3.0
50
100 125
0
0.5
1.0
1.5
2.5
–50 –25
0
25
75
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
TEMPERATURE (°C)
1764 G01
1764 G02
1764 G03
Quiescent Current
LT1764-1.8 Output Voltage
LT1764-2.5 Output Voltage
1.4
1.2
1.84
1.83
1.82
1.81
1.80
1.79
1.78
1.77
1.76
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42
I
= 1mA
I = 1mA
L
L
LT1764-1.8/2.5/3.3
1.0
0.8
0.6
0.4
0.2
LT1764
V
= 6V
IN
L
R
=
∞
I
= 0
L
V
= V
SHDN
IN
0
0
50
100 125
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
–50 –25
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
1764 G04
1756 G05
1756 G06
LT1764-3.3 Output Voltage
LT1764 ADJ Pin Voltage
LT1764-1.8 Quiescent Current
40
35
30
25
20
15
10
5
3.38
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22
1.230
1.225
1.220
1.215
1.210
1.205
1.200
1.195
1.190
I
= 1mA
I = 1mA
L
T
= 25°C
L
J
L
R
=
∞
V
= V
IN
SHDN
0
–25
0
50
75 100 125
–25
0
50
75 100 125
–50
25
–50
25
0
1
2
3
4
5
6
7
8
9
10
TEMPERATURE (°C)
TEMPERATURE (°C)
INPUT VOLTAGE (V)
1756 G07
1756 G08
1764 G09
1764fb
5
LT1764 Series
TYPICAL PERFOR A CE CHARACTERISTICS
U W
LT1764-2.5 Quiescent Current
LT1764-3.3 Quiescent Current
LT1764 Quiescent Current
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
T
= 25°C
T
= 25°C
T = 25°C
J
J
L
J
L
R
=
∞
R
=
∞
R
= 4.3k
L
V
= V
V
= V
V
= V
SHDN
IN
SHDN
IN
SHDN
IN
0
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
0
2
4
6
8
10 12 14 16 18 20
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1764 G10
1764 G11
1764 G12
LT1764-1.8 GND Pin Current
LT1764-2.5 GND Pin Current
LT1764-3.3 GND Pin Current
20.0
17.5
15.0
12.5
10.0
7.5
40
35
30
25
20
15
10
5
80
70
60
50
40
30
20
10
0
T
= 25°C
SHDN
T
= 25°C
SHDN
T = 25°C
J
J
V
J
V
= V
= V
IN
V
= V
SHDN IN
IN
*FOR V
= 1.8V
*FOR V
= 2.5V
*FOR V
= 3.3V
OUT
OUT
OUT
R
L
= 5Ω
L
R
L
= 3.6Ω
L
R
L
= 6Ω
L
I
= 500mA*
I
I
= 500mA*
R
L
= 6.6Ω
L
I
= 300mA*
I
= 500mA*
R
= 11Ω
L
R
L
= 25Ω
= 100mA*
R = 8.33Ω
L
I = 300mA*
L
L
I
= 300mA*
L
I
R
L
= 33Ω
L
5.0
I
= 100mA*
R
= 18Ω
L
2.5
= 100mA*
L
0
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1764 G15
1764 G13
1764 G14
LT1764 GND Pin Current
LT1764-1.8 GND Pin Current
LT1764-2.5 GND Pin Current
200
160
120
15
12
9
150
120
90
T
= 25°C
SHDN
T
= 25°C
J
T
= 25°C
SHDN
J
J
V
= V
V
= V
IN
V
= V
IN
SHDN
IN
= 1.8V
*FOR V
= 1.21V
*FOR V
= 2.5V
OUT
*FOR V
OUT
OUT
R
L
= 2.42Ω
L
R
= 0.6Ω
= 3A*
R
= 0.83Ω
L
I
= 500mA*
L
L
L
I
I
= 3A*
R
L
= 4.33Ω
L
I
= 300mA*
80
40
0
6
3
0
60
30
0
R
I
= 1.2Ω
R
L
= 3.57Ω
L
L
R
L
= 2.57Ω
L
R
L
= 12.1Ω
L
L
R
= 1.66Ω
L
L
= 1.5A*
I
= 0.7A*
I
= 0.7A*
I
= 100mA*
I
= 1.5A*
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1764 G18
1764 G16
1764 G17
1764fb
6
LT1764 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
LT1764-3.3 GND Pin Current
LT1764 GND Pin Current
GND Pin Current vs ILOAD
200
160
120
150
120
90
160
140
120
100
V
= V
+ 1V
OUT(NOM)
T
= 25°C
SHDN
T = 25°C
J
IN
J
V
= V
V
= V
SHDN IN
IN
= 3.3V
*FOR V
*FOR V
= 1.21V
OUT
OUT
R
= 0.4Ω
= 3A*
L
L
R
= 1.1Ω
= 3A*
I
L
L
I
80
60
R
= 0.81Ω
L
L
80
40
0
60
30
0
I
= 1.5A*
R
L
= 1.73Ω
L
R
L
= 4.71Ω
R
I
= 2.2Ω
L
L
L
I
= 0.7A*
I
= 0.7A*
= 1.5A*
40
20
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
0
0.5
1.0
2.0
2.5
3.0
1.5
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
OUTPUT CURRENT (A)
1764 G19
1764 G20
1764 G21
SHDN Pin Threshold
(Off-to-On)
SHDN Pin Threshold
(On-to-Off)
SHDN Pin Input Current
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
10
9
8
7
6
5
4
3
2
1
0
I
= 1mA
L
I
= 3A
L
I
= 1mA
L
–50
0
25
50
75 100 125
–25
0
2
4
6
8
10 12 14 16 18 20
–50
0
25
50
75 100 125
–25
TEMPERATURE (°C)
TEMPERATURE (°C)
SHDN PIN VOLTAGE (V)
1764 G22
1764 G24
1764 G23
SHDN Pin Input Current
ADJ Pin Bias Current
Current Limit
10
9
8
7
6
5
4
3
2
1
0
6
5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 20V
SHDN
T
= –50°C
J
4
3
T
J
= 125°C
T
J
= 25°C
2
1
0
0
2
4
6
8
10 12 14 16 18 20
–50
0
25
50
75 100 125
–25
–25
0
50
75 100 125
–50
25
INPUT/OUTPUT DIFFERENTIAL (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
1764 G27
1764 G25
1756 G26
1764fb
7
LT1764 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Current Limit
Reverse Output Current
6
5
4
3
5.0
V
IN
V
OUT
= 7V
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
= 0V
LT1764
LT1764-1.8
LT1764-2.5
LT1764-3.3
T
= 25°C
IN
J
V
= 0V
2
1
0
CURRENT FLOWS
INTO OUTPUT PIN
(LT1764)
OUT
(LT1764-1.8/-2.5/-3.3)
V
= V
OUT
ADJ
V
= V
FB
50
TEMPERATURE (°C)
100 125
0
1
2
3
6
7
8
9
10
–50 –25
0
25
75
4
5
OUTPUT VOLTAGE (V)
1764 G28
1764 G29
Ripple Rejection
Reverse Output Current
80
70
60
50
40
30
20
10
0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
V
V
V
V
= 0V
IN
= 1.21V (LT1764)
OUT
OUT
OUT
OUT
= 1.8V (LT1764-1.8)
= 2.5V (LT1764-2.5)
= 3.3V (LT1764-3.3)
C
= 100µF
OUT
LT1764-1.8/-2.5/-3.3
TANTALUM +
10 × 1µF
CERAMIC
LT1764
C
= 10µF
OUT
TANTALUM
I
= 1.5A
L
V
= V
+ 1V
RMS
IN
OUT(NOM)
+ 50mV
RIPPLE
10
100
1k
10k
100k
1M
–50
0
25
50
75 100 125
–25
FREQUENCY (Hz)
TEMPERATURE (°C)
1764 G31
1764 G30
Ripple Rejection
LT1764 Minimum Input Voltage
3.0
2.5
2.0
1.5
75
70
65
60
55
50
I
= 1.5A
L
V
= V
+ 1V
IN
OUT(NOM)
+ 0.5V RIPPLE
P-P
AT f = 120Hz
I
I
= 3A
L
L
= 1.5A
I
= 500mA
L
I
= 100mA
L
1.0
0.5
0
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
1764 G33
1764 G32
1764fb
8
LT1764 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Load Regulation
Output Noise Spectral Density
10
1
C
LOAD
= 10µF
= 3A
OUT
I
5
LT1764
0
–5
LT1764-3.3
LT1764
LT1764-2.5
LT1764-1.8
LT1764-1.8
–10
–15
–20
–25
–30
0.1
LT1764-2.5
LT1764-3.3
∆I = 1mA TO 3A
L
IN
IN
V
V
= 2.7V (LT1764)
= V
+ 1V
OUT(NOM)
(LT1764-1.8/-2.5/-3.3)
0.01
–25
0
50
75 100 125
–50
25
10
100
1k
10k
100k
TEMPERATURE (°C)
FREQUENCY (Hz)
1764 G35
1764 G34
RMS Output Noise vs Load Current
(10Hz to 100kHz)
LT1764-3.3 10Hz to 100kHz
Output Noise
40
35
30
25
20
15
10
5
C
= 10µF
OUT
LT1764-3.3
LT1764-2.5
V
OUT
100µV/
LT1764-1.8
LT1764
DIV
C
= 10µF
1ms/DIV
1764 G37
OUT
= 3A
I
L
0
0.0001 0.001
0.01
0.1
1
10
LOAD CURRENT (A)
1764 G36
LT1764-3.3 Transient Response
LT1764-3.3 Transient Response
0.2
0.1
0.2
0.1
0
0
V
C
C
= 4.3V
–0.1
–0.2
1.00
0.75
0.50
0.25
0
–0.1
–0.2
IN
IN
V
C
C
= 4.3V
IN
IN
= 3.3µF TANTALUM
= 33µF
= 10µF TANTALUM
OUT
= 100µF TANTALUM
+ 10 × 1µF CERAMIC
OUT
3
2
1
0
0
2
4
6
8
10 12 14 16 18 20
0
2
4
6
8
10 12 14 16 18 20
TIME (µs)
TIME (µs)
1764 G38
1764 G39
1764fb
9
LT1764 Series
U
U
U
PI FU CTIO S
(DD and TO-220/TSSOP)
SHDN (Pin 1/Pin 10): Shutdown. The SHDN pin is used to
put the LT1764 regulators into a low power shutdown
state. The output will be off when the SHDN pin is pulled
low. The SHDN pin can be driven either by 5V logic or
open-collector logic with a pull-up resistor. The pull-up
resistor is required to supply the pull-up current of the
open-collector gate, normally several microamperes, and
the SHDN pin current, typically 7µA. If unused, the SHDN
pin must be connected to VIN. The device will be in the low
power shutdown state if the SHDN pin is not connected.
OUT (Pin 4/Pins 3, 4, 5): Output. The output supplies
power to the load. A minimum output capacitor of 10µF is
required to prevent oscillations. Larger output capacitors
will be required for applications with large transient loads
to limit peak voltage transients. See the Applications
Information section for more information on output ca-
pacitance and reverse output characteristics.
SENSE (Pin 5/Pin 6): Sense. For fixed voltage versions of
the LT1764 (LT1764-1.8/LT1764-2.5/LT1764-3.3), the
SENSE pin is the input to the error amplifier. Optimum
regulation will be obtained at the point where the SENSE
pin is connected to the OUT pin of the regulator. In critical
applications, small voltage drops are caused by the resis-
tance(RP)ofPCtracesbetweentheregulatorandtheload.
These may be eliminated by connecting the SENSE pin to
the output at the load as shown in Figure 1 (Kelvin Sense
Connection). Note that the voltage drop across the exter-
nal PC traces will add to the dropout voltage of the
regulator. The SENSE pin bias current is 600µA at the
nominalratedoutputvoltage.TheSENSEpincanbepulled
below ground (as in a dual supply system where the
regulator load is returned to a negative supply) and still
allow the device to start and operate.
IN (Pin 2/Pins 12, 13, 14): Input. Power is supplied to the
device through the IN pin. A bypass capacitor is required
on this pin if the device is more than six inches away from
the main input filter capacitor. In general, the output
impedance of a battery rises with frequency, so it is
advisable to include a bypass capacitor in battery-pow-
ered circuits. A bypass capacitor in the range of 1µF to
10µF is sufficient. The LT1764 regulators are designed to
withstand reverse voltages on the IN pin with respect to
ground and the OUT pin. In the case of a reverse input,
which can happen if a battery is plugged in backwards, the
device will act as if there is a diode in series with its input.
There will be no reverse current flow into the regulator and
no reverse voltage will appear at the load. The device will
protect both itself and the load.
ADJ (Pin 5/Pin 6): Adjust. For the adjustable LT1764, this
is the input to the error amplifier. This pin is internally
clamped to ±7V. It has a bias current of 3µA which flows
into the pin. The ADJ pin voltage is 1.21V referenced to
ground and the output voltage range is 1.21V to 20V.
GND (Pin 3/Pins 1, 7, 8, 9, 16, 17): Ground. The exposed
pad (FE Package) is ground and must be soldered to the
PCB for rated thermal performance.
R
P
2
4
5
IN
OUT
LT1764
+
1
+
SHDN SENSE
GND
LOAD
V
IN
3
R
P
1764 F01
Figure 1. Kelvin Sense Connection
1764fb
10
LT1764 Series
W U U
APPLICATIO S I FOR ATIO
U
The LT1764 series are 3A low dropout regulators opti-
mized for fast transient response. The devices are capable
of supplying 3A at a dropout voltage of 340mV. The low
operating quiescent current (1mA) drops to less than 1µA
in shutdown. In addition to the low quiescent current, the
LT1764regulatorsincorporateseveralprotectionfeatures
which make them ideal for use in battery-powered sys-
tems.Thedevicesareprotectedagainstbothreverseinput
and reverse output voltages. In battery backup applica-
tions where the output can be held up by a backup battery
when the input is pulled to ground, the LT1764-X acts like
it has a diode in series with its output and prevents reverse
current flow. Additionally, in dual supply applications
where the regulator load is returned to a negative supply,
the output can be pulled below ground by as much as 20V
and still allow the device to start and operate.
be proportional to the ratio of the desired output voltage to
1.21V: VOUT/1.21V. For example, load regulation for an
output current change of 1mA to 3A is –3mV typical at
V
OUT = 1.21V. At VOUT = 5V, load regulation is:
(5V/1.21V)(–3mV) = –12.4mV
Output Capacitance and Transient Response
The LT1764 regulators are designed to be stable with a
wide range of output capacitors. The ESR of the output
capacitor affects stability, most notably with small capaci-
tors. A minimum output capacitor of 10µF with an ESR in
the range of 50mΩ to 3Ω is recommended to prevent
oscillations. Larger values of output capacitance can de-
crease the peak deviations and provide improved transi-
ent response for larger load current changes. Bypass
capacitors, used to decouple individual components pow-
ered by the LT1764-X, will increase the effective output
capacitor value.
Adjustable Operation
The adjustable version of the LT1764 has an output
voltage range of 1.21V to 20V. The output voltage is set by
theratiooftwoexternalresistorsasshowninFigure2.The
deviceservostheoutputtomaintainthevoltageatthe ADJ
pin at 1.21V referenced to ground. The current in R1 is
then equal to 1.21V/R1 and the current in R2 is the current
in R1 plus the ADJ pin bias current. The ADJ pin bias
current, 3µA at 25°C, flows through R2 into the ADJ pin.
The output voltage can be calculated using the formula in
Figure 2. The value of R1 should be less than 4.17k to
minimize errors in the output voltage caused by the ADJ
pinbiascurrent.Notethatinshutdowntheoutputisturned
off and the divider current will be zero.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common di-
electrics used are specified with EIA temperature charac-
teristiccodesofZ5U,Y5V,X5RandX7R.TheZ5UandY5V
dielectrics are good for providing high capacitances in a
small package, but they tend to have strong voltage and
temperature coefficients as shown in Figures 3 and 4.
When used with a 5V regulator, a 16V 10µF Y5V capacitor
can exhibit an effective value as low as 1µF to 2µF for the
DC bias voltage applied and over the operating tempera-
ture range. The X5R and X7R dielectrics result in more
stable characteristics and are more suitable for use as the
output capacitor. The X7R type has better stability across
temperature, while the X5R is less expensive and is
available in higher values. Care still must be exercised
when using X5R and X7R capacitors; the X5R and X7R
codesonlyspecifyoperatingtemperaturerangeandmaxi-
mum capacitance change over temperature. Capacitance
change due to DC bias with X5R and X7R capacitors is
better than Y5V and Z5U capacitors, but can still be
significant enough to drop capacitor values below appro-
priate levels. Capacitor DC bias characteristics tend to
improve as component case size increases, but expected
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.21V.
Specifications for output voltages greater than 1.21V will
IN
OUT
ADJ
V
OUT
+
V
IN
R2
R1
LT1764
GND
R2
⎞
⎟
⎠
R1
⎛
⎝
VOUT = 1.21V 1+
+ I
R2
(
ADJ)(
)
⎜
VADJ = 1.21V
IADJ = 3µA AT 25°C
OUTPUT RANGE = 1.21V TO 20V
1764 F02
Figure 2. Adjustable Operation
capacitance at operating voltage should be verified.
1764fb
11
LT1764 Series
W U U
U
APPLICATIO S I FOR ATIO
20
Theprotectionisdesignedtoprovidesomeoutputcurrent
at all values of input-to-output voltage up to the device
breakdown.
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
0
X5R
–20
When power is first turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start-up, as the input
voltage is rising, the input-to-output voltage differential is
small, allowing the regulator to supply large output cur-
rents. With a high input voltage, a problem can occur
wherein removal of an output short will not allow the
output voltage to recover. Other regulators, such as the
LT1085, also exhibit this phenomenon, so it is not unique
to the LT1764 series.
–40
–60
Y5V
–80
–100
0
14 16
2
4
6
8
10 12
DC BIAS VOLTAGE (V)
1764 F03
Figure 3. Ceramic Capacitor DC Bias Characteristics
The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Com-
mon situations are immediately after the removal of a
short circuit or when the SHDN pin is pulled high after the
input voltage has already been turned on. The load line for
such a load may intersect the output current curve at two
points. If this happens, there are two stable output oper-
ating points for the regulator. With this double intersec-
tion, the input power supply may need to be cycled down
to zero and brought up again to make the output recover.
40
20
X5R
0
–20
–40
Y5V
–60
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
Output Voltage Noise
1764 F04
The LT1764 regulators have been designed to provide low
output voltage noise over the 10Hz to 100kHz bandwidth
while operating at full load. Output voltage noise is typi-
cally 50nV√Hz over this frequency bandwidth for the
LT1764 (adjustable version). For higher output voltages
(generated by using a resistor divider), the output voltage
noise will be gained up accordingly. This results in RMS
noise over the 10Hz to 100kHz bandwidth of 15µVRMS for
the LT1764 increasing to 37µVRMS for the LT1764-3.3.
Figure 4. Ceramic Capacitor Temperature Characteristics
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or micro-
phone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.
Higher values of output voltage noise may be measured
when care is not exercised with regards to circuit layout
and testing. Crosstalk from nearby traces can induce
unwanted noise onto the output of the LT1764-X. Power
supplyripplerejectionmustalsobeconsidered;theLT1764
regulators do not have unlimited power supply rejection
and will pass a small portion of the input noise through to
the output.
Overload Recovery
Like many IC power regulators, the LT1764-X has safe
operating area protection. The safe area protection de-
creases the current limit as input-to-output voltage in-
creases and keeps the power transistor inside a safe
operating region for all values of input-to-output voltage.
1764fb
12
LT1764 Series
U
W U U
APPLICATIONS INFORMATION
Thermal Considerations
Table 2. FE Package, 16-Lead TSSOP
COPPER AREA
THERMAL RESISTANCE
BOARD AREA (JUNCTION-TO-AMBIENT)
The power handling capability of the device is limited
by the maximum rated junction temperature (125°C).
The power dissipated by the device is made up of two
components:
TOPSIDE*
2500mm2
1000mm2
225mm2
BACKSIDE
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
38°C/W
43°C/W
48°C/W
60°C/W
100mm2
1. Output current multiplied by the input/output voltage
differential: (IOUT)(VIN – VOUT), and
* Device is mounted on topside
2. GND pin current multiplied by the input voltage:
(IGND)(VIN).
T Package, 5-Lead TO-220
Thermal Resistance (Junction-to-Case) = 2.5°C/W
The GND pin current can be found using the GND Pin
Current curves in the Typical Performance Characteris-
tics. Power dissipation will be equal to the sum of the two
components listed above.
Calculating Junction Temperature
Example: Given an output voltage of 3.3V, an input voltage
range of 4V to 6V, an output current range of 0mA to
500mA and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The LT1764 series regulators have internal thermal limit-
ing designed to protect the device during overload condi-
tions. For continuous normal conditions, the maximum
junction temperature rating of 125°C must not be
exceeded. It is important to give careful consideration to
allsourcesofthermalresistancefromjunctiontoambient.
Additional heat sources mounted nearby must also be
considered.
The power dissipated by the device will be equal to:
IOUT(MAX)(VIN(MAX) – VOUT) + IGND(VIN(MAX)
)
where,
IOUT(MAX) = 500mA
VIN(MAX) = 6V
IGND at (IOUT = 500mA, VIN = 6V) = 10mA
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Surface mount heatsinks and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
So,
P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W
Using a DD package, the thermal resistance will be in the
range of 23°C/W to 33°C/W depending on the copper
area. So the junction temperature rise above ambient will
be approximately equal to:
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 1/16" FR-4 board with one ounce
copper.
1.41W(28°C/W) = 39.5°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
Table 1. Q Package, 5-Lead DD
COPPER AREA
THERMAL RESISTANCE
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500mm2
1000mm2
125mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
23°C/W
25°C/W
33°C/W
TJMAX = 50°C + 39.5°C = 89.5°C
* Device is mounted on topside
1764fb
13
LT1764 Series
U
W U U
APPLICATIONS INFORMATION
Protection Features
The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. Iftheinputisleftopencircuitorgrounded, theADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 5k) in series with a diode
when pulled above ground.
The LT1764 regulators incorporate several protection
featureswhichmakethemidealforuseinbattery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
fromthe1.21Vreferencewhentheoutputisforcedto20V.
The top resistor of the resistor divider must be chosen to
limitthecurrentintotheADJpintolessthan5mAwhenthe
ADJpinisat7V. The13VdifferencebetweenOUTandADJ
pinsdividedbythe5mAmaximumcurrentintotheADJpin
yields a minimum top resistor value of 2.6k.
Current limit protection and thermal overload protection
areintendedtoprotectthedeviceagainstcurrentoverload
conditions at the output of the device. For normal opera-
tion, the junction temperature should not exceed 125°C.
The input of the device will withstand reverse voltages of
20V.Currentflowintothedevicewillbelimitedtolessthan
1mA and no negative voltage will appear at the output. The
device will protect both itself and the load. This provides
protection against batteries which can be plugged in
backward.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage, or is left
open circuit. Current flow back into the output will follow
the curve shown in Figure 5.
The output of the LT1764-X can be pulled below ground
withoutdamagingthedevice.Iftheinputisleftopencircuit
or grounded, the output can be pulled below ground by
20V. For fixed voltage versions, the output will act like a
large resistor, typically 5k or higher, limiting current flow
to typically less than 600µA. For adjustable versions, the
output will act like an open circuit; no current will flow out
of the pin. If the input is powered by a voltage source, the
output will source the short-circuit current of the device
and will protect itself by thermal limiting. In this case,
grounding the SHDN pin will turn off the device and stop
the output from sourcing the short-circuit current.
When the IN pin of the LT1764-X is forced below the OUT
pin or the OUT pin is pulled above the IN pin, input current
will typically drop to less than 2µA. This can happen if the
input of the device is connected to a discharged (low
voltage) battery and the output is held up by either a
backup battery or a second regulator circuit. The state of
the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.
5.0
T
V
= 25°C
J
4.5
= OV
LT1764
IN
CURRENT FLOWS INTO
OUTPUT PIN
V
V
4.0
3.5
= V (LT1764)
ADJ
LT1764-1.8
OUT
3.0
2.5
2.0
1.5
1.0
0.5
0
= V (LT1764-1.8,
FB
OUT
LT1764-2.5, LT1764-3.3)
LT1764-2.5
LT1764-3.3
0
1
2
3
4
5
6
7
8
9
10
OUTPUT VOLTAGE (V)
1764 F05
Figure 5. Reverse Output Current
1764fb
14
LT1764 Series
U
TYPICAL APPLICATIO S
SCR Preregulator Provides Efficiency Over Line Variations
L1
500µH
LT1764-3.3
NTE5437
V
3.3V
3A
OUT
L2
IN
SHDN
GND
OUT
FB
1N4148
1k
+
+
10V AC
10000µF
22µF
AT 115V
IN
90V AC
TO 140V AC
34k*
10V AC
AT 115V
IN
12.1k*
NTE5437
1N4002
1N4002
1N4002
+
V
“SYNC”
2.4k
TO
+
200k
ALL “V ”
+
1N4148
+
POINTS
C1A
1/2 LT1018
22µF
750Ω
0.1µF
–
+
V
+
V
750Ω
0.033µF
+
C1B
+
1N4148
10k
1/2 LT1018
A1
LT1006
–
10k
10k
+
V
–
L1: COILTRONICS CTX500-2-52
L2: STANCOR P-8560
*1% FILM RESISTOR
1µF
+
V
LT1004
1.2V
1764 TA03
1764fb
15
LT1764 Series
U
TYPICAL APPLICATIO S
Adjustable Current Source
R5
0.01Ω
IN
LT1764-1.8
SHDN FB
GND
OUT
R1
1k
+
C1
10µF
LT1004-1.2
LOAD
V
IN
> 2.7V
R2
40.2k
R4
2.2k
R6
2.2k
R8
100k
R3
2k
C3
1µF
R7
470Ω
ADJUST R1 FOR 0A TO 3A
CONSTANT CURRENT
–
2
3
8
1
1/2 LT1366
+
4
C2
3.3µF
1764 TA04
1764fb
16
LT1764 Series
U
PACKAGE DESCRIPTION
Q Package
5-Lead Plastic DD Pak
(LTC DWG # 05-08-1461)
.060
(1.524)
TYP
.390 – .415
(9.906 – 10.541)
.060
(1.524)
.165 – .180
(4.191 – 4.572)
.256
(6.502)
.045 – .055
(1.143 – 1.397)
15° TYP
+.008
.004
–.004
.060
(1.524)
.059
(1.499)
TYP
.183
(4.648)
.330 – .370
(8.382 – 9.398)
+0.203
–0.102
0.102
(
)
.095 – .115
(2.413 – 2.921)
.075
(1.905)
.067
(1.702)
BSC
.050
(1.270
±
±
.012
0.305)
.300
(7.620)
.013 – .023
(0.330 – 0.584)
+.012
.143
–.020
.028 – .038
+0.305
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
3.632
Q(DD5) 0502
(0.711 – 0.965)
(
)
–0.508
TYP
.420
.276
.080
.420
.350
.325
.205
.565
.565
.320
.090
.042
.090
.042
.067
.067
RECOMMENDED SOLDER PAD LAYOUT
NOTE:
RECOMMENDED SOLDER PAD LAYOUT
FOR THICKER SOLDER PASTE APPLICATIONS
1. DIMENSIONS IN INCH/(MILLIMETER)
2. DRAWING NOT TO SCALE
1764fb
17
LT1764 Series
PACKAGE DESCRIPTION
U
T Package
5-Lead Plastic TO-220 (Standard)
(LTC DWG # 05-08-1421)
0.165 – 0.180
(4.191 – 4.572)
0.147 – 0.155
(3.734 – 3.937)
DIA
0.390 – 0.415
(9.906 – 10.541)
0.045 – 0.055
(1.143 – 1.397)
0.230 – 0.270
(5.842 – 6.858)
0.570 – 0.620
(14.478 – 15.748)
0.620
(15.75)
TYP
0.460 – 0.500
(11.684 – 12.700)
0.330 – 0.370
(8.382 – 9.398)
0.700 – 0.728
(17.78 – 18.491)
0.095 – 0.115
(2.413 – 2.921)
SEATING PLANE
0.152 – 0.202
(3.861 – 5.131)
0.155 – 0.195*
(3.937 – 4.953)
0.260 – 0.320
(6.60 – 8.13)
0.013 – 0.023
(0.330 – 0.584)
0.067
BSC
0.135 – 0.165
(3.429 – 4.191)
0.028 – 0.038
(0.711 – 0.965)
(1.70)
* MEASURED AT THE SEATING PLANE
T5 (TO-220) 0399
1764fb
18
LT1764 Series
U
PACKAGE DESCRIPTION
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BB
4.90 – 5.10*
(.193 – .201)
3.58
(.141)
3.58
(.141)
16 1514 13 12 1110
9
6.60 ±0.10
4.50 ±0.10
2.94
(.116)
6.40
(.252)
BSC
SEE NOTE 4
2.94
(.116)
0.45 ±0.05
1.05 ±0.10
0.65 BSC
5
7
8
1
2
3
4
6
RECOMMENDED SOLDER PAD LAYOUT
1.10
(.0433)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0° – 8°
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
0.195 – 0.30
FE16 (BB) TSSOP 0204
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
1764fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LT1764 Series
U
TYPICAL APPLICATIO
Paralleling of Regulators for Higher Output Current
R1
0.01Ω
3.3V
6A
IN
OUT
FB
+
+
LT1764-3.3
C1
100µF
C2
22µF
V
> 3.7V
IN
SHDN
GND
R2
0.01Ω
IN
OUT
R6
6.65k
LT1764
SHDN
SHDN
ADJ
R7
4.12k
GND
R3
2.2k
R4
2.2k
3
2
8
R5
1k
+
1
1/2 LT1366
–
C3
0.01µF
4
1764 TA05
RELATED PARTS
PART NUMBER
LT1120
DESCRIPTION
125mA Low Dropout Regulator with 20µA I
COMMENTS
Includes 2.5V Reference and Comparator
Q
LT1121
150mA Micropower Low Dropout Regulator
700mA Micropower Low Dropout Regulator
30µA I , SOT-223 Package
Q
LT1129
50µA Quiescent Current
LT1175
500mA Negative Low Dropout Micropower Regulator
4.5A, 500kHz Step-Down Converter
45µA I , 0.26V Dropout Voltage, SOT-223 Package
Q
LT1374
4.5A, 0.07Ω Internal Switch, SO-8 Package
LT1521
300mA Low Dropout Micropower Regulator with Shutdown
15µA I , Reverse Battery Protection
Q
LT1529
3A Low Dropout Regulator with 50µA I
500mV Dropout Voltage
Q
LT1573
UltraFastTM Transient Response Low Dropout Regulator
UltraFast Transient Response Low Dropout Regulator
Synchronous Step-Down Converter
Drives External PNP
LT1575
Drives External N-Channel MOSFET
High Efficiency, OPTI-LOOP® Compensation
LT1735
LT1761 Series
LT1762 Series
LT1763 Series
LT1962
100mA, Low Noise, Low Dropout Micropower Regulators in SOT-23 20µA Quiescent Current, 20µV
Noise, SOT-23 Package
Noise, MSOP Package
Noise, SO-8 Package
RMS
RMS
RMS
150mA, Low Noise, LDO Micropower Regulators
500mA, Low Noise, LDO Micropower Regulators
300mA, Low Noise, LDO Micropower Regulator
1.5A, Low Noise, Fast Transient Response LDO
25µA Quiescent Current, 20µV
30µA Quiescent Current, 20µV
20µV
40µV
Noise, MSOP Package
RMS
RMS
LT1963
Noise, SOT-223 Package
UltraFast is a trademark of Linear Technology Corporation.
OPTI-LOOP is a registered trademark of Linear Technology Corporation.
1764fb
LT 1205 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005
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