LT1886 [Linear]
Dual 700MHz, 200mA Operational Amplifier; 双700MHz的型，200mA运算放大器
| 型号： | LT1886 |
| 厂家： | 
Linear |
| 描述： | Dual 700MHz, 200mA Operational Amplifier |
| 文件： | 总16页 (文件大小：334K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1886
Dual 700MHz, 200mA
Operational Amplifier
U
DESCRIPTIO
FEATURES
The LT®1886 is a 200mA minimum output current dual op
amp with outstanding distortion performance. The ampli-
fiersaregain-of-tenstable, butcanbeeasilycompensated
for lower gains. The LT1886 features balanced, high
impedance inputs with 4µA maximum input bias current,
and 4mV maximum input offset voltage. Single supply
applications are easy to implement and have lower total
noise than current feedback amplifier implementations.
■
700MHz Gain Bandwidth
■
±200mA Minimum IOUT
■
Low Distortion: –72dBc at 1MHz, 4VP-P, 25Ω, AV = 2
■
Stable in AV ≥ 10, Simple Compensation for AV < 10
■
±4.3V Minimum Output Swing, VS = ±6V, RL = 25Ω
■
7mA Supply Current per Amplifier
200V/µs Slew Rate
Stable with 1000pF Load
■
■
■
6nV/√Hz Input Noise Voltage
2pA/√Hz Input Noise Current
The output drives a 25Ω load to ±4.3V with ±6V supplies.
On ±2.5V supplies the output swings ±1.5V with a 100Ω
load. The amplifier is stable with a 1000pF capacitive
load which makes it useful in buffer and cable driver
applications.
■
■
4mV Maximum Input Offset Voltage
■
4µA Maximum Input Bias Current
■
400nA Maximum Input Offset Current
■
±4.5V Minimum Input CMR, VS = ±6V
■
The LT1886 is manufactured on Linear Technology’s
advancedlowvoltagecomplementarybipolarprocessand
is available in a thermally enhanced SO-8 package.
Specified at ±6V, ±2.5V
U
APPLICATIO S
■
DSL Modems
■
xDSL PCI Cards
■
USB Modems
Line Drivers
■
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
TYPICAL APPLICATIO
Single 12V Supply ADSL Modem Line Driver
12V
ADSL Modem Line Driver Distortion
0.1µF
–60
+
IN
+
V
A
= 12V
= 10
S
V
12.4Ω
1/2 LT1886
f = 200kHz
100Ω LINE
1:2 TRANSFORMER
–70
–80
–
909Ω
10k
10k
20k
20k
HD2
HD3
1:2*
100Ω
100Ω
1µF
1µF
100Ω
–90
909Ω
*COILCRAFT X8390-A
OR EQUIVALENT
–
–100
12.4Ω
0
2
4
6
8
10 12 14 16
1886 TA01
0.1µF
1/2 LT1886
+
LINE VOLTAGE (V
)
P-P
–
IN
1886 TA01a
1
LT1886
W W U W
W
U
ABSOLUTE MAXIMUM RATINGS
/O
PACKAGE RDER I FOR ATIO
(Note 1)
Total Supply Voltage (V+ to V–) ........................... 13.2V
Input Current (Note 2) ....................................... ±10mA
Input Voltage (Note 2) ............................................ ±VS
Maximum Continuous Output Current (Note 3)
DC ............................................................... ±100mA
AC ............................................................... ±300mA
Operating Temperature Range (Note 10) –40°C to 85°C
Specified Temperature Range (Note 9).. –40°C to 85°C
Maximum Junction Temperature ......................... 150°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
TOP VIEW
NUMBER
+
OUT A
–IN A
+IN A
1
2
3
4
8
7
6
5
V
OUT B
–IN B
+IN B
LT1886CS8
A
B
–
V
S8 PART MARKING
1886
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 80°C/W (Note 4)
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temp-
erature range, otherwise specifications are at TA = 25°C. VS = ±6V, VCM = 0V, pulse power tested unless otherwise noted. (Note 9)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
(Note 5)
1
4
5
mV
mV
OS
●
●
Input Offset Voltage Drift
Input Offset Current
(Note 8)
3
17
µV/°C
I
I
150
400
600
nA
nA
OS
●
●
Input Bias Current
1.5
4
6
µA
µA
B
e
Input Noise Voltage
Input Noise Current
Input Resistance
f = 10kHz
f = 10kHz
6
2
nV/√Hz
pA/√Hz
n
i
n
R
V
= ±4.5V
CM
5
10
35
MΩ
kΩ
IN
Differential
C
Input Capacitance
2
pF
IN
Input Voltage Range (Positive)
Input Voltage Range (Negative)
●
●
4.5
77
5.9
–5.2
V
V
–4.5
CMRR
PSRR
Common Mode Rejection Ratio
Minimum Supply Voltage
V
= ±4.5V
●
●
98
dB
V
CM
Guaranteed by PSRR
V = ±2V to ±6.5V
±2
Power Supply Rejection Ratio
80
78
86
12
12
5
dB
dB
S
●
●
●
●
●
●
A
Large-Signal Voltage Gain
Output Swing
V
V
= ±4V, R = 100Ω
5.0
4.5
V/mV
V/mV
VOL
OUT
OUT
L
= ±4V, R = 25Ω
4.5
4.0
V/mV
V/mV
L
V
R = 100Ω, 10mV Overdrive
4.85
4.70
±V
±V
OUT
L
R = 25Ω, 10mV Overdrive
4.30
4.10
4.6
4.5
±V
±V
L
I
= 200mA, 10mV Overdrive
4.30
4.10
±V
±V
OUT
I
Short-Circuit Current (Sourcing)
Short-Circuit Current (Sinking)
(Note 3)
800
500
mA
mA
SC
2
LT1886
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temp-
erature range, otherwise specifications are at TA = 25°C. VS = ±6V, VCM = 0V, pulse power tested unless otherwise noted. (Note 9)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SR
Slew Rate
A = –10 (Note 6)
V
133
110
200
V/µs
V/µs
●
Full Power Bandwidth
Gain Bandwidth
Rise Time, Fall Time
Overshoot
4V Peak (Note 7)
f = 1MHz
8
700
4
MHz
MHz
ns
GBW
t , t
A = 10, 10% to 90% of 0.1V, R = 100Ω
V L
r
f
A = 10, 0.1V, R = 100Ω
1
%
V
L
Propagation Delay
Settling Time
A = 10, 50% V to 50% V , 0.1V, R = 100Ω
2.5
50
ns
V
IN
OUT
L
t
6V Step, 0.1%
ns
S
Harmonic Distortion
HD2, A = 10, 2V , f = 1MHz, R = 100Ω/25Ω
–75/–63
–85/–71
dBc
dBc
V
P-P
L
HD3, A = 10, 2V , f = 1MHz, R = 100Ω/25Ω
V
P-P
L
IMD
Intermodulation Distortion
Output Resistance
A = 10, f = 0.9MHz, 1MHz, 14dBm, R = 100Ω/25Ω
–81/–80
0.1
dBc
V
L
R
OUT
A = 10, f = 1MHz
V
Ω
Channel Separation
V
= ±4V, R = 25Ω
82
80
92
dB
dB
OUT
L
●
●
I
Supply Current
Per Amplifier
7
8.25
8.50
mA
mA
S
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = ±2.5V, VCM = 0V, pulse power tested unless otherwise noted. (Note 9)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
(Note 5)
1.5
5
6
mV
mV
OS
●
●
Input Offset Voltage Drift
Input Offset Current
(Note 8)
5
17
µV/°C
I
I
100
350
550
nA
nA
OS
●
●
Input Bias Current
1.2
3.5
5.5
µA
µA
B
e
Input Noise Voltage
Input Noise Current
Input Resistance
f = 10kHz
f = 10kHz
6
2
nV/√Hz
pA/√Hz
n
i
n
R
V
= ±1V
CM
10
20
50
MΩ
kΩ
IN
Differential
C
Input Capacitance
2
pF
IN
Input Voltage Range (Positive)
Input Voltage Range (Negative)
●
●
1
2.4
–1.7
V
V
–1
CMRR
Common Mode Rejection Ratio
Large-Signal Voltage Gain
V
V
= ±1V
●
●
●
●
●
●
75
91
10
dB
CM
A
= ±1V, R = 100Ω
5.0
4.5
V/mV
V/mV
VOL
OUT
L
V
= ±1V, R = 25Ω
4.5
4.0
10
1.65
1.50
1
V/mV
V/mV
OUT
L
V
Output Swing
R = 100Ω, 10mV Overdrive
1.50
1.40
±V
±V
OUT
L
R = 25Ω, 10mV Overdrive
1.35
1.25
±V
±V
L
I
= 200mA, 10mV Overdrive
0.87
0.80
±V
±V
OUT
3
LT1886
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temp-
erature range, otherwise specifications are at TA = 25°C. VS = ±2.5V, VCM = 0V, pulse power tested unless otherwise noted. (Note 9)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Short-Circuit Current (Sourcing)
Short-Circuit Current (Sinking)
(Note 3)
600
400
mA
mA
SC
SR
Slew Rate
A = –10 (Note 6)
V
66
60
100
V/µs
V/µs
●
Full Power Bandwidth
Gain Bandwidth
1V Peak (Note 7)
f = 1MHz
16
530
7
MHz
MHz
ns
GBW
t , t
Rise Time, Fall Time
Overshoot
A = 10, 10% to 90% of 0.1V, R = 100Ω
V L
r
f
A = 10, 0.1V, R = 100Ω
5
%
V
L
Propagation Delay
Harmonic Distortion
A = 10, 50% V to 50% V , 0.1V, R = 100Ω
5
ns
V
IN
OUT
L
HD2, A = 10, 2V , f = 1MHz, R = 100Ω/25Ω
–75/–64
–80/–66
dBc
dBc
V
P-P
L
HD3, A = 10, 2V , f = 1MHz, R = 100Ω/25Ω
V
P-P
L
IMD
Intermodulation Distortion
Output Resistance
A = 10, f = 0.9MHz, 1MHz, 5dBm, R = 100Ω/25Ω
–77/–85
0.2
dBc
V
L
R
OUT
A = 10, f = 1MHz
V
Ω
Channel Separation
V
= ±1V, R = 25Ω
82
80
92
dB
dB
OUT
L
●
●
I
Supply Current
Per Amplifier
5
5.75
6.25
mA
mA
S
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 6: Slew rate is measured between ±2V on a ±4V output with ±6V
supplies, and between ±1V on a ±1.5V output with ±2.5V supplies.
Note 2: The inputs are protected by back-to-back diodes. If the differential
input voltage exceeds 0.7V, the input current should be limited to less than
10mA.
Note 7: Full power bandwidth is calculated from the slew rate:
FPBW = SR/2πV .
P
Note 8: This parameter is not 100% tested.
Note 3: A heat sink may be required to keep the junction temperature
below absolute maximum.
Note 9: The LT1886C is guaranteed to meet specified performance from 0°C
to 70°C. The LT1886C is designed, characterized and expected to meet
specified performance from –40°C to 85°C but is not tested or QA sampled
at these temperatures. For guaranteed I-grade parts, consult the factory.
Note 4: Thermal resistance varies depending upon the amount of PC board
2
metal attached to the device. θ is specified for a 2500mm test board
JA
covered with 2 oz copper on both sides.
Note 5: Input offset voltage is exclusive of warm-up drift.
Note10:TheLT1886Cisguaranteedfunctionalovertheoperatingtemperature
range of –40°C to 85°C.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input Bias Current vs Input
Common Mode Voltage
Input Common Mode Range vs
Supply Current vs Temperature
Supply Voltage
+
15
10
5
V
3.0
2.5
2.0
1.5
1.0
0.5
0
T
I
= 25°C
B
A
B
V
V
= ±6V
S
S
= (I + + I –)/2
–0.1
–0.2
–0.3
1.5
B
= ±2.5V
V
V
= ±6V
S
S
T
= 25°C
OS
A
∆V > 1mV
= ±2.5V
1.0
0.5
–
0
V
–50 –25
0
25
50
75 100 125
–6
–4
–2
0
2
4
6
0
2
4
6
8
10
12
14
TEMPERATURE (°C)
INPUT COMMON MODE VOLTAGE (V)
TOTAL SUPPLY VOLTAGE (V)
1886 G01
1886 G03
1886 G02
4
LT1886
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input Bias Current vs
Temperature
Output Short-Circuit Current vs
Temperature
Input Noise Spectral Density
100
10
1
100
10
1
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1000
900
800
700
600
500
400
300
200
100
0
T
= 25°C
A
V
I
= (I + + I –)/2
B B
B
A
= 101
SOURCE, V = ±6V
S
SOURCE, V = ±2.5V
S
V
V
= ±6V
S
S
SINK, V = ±6V
S
e
i
n
SINK, V = ±2.5V
S
= ±2.5V
n
∆V = 0.2V
IN
10
100
1k
FREQUENCY (Hz)
10k
100k
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
1886 G05
1886 G04
1886 G06
Output Saturation Voltage vs
Output Saturation Voltage vs
Temperature, VS = ±6V
Temperature, VS = ±2.5V
Settling Time vs Output Step
+
+
V
V
6
4
V
= ±6V
S
–0.5
–1.0
–1.5
1.5
–0.5
–1.0
–1.5
1.5
R
L
= 100Ω
R
L
= 100Ω
10mV
1mV
2
I
I
= 150mA
= 150mA
I
= 200mA
= 200mA
I
I
= 150mA
= 150mA
I
= 200mA
= 200mA
L
L
L
L
L
L
L
0
I
I
L
–2
–4
–6
1.0
1.0
R
= 100Ω
L
R
= 100Ω
L
0.5
0.5
10mV
1mV
50
–
–
V
V
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
0
10
20
30
40
60
TEMPERATURE (°C)
TEMPERATURE (°C)
SETTLING TIME (ns)
1886 G07
1886 G08
1886 G09
Gain Bandwidth vs Supply
Voltage
Gain and Phase vs Frequency
Output Impedance vs Frequency
100
10
80
70
100
800
T
= 25°C
A
V
80
A
= –10
V
= ±6V
PHASE
= ±2.5V
S
R
= 1k
L
60
60
700
600
500
400
300
V
S
50
40
A
= 100
= 10
V
V
40
20
V
= ±6V
R
R
= 100Ω
= 25Ω
S
L
L
30
0
1
V
= ±2.5V
20
–20
–40
–60
–80
–100
S
GAIN
10
0.1
A
T
= 25°C
0
A
V
L
A
= –10
–10
–20
R
= 100Ω
0.01
100k
0
2
4
6
8
10
12
14
1M
10M
100M
1G
1M
10M
100M
FREQUENCY (Hz)
TOTAL SUPPLY VOLTAGE (V)
FREQUENCY (Hz)
1886 G10
1886 G12
1886 G11
5
LT1886
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Frequency Response vs Supply
Voltage, AV = 10
Frequency Response vs Supply
Voltage, AV = –10
Frequency Response vs Supply
Voltage, AV = 2
23
22
21
20
19
18
17
16
15
14
13
23
22
21
20
19
18
17
16
15
14
13
9
8
T
= 25°C
= 10
= 100Ω
T
= 25°C
A = –10
V
L
A
V
L
A
A
V
V
= ±2.5V
= ±6V
S
S
7
R
R
= 100Ω
6
5
V
= ±6V
V = ±6V
S
S
4
T
= 25°C
= 2
A
V
L
F
C
C
3
A
V
= ±2.5V
V = ±2.5V
S
S
R
R
R
= 100Ω
2
= R = 1k
G
1
= 124Ω
C
= 100pF
0
SEE FIGURE 3
–1
1M
10M
100M
1G
1M
10M
100M
1G
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
1886 G13
1886 G14
1886 G15
Frequency Response vs Supply
Voltage, AV = –1
Frequency Response vs
Capacitive Load
Slew Rate vs Temperature
3
2
38
35
32
29
26
23
20
17
14
11
8
350
300
250
200
150
100
50
V
T
= ±6V
= 25°C
= 10
A
= –10
= 100Ω
S
A
V
V
L
1000pF
500pF
R
V
V
= ±2.5V
= ±6V
S
S
1
A
NO R
L
0
V
V
= ±6V
S
S
200pF
100pF
50pF
–1
–2
–3
–4
–5
–6
–7
+SR
–SR
T
= 25°C
= –1
A
V
L
F
C
A
+SR
–SR
R
R
R
C
= 100Ω
= R = 1k
G
= ±2.5V
= 124Ω
= 100pF
C
SEE FIGURE 2
0
1M
10M
100M
1G
–50 –25
0
25
50
75 100 125
1M
10M
100M
1G
FREQUENCY (Hz)
TEMPERATURE (°C)
FREQUENCY (Hz)
1886 G16
1886 G17
1886 G18
Power Supply Rejection vs
Frequency
Common Mode Rejection Ratio vs
Frequency
Amplifier Crosstalk vs Frequency
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
V
A
= ±6V
= 10
V
V
= ±6V
V
A
= ±6V
S
S
V
L
S
A
= 10
T
= 25°C
R
= 100Ω
INPUT = –20dBm
(–) SUPPLY
(+) SUPPLY
B → A
A → B
100k
1M
10M
100M
100k
1M
10M
100M
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
1886 G19
1886 G20
1886 G21
6
LT1886
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Harmonic Distortion vs
Frequency, AV = 10, VS = ±6V
Harmonic Distortion vs
Frequency, AV = 10, VS = ±2.5V
Harmonic Distortion vs Resistive
Load
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
T
= 25°C
T
= 25°C
T
V
A
= 25°C
= ±6V
= 10
A
V
A
V
A
S
V
A
= 10
A
= 10
2V OUT
2V OUT
P-P
P-P
2V OUT
P-P
f = 1MHz
2nd
3rd
R
L
= 25Ω
R
L
= 25Ω
2nd
3rd
2nd
3rd
2nd
3rd
2nd
3rd
R
L
= 100Ω
R
L
= 100Ω
100k
1M
FREQUENCY (Hz)
10M
100k
1M
FREQUENCY (Hz)
10M
1
10
100
1k
LOAD RESISTANCE (Ω)
1886 G22
1886 G23
1886 G24
Harmonic Distortion vs Resistive
Load
Harmonic Distortion vs Output
Swing, AV = 10, VS = ±6V
Harmonic Distortion vs Output
Swing, AV = 10, VS = ±2.5V
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
T
V
A
= 25°C
= ±2.5V
= 10
T
= 25°C
T = 25°C
A
A
S
V
A
f = 1MHz
f = 1MHz
2V OUT
P-P
f = 1MHz
R
= 25Ω
R
= 25Ω
L
L
2nd
3rd
2nd
2nd
3rd
3rd
2nd
3rd
2nd
3rd
R
= 100Ω
R
= 100Ω
L
L
1
10
100
1k
0
2
4
6
8
10
12
0
1
2
3
4
5
LOAD RESISTANCE (Ω)
OUTPUT VOLTAGE (V
)
P-P
OUTPUT VOLTAGE (V
)
P-P
1886 G25
1886 G26
1886 G27
Harmonic Distortion vs Output
Swing, AV = 2, VS = ±6V
Harmonic Distortion vs Output
Swing, AV = 2, VS = ±2.5V
Harmonic Distortion vs Output
Current, VS = ±6V
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–30
–40
–50
–60
–70
–80
T
= 25°C
T
= 25°C
T = 25°C
A
A
F
C
C
A
F
C
C
R
R
C
= R = 1k
R
R
C
= R = 1k
A = 10
V
G
G
= 124Ω
= 124Ω
f = 1MHz
= 100pF
= 100pF
R
R
= 5Ω
L
f = 1MHz
SEE FIGURE 3
f = 1MHz
SEE FIGURE 3
= 10Ω
L
R
= 25Ω
R = 100Ω
L
L
R
= 25Ω
L
2nd
2nd
R
L
= 25Ω
2nd
3rd
2nd
3rd
3rd
R
= 100Ω
L
3rd
0
2
4
6
8
10
12
0
1
2
3
4
5
0
100
200
300
400
500
OUTPUT VOLTAGE (V
)
P-P
OUTPUT VOLTAGE (V
)
P-P
PEAK OUTPUT CURRENT (mA)
1886 G28
1886 G29
1886 G30
7
LT1886
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TYPICAL PERFOR A CE CHARACTERISTICS
Harmonic Distortion vs Output
Current, VS = ±2.5V
Undistorted Output Swing vs
Frequency
–30
12
10
8
T
= 25°C
A
V
V
S
= ±6V
A
= 10
–40
–50
–60
–70
–80
f = 1MHz
R
= 5Ω
L
T
= 25°C
= 10
A
V
L
A
6
R
= 10Ω
R
= 100Ω
L
1% DISTORTION
4
V
S
= ±2.5V
R
L
= 25Ω
2
0
100k
1M
FREQUENCY (Hz)
10M
0
50
100
150
200
250
PEAK OUTPUT CURRENT (mA)
1886 G32
1886 G30
Small-Signal Transient, AV = 10,
CL = 1000pF
Small-Signal Transient, AV = 10
Small-Signal Transient, AV = –10
1886 G33
1886 G34
1886 G35
Large-Signal Transient, AV = 10,
CL = 1000pF
Large-Signal Transient, AV = 10
Large-Signal Transient, AV = –10
1886 G36
1886 G37
1886 G38
8
LT1886
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APPLICATIO S I FOR ATIO
Input Considerations
the efficiency of the PC board as a heat sink. The PCB
material can be very effective at transmitting heat between
the pad area attached to the V– pin and a ground or power
plane layer. Copper board stiffeners and plated through-
holes can also be used to spread the heat generated by the
device. Table 1 lists the thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with 2oz copper.
This data can be used as a rough guideline in estimating
thermal resistance. The thermal resistance for each appli-
cation will be affected by thermal interactions with other
components as well as board size and shape.
The inputs of the LT1886 are an NPN differential pair
protected by back-to-back diodes (see the Simplified
Schematic). There are no series protection resistors
onboard which would degrade the input voltage noise. If
theinputscanhaveavoltagedifferenceofmorethan0.7V,
the input current should be limited to less than 10mA with
externalresistance(usuallythefeedbackresistororsource
resistor).EachinputalsohastwoESDclampdiodes—one
to each supply. If an input drive exceeds the supply, limit
the current with an external resistor to less than 10mA.
TheLT1886designisatrueoperationalamplifierwithhigh
impedance inputs and low input bias currents. The input
offset current is a factor of ten lower than the input bias
current. To minimize offsets due to input bias currents,
match the equivalent DC resistance seen by both inputs.
The low input noise current can significantly reduce total
noisecomparedtoacurrentfeedbackamplifier, especially
for higher source resistances.
Table 1. Fused 8-Lead SO Package
COPPER AREA (2oz)
TOPSIDE
TOTAL
COPPER AREA
BACKSIDE
2500 sq. mm
2500 sq. mm
2500 sq. mm
2500 sq. mm
1000 sq. mm
600 sq. mm
300 sq. mm
100 sq. mm
0 sq. mm
θJA
2500 sq. mm
1000 sq. mm
600 sq. mm
180 sq. mm
180 sq. mm
180 sq. mm
180 sq. mm
180 sq. mm
180 sq. mm
5000 sq. mm
3500 sq. mm
3100 sq. mm
2680 sq. mm
1180 sq. mm
780 sq. mm
480 sq. mm
280 sq. mm
180 sq. mm
80°C/W
°
92 C/W
°
96 C/W
°
98 C/W
°
112 C/W
°
116 C/W
Layout and Passive Components
°
118 C/W
With a gain bandwidth product of 700MHz the LT1886
requires attention to detail in order to extract maximum
performance. Use a ground plane, short lead lengths and
a combination of RF-quality supply bypass capacitors
(i.e., 470pF and 0.1µF). As the primary applications have
high drive current, use low ESR supply bypass capacitors
(1µF to 10µF). For best distortion performance with high
drive current a capacitor with the shortest possible trace
lengths should be placed between Pins 4 and 8. The
optimum location for this capacitor is on the back side of
thePCboard. TheDSLdriverdemoboard(DC304)forthis
partusesaTaiyoYuden10µFceramic(TMK432BJ106MM).
°
120 C/W
°
122 C/W
Calculating Junction Temperature
The junction temperature can be calculated from the
equation:
TJ = (PD)(θJA) + TA
TJ = Junction Temperature
TA = Ambient Temperature
PD = Device Dissipation
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input can combine with
the input capacitance to form a pole which can cause
frequency peaking. In general, use feedback resistors of
1kΩ or less.
θJA = Thermal Resistance (Junction-to-Ambient)
As an example, calculate the junction temperature for the
circuitinFigure1assumingan85°Cambienttemperature.
The device dissipation can be found by measuring the
supply currents, calculating the total dissipation and then
subtracting the dissipation in the load.
Thermal Issues
The LT1886 enhanced θJA SO-8 package has the V– pin
fusedtotheleadframe.Thisthermalconnectionincreases
9
LT1886
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APPLICATIO S I FOR ATIO
6V
Typical Performance Curve of Frequency Response vs
Capacitive Load shows the peaking for various capacitive
loads.
+
This stability is useful in the case of directly driving a
coaxial cable or twisted pair that is inadvertently
unterminated. For best pulse fidelity, however, a termina-
tionresistorofvalueequaltothecharacteristicimpedance
of the cable or twisted pair (i.e., 50Ω/75Ω/100Ω/135Ω)
should be placed in series with the output. The other end
of the cable or twisted pair should be terminated with the
same value resistor to ground.
–
909Ω
100Ω
4V
50Ω
–4V
1K
f = 1MHz
100Ω
–
+
Compensation
1886 F01
–6V
The LT1886 is stable in a gain 10 or higher for any supply
and resistive load. It is easily compensated for lower gains
with a single resistor or a resistor plus a capacitor.
Figure 2 shows that for inverting gains, a resistor from the
inverting node to AC ground guarantees stability if the
parallel combination of RC and RG is less than or equal to
RF/9. For lowest distortion and DC output offset, a series
capacitor,CC,canbeusedtoreducethenoisegainatlower
frequencies. The break frequency produced by RC and CC
should be less than 15MHz to minimize peaking. The
Typical Curve of Frequency Response vs Supply Voltage,
AV = –1 shows less than 1dB of peaking for a break
frequency of 12.8MHz.
Figure 1. Thermal Calculation Example
The dissipation for the amplifiers is:
PD = (63.5mA)(12V) – (4V/√2)2/(50) = 0.6W
Thetotalpackagepowerdissipationis0.6W. Whena2500
sq. mm PC board with 2oz copper on top and bottom is
used, the thermal resistance is 80°C/W. The junction
temperature TJ is:
TJ = (0.6W)(80°C/W) + 85°C = 133°C
The maximum junction temperature for the LT1886 is
150°C so the heat sinking capability of the board is
adequate for the application.
R
F
V
–R
F
o
R
=
G
–
+
V
R
G
i
V
i
If the copper area on the PC board is reduced to 180 sq.
mm the thermal resistance increases to 122°C/W and the
junction temperature becomes:
(R || R ) ≤ R /9
R
V
C
G
F
C
o
C
1
C
< 15MHz
(OPTIONAL)
2πR C
C
C
1886 F02
TJ = (0.6W)(122°C/W) + 85°C = 158°C
Figure 2. Compensation for Inverting Gains
which is above the maximum junction temperature indi-
cating that the heat sinking capability of the board is
inadequate and should be increased.
Figure3showscompensationinthenoninvertingconfigu-
ration. The RC, CC network acts similarly to the inverting
case. The input impedance is not reduced because the
network is bootstrapped. This network can also be placed
between the inverting input and an AC ground.
Capacitive Loading
The LT1886 is stable with a 1000pF capacitive load. The
photo of the small-signal response with 1000pF load in a
gain of 10 shows 50% overshoot. The photo of the large-
signal response with a 1000pF load shows that the output
slew rate is not limited by the short-circuit current. The
Anothercompensationschemefornoninvertingcircuitsis
showninFigure4.Thecircuitisunitygainatlowfrequency
and a gain of 1 + RF/RG at high frequency. The DC output
offset is reduced by a factor of ten. The techniques of
10
LT1886
U
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APPLICATIO S I FOR ATIO
Figures3and4canbecombinedasshowninFigure5. The
gainisunityatlowfrequencies, 1+RF/RG atmid-bandand
for stability, a gain of 10 or greater at high frequencies.
termination resistor is used, a capacitor to ground at the
load can eliminate ringing.
Line Driving Back-Termination
V
R
R
o
F
= 1 +
+
–
The standard method of cable or line back-termination is
shown in Figure 6. The cable/line is terminated in its
characteristic impedance (50Ω, 75Ω, 100Ω, 135Ω, etc.).
A back-termination resistor also equal to to the
chararacteristic impedance should be used for maximum
pulse fidelity of outgoing signals, and to terminate the line
for incoming signals in a full-duplex application. There are
three main drawbacks to this approach. First, the power
dissipated in the load and back-termination resistors is
equal so half of the power delivered by the amplifier is
wasted in the termination resistor. Second, the signal is
halved so the gain of the amplifer must be doubled to have
the same overall gain to the load. The increase in gain
increases noise and decreases bandwidth (which can also
increase distortion). Third, the output swing of the ampli-
fier is doubled which can limit the power it can deliver to
the load for a given power supply voltage.
V
V
i
i
G
R
C
V
o
(R || R ) ≤ R /9
C
C
G
F
C
1
(OPTIONAL)
< 15MHz
R
F
2πR C
C
C
R
G
1886 F03
Figure 3. Compensation for Noninverting Gains
V
o
+
–
= 1 (LOW FREQUENCIES)
V
G
V
i
i
R
F
= 1 +
(HIGH FREQUENCIES)
V
O
R
G
R
G
≤ R /9
F
R
F
1
< 15MHz
2πR C
G
C
R
C
C
1886 F04
CABLE OR LINE WITH
Figure 4. Alternate Noninverting Compensation
CHARACTERISTIC IMPEDANCE R
L
+
–
V
i
R
BT
V
O
+
V
i
R
L
R
C
V
o
C
R
F
–
R
= R
=
BT
L
C
V
o
V
1
2
o
R
G
R
= 1 AT LOW FREQUENCIES
F
(1 + R /R )
F
G
V
i
V
i
R
F
1886 F06
= 1 +
= 1 +
AT MEDIUM FREQUENCIES
R
G
R
G
Figure 6. Standard Cable/Line Back-Termination
C
BIG
R
F
AT HIGH FREQUENCIES
(R || R )
1886 F05
C
G
An alternate method of back-termination is shown in
Figure 7. Positive feedback increases the effective back-
termination resistance so RBT can be reduced by a factor
ofn.Toanalyzethiscircuit,firstgroundtheinput.AsRBT
RL/n, and assuming RP2>>RL we require that:
Figure 5. Combination Compensation
Output Loading
=
The LT1886 output stage is very wide bandwidth and able
to source and sink large currents. Reactive loading, even
isolated with a back-termination resistor, can cause ring-
ingatfrequenciesofhundredsofMHz.Forthisreason,any
design should be evaluated over a wide range of output
conditions. To reduce the effects of reactive loading, an
optionalsnubbernetworkconsistingofaseriesRCacross
the load can provide a resistive load at high frequency.
Another option is to filter the drive to the load. If a back-
Va = Vo (1 – 1/n) to increase the effective value of
RBT by n.
Vp = Vo (1 – 1/n)/(1 + RF/RG)
Vo = Vp (1 + RP2/RP1)
Eliminating Vp, we get the following:
(1 + RP2/RP1) = (1 + RF/RG)/(1 – 1/n)
11
LT1886
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APPLICATIO S I FOR ATIO
For example, reducing RBT by a factor of n = 4, and with an
amplifer gain of (1 + RF/RG) = 10 requires that RP2/RP1
= 12.3.
modems. The key advantages are: ±200mA output drive
with only 1.7V worst-case total supply voltage headroom,
high bandwidth, which helps achieve low distortion, low
quiescent supply current of 7mA per amplifier and a
space-saving, thermally enhanced SO-8 package.
Note that the overall gain is increased:
RP2 / R + RP1
Vo
V
i
(
)
An ADSL remote terminal driver must deliver an average
power of 13dBm (20mW) into a 100Ω line. This corre-
spondsto1.41VRMS intotheline.TheDMT-ADSLpeak-to-
average ratio of 5.33 implies voltage peaks of 7.53V into
the line. Using a differential drive configuration and trans-
former coupling with standard back-termination, a trans-
formerratioof1:2iswellsuited. Thisisshownonthefront
page of this data sheet along with the distortion perfor-
mance vs line voltage at 200kHz, which is beyond ADSL
requirements. Note that the distortion is better than
–73dBc for all swings up to 16VP-P into the line. The gain
of this circuit from the differential inputs to the line voltage
is 10. Lower gains are easy to implement using the
compensation techniques of Figure 5. Table 2 shows the
drive requirements for this standard circuit.
P2
=
1+ 1/n / 1+ R /R − R / R +RP1
) ( )
(
[
)
(
] [
]
F
G
P1
P2
A simpler method of using positive feedback to reduce the
back-termination is shown in Figure 8. In this case, the
drivers are driven differentially and provide complemen-
tary outputs. Grounding the inputs, we see there is invert-
ing gain of –RF/RP from –Vo to Va
Va = Vo (RF/RP)
and assuming RP >> RL, we require
Va = Vo (1 – 1/n)
solving
RF/RP = 1 – 1/n
The above design is an excellent choice for desktop
applications and draws typically 550mW of power. For
portable applications, power savings can be achieved by
reducingtheback-terminationresistorusingpositivefeed-
back as shown in Figure 9. The overall gain of this circuit
is also 10, but the power consumption has been reduced
to 350mW, a savings of 36% over the previous design.
Note that the reduction of the back-termination resistor
has allowed use of a 1:1 transformer ratio.
So to reduce the back-termination by a factor of 3 choose
RF/RP = 2/3. Note that the overall gain is increased to:
Vo/Vi = (1 + RF/RG + RF/RP)/[2(1 – RF/RP)]
ADSL Driver Requirements
The LT1886 is an ideal choice for ADSL upstream (CPE)
R
P2
R
P1
+
–
V
i
V
+
i
V
R
V
o
a
BT
V
V
R
BT
P
a
V
o
R
L
–
R
L
FOR R
n =
=
BT
R
R
R
F
F
F
n
1
R
R
L
G
R
R
R
R
G
G
L
L
R
FOR R
=
F
BT
1 –
=
R
R
n
P
P
R
P
1
n
R
R
R
P1
F
R
R
R
R
1 +
= 1 –
F
F
1 +
+
(
) (
)
R
+ R
P2
G
P1
V
o
G
P
R
F
V
i
2 1 –
R
/(R + R
P2 P2
)
P1
–
+
(
)
R
P
V
R
R
1 + 1/n
o
P1
BT
–
=
–V
o
V
R
+ R
P1
i
R
R
P2
F
–V
1 +
a
(
)
–V
i
G
1886 F08
1886 F07
Figure 7. Back-Termination Using Positive Feedback
Figure 8. Back-Termination Using Differential Positive Feedback
12
LT1886
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APPLICATIO S I FOR ATIO
Table 2. ADSL Upstream Driver Designs
by the same amount as the reduction in the back-termina-
tionresistor. Takingintoaccountthedifferenttransformer
turns ratios, the received signal of the low power design
will be one third of the standard design received signal.
The reduced signal has system implications for the sensi-
tivityofthereceiver.Thepowerreductionmay,ormaynot,
be an acceptable system tradeoff for a given design.
STANDARD
100Ω
13dBm
5.33
LOW POWER
100Ω
Line Impedance
Line Power
13dBm
5.33
Peak-to-Average Ratio
Transformer Turns Ratio
Reflected Impedance
Back-Termination Resistors
Transformer Insertion Loss
Average Amplifier Swing
Average Amplifier Current
Peak Amplifier Swing
Peak Amplifier Current
Total Average Power Consumption
Supply Voltage
2
1
25Ω
100Ω
8.35Ω
0.5dB
0.87V
12.5Ω
1dB
Demo Board
0.79V
DemoboardDC304hasbeencreatedtoprovideaversatile
platformforalinedriver/receiverdesign.(Figure11shows
acompleteschematic.)Theboardissetupforeithersingle
or dual supply designs with Jumpers 1–4. The LT1886 is
set up for differential, noninverting gain of 3. Each amp is
configured as in Figure 5 for maximum flexibility. The
amplifiers drive a 1:2 transformer through back-termina-
tion resistors that can be reduced with optional positive
feedback. The secondary of the transformer can be iso-
lated from the primary with Jumper 5.
RMS
RMS
31.7mA
15mA
RMS
RMS
4.21V Peak
169mA Peak
550mW
4.65V Peak
80mA Peak
350mW
Single 12V
Single 12V
Table 2 compares the two approaches. It may seem that
thelowpowerdesignisaclearchoice,buttherearefurther
system issues to consider. In addition to driving the line,
the amplifiers provide back-termination for signals that
are received simultaneously from the line. In order to
reject the drive signal, a receiver circuit is used such as
shown in Figure 10. Taking advantage of the differential
nature of the signals, the receiver can subtract out the
drive signal and amplify the received signal. This method
works well for standard back-termination. If the back-
termination resistors are reduced by positive feedback, a
portion of the received signal also appears at the amplifier
outputs. The result is that the received signal is attenuated
A differential receiver is included using the LT1813, a dual
100MHz, 750V/µs operational amplifier. The receiver gain
from the transformer secondary is 2, and the drive signals
are rejected by approximately a factor of 14dB. Other
optional components include filter capacitors and an RC
snubber network at the transformer primary.
R
BT
V
a
V
L
1:n
R
L
R
BT
–V
a
–V
L
V
+
i
8.45Ω
R
F
R
R
D
–
1k
G
R
L
= REFLECTED IMPEDANCE
–
+
2
1:1
n
1.21k
523Ω
+
LT1813
R
L
100Ω
2
2n
1µF
= ATTENUATION OF V
a
523Ω
R
L
1.21k
1k
V
RX
V
BIAS
+ R
BT
=
2
2n
+
–
R
L
–
A
V
= 10
2
2n
R
R
–
G
LT1813
8.45Ω
SET
R
R
D
R
L
2
D
+ R
BT
+
2n
–V
i
R
F
G
1886 F10
1886 F09
Figure 9. Power Saving ADSL Modem Driver
Figure 10. Receiver Configuration
13
LT1886
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APPLICATIO S I FOR ATIO
+
V
C1
0.1µF
C8
0.1µF
C9
470pF
JP1
TP1
TP2
3
2
8
R9
12.4Ω
+
–
C21
1
470pF
R20
LT1886
+DRV
130Ω
TP5 TP6
C19
100pF
R5
1k
R3
20k
+
4
V
6
7
R1
9
R18
R6
JP3
LINE
OUT
10k
499Ω
C4
1µF
C3
1µF
R2
10k
10
2
C5
1µF
–
V
C23
470pF
JP5
R7
12.4Ω
R8
499Ω
R19
R4
20k
R7
1k
TP3
TP4
C20
SEPARATE
SECONDARY
GROUND
–
6
R10
12.4Ω
100pF
R4
130Ω
7
–DRV
5 + LT1886
C22
470pF
4
JP2
C6
10pF
C10
470pF
C11
0.1µF
COILCRAFT X8390-A
OR EQUIVALENT
C2
0.1µF
R11
4.02k
R12
2k
+
V
C12
R13
1k
0.1µF
8
2
–
+
–RCV
1
LT1813
3
+
+
V
V
+
+
C14
C15
C18
10µF
5
6
10µF
1µF
+
–
+RCV
GND
7
R15
2k
LT1813
4
C16
10µF
C17
1µF
JP4
–
V
–
C13
V
0.1µF
R16
1k
R14
4.02k
C7
10pF
1886 F11
Figure 11. LT1886, LT1813 DSL Demo Board (DC304)
14
LT1886
W
W
SI PLIFIED SCHE ATIC
+
V
I
4
Q8
Q9
Q3
Q4
Q5
Q6
OUT
Q7
D1
D2
C1
Q1
Q2
–IN
+IN
I
1
I
I
3
2
1886 SS
–
V
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
5
8
6
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
3
4
2
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
SO8 1298
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LT1886
U
TYPICAL APPLICATIO
Split Supply ±5V ADSL CPE Line Driver
5V
8
3
2
+
6.19Ω
1
130Ω
1/2 LT1886
–
1k
1k
100pF
1:2*
+
2k
866Ω
866Ω
+
V
IN
100Ω
V
L
–
2k
–
100pF
–
6
*COILCRAFT X8390-A
OR EQUIVALENT
6.19Ω
7
1/2 LT1886
+
130Ω
5
4
–5V
V
L
= 5
(ASSUME 0.5dB TRANSFORMER POWER LOSS)
2
V
IN
REFLECTED LINE IMPEDANCE = 100Ω / 2 = 25Ω
2kΩ
EFFECTIVE TERMINATION = 2 • 6.19 •
= 24.8Ω
1kΩ
EACH AMPLIFIER: 0.56V
, 29.9mA
RMS
RMS
±3V PEAK, ±160mA PEAK
1886 TA02
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1207
Dual 250mA, 60MHz Current Feedback Amplifier
Dual 50MHz, 800V/µs Op Amp
Shutdown/Current Set Function
LT1361
±15V Operation, 1mV V , 1µA I
OS B
LT1396
Dual 400MHz, 800V/µs Current Feedback Amplifier
Dual 125mA, 50MHz Current Feedback Amplifier
Dual 500mA, 50MHz Current Feedback Amplifier
Dual 100MHz, 750V/µs, 8nV/√Hz Op Amp
4.6mA Supply Current Set, 80mA I
OUT
LT1497
900V/µs Slew Rate
LT1795
Shutdown/Current Set Function, ADSL CO Driver
Low Noise, Low Power Differential Receiver
LT1813
1886f LT/TP 0400 4K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
LINEAR TECHNOLOGY CORPORATION 1999
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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