LT1965IDD-1.8-TRPBF_技术文档

LT1965 Series

1.1A, Low Noise,

Low Dropout Linear Regulator

FEATURES

DESCRIPTION

TheLT^®1965seriesarelownoise, lowdropoutlinearregu-

lators. The devices supply 1.1A of output current with a

310mVtypicaldropoutvoltage.Operatingquiescentcurrent

is 500μA for the adjustable version, reducing to <1μA in

shutdown. Quiescentcurrentiswellcontrolled;itdoesnot

rise in dropout as with many other regulators. The LT1965

regulators have very low output noise which makes them

ideal for sensitive RF and DSP supply applications.

n

Output Current: 1.1A

n

Dropout Voltage: 310mV

n

Low Noise: 40μV

(10Hz to 100kHz)

RMS

n

500μA Quiescent Current (Adjustable Version)

Wide Input Voltage Range: 1.8V to 20V

No Protection Diodes Needed

Controlled Quiescent Current in Dropout

Adjustable Output from 1.20V to 19.5V

Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V

< 1μA Quiescent Current in Shutdown

Stable with 10μF Output Capacitor

Stable with Ceramic, Tantalum or Aluminum

Electrolytic Capacitors

Reverse Battery Protection

No Reverse Current

Current Limit with Foldback Protection

Thermal Limiting

Output voltage ranges from 1.20V to 19.5V. The LT1965

regulators are stable with output capacitors as low as

10μF. Internal protection circuitry includes reverse battery

protection, currentlimitingwithfoldback, thermallimiting

and reverse current protection. The LT1965 series are

available in ﬁxed output voltages of 1.5V, 1.8V, 2.5V, 3.3V,

andasanadjustabledevicewitha1.20Vreferencevoltage.

The package offerings include the 5-lead TO-220, 5-lead

DD-PAK as well as the thermally enhanced 8-lead MSOP

n

5-Lead TO-220, DD-PAK, Thermally Enhanced 8-Lead

MSOP and 8-Lead 3mm × 3mm DFN Packages

and low-proﬁle (0.75mm) 8-lead 3mm × 3mm DFN.

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

APPLICATIONS

n

Logic Power Supplies

n

Post Regulator for Switching Supplies

n

Low Noise Instrumentation

TYPICAL APPLICATION

Dropout Voltage

3.3V to 2.5V Regulator

400

T

= 25°C

J

350

300

250

200

150

100

50

2.5V

1.1A

IN

OUT

LT1965-2.5

+

> 3V

+

V

IN

10μF*

TO 20V

SHDN SENSE

GND

*CERAMIC, TANTALUM OR

ALUMINUM ELECTROLYTIC

1965 TA01

0

0.2

0.6

0.8

1

1.2

0.4

OUTPUT CURRENT (A)

1965 TA01b

1965fa

1

LT1965 Series

ABSOLUTE MAXIMUM RATINGS

(Note 1)

Output Short-Circuit Duration .......................... Indeﬁnite

Operating Junction Temperature Range (E, I Grade)

(Notes 2, 13)......................................–40°C to 125°C

Storage Temperature Range...................–65°C to 150°C

Lead Temperature (Soldering, 10 sec)

IN Pin Voltage ......................................................... 22V

OUT Pin Voltage...................................................... 22V

Input to Output Differential Voltage (Note 2) ......... 22V

SENSE Pin Voltage.................................................. 22V

ADJ Pin Voltage ........................................................ 9V

SHDN Pin Voltage ................................................... 22V

(Only for MSOP, TO-220, DD-PAK Packages).... 300°C

PIN CONFIGURATION

TOP VIEW

OUT

1

2

3

4

8

7

6

5

IN

OUT

SENSE/ADJ*

GND

1

2

3

4

8 IN

7 IN

6 SHDN

5 GND

IN

9

SENSE/ADJ*

GND

SHDN

GND

MS8E PACKAGE

8-LEAD PLASTIC MSOP

DD PACKAGE

T

JMAX

= 125°C, θ = 60°C/W, θ = 10°C/W

JA JC

8-LEAD (3mm × 3mm) PLASTIC DFN

EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB

*PIN 3 = SENSE FOR LT1965-1.5/LT1965-1.8/LT1965-2.5/LT1965-3.3

*PIN 3 = ADJ FOR LT1965

T

= 125°C, θ = 65°C/W, θ = 3°C/W

JA JC

JMAX

EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB

*PIN 3 = SENSE FOR LT1965-1.5/LT1965-1.8/LT1965-2.5/LT1965-3.3

*PIN 3 = ADJ FOR LT1965

FRONT VIEW

5

4

3

2

1

SENSE/ADJ*

OUT

5

4

3

2

1

SENSE/ADJ*

OUT

TAB IS

GND

TAB IS

GND

IN

SHDN

Q PACKAGE

5-LEAD PLASTIC DD-PAK

T PACKAGE

5-LEAD PLASTIC TO-220

T

= 125°C, θ = 50°C/W, θ = 3°C/W

T

= 125°C, θ = 30°C/W, θ = 3°C/W

JA JC

JMAX

JA

JC

JMAX

*PIN 5 = SENSE FOR LT1965-1.5/LT1965-1.8/LT1965-2.5/LT1965-3.3

*PIN 5 = ADJ FOR LT1965

*PIN 5 = SENSE FOR LT1965-1.5/LT1965-1.8/LT1965-2.5/LT1965-3.3

*PIN 5 = ADJ FOR LT1965

ORDER INFORMATION

LEAD FREE FINISH

TAPE AND REEL

PART MARKING*

LCXW

PACKAGE DESCRIPTION

TEMPERATURE RANGE

LT1965EDD#PBF

LT1965EDD#TRPBF

8-Lead (3mm × 3mm) Plastic DFN

–40°C to 125°C

LT1965IDD#PBF

LT1965IDD#TRPBF

LCXW

LT1965EDD-1.5#PBF

LT1965IDD-1.5#PBF

LT1965EDD-1.8#PBF

LT1965IDD-1.8#PBF

LT1965EDD-2.5#PBF

LT1965IDD-2.5#PBF

LT1965EDD-3.3#PBF

LT1965IDD-3.3#PBF

LT1965EDD-1.5#TRPBF

LT1965IDD-1.5#TRPBF

LT1965EDD-1.8#TRPBF

LT1965IDD-1.8#TRPBF

LT1965EDD-2.5#TRPBF

LT1965IDD-2.5#TRPBF

LT1965EDD-3.3#TRPBF

LT1965IDD-3.3#TRPBF

LDKW

LDKY

LDMB

LDMD

1965fa

2

LT1965 Series

ORDER INFORMATION

LEAD FREE FINISH

LT1965EMS8E#PBF

LT1965IMS8E#PBF

LT1965EMS8E-1.5#PBF

LT1965IMS8E-1.5#PBF

LT1965EMS8E-1.8#PBF

LT1965IMS8E-1.8#PBF

LT1965EMS8E-2.5#PBF

LT1965IMS8E-2.5#PBF

LT1965EMS8E-3.3#PBF

LT1965IMS8E-3.3#PBF

LT1965EQ#PBF

TAPE AND REEL

PART MARKING*

LTCXX

PACKAGE DESCRIPTION

8-Lead Plastic MSOP

5-Lead Plastic DD-PAK

5-Lead Plastic TO-220

TEMPERATURE RANGE

–40°C to 125°C

LT1965EMS8E#TRPBF

LT1965IMS8E#TRPBF

LTCXX

LT1965EMS8E-1.5#TRPBF LTDKX

LT1965IMS8E-1.5#TRPBF LTDKX

LT1965EMS8E-1.8#TRPBF LTDKZ

LT1965IMS8E-1.8#TRPBF LTDKZ

LT1965EMS8E-2.5#TRPBF LTDMC

LT1965IMS8E-2.5#TRPBF LTDMC

LT1965EMS8E-3.3#TRPBF LTDMF

LT1965IMS8E-3.3#TRPBF LTDMF

LT1965EQ#TRPBF

LT1965Q

LT1965IQ#PBF

LT1965IQ#TRPBF

LT1965Q

LT1965EQ-1.5#PBF

LT1965IQ-1.5#PBF

LT1965EQ-1.8#PBF

LT1965IQ-1.8#PBF

LT1965EQ-2.5#PBF

LT1965IQ-2.5#PBF

LT1965EQ-3.3#PBF

LT1965IQ-3.3#PBF

LT1965ET#PBF

LT1965EQ-1.5#TRPBF

LT1965IQ-1.5#TRPBF

LT1965EQ-1.8#TRPBF

LT1965IQ-1.8#TRPBF

LT1965EQ-2.5#TRPBF

LT1965IQ-2.5#TRPBF

LT1965EQ-3.3#TRPBF

LT1965IQ-3.3#TRPBF

LT1965ET#TRPBF

LT1965Q-1.5

LT1965Q-1.8

LT1965Q-2.5

LT1965Q-3.3

LT1965T

LT1965IT#PBF

LT1965IT#TRPBF

LT1965T

LT1965ET-1.5#PBF

LT1965IT-1.5#PBF

LT1965ET-1.8#PBF

LT1965IT-1.8#PBF

LT1965ET-2.5#PBF

LT1965IT-2.5#PBF

LT1965ET-3.3#PBF

LT1965IT-3.3#PBF

LT1965ET-1.5#TRPBF

LT1965IT-1.5#TRPBF

LT1965ET-1.8#TRPBF

LT1965IT-1.8#TRPBF

LT1965ET-2.5#TRPBF

LT1965IT-2.5#TRPBF

LT1965ET-3.3#TRPBF

LT1965IT-3.3#TRPBF

LT1965T-1.5

LT1965T-1.8

LT1965T-2.5

LT1965T-3.3

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *Temperature grades are identiﬁed by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

1965fa

3

LT1965 Series

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. (Note 3)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Minimum Input Voltage (Notes 4, 12)

I

= 0.5A

= 1.1A

1.65

1.8

V

LOAD

l

2.3

Regulated Output Voltage (Note 5)

LT1965-1.5, V = 2.1V, I

LT1965-1.5, 2.5 < V < 20V, 1mA < I

= 1mA

LOAD

1.477

1.455

1.5

1.523

1.545

V

IN

< 1.1A

IN

LOAD

LT1965-1.8, V = 2.3V, I

LT1965-1.8, 2.8 < V < 20V, 1mA < I

= 1mA

LOAD

1.773

1.746

1.8

1.827

1.854

V

IN

LT1965-2.5, V = 3V, I

LT1965-2.5, 3.5 < V < 20V, 1mA < I

= 1mA

2.462

2.425

2.5

2.538

2.575

V

IN

LOAD

IN

LT1965-3.3, V = 3.8V, I

LT1965-3.3, 4.3 < V < 20V, 1mA < I

= 1mA

LOAD

3.25

3.201

3.3

3.35

3.399

V

IN

ADJ Pin Voltage (Notes 4, 5)

Line Regulation

V

= 2.1V, I

= 1mA

1.182

1.164

1.2

1.218

1.236

V

IN

LOAD

2.3V < V < 20V, 1mA < I

< 1.1A

IN

LOAD

l

LT1965-1.5, ΔV = 2.1V to 20V, I

= 1mA

3.5

4

4.5

5.5

3

9

10

11.5

16

8

mV

IN

LOAD

LT1965-1.8, ΔV = 2.3V to 20V, I

= 1mA

LT1965-2.5, ΔV = 3V to 20V, I

= 1mA

LT1965-3.3, ΔV = 3.8V to 20V, I

= 1mA

LT1965,

ΔV = 2.1V to 20V, I

= 1mA (Note 4)

IN

Load Regulation

LT1965-1.5, V = 2.5V, ΔI

= 1mA to 1.1A

5.25

6.25

8.75

11.5

4.25

0.055

0.12

0.21

0.31

10

20

mV

IN

LOAD

l

LT1965-1.5, V = 2.5V, ΔI

IN

LT1965-1.8, V = 2.8V, ΔI

= 1mA to 1.1A

12

24

mV

IN

LOAD

LT1965-1.8, V = 2.8V, ΔI

IN

LT1965-2.5, V = 3.5V, ΔI

= 1mA to 1.1A

16.5

33

mV

IN

LOAD

LT1965-2.5, V = 3.5V, ΔI

IN

LT1965-3.3, V = 4.3V, ΔI

= 1mA to 1.1A

22

44

mV

IN

LOAD

LT1965-3.3, V = 4.3V, ΔI

IN

LT1965,

V

= 2.3V, ΔI

= 1mA to 1.1A (Note 4)

8

16

mV

IN

LOAD

Dropout Voltage

= V

I

= 1mA

0.08

0.14

V

LOAD

V

IN

OUT(NOMINAL)

(Notes 6, 7, 12)

I

= 100mA

0.175

0.28

V

LOAD

I

= 500mA

0.25

0.36

V

LOAD

I

= 1.1A

0.36

0.49

V

LOAD

l

GND Pin Current

I

= 0mA

0.5

0.6

2.2

8.2

21

1.1

1.5

5.5

20

mA

LOAD

V

= V

+ 1V

OUT(NOMINAL)

= 1mA

IN

(Notes 6, 8)

= 100mA

= 500mA

= 1.1A

40

Output Voltage Noise

C

OUT

= 10μF, I

= 1.1A, BW = 10Hz to 100kHz

40

μV

RMS

LOAD

ADJ Pin Bias Current (Notes 4, 9)

Shutdown Threshold

1.3

4.5

2

μA

l

V

= Off to On

= On to Off

0.85

0.45

V

OUT

0.2

57

SHDN Pin Current (Note 10)

V

SHDN

V

SHDN

= 0V

= 20V

0.01

5.5

1

10

μA

Quiescent Current in Shutdown

Ripple Rejection

V

IN

= 6V, V

= 0V

0.01

75

1

μA

dB

SHDN

V

– V

= 1.5V (AVG), V

= 0.5V

,

IN

OUT

RIPPLE

P-P

f

= 120Hz, I

= 0.75A

LOAD

RIPPLE

1965fa

4

LT1965 Series

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. (Note 3)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Current Limit

V

IN

V

IN

= 7V, V

= V

= 0

2.4

A

OUT

OUT(NOMINAL)

l

1.2

+ 1V, ΔV

= -0.1V (Note 6)

OUT

Input Reverse Leakage Current

Reverse Output Current (Note 11)

V

= –20V, V

= 0

OUT

1

mA

IN

LT1965-1.5, V

LT1965-1.8, V

LT1965-2.5, V

LT1965-3.3, V

= 1.5V, V = 0

275

175

525

400

μA

OUT

IN

= 1.8V, V = 0

= 2.5V, V = 0

= 3.3V, V = 0

LT1965 (Note 4), V

= 1.2V, V = 0

IN

OUT

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

2.5V. The external resistor divider adds 300μA of output DC load current.

This external current is not factored into GND pin current.

Note 7: Dropout voltage is the minimum input-to-output voltage

differential needed to maintain regulation at a speciﬁed output current. In

Note 2: Absolute maximum input to output differential voltage is not

achievable with all combinations of rated IN pin and OUT pin voltages.

With the IN pin at 22V, the OUT pin may not be pulled below 0V. The total

measured voltage from IN to OUT must not exceed 22V.

dropout, the output voltage equals: (V – V

)

IN

DROPOUT

Note 8: GND pin current is tested with V = V

+ 1V and a

IN

OUT(NOMINAL)

current source load. GND pin current increases slightly in dropout. For

the ﬁxed output versions, an internal resistor divider will typically add

100μA to the GND pin current. See GND pin current curves in the Typical

Performance Characteristics section.

Note 3: The LT1965 regulators are tested and speciﬁed under pulse load

conditions such that T ≅ T . The LT1965E regulators are 100% tested

J

A

at T = 25°C. Performance at –40°C and 125°C is assured by design,

A

Note 9: ADJ pin bias current ﬂows into the ADJ pin.

Note 10: SHDN pin current ﬂows into the SHDN pin.

Note 11: Reverse output current is tested with the IN pin grounded and the

OUT pin forced to the rated output voltage. This current ﬂows into the OUT

pin and out of the GND pin.

Note 12: For the LT1965, LT1965-1.5 and LT1965-1.8, the minimum

input voltage speciﬁcation limits the dropout voltage under some output

voltage/load conditions.

Note 13: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature is active.

Continuous operation above the speciﬁed maximum operating junction

temperature may impair device reliability.

characterization, and correlation with statistical process controls. The

LT1965I regulators are guaranteed over the full –40°C to 125°C operating

junction temperature range.

Note 4: The LT1965 adjustable version is tested and speciﬁed for these

conditions with the ADJ connected to the OUT pin.

Note 5: Maximum junction temperature limits operating conditions. The

regulated output voltage speciﬁcation does not apply for all possible

combinations of input voltage and output current. Limit the output current

range if operating at the maximum input voltage. Limit the input-to-output

voltage differential if operating at the maximum output current.

Note 6: To satisfy minimum input voltage requirements, the LT1965

adjustable version is tested and speciﬁed for these conditions with an

external resistor divider (bottom 4.02k, top 4.32k) for an output voltage of

1965fa

5

LT1965 Series

TYPICAL PERFORMANCE CHARACTERISTICS

Typical Dropout Voltage

Guaranteed Dropout Voltage

Dropout Voltage

500

450

400

350

300

250

200

150

100

50

500

450

400

350

300

250

200

150

100

50

500

450

400

350

300

250

200

150

100

50

= TEST POINTS

T

= 125°C

= 25°C

T

= 125°C

I

= 1.1A

J

L

= 500mA

T

= 25°C

L

J

T

J

I

= 100mA

= 1mA

L

I

L

0

0.2

0.6

0.8

1

1.2

0.4

0

0.2

0.6

0.8

1

1.2

–50 –25

0

25

50

75 100 125

0.4

OUTPUT CURRENT (A)

TEMPERATURE (°C)

OUTPUT CURRENT (A)

1965 G01

1965 G02

1965 G03

Quiescent Current

LT1965-1.5 Output Voltage

LT1965-1.8 Output Voltage

1.522

1.517

1.512

1.507

1.502

1.497

1.492

1.487

1.482

1.477

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

1.827

1.821

1.815

1.809

1.803

1.797

1.791

1.785

1.779

1.773

I

= 1mA

V

= 6V

I = 1mA

L

IN

L

R

=

, I = 0

∞

L

V

= V

IN

SHDN

LT1965-1.5/-1.8/-2.5/-3.3

LT1965

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

TEMPERATURE (°C)

1965 G05

1965 G04

1965 G06

LT1965-2.5 Output Voltage

LT1965-3.3 Output Voltage

LT1965 ADJ Pin Voltage

2.540

2.532

2.524

2.516

2.508

2.500

2.492

2.484

2.476

2.468

2.460

3.350

3.340

3.330

3.320

3.310

3.300

3.290

3.280

3.270

3.260

3.250

1.218

1.214

1.210

1.206

1.202

1.198

1.194

1.190

1.186

1.182

I

= 1mA

I

L

= 1mA

I

L

= 1mA

L

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

TEMPERATURE (°C)

1965 G07

1965 G08

1965 G09

1965fa

6

LT1965 Series

TYPICAL PERFORMANCE CHARACTERISTICS

LT1965-1.5 Quiescent Current

LT1965-1.8 Quiescent Current

LT1965-2.5 Quiescent Current

10

8

5

4

3

2

1

0

5

4

3

2

1

0

T

= 25°C

= ∞

T

= 25°C

= ∞

T

= 25°C

= ∞

J

L

J

L

J

L

R

6

4

2

V

= V

IN

V

SHDN

= 0V

6

SHDN

V

= V

SHDN

IN

V

= V

9

SHDN

IN

= 0V

6

= 0V

7

SHDN

0

1

2

3

4

5

7

8

10

0

1

2

3

4

5

7

8

9

10

0

1

2

3

4

5

6

8

9

10

INPUT VOLTAGE (V)

1965 G12

1965 G11

1965 G10

LT1965-1.5 GND Pin Current

(Light Load)

LT1965-3.3 Quiescent Current

LT1965 Quiescent Current

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

10

8

5

4

3

2

1

0

T

= 25°C

= 4.02k

T

= 25°C

L

T

= 25°C

= V

J

L

J

R

= ∞

V

SHDN

IN

*FOR V

= 1.5V

OUT

6

V

SHDN

= V

IN

4

R

= 30Ω, I = 50mA*

L

= 150Ω, I = 10mA*

L L

2

V

= 0V

6

SHDN

V

7

= V

IN

SHDN

R

L

= 1.5k, I = 1mA*

L

V

SHDN

= 0V

0

2

4

6

8

10 12 14 16 18 20

0

1

2

3

4

5

8

9

10

0

1

2

3

4

5

6

7

8

9

10

INPUT VOLTAGE (V)

1965 G14

1965 G13

1965 G15

LT1965-1.5 GND Pin Current

(Heavy Load)

LT1965-1.8 GND Pin Current

(Light Load)

LT1965-1.8 GND Pin Current

(Heavy Load)

5

4

3

2

1

0

25

20

15

10

5

25

20

15

10

5

T

J

SHDN

= 25°C

= V

T

= 25°C

= V

T

J

SHDN

= 25°C

= V

J

V

IN

SHDN

IN

*FOR V

OUT

= 1.8V

*FOR V

= 1.8V

*FOR V

OUT

= 1.5V

OUT

R

= 1.363Ω, I = 1.1A*

L

R

L

= 1.636Ω, I = 1.1A*

L

R

= 3.6Ω, I = 500mA*

L

R

= 36Ω, I = 50mA*

L

R

= 3Ω, I = 500mA*

L

R

= 180Ω, I = 10mA*

L

R

= 18Ω, I = 100mA*

L

R

= 1.8k, I = 1mA*

L

R

= 15Ω, I = 100mA*

L

0

1

2

3

4

5

6

7

8

9

10

0

1

2

3

4

5

6

7

8

9

10

0

1

2

3

4

5

6

7

8

9

10

INPUT VOLTAGE (V)

1965 G17

1965 G18

1965 G16

1965fa

7

LT1965 Series

TYPICAL PERFORMANCE CHARACTERISTICS

LT1965-2.5 GND Pin Current

(Light Load)

LT1965-2.5 GND Pin Current

(Heavy Load)

LT1965-3.3 GND Pin Current

(Light Load)

25

20

15

10

5

12

10

8

12

10

8

T

= 25°C

= V

T

= 25°C

= V

T

= 25°C

= V

J

V

SHDN

IN

SHDN

IN

SHDN

IN

*FOR V

= 2.5V

*FOR V

= 3.3V

*FOR V

= 2.5V

OUT

R

= 2.272Ω, I = 1.1A*

L

6

R

= 5Ω, I = 500mA*

L

R

= 330Ω, I = 10mA*

L

4

L

4

R

= 250Ω, I = 10mA*

L

R

= 3.3k, I = 1mA*

L

R

L

= 2.5k, I = 1mA*

L

R

= 66Ω, I = 50mA*

L

R

L

= 50Ω, I = 50mA*

2

L

2

L

R

5

= 25Ω, I = 100mA*

L

0

1

2

3

4

6

7

8

9

10

0

1

2

3

4

5

6

7

8

9

10

0

1

2

3

4

5

6

7

8

9

10

INPUT VOLTAGE (V)

1965 G20

1965 G21

1965 G19

LT1965-3.3 GND Pin Current

(Heavy Load)

LT1965 GND Pin Current

(Light Load)

LT1965 GND Pin Current

(Heavy Load)

25

20

15

10

5

25

20

15

10

5

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

T

V

= 25°C

= V

T

V

= 25°C

= V

T

= 25°C

= V

J

V

SHDN

IN

SHDN

IN

SHDN

IN

*FOR V

= 3.3V

*FOR V

= 1.2V

*FOR V

= 1.2V

OUT

R

= 24Ω, I = 50mA*

L

R

L

= 3Ω, I = 1.1A*

L

R

= 1.091Ω, I = 1.1A*

L

R

= 120Ω, I = 10mA*

L

R

L

= 6.6Ω, I = 500mA*

L

R

= 2.4Ω, I = 500mA*

L

= 1.2k, I = 1mA*

L

R

L

= 33Ω, I = 100mA*

L

R = 12Ω, I = 100mA*

L L

0

1

2

3

4

5

6

7

8

9

10

0

1

2

3

4

5

6

7

8

9

10

0

1

2

3

4

5

6

7

8

9

10

INPUT VOLTAGE (V)

1965 G24

1965 G22

1965 G23

GND Pin Current vs I_LOAD

SHDN Pin Threshold

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

25.0

22.5

20.0

17.5

15.0

12.5

10.0

7.50

5.00

2.50

0

V

IN

= V

+ 1V

OUT(NOMINAL)

OFF TO ON

ON TO OFF

–50 –25

0

25

50

75 100 125

0

0.2

0.6

0.8

1.0

1.2

0.4

TEMPERATURE (°C)

LOAD CURRENT (A)

1965 G26

1965 G09

1965fa

8

LT1965 Series

TYPICAL PERFORMANCE CHARACTERISTICS

SHDN Pin Input Current

ADJ Pin Bias Current

6

5

6.0

5.9

5.8

5.7

5.6

5.5

5.4

5.3

5.2

5.1

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

V

= 20V

SHDN

4

3

2

1

0

2

4

6

8

10 12 14 16 18 20

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

SHDN PIN VOLTAGE (V)

TEMPERATURE (°C)

1965 G11

1965 G12

1965 G13

Current Limit vs Temperature

Reverse Output Current

Current Limit vs V_IN– V_OUT

2.5

2.0

1.5

1.0

0.5

0.0

3.0

2.5

2.0

1.5

1.0

0.5

0

6

5

4

3

2

1

0

ΔV

OUT

= 100mV

V

OUT

= 7V

= 0V

T

= 25°C

= 0V

IN

J

IN

V

LT1965

= V

(LT1965)

OUT

ADJ

SENSE

T = –50°C

J

(LT1965-1.5/-1.8/-2.5/-3.3)

CURRENT FLOWS INTO

OUTPUT PIN

T = 25°C

J

T = 125°C

J

LT1965-1.5

LT1965-1.8

LT1965-2.5

LT1965-3.3

0

2

4

6

8

10 12 14 16 18 20

–50 –25

0

25

50

75 100 125

0

1

2

3

4

5

6

7

8

9

INPUT/OUTPUT DIFFERENTIAL (V)

TEMPERATURE (°C)

OUTPUT VOLTAGE (V)

1965 G30

1965 G15

1965 G32

Ripple Rejection vs Frequency

Reverse Output Current

90

80

70

60

50

40

30

20

10

0

0.50

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

0.00

V

= 0V

IN

= 1.2V (LT1965)

OUT

= 1.5V (LT1965-1.5)

= 1.8V (LT1965-1.8)

= 2.5V (LT1965-2.5)

= 3.3V (LT1965-3.3)

LT1965-1.5/-1.8/-2.5/-3.3

LT1965

I

= 0.75A

OUT

L

C

= 10μF CERAMIC

V

= V

IN

OUT(NOMINAL)

+ 1V + 50mV

RIPPLE

RMS

10

100

1k

10k

100k

1M

–50 –25

0

25

50

75 100 125

FREQUENCY (Hz)

TEMPERATURE (°C)

1965 G34

1965 G33

1965fa

9

LT1965 Series

TYPICAL PERFORMANCE CHARACTERISTICS

Ripple Rejection vs Temperature

LT1965 Minimum Input Voltage

Load Regulation

100

90

0

–5

2.5

2.0

1.5

1.0

0.5

0

LT1965-1.5

LT1965

I

= 1.1A

L

–10

–15

–20

–25

–30

LT1965-1.8

80

I = 500mA

L

I

= 100mA

LT1965-2.5

LT1965-3.3

L

70

60

V

= V

+ 1V

OUT(NOMINAL)

IN

I

= 0.75A

(LT1965-1.5/-1.8/-2.5/-3.3)

V = 2.3V (LT1965)

IN

L

V

= V

+ 1V + 0.5

IN

OUT(NOMINAL)

P-P

RIPPLE AT f = 120Hz

–50 –25 25

TEMPERATURE (°C)

ΔI = 1mA TO 1.1A

L

–50 –25

0

25

50

75 100 125

0

50

75 100 125

–50 –25

0

25

50

75 100 125

TEMPERATURE (°C)

1965 G35

1965 G37

1965 G36

RMS Output Noise vs Load

Current (10Hz to 100kHz)

LT1965-1.8 10Hz to 100kHz

Output Noise

Output Noise Spectral Density

80

70

60

50

40

30

20

10

0

1.00

0.10

0.01

C

I

= 10μF

C

I

= 10μF

OUT

L

OUT

L

= 1.1A

LT1965-2.5

LT1965-1.5

LT1965-3.3

LT1965-2.5

LT1965-1.8

V

LT1965-3.3

OUT

100μV/DIV

LT1965

10k

LT1965-1.8

LT1965

1965 G40

LT1965-1.5

400μs/DIV

10

100

1k

100k

0.0001 0.001

0.01

0.1

1

10

LOAD CURRENT (A)

FREQUENCY (Hz)

1965 G39

1965 G38

LT1965-2.5 SHDN Transient

Response

LT1965-3.3 Transient Response

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

100

50

V

OUT

= 3.3V

SHDN

0

–50

–100

1.5

V

C

= 4.3V

IN

= 10μF CERAMIC

OUTPUT

1.0

0.5

0.0

= 10μF CERAMIC

OUT

0

10 20 30 40 50 60 70 80

0

10 20 30 40 50 60 70 80 90 100

TIME (μs)

1965 G42

1965 G41

V

C

R

= 3.3V

IN

OUT

L

= 10μF CERAMIC

= 2.5k, I = 1mA FOR V

= 2.5V

L

OUT

1965fa

10

LT1965 Series

PIN FUNCTIONS

(DFN/MSOP/DD-PAK/TO-220)

OUT (Pins 1, 2 / 1, 2 / 4 / 4): Output. This pin supplies

power to the load. Use a minimum output capacitor of

10μF to prevent oscillations. Large load transient applica-

tions require larger output capacitors to limit peak volt-

age transients. See the Applications Information section

for more information on output capacitance and reverse

output characteristics.

ADJ (Pin 3 / 3 / 5 / 5): Adjust. This pin is the input to the

error ampliﬁer. It has a typical bias current of 1.3μA that

ﬂows into the pin. The ADJ pin voltage is 1.20V referenced

to ground.

GND (Pins 4, 5 / 4, 5 / 3 / 3): Ground. For the adjustable

LT1965, connect the bottom of the resistor divider, setting

output voltage, directly to GND for optimum regulation.

SENSE (Pin 3 / 3 / 5 / 5): Sense. For ﬁxed voltage ver-

sionsoftheLT1965(LT1965-1.5/LT1965-1.8/LT1965-2.5/

LT1965-3.3), the SENSE pin is the input to the error ampli-

ﬁer. Optimum regulation is obtained when the SENSE pin

is connected to the OUT pin of the regulator. In critical ap-

plications,smallvoltagedropsarecausedbytheresistance

SHDN (Pin 6 / 6 / 1 / 1): Shutdown. Pulling the SHDN

pin low puts the LT1965 into a low power state and turns

the output off. Drive the SHDN pin with either logic or an

open collector/drain with a pull-up resistor. The resistor

supplies the pull-up current to the open collector/drain

logic, normally several microamperes and the SHDN pin

current, typically less than 5.5μA. If unused, connect the

(R ) of PCB traces between the regulator and the load.

P

These drops may be eliminated by connecting the SENSE

pin to the output at the load as shown in Figure 1 (Kelvin

Sense Connection). Note that the voltage drop across

the external PCB traces will add to the dropout voltage

of the regulator. The SENSE pin bias current is 100μA at

the nominal rated output voltage. The SENSE pin can be

pulled below ground (as in a dual supply system where

the regulator load is returned to a negative supply) while

still allowing the device to start and operate.

SHDN pin to V . The SHDN pin cannot be driven below

IN

GND unless it is tied to the IN pin. If the SHDN pin is

driven below GND while IN is powered, the output will

turn on. SHDN pin logic cannot be referenced to a nega-

tive supply rail.

IN (Pins 7, 8 / 7, 8 / 2 / 2): Input. This pin supplies power

tothedevice. TheLT1965requiresabypasscapacitoratIN

if located more than six inches from the main input ﬁlter

capacitor. Include a bypass capacitor in battery-powered

circuitsasabattery’soutputimpedancegenerallyriseswith

frequency. A bypass capacitor in the range of 1μF to 10μF

sufﬁces. TheLT1965’sdesignwithstandsreversevoltages

on the IN pin with respect to ground and the OUT pin. In

the case of a reversed input, which occurs if a battery is

plugged in backwards, the LT1965 behaves as if a diode

is in series with its input. No reverse current ﬂows into

the LT1965 and no reverse voltage appears at the load.

The device protects itself and the load.

IN

OUT

LT1965

R

P

LOAD

SHDN SENSE

+

V

IN

GND

R

P

1965 F01

Figure 1. Kelvin Sense Connection

Exposed Pad (Pin 9 / 9, DFN and MSOP Packages Only):

Ground. Tie this pin directly to Pins 4 and 5 and the PCB

ground. This pin provides enhanced thermal performance

with its connection to the PCB ground. See the Applica-

tions Information section for thermal considerations and

calculating junction temperature.

1965fa

11

LT1965 Series

APPLICATIONS INFORMATION

The LT1965 series are 1.1A low dropout regulators with

shutdown. The devices are capable of supplying 1.1A at

a typical dropout voltage of 310mV. The low operating

quiescentcurrent(500μAfortheadjustableversion,600μA

for the ﬁxed voltage versions) drops to less than 1μA in

shutdown. In addition to the low quiescent current, the

LT1965 regulators incorporate several protection features

thatmakesthemidealforuseinbattery-poweredsystems.

Thedevicesprotectthemselvesagainstbothreverseinput

andreverseoutputvoltages.Inbatterybackupapplications,

if a backup battery holds up the output when the input is

pulled to ground, the LT1965 performs like it has a diode

in series with its output, preventing reverse current ﬂow.

Also, in dual supply applications where the regulator load

is returned to a negative supply, the output can be pulled

below ground by as much as 20V. The LT1965 still starts

and operates normally in this situation.

The adjustable device is tested and speciﬁed with the ADJ

pin tied to the OUT pin for an output voltage of 1.20V.

Speciﬁcations for output voltages greater than 1.20V are

proportional to the ratio of the desired output voltage to

1.20V: V /1.20V. For example, load regulation for an

OUT

outputcurrentchangeof1mAto1.1Aistypically–4.25mV

at V

= 1.20V. At V

= 5V, load regulation is:

OUT

5V

1.20V

• –4.25mV = –17.71mV

Output Capacitance

The LT1965’s design is stable with a wide range of out-

put capacitors. The ESR of the output capacitor affects

stability, most notably with small capacitors. A minimum

output capacitor of 10μF with an ESR of 3Ω or less is

recommended to prevent oscillations. The LT1965 is a

low quiescent current device and output load transient

responseisafunctionofoutputcapacitance.Largervalues

of output capacitance decrease the peak deviations and

provide improved transient response for larger current

changes.

Adjustable Operation

TheLT1965adjustableversionhasanoutputvoltagerange

of 1.20V to 19.5V. Figure 2 illustrates that the ratio of two

external resistors sets the output voltage. The device ser-

vos the output to maintain the ADJ pin voltage at 1.20V

referenced to ground. R1’s current equals 1.20V/R1. R2’s

current equals R1’s current plus the ADJ pin bias current.

The ADJ pin bias current, 1.3μA at 25°C, ﬂows through

R2 into the ADJ pin. Use the formula in Figure 2 to calcu-

late output voltage. Linear Technology recommends that

R1’s value be less than 12.1k to minimize output voltage

errors due to the ADJ pin bias current. In shutdown, the

output turns off and the divider current is zero. For curves

depicting ADJ Pin Voltage vs Temperature and ADJ Pin

Bias Current vs Temperature, see the Typical Performance

Characteristics section.

Ceramic capacitors require extra consideration. Manufac-

turersmakeceramiccapacitorswithavarietyofdielectrics,

eachwithdifferentbehavioracrosstemperatureandapplied

voltage. The most common dielectrics used are speciﬁed

with EIA temperature characteristic codes of Z5U, Y5V,

X5R and X7R. The Z5U and Y5V dielectrics provide high

C-V products in a small package at low cost, but exhibit

strong voltage and temperature coefﬁcients as shown in

Figures 3 and 4. When used with a 5V regulator, a 16V

10μF Y5V capacitor can exhibit an effective value as low

as 1μF to 2μF for the DC bias applied and over the operat-

ing temperature range. The X5R and X7R dielectrics yield

much more stable characteristics and are more suitable

for use as the output capacitor. The X7R type works over

a wider temperature range and has better temperature

stability whereas X5R is less expensive and is available in

highervalues.CarestillmustbeexercisedwhenusingX5R

and X7R capacitors; the X5R and X7R codes only specify

operating temperature range and maximum capacitance

change over temperature. Capacitance change due to DC

bias with X5R and X7R capacitors is better than Y5V and

IN

OUT

LT1965

V

OUT

+

V

R2

R1

IN

R2

R1

ꢀ

ꢁ

ꢃ

ꢄ

ADJ

V_OUT=1.20V 1+

+I_ADJ•R2

ꢂ

ꢅ

GND

V_ADJ=1.20V

1965 F02

I

_ADJ=1.3µA AT 25ºC

OUTPUT RANGE =1.20V TO 19.5V

Figure 2. Adjustable Operation

Z5U capacitors, but can still be signiﬁcant enough to drop

1965fa

12

LT1965 Series

APPLICATIONS INFORMATION

capacitor values below appropriate levels. Capacitor DC

bias characteristics tend to improve as component case

size increases, but expected capacitance at operating

voltages should be veriﬁed.

Overload Recovery

Like many IC power regulators, the LT1965 has safe oper-

ating area protection. The safe area protection decreases

currentlimitasinput-to-outputvoltageincreasesandkeeps

the power transistor inside a safe operating region for all

values of input-to-output voltage. The protective design

provides some output current at all values of input-to-

output voltage up to the device breakdown.

Voltage and temperature coefﬁcients are not the only

sources of problems. Some ceramic capacitors have a

piezoelectric response. A piezoelectric device generates

voltage across its terminals due to mechanical stress,

similar to the way a piezoelectric accelerometer or micro-

phone works. For a ceramic capacitor, the stress can be

induced by vibrations in the system or thermal transients.

The resulting voltages produced can cause appreciable

amounts of noise. A ceramic capacitor produced the trace

in Figure 5 in response to light tapping from a pencil.

Similar vibration induced behavior can masquerade as

increased output voltage noise.

When power is ﬁrst applied, as input voltage rises, the

output follows the input, allowing the regulator to start up

into very heavy loads. During start-up, as the input voltage

is rising, the input-to-output voltage differential is small,

allowing the regulator to supply large output currents.

With a high input voltage, a problem can occur wherein

removal of an output short will not allow the output to

40

20

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10μF

0

X5R

0

–20

–40

Y5V

–60

Y5V

–80

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10μF

–100

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

0

8

12 14

2

4

6

10

16

DC BIAS VOLTAGE (V)

1965 F03

1965 F04

Figure 3. Ceramic Capacitor DC Bias Characteristics

Figure 4. Ceramic Capacitor Temperature Characteristics

1mV/DIV

1965 F05

1ms/DIV

V

C

LOAD

= 1.3V

= 10μF

= 0

OUT

I

Figure 5. Noise Resulting from Tapping on a Ceramic Capacitor

1965fa

13

LT1965 Series

APPLICATIONS INFORMATION

recover. Other regulators, such as the LT1083/LT1084/

LT1085 family, also exhibit this phenomenon, so it is not

unique to the LT1965.

Thermal Considerations

The LT1965’s maximum rated junction temperature of

125°C limits its power handling capability. Two compon-

ents comprise the power dissipated by the device:

The problem occurs with a heavy output load when the

input voltage is high and the output voltage is low. Com-

mon situations occur immediately after the removal of a

short-circuit or if the shutdown pin is pulled high after the

input voltage has already been turned on. The load line for

such a load may intersect the output current curve at two

points.Ifthishappens,therearetwostableoutputoperating

points for the regulator. With this double intersection, the

input power supply may need to be cycled down to zero

and brought up again to make the output recover.

1. Output current multiplied by the input/output voltage

differential: I

• (V – V ), and

OUT

IN OUT

2. GND pin current multiplied by the input voltage:

• V

I

GND

IN

GND pin current is determined using the GND Pin Current

curvesintheTypicalPerformanceCharacteristicssection.

Power dissipation equals the sum of the two components

listed.

The LT1965 regulators have internal thermal limiting that

protect the device during overload conditions. For con-

tinuous normal conditions, do not exceed the maximum

junction temperature rating of 125°C. Carefully consider

all sources of thermal resistance from junction to ambi-

ent including other heat sources mounted in proximity to

the LT1965.

Output Voltage Noise

The LT1965 regulators are designed to provide low output

voltage noise over the 10Hz to 100kHz bandwidth while

operatingatfullload.Outputvoltagenoiseisapproximately

80nV/√Hz over this frequency bandwidth for the LT1965

adjustable version. For higher output voltages (generated

by using a resistor divider), the output voltage noise gains

up accordingly.

The underside of the LT1965 DFN package has exposed

2

metal (4mm ) from the lead frame to the die attachment.

Higher values of output voltage noise may be measured

if care is not exercised with regard to circuit layout and

testing.Crosstalkfromnearbytracescaninduceunwanted

noiseontotheLT1965’soutput. Powersupplyripplerejec-

tion must also be considered; the LT1965 regulators do

not have unlimited power supply rejection and will pass a

small portion of the input noise through to the output.

The underside of the LT1965 MSOP package also has

2

exposed metal (3.7mm ). Both packages allow heat to

directly transfer from the die junction to the printed circuit

board metal to control maximum operating junction tem-

perature. The dual-in-line pin arrangement allows metal

to extend beyond the ends of the package on the topside

(component side) of a PCB. Connect this metal to GND

on the PCB. The multiple IN and OUT pins of the LT1965

also assist in spreading heat to the PCB.

For surface mount devices, heat sinking is accomplished

by using the heat spreading capabilities of the PC board

and its copper traces. Copper board stiffeners and plated

through-holes can also be used to spread the heat gener-

ated by power devices.

1965fa

14

LT1965 Series

APPLICATIONS INFORMATION

The following tables list thermal resistance for several

different board sizes and copper areas. All measurements

were taken in still air on 1/16" FR-4 board with one ounce

copper.

Calculating Junction Temperature

Example: Given an output voltage of 2.5V, an input voltage

range of 3.3V 5%, an output current range of 0mA to

500mA and a maximum ambient temperature of 85°C,

what will the maximum junction temperature be?

Table 1. Measured Thermal Resistance for DFN Package

Copper Area

Topside* Backside

Thermal Resistance

The power dissipated by the device equals:

Board Area (Junction-to-Ambient)

2

2500mm

1000mm

2500mm

60°C/W

62°C/W

65°C/W

68°C/W

70°C/W

I

• (V

– V ) + I

• V

OUT(MAX)

IN(MAX)

OUT

GND IN(MAX)

2

where:

225mm

100mm

2

I

= 500mA

= 3.465V

OUT(MAX)

2

50mm

V

*Device is mounted on topside

IN(MAX)

I

at (I = 500mA, V = 3.465V) = 8.2mA

OUT IN

GND

Table 2. Measured Thermal Resistance for MSOP Package

Copper Area

Topside* Backside

Thermal Resistance

So,

Board Area (Junction-to-Ambient)

P = 500mA(3.465V – 2.5V) + 8.2mA(3.465V) = 0.511W

2

2500mm

1000mm

2500mm

55°C/W

57°C/W

60°C/W

65°C/W

68°C/W

2

Using a DFN package, the thermal resistance will be in

the range of 60°C/W to 70°C/W depending on the cop-

per area. So the junction temperature rise above ambient

approximately equals:

2

225mm

100mm

2

50mm

*Device is mounted on topside

0.511W • 65°C/W = 33.22°C

Table 3. Measured Thermal Resistance for DD-PAK Package

The maximum junction temperature equals the maximum

ambienttemperatureplusthemaximumjunctiontempera-

ture rise above ambient or:

Copper Area

Topside* Backside

Thermal Resistance

Board Area (Junction-to-Ambient)

2

2500mm

1000mm

125mm

2500mm

25°C/W

30°C/W

35°C/W

2

T

= 85°C + 33.22°C = 118.22°C

JMAX

2

*Device is mounted on topside

Measured Thermal Resistance for TO-220 Package

Thermal Resistance (Junction-to-Case) = 3°C/W

1965fa

15

LT1965 Series

APPLICATIONS INFORMATION

Protection Features

The LT1965 adjustable version incurs no damage if the

ADJ pin is pulled above or below ground by 9V. If the input

is left open circuit or grounded, the ADJ pin performs

like an open circuit when pulled below ground and like a

large resistor (typically 5k up to 3V on the ADJ pin and

then 1.5k up to 9V) in series with a diode when pulled

above ground.

The LT1965 regulators incorporate several protection

features that makes them ideal for use in battery-powered

circuits. In addition to the normal protection features

associated with monolithic regulators, such as current

limiting and thermal limiting, the devices also protect

against reverse input voltages, reverse output voltages

and reverse output-to-input voltages.

In situations where the ADJ pin connects to a resistor

dividerthatwouldpulltheADJpinaboveits9Vclampvolt-

age if the output is pulled high, the ADJ pin input current

must be limited to less than 5mA. For example, a resistor

divider is used to provide a regulated 1.5V output from the

1.20V reference when the output is forced to 20V. The top

resistor of the resistor divider must be chosen to limit the

current into the ADJ pin to less than 5mA when the ADJ

pin is at 9V. The 11V difference between the OUT and ADJ

pins divided by the 5mA maximum current into the ADJ

pin yields a minimum top resistor value of 2.2k.

Current limit protection and thermal overload protection

protect the device against current overload conditions

at its output. For normal operation, do not exceed the

maximum rated junction temperature of 125°C.

Theinputofthedevicewithstandsreversevoltagesof22V.

The LT1965 limits current ﬂow to less than 1mA (typically

less than 300μA) and no negative voltage appears at the

output.Thedeviceprotectsbothitselfandtheloadagainst

batteries that are plugged in backwards.

The LT1965 incurs no damage if its output is pulled be-

low ground. If the input is left open circuit or grounded,

the output can be pulled below ground by 22V. For ﬁxed

voltage versions, the output will act like a large resistor,

typically 5k or higher, limiting current ﬂow to typically

less than 300μA. For the adjustable version, the output

acts like an open circuit and no current ﬂows from the

output. However, current ﬂows in (but is limited by) the

resistor divider that sets the output voltage. If the input

is powered by a voltage source, the output sources cur-

rent equal to its current limit capability and the LT1965

protects itself by thermal limiting. In this case, grounding

the SHDN pin turns off the device and stops the output

In circuits where a backup battery is required, several

different input/output conditions can occur. The output

voltage may be held up while the input is either pulled

to ground, pulled to some intermediate voltage, or is left

open circuit. Current ﬂow back into the output follows the

curve shown in Figure 6.

If the LT1965’s IN pin is forced below the OUT pin or the

OUT pin is pulled above the IN pin, input current typically

drops to less than 2μA. This occurs if the LT1965 input is

connected to a discharged (low voltage) battery and either

abackupbatteryorasecondregulatorholdsuptheoutput.

The state of the SHDN pin has no effect on the reverse

output current if the output is pulled above the input.

from sourcing current.

6

T

= 25°C

J

V

= 0V

= V

IN

OUT

(LT1965)

ADJ

5

LT1965

= V

SENSE

(LT195-1.5/-1.8/-2.5/-3.3)

CURRENT FLOWS INTO

OUTPUT PIN

4

3

LT1965-1.5

LT1965-1.8

2

1

0

LT1965-2.5

LT1965-3.3

0

1

2

3

4

5

6

7

8

9

OUTPUT VOLTAGE (V)

1965 F06

Figure 6. Reverse Output Current

1965fa

16

LT1965 Series

TYPICAL APPLICATIONS

Paralleling of Regulators for Higher Output Current

R1

0.01Ω

3.3V

2.2A

IN

OUT

LT1965-3.3

+

C1

100μF

C2

22μF

V

IN

> 3.7V

SHDN SENSE

GND

R2

0.01Ω

IN

OUT

ADJ

R6

6.65k

1%

LT1965

SHDN

R7

4.02k

1%

GND

R3

2.2k

R4

2.2k

R5

10k

8

3

2

+

1

1/2

LT1366

C3

0.01μF

–

4

1965 TA03

1965fa

17

LT1965 Series

PACKAGE DESCRIPTION

DD Package

8-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1698)

R = 0.115

0.38 ± 0.10

TYP

5

8

0.675 ±0.05

3.5 ±0.05

2.15 ±0.05 (2 SIDES)

1.65 ±0.05

3.00 ±0.10

(4 SIDES)

1.65 ± 0.10

(2 SIDES)

PIN 1

TOP MARK

(NOTE 6)

PACKAGE

OUTLINE

(DD) DFN 1203

4

1

0.25 ± 0.05

0.75 ±0.05

0.200 REF

0.50 BSC

2.38 ±0.05

0.50 BSC

2.38 ±0.10

(2 SIDES)

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

NOTE:

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON TOP AND BOTTOM OF PACKAGE

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

MS8E Package

8-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1662)

BOTTOM VIEW OF

EXPOSED PAD OPTION

3.00 ± 0.102

(.118 ± .004)

(NOTE 3)

0.52

(.0205)

REF

2.06 ± 0.102

(.081 ± .004)

0.889 ± 0.127

(.035 ± .005)

2.794 ± 0.102

(.110 ± .004)

1

8

7 6 5

1.83 ± 0.102

(.072 ± .004)

5.23

(.206)

MIN

3.00 ± 0.102

(.118 ± .004)

(NOTE 4)

3.20 – 3.45

(.126 – .136)

4.90 ± 0.152

(.193 ± .006)

2.083 ± 0.102

(.082 ± .004)

0.65

(.0256)

BSC

0.42 ± 0.038

(.0165 ± .0015)

TYP

8

1

2

3

4

RECOMMENDED SOLDER PAD LAYOUT

1.10

(.043)

MAX

0.86

(.034)

REF

DETAIL “A”

0.254

0.18

(.007)

(.010)

0° – 6° TYP

SEATING

PLANE

GAUGE

PLANE

0.22 – 0.38

(.009 – .015)

TYP

0.127 ± 0.076

(.005 ± .003)

0.65

(.0256)

BSC

0.53 ± 0.152

(.021 ± .006)

MSOP (MS8E) 0603

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR

GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL

NOT EXCEED 0.152mm (.006") PER SIDE

1965fa

18

LT1965 Series

PACKAGE DESCRIPTION

Q Package

5-Lead Plastic DD Pak

(Reference LTC DWG # 05-08-1461)

.390 – .415

(9.906 – 10.541)

.060

.256

.165 – .180

(4.191 – 4.572)

(1.524)

(6.502)

.045 – .055

(1.143 – 1.397)

15° TYP

+.008

.004

.060

(1.524)

TYP

–.004

.060

.059

(1.499)

TYP

.183

(1.524)

(4.648)

+0.203

–0.102

.330 – .370

0.102

(

)

(8.382 – 9.398)

.095 – .115

(2.413 – 2.921)

.075

(1.905)

.067

(1.702)

BSC

.050 ± .012

(1.270 ± 0.305)

.300

(7.620)

.013 – .023

(0.330 – 0.584)

+.012

.143

–.020

.028 – .038

(0.711 – 0.965)

TYP

+0.305

BOTTOM VIEW OF DD PAK

HATCHED AREA IS SOLDER PLATED

COPPER HEAT SINK

3.632

Q(DD5) 0502

(

)

–0.508

.080

.420

.276

.420

.350

.090

.325

.205

.565

.320

.090

.042

.067

.042

RECOMMENDED SOLDER PAD LAYOUT

.067

NOTE:

1. DIMENSIONS IN INCH/

(MILLIMETER)

RECOMMENDED SOLDER PAD LAYOUT

FOR THICKER SOLDER PASTE APPLICATIONS

2. DRAWING NOT TO SCALE

T Package

5-Lead Plastic TO-220 (Standard)

(Reference LTC DWG # 05-08-1420)

.165 – .180

(4.191 – 4.572)

.147 – .155

(3.734 – 3.937)

DIA

.390 – .415

(9.906 – 10.541)

.045 – .055

(1.143 – 1.397)

.230 – .270

(5.842 – 6.858)

.570 – .620

(14.478 – 15.748)

.620

(15.75)

TYP

.460 – .500

(11.684 – 12.700)

.330 – .370

(8.382 – 9.398)

.700 – .728

(17.78 – 18.491)

.095 – .115

(2.413 – 2.921)

SEATING PLANE

.152 – .202

(3.861 – 5.131)

.155 – .195*

(3.937 – 4.953)

.260 – .320

(6.60 – 8.13)

.013 – .023

(0.330 – 0.584)

.067

BSC

.135 – .165

(3.429 – 4.191)

.028 – .038

(0.711 – 0.965)

(1.70)

* MEASURED AT THE SEATING PLANE

T5 (TO-220) 0801

1965fa

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

19

LT1965 Series

TYPICAL APPLICATION

Adjustable Current Source

R5, 0.01Ω

LT1965

LOAD

IN

OUT

R1

1k

+

C1

10μF

C4

10μF

SHDN

GND

ADJ

V

IN

> 2.7V

LT1004-1.2

R4

R6

R8

100k

R2

80.6k

C3

1μF

2.2k 2.2k

R3

2k

R7

470Ω

2

8

4

–

1

1/2

LT1366

1965 TA04

3

+

C2

3.3μF

NOTE: ADJUST R1 FOR

0A TO 1.1A CONSTANT-CURRENT

RELATED PARTS

PART NUMBER DESCRIPTION

COMMENTS

V : 4.2V to 30V, V

LT1129

LT1761

LT1762

LT1763

700mA, Micropower, LDO

= 3.8V, V = 0.40V, I = 50μA, I = 16μA;

OUT(MIN) DO Q SD

IN

DD, SOT-223, S8, TO220-5 and TSSOP20 Packages

100mA, Low Noise Micropower, LDO

150mA, Low Noise Micropower, LDO

500mA, Low Noise Micropower, LDO

V : 1.8V to 20V, V = 1.22V, V = 0.30V, I = 20μA, I = < 1μA,

IN

OUT(MIN)

RMS

DO

Q

SD

Low Noise < 20μV

, Stable with 1μF Ceramic Capacitors, ThinSOT™ Package

V : 1.8V to 20V, V

= 1.22V, V = 0.30V, I = 25μA, I = < 1μA,

DO Q SD

, MS8 Package

IN

OUT(MIN)

Low Noise < 20μV

RMS

V : 1.8V to 20V, V

= 1.22V, V = 0.30V, I = 30μA, I = < 1μA,

DO Q SD

, S8 Package

IN

OUT(MIN)

Low Noise < 20μV

RMS

LT1764/

LT1764A

3A, Low Noise, Fast Transient Response,

LDO

V : 2.7V to 20V, V

= 1.21V, V = 0.34V, I = 1mA, I = < 1μA, Low Noise

IN

OUT(MIN) DO Q SD

< 40μV

, “A” Version Stable with Ceramic Capacitors, DD and TO220-5 Packages

RMS

LTC1844

150mA, Very Low Drop-Out LDO

V : 1.6V to 6.5V, V

= 1.25V, V = 0.08V, I = 35μA, I = < 1μA,

IN

OUT(MIN) DO Q SD

Low Noise < 60μV

, ThinSOT™ Package

RMS

LT1962

300mA, Low Noise Micropower, LDO

V : 1.8V to 20V, V

= 1.22V, V = 0.27V, I = 30μA, I = < 1μA,

IN

OUT(MIN) DO Q SD

Low Noise < 20μV

, MS8 Package

RMS

LT1963/

LT1963A

1.5A, Low Noise, Fast Transient Response, V : 2.1V to 20V, V

= 1.21V, V = 0.34V, I = 1mA, I = < 1μA,

IN

OUT(MIN) DO Q SD

LDO

Low Noise < 40μV

, “A” Version Stable with Ceramic Capacitors;

RMS

DD, TO220-5, SOT-223 and S8 Packages

LT3020

LT3021

LT3023

LT3024

LT3027

LT3028

100mA, Low Voltage V , V

= 0.9V, V : 0.9V to 10V, V

= 0.20V, V = 0.15V, I = 120μA, I = 3μA, DFN and

DO Q SD

DO IN(MIN)

IN

OUT(MIN)

LDO

MS8 Packages

500mA, Low Voltage V , V

= 0.9V, V : 0.9V to 10V, V

= 0.20V, V = 0.16V, I = 120μA, I = 3μA, DFN and

DO Q SD

DO IN(MIN)

IN

LDO

S8 Packages

Dual, 2x 100mA, Low Noise Micropower,

LDO

V : 1.8V to 20V, V

= 1.22V, V = 0.30V, I = 40μA, I = < 1μA, DFN and

DO Q SD

IN

MS10 Packages

Dual, 100mA/500mA, Low Noise

Micropower, LDO

V : 1.8V to 20V, V

= 1.22V, V = 0.30V, I = 60μA, I = < 1μA, DFN and

DO Q SD

IN

TSSOP Packages

Dual, 2x 100mA, Low Noise Micropower,

LDO with Independent Inputs

V : 1.8V to 20V, V

= 1.22V, V = 0.30V, I = 25μA, I = < 1μA,

DO Q SD

, DFN and MS10 Packages

IN

Low Noise < 20μV

RMS

Dual, 100mA/500mA, Low Noise

Micropower, LDO with Independent Inputs Low Noise < 20μV

V : 1.8V to 20V, V

= 1.22V, V = 0.30V, I = 30μA, I = < 1μA,

, DFN and TSSOP Packages

IN

OUT(MIN) DO Q SD

RMS

LT3080/

LT3080-1

1.1A Parallelable, Low Noise, Low Dropout 300mV Dropout Voltage (2-Supply Operation), Low Noise: 40μV

, V : 1.2V to 36V, V

:

RMS IN

OUT

Linear Regulator

0V to 35.7V, Current-Based Reference with 1-Resistor V

Set; Directly Parallelable (No Op

OUT

Amp Required), Stable with Ceramic Caps, TO-220, SOT-223, MSOP and 3mm × 3mm DFN

Packages; LT3080-1 Version Has Integrated Internal Ballast Resistor

ThinSOT is a trademark of Linear Technology Corporation

1965fa

LT 0408 REV A • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

20

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LT1965IDD-1.8-TRPBF
厂家：	Linear
描述：	1.1A, Low Noise, Low Dropout Linear Regulator 1.1A ，低噪声，低压差线性稳压器稳压器
文件：	总20页 (文件大小：238K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT1965IDD-1.8-TRPBF [Linear]

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