LT1970IFE#TRPBF [Linear]
LT1970 - 500mA Power Op Amp with Adjustable Precision Current Limit; Package: TSSOP; Pins: 20; Temperature Range: -40°C to 85°C;
| 型号： | LT1970IFE#TRPBF |
| 厂家： | 
Linear |
| 描述： | LT1970 - 500mA Power Op Amp with Adjustable Precision Current Limit; Package: TSSOP; Pins: 20; Temperature Range: -40°C to 85°C 放大器 光电二极管 |
| 文件： | 总26页 (文件大小：382K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1970
500mA Power Op Amp with
Adjustable Precision Current Limit
FeaTures
DescripTion
The LT®1970 is a 500mA power op amp with precise
externally controlled current limiting. Separate control
voltages program the sourcing and sinking current limit
sense thresholds with 2% accuracy. Output current may
be boosted by adding external power transistors.
n
500mA Minimum Output Current
n
Independent Adjustment of Source and
Sink Current Limits
n
n
n
n
2% Current Limit Accuracy
Operates with Single or Split Supplies
Shutdown/Enable Control Input
Open Collector Status Flags:
The circuit operates with single or split power supplies
from 5V to 36V total supply voltage. In normal operation,
the input stage supplies and the output stage supplies are
Sink Current Limit
Source Current Limit
+
–
connected (V to V and V to V ). To reduce power
CC
EE
Thermal Shutdown
+
dissipation it is possible to power the output stage (V ,
V ) from independent, lower voltage rails. The amplifier is
n
n
n
n
n
n
Fail Safe Current Limit and Thermal Shutdown
1.6V/µs Slew Rate
3.6MHz Gain Bandwidth Product
Fast Current Limit Response: 2MHz Bandwidth
Specified Temperature Range: –40°C to 85°C
Available in a 20-Lead TSSOP Package
–
unity-gain stable with a 3.6MHz gain bandwidth product
and slews at 1.6V/µs. The current limit circuits operate
witha2MHzresponsebetweentheVC orVC control
inputs and the amplifier output.
SRC
SNK
Open collector status flags signal current limit circuit
activation, as well as thermal shutdown of the amplifier.
An enable logic input puts the amplifier into a low power,
high impedance output state when pulled low. Thermal
shutdown and a 800mA fixed current limit protect the
chip under fault conditions.
applicaTions
n
Automatic Test Equipment
n
Laboratory Power Supplies
n
Motor Drivers
Thermoelectric Cooler Driver
n
The LT1970 is packaged in a 20-lead TSSOP package with
a thermally conductive copper bottom plate to facilitate
heat sinking.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Typical applicaTion
AV = 2 Amplifier with Adjustable 500mA Full-Scale
Current Limit and Fault Indication
Current Limited Sinewave Into 10Ω Load
V
LIMIT
0V TO 5V
15V
15V
3k
4V
2V
V
LIMIT
10 • R
I
=
OUT(LIMIT)
V
CC
CS
+
V
EN
VC
0V
V
LOAD
SRC
VC
V
IN
+IN
SNK
–2V
R
CS
ISNK
1Ω
I
ISRC
OUT
1/4W
TSD
LT1970
OUT
+
SENSE
–
SENSE
V
–
LOAD
VC
VC
CS
= 4V
= 2V
1970 TA02
R1
10k
20µs/DIV
SRC
SNK
–IN
COMMON
V
EE
R
= 1Ω
R2
10k
–15V
1970 TA01
1970fe
1
For more information www.linear.com/LT1970
LT1970
absoluTe MaxiMuM raTings
pin conFiguraTion
(Note 1)
TOP VIEW
Supply Voltage (V to V )..................................... 36V
CC
EE
+
–
V
1
2
20
19
18
17
16
15
14
13
12
11
V
V
EE
–
EE
+
Positive High Current Supply (V )................... V to V
CC
V
–
+
21
Negative High Current Supply(V ) ....................V to V
Amplifier Output (OUT)..................................... V to V
EE
OUT
3
TSD
–
+
+
SENSE
4
ISNK
Current Sense Pins
FILTER
5
ISRC
+
–
–
+
–
+
(SENSE , SENSE , FILTER)........................... V to V
–
SENSE
6
ENABLE
COMMON
Logic Outputs (ISRC, ISNK, TSD)....... COMMON to V
CC
V
7
CC
Input Voltage (–IN, +IN)............ V – 0.3V to V + 36V
EE
EE
–IN
+IN
8
VC
SRC
Input Current......................................................... 10mA
9
VC
SNK
Current Control Inputs
V
EE
10
V
EE
(VC , VC )..............COMMON to COMMON + 7V
SRC
SNK
FE PACKAGE
20-LEAD PLASTIC TSSOP
Enable Logic Input .............................. COMMON to V
CC
T
JMAX
= 150°C, θ = 40°C/W (NOTE 8)
JA
EXPOSED PAD (PIN 21) IS CONNECTED TO V
COMMON....................................................... V to V
EE
CC
EE
Output Short-Circuit Duration ......................... Indefinite
Operating Temperature Range (Note 2)....–40°C to 85°C
Specified Temperature Range (Note 3) .... –40°C to 85°C
Maximum Junction Temperature.......................... 150°C
Storage Temperature Range...................–65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
orDer inForMaTion
LEAD FREE FINISH
LT1970CFE#PBF
LT1970IFE#PBF
TAPE AND REEL
LT1970CFE#TRPBF
LT1970IFE#TRPBF
PART MARKING*
LT1970CFE
PACKAGE DESCRIPTION
20-Lead Plastic TSSOP
20-Lead Plastic TSSOP
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
LT1970IFE
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. See Test Circuit for standard test conditions.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Power Op Amp Characteristics
V
Input Offset Voltage
200
600
1000
1300
µV
µV
µV
OS
l
l
0°C < T < 70°C
A
–40°C < T < 85°C
A
l
l
l
Input Offset Voltage Drift (Note 4)
Input Offset Current
–10
–100
–600
–4
10
µV/°C
nA
I
I
V
V
= 0V
= 0V
100
OS
CM
Input Bias Current
–160
3
nA
B
CM
Input Noise Voltage
0.1Hz to 10Hz
1kHz
µV
P-P
e
Input Noise Voltage Density
Input Noise Current Density
15
3
nV/√Hz
n
i
1kHz
pA/√Hz
n
1970fe
2
For more information www.linear.com/LT1970
LT1970
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. See Test Circuit for standard test conditions.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
R
Input Resistance
Common Mode
Differential Mode
500
100
kΩ
kΩ
IN
C
V
Input Capacitance
Pin 8 and Pin 9 to Ground
6
pF
IN
Input Voltage Range
Typical
Guaranteed by CMRR Test
–14.5
–12.0
13.6
12.0
V
V
CM
l
l
CMRR
PSRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
–12V < V < 12V
92
105
dB
CM
–
–
+
l
l
l
l
V
V
V
V
= V = –5V, V = V = 3V to 30V
90
110
90
100
130
100
130
dB
dB
dB
dB
EE
EE
EE
EE
CC
+
= V = –5V, V = 30V, V = 2.5V to 30V
CC
–
+
= V = –3V to –30V, V = V = 5V
CC
–
+
110
= –30V, V = –2.5V to –30V, V = V = 5V
CC
A
Large-Signal Voltage Gain
R = 1k, –12.5V < V < 12.5V
OUT
100
75
150
120
45
V/mV
V/mV
VOL
L
l
l
l
l
R = 100Ω, –12.5V < V
< 12.5V
80
40
V/mV
V/mV
L
OUT
+
–
R = 10Ω, –5V < V
< 5V, V = –V = 8V
20
5
V/mV
V/mV
L
OUT
–
V
V
Output Sat Voltage Low
Output Sat Voltage High
Output Short-Circuit Current
V
OL
= V
– V
OUT
OL
+
–
R = 100, V = V = 15V, V = V = –15V
1.9
0.8
2.5
2.3
V
V
L
CC
EE
+
–
R = 10, V = –V = 15V, V = –V = 5V
L
CC
EE
+
V
OH
= V – V
OUT
OH
+
–
l
R = 100, V = V = 15V, V = V = –15V
1.7
1.0
V
V
L
CC
EE
+
–
R = 10, V = –V = 15V, V = –V = 5V
L
CC
EE
I
Output Low, R
= 0Ω
= 0Ω
500
–1000
800
–800
1200
–500
mA
mA
SC
SENSE
SENSE
Output High, R
SR
Slew Rate
–10V < V
< 10V, R = 1k
0.7
11
1.6
V/µs
kHz
MHz
µs
OUT
L
FPBW
GBW
Full Power Bandwidth
Gain Bandwidth Product
Settling Time
V
= 10V
(Note 5)
PEAK
OUT
f = 10kHz
0.01%, V
3.6
8
t
= 0V to 10V, A = –1, R = 1k
S
OUT
V
L
Current Sense Characteristics
V
Minimum Current Sense Voltage
VC
= VC
= 0V
0.1
0.1
4
7
mV
mV
SENSE(MIN)
SRC
SNK
l
l
l
10
V
V
V
Current Sense Voltage 4% of Full Scale
Current Sense Voltage 10% of Full Scale
VC
SRC
VC
SRC
SRC
= VC
= VC
= VC
= 0.2V
= 0.5V
= 5V
15
45
20
50
25
55
mV
mV
SENSE(4%)
SENSE(10%)
SENSE(FS)
SNK
SNK
SNK
Current Sense Voltage 100% of Full Scale VC
490
480
500
500
510
520
mV
mV
l
l
l
l
I
I
I
I
Current Limit Control Input Bias Current
VC , VC Pins
SRC SNK
–1
–0.2
0.1
500
500
µA
nA
nA
BI
–
–
+
SENSE Input Current
0V < (VC , VC ) < 5V
–500
–500
SENSE
FILTER
SENSE
SRC
SNK
FILTER Input Current
0V < (VC , VC ) < 5V
SRC SNK
+
l
l
l
l
SENSE Input Current
VC = VC
= 0V
–500
200
–300
–25
500
300
–200
25
nA
nA
nA
nA
SRC
SRC
SNK
= 5V, VC
VC
= 0V
250
–250
SNK
SNK
VC = 0V, VC
= 5V
SRC
VC
= VC
= 5V
SRC
SRC
SRC
SNK
SNK
SNK
Current Sense Change with Output Voltage VC
= VC
= 5V, –12.5V < V
< 12.5V
0.1
%
OUT
+
Current Sense Change with Supply Voltage VC
= VC
= 5V, 6V < (V , V ) < 18V
0.05
0.01
0.05
0.01
%
%
%
%
CC
+
2.5V < V < 18V, V = 18V
CC
–
–18V < (V , V ) < –2.5V
EE
–
–18V < V < –2.5V, V = –18V
EE
1970fe
3
For more information www.linear.com/LT1970
LT1970
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. See Test Circuit for standard test conditions.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
2
MAX
UNITS
MHz
Ω
Current Sense Bandwidth
Resistance FILTER to SENSE
–
l
R
750
1000
1250
CSF
Logic I/O Characteristics
l
l
Logic Output Leakage ISRC, ISNK, TSD
Logic Low Output Level
V = 15V
1
µA
V
I = 5mA (Note 6)
0.2
25
0.4
Logic Output Current Limit
Enable Logic Threshold
mA
V
l
l
l
l
l
V
0.8
–1
1.9
2.5
1
ENABLE
ENABLE
SUPPLY
CC
I
I
I
I
t
t
Enable Pin Bias Current
µA
mA
mA
mA
µs
+
–
Total Supply Current
V
CC
V
CC
V
CC
, V and V , V Connected
7
3
13
7
EE
+
–
V
Supply Current
, V and V , V Separate
EE
CC
+
–
Supply Current Disabled
Turn-On Delay
, V and V , V Connected, V ≤ 0.8V
ENABLE
0.6
10
10
1.5
CC(STBY)
ON
EE
(Note 7)
(Note 7)
Turn-Off Delay
µs
OFF
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device reli-
ability and lifetime.
Note 2: The LT1970C is guaranteed functional over the operating tempera-
ture range of –40°C and 85°C.
Note 4: This parameter is not 100% tested.
Note 5: Full power bandwidth is calculated from slew rate measurements:
FPBW = SR/(2 • π • V )
P
Note 6: The logic low output level of pin TSD is guaranteed by correlating
the output level of pin ISRC and pin ISNK over temperature.
Note 7: Turn-on and turn-off delay are measured from V
crossing
ENABLE
Note 3: The LT1970C is guaranteed to meet specified performance from
0°C to 70°C. The LT1970C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but is not tested or QA
sampled at these temperatures. The LT1970I is guaranteed to meet speci-
fied performance from –40°C to 85°C.
1.6V to the OUT pin at 90% of normal output voltage.
Note 8: Thermal resistance varies depending upon the amount of PC board
metal attached to the device. If the maximum dissipation of the package is
exceeded, the device will go into thermal shutdown and be protected.
Typical perForMance characTerisTics
Total Supply Current
vs Supply Voltage
Warm-Up Drift VIO vs Time
Input Bias Current vs VCM
14
12
10
8
6
4
–100
–120
–140
–160
–180
–200
–220
–240
–260
V
= 15V
S
+
I
+ I
V
125°C
25°C
CC
–I
BIAS
–55°C
–55°C
2
0
+I
BIAS
–
I
+ I
V
EE
–2
–4
–6
–8
–10
–12
–14
0V
25°C
TIME (100ms/DIV)
1970 G01
125°C
0
2
4
6
8
10 12 14 16 18
–15 –12 –9 –6 –3
0
3
6
9
12 15
SUPPLY VOLTAGE ( Vꢀ
COMMON MODE INPUT VOLTAGE (V)
1970 G03
1970 G02
1970fe
4
For more information www.linear.com/LT1970
LT1970
Typical perForMance characTerisTics
Open-Loop Gain and Phase
Supply Current vs Supply Voltage
vs Frequency
Phase Margin vs Supply Voltage
70
60
50
40
100
90
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
60
58
56
54
52
50
48
46
44
42
40
+
A
= –1
V
F
I
V
R = R = 1k
G
–
I
T
A
= 25°C
V
80
V
= V /2
GAIN
PHASE
OUT
S
70
I
VCC
30
20
60
50
I
VEE
10
0
40
30
20
10
0
–10
–20
–30
T
= 25°C
CC
A
+
–
V
= V = –V = –V
EE
0
100
1k
10k 100k
1M
10M 100M
0
4
8
12 16 20 24
28 32
TOTAL SUPPLY VOLTAGE (V)
36
2
4
6
8
10 12
SUPPLY VOLTAGE ( Vꢀ
20
14 16 18
FREQUENCY (Hz)
1970 G05
1870 G04
1970 G06
Gain Bandwidth vs Supply Voltage
Gain vs Frequency
Gain vs Frequency with CLOAD
10
0
10
0
5
V
A
=
= 1
1ꢀV
A
= 1
A
= 100
S
V
V
V
30nF
10nF
4
3
1nF
V
= 1ꢀV
S
–10
–20
–30
–40
–10
–20
–30
–40
V
=
ꢀV
S
0nF
2
1
0
10k
100k
1M
10M
0
4
8
12 16 20 24 28 32 36
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
TOTAL SUPPLY VOLTAGE (V)
1970 G09
1970 G08
1970 G07
Output Impedance
Disabled Output Impedance
Slew Rate vs Supply Voltage
600k
100k
1.8
100
10
V
V
=
1ꢀV
= 0.8V
V
= 1ꢀV
S
S
ENABLE
1.7
1.6
FALLING
RISING
A
= 100
V
10k
1k
1.5
1.4
1.3
1.2
1.1
1
A
= 10
V
0.1
A
= 1
V
100
10
1
0.01
0.001
A
= –1
V
F
R = R = 1k
G
T
A
= 25°C
1.0
6
8
12
14
16
18
4
10
1k
10k
100k
1M
10M
100M
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
SUPPLY VOLTAGE ( Vꢀ
1970 G10
1970 G11
1970 G12
1970fe
5
For more information www.linear.com/LT1970
LT1970
Typical perForMance characTerisTics
Slew Rate vs Temperature
Large-Signal Response, AV = 1
Large-Signal Response, AV = –1
2.5
2.0
1.5
1.0
0.5
0
V
= 15V
S
FALLING
10V
10V
RISING
0V
0V
–10V
–10V
R
= 1k
1970 G14
20µs/DIV
L
R
L
L
= 1k
20µs/DIV
1970 G15
C
= 1000pF
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
1970 G13
Small-Signal Response, AV = 1
Small-Signal Response, AV = –1
Output Overdriven
V
OUT
0V
0V
5V/DIV
V
IN
5V/DIV
R
= 1k
1970 G16
500ns/DIV
R
C
= 1k
= 1000pF
1970 G17
2µs/DIV
V
S
A
V
=
= 1
5V
1970 G18
L
200µs/DIV
L
L
Undistorted Output Swing
vs Frequency
Full Range Current Sense
Transfer Curve
% Overshoot vs CLOAD
30
25
20
15
10
5
60
50
40
30
20
10
0
500
400
300
200
100
0
V
= 15V
S
SOURCING
CURRENT
A
= 1
V
A
= –1
V
–100
–200
–300
–400
–500
SINKING
CURRENT
V
A
=
15V
S
V
= –5
1% THD
0
100
1k
10k
100k
10
100
1k
10k
0
1
2
3
4
5
FREQUENCY (Hz)
C
(pF)
V
= V
(V)
LOAD
CSNK
CSRC
1970 G20
1970 G19
1970 G21
1970fe
6
For more information www.linear.com/LT1970
LT1970
Typical perForMance characTerisTics
Low Level Current Sense
Transfer Curve
Logic Output Level
Maximum Output Current
vs Sink Current (Output Low)
vs Temperature
1.0
0.9
0.8
0.7
25
20
1600
1400
1200
1000
800
600
400
200
0
+
–
+
–
V
V
= 15V
= –15V
V
V
= 15V
= –15V
15
SOURCING
CURRENT
10
SOURCE
SINK
0.6
0.5
5
25°C
0
125°C
0.4
0.3
0.2
0.1
0
–5
SINKING
CURRENT
–10
–15
–20
–25
–55°C
0.001
0.01
0.1
1
10
100
25 50 75 100 125 150 175 200 225 250
–75 –50 –25
0
25 50
75 100 125
0
SINK CURRENT (mA)
V
= V
(mV)
CSRC
TEMPERATURE (°C)
CSNK
1970 G23
1970 G22
1970 G24
Output Stage Quiescent Current
vs Supply Voltage
Safe Operating Area
10
8
1200
1000
800
600
400
200
0
I
AT 10% DUTY CYCLE
OUT
+
125°C
I
V
6
25°C
4
–55°C
2
0
–
I
V
–55°C
–2
–4
–6
–8
–10
25°C
125°C
25 30
10 15 20
SUPPLY VOLTAGE (V)
0
5
35 40
0
2
4
6
8
10 12 14 16 18
SUPPLY VOLTAGE ( Vꢀ
1970 G26
1970 G25
Control Stage Quiescent Current
vs Supply Voltage
Supply Current vs Supply Voltage
in Shutdown
5
4
800
700
600
500
400
300
200
100
0
V
= 0V
I
ENABLE
CC
85°C
125°C
25°C
–55°C
3
25°C
2
–55°C
1
0
I
EE
–1
–2
–3
–4
–5
–55°C
25°C
125°C
8
10
0
2
4
6
12 14 16 18
0
2
4
6
8
10 12 14 16 18
SUPPLY VOLTAGE ( Vꢀ
SUPPLY VOLTAGE (V)
1970 G27
1970 G28
1970fe
7
For more information www.linear.com/LT1970
LT1970
pin FuncTions
V
(Pins 1, 10, 11, 20, Package Base): Minus Supply
FILTER (Pin 5): Current Sense Filter Pin. This pin is
EE
Voltage. V connects to the substrate of the integrated
normally not used and should be left open or shorted to
EE
–
circuitdie,andthereforemustalwaysbethemostnegative
the SENSE pin. The FILTER pin can be used to adapt the
voltage applied to the part. Decouple V to ground with
response time of the current sense amplifiers with a 1nF
EE
–
a low ESR capacitor. V may be a negative voltage or it
to 100nF capacitor connected to the SENSE input. An
EE
may equal ground potential. Any or all of the V pins may
internal 1k resistor sets the filter time constant.
EE
be used. Unused V pins must remain open.
–
EE
SENSE (Pin 6): Negative Current Sense Pin. This pin is
–
–
V (Pin 2): Output Stage Negative Supply. V may equal
normally connected to the load end of the external sense
resistor.Sourcingcurrentlimitoperationisactivatedwhen
V
or may be smaller in magnitude. Only output stage
EE
–
current flows out of V , all other current flows out of V .
the voltage V
(V
+ – V
–) equals 1/10 of
EE
SENSE SENSE
the programming control voltage at VC
SENSE
–
V maybeusedtodrivethebase/gateofanexternalpower
(Pin 13). Sink-
SRC
devicetoboosttheamplifier’soutputcurrenttolevelsabove
the rated 500mA of the on-chip output devices. Unless
ing current limit operation is activated when the voltage
equals –1/10 of the programming control voltage
V
SENSE
at VC
–
used to drive boost transistors, V should be decoupled
(Pin 12).
SNK
to ground with a low ESR capacitor.
V
(Pin 7): Positive Supply Voltage. All circuitry except
CC
OUT (Pin 3): Amplifier Output. The OUT pin provides the
force function as part of a Kelvin sensed load connection.
OUTisnormallyconnecteddirectlytoanexternalloadcur-
the output transistors draw power from V . Total sup-
CC
ply voltage from V to V must be between 3.5V and
CC
EE
+
36V. V must always be greater than or equal to V . V
CC
CC
+
rentsenseresistorandtheSENSE pin.Amplifierfeedback
should always be decoupled to ground with a low ESR
is directly connected to the load and the other end of the
current sense resistor. The load connection is also wired
capacitor.
–IN (Pin 8): Inverting Input of Amplifier. –IN may be any
–
directly to the SENSE pin to monitor the load current.
voltage from V – 0.3V to V + 36V. –IN and +IN remain
EE
EE
The OUT pin is current limited to 800mA typical. This
current limit protects the output transistor in the event
that connections to the external sense resistor are
opened or shorted which disables the precision current
limit function.
high impedance at all times to prevent current flow into
the inputs when current limit mode is active. Care must
be taken to insure that –IN or +IN can never go to a volt-
age below V – 0.3V even during transient conditions or
EE
damage to the circuit may result. A Schottky diode from
V
to –IN can provide clamping if other elements in the
+
EE
SENSE (Pin 4): Positive Current Sense Pin. This lead is
circuit can allow –IN to go below V .
EE
normallyconnectedtothedrivenendoftheexternalsense
resistor.Sourcingcurrentlimitoperationisactivatedwhen
+IN(Pin9):NoninvertingInputofAmplifier.+INmaybeany
the voltage V
(V
+ – V
–) equals 1/10 of
SRC
voltage from V – 0.3V to V + 36V. –IN and +IN remain
SENSE SENSE
the programming control voltage at VC
SENSE
EE EE
(Pin 13). Sink-
high impedance at all times to prevent current flow into
the inputs when current limit mode is active. Care must
be taken to insure that –IN or +IN can never go to a volt-
ing current limit operation is activated when the voltage
V
equals –1/10 of the programming control voltage
SNK
SENSE
at VC
(Pin 12).
age below V – 0.3V even during transient conditions or
EE
damage to the circuit may result. A Schottky diode from
V
to +IN can provide clamping if other elements in the
EE
circuit can allow +IN to go below V .
EE
1970fe
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LT1970
pin FuncTions
VC
(Pin 12): Sink Current Limit Control Voltage In-
current limit is not active. ISRC, ISNK and TSD may be
wired “OR” together if desired. ISRC may be left open if
this function is not monitored.
SNK
put. The current sink limit amplifier will activate when
+
–
the sense voltage between SENSE and SENSE equals
–1.0 • V
and V
and V
at VC
/10. VC
may be set between V
VCSNK
COMMON
SENSE
SNK COMMON
+ 6V. The transfer function between VC
ISNK (Pin 17): Sinking Current Limit Digital Output Flag.
ISNK is an open collector digital output. ISNK pulls low
whenever the sinking current limit amplifier assumes
control of the output. This pin can sink up to 10mA of
current. The current limit flag is off when the source
current limit is not active. ISRC, ISNK and TSD may be
wired “OR” together if desired. ISNK may be left open if
this function is not monitored.
SNK
is linear except for very small input voltages
< 60mV. V
limits at a minimum set point of
SNK
SENSE
4mV typical to insure that the sink and source limit ampli-
fiers do not try to operate simultaneously. To force zero
output current, the ENABLE pin can be taken low.
VC
(Pin 13): Source Current Limit Control Voltage
SRC
Input.Thecurrentsourcelimitamplifierwillactivatewhen
TSD (Pin 18): Thermal Shutdown Digital Output Flag. TSD
isanopencollectordigitaloutput. TSDpullslowwhenever
theinternalthermalshutdowncircuitactivates, typicallyat
a die temperature of 160°C. This pin can sink up to 10mA
of output current. The TSD flag is off when the die tem-
perature is within normal operating temperatures. ISRC,
ISNK and TSD may be wired “OR” together if desired. TSD
may be left open if this function is not monitored. Thermal
shutdown activation should prompt the user to evaluate
electrical loading or thermal environmental conditions.
the sense voltage between SENSE+ and SENSE– equals
V
V
/10. VC
may be set between V and
COMMON
VCSRC
COMMON
and V
SRC
+ 6V. The transfer function between VC
SRC
is linear except for very small input voltages
SENSE
at VC
< 60m
V
. V
limits at a minimum set point
SRC
SENSE
of 4mV typical to insure that the sink and source limit
amplifiers do not try to operate simultaneously. To force
zero output current, the ENABLE pin can be taken low.
COMMON (Pin 14): Control and ENABLE inputs and flag
outputsarereferencedtotheCOMMONpin.COMMONmay
+
+
V (Pin 19): Output Stage Positive Supply. V may equal
be at any potential between VEE and VCC – 3V. In typical
V
CC
or may be smaller in magnitude. Only output stage
applications, COMMON is connected to ground.
+
current flows through V , all other current flows into V .
CC
+
ENABLE (Pin 15): ENABLE Digital Input Control. When
taken low this TTL-level digital input turns off the ampli-
fier output and drops supply current to less than 1mA.
Use the ENABLE pin to force zero output current. Setting
V may be used to drive the base/gate of an external power
devicetoboosttheamplifier’soutputcurrenttolevelsabove
the rated 500mA of the on-chip output devices. Unless
+
used to drive boost transistors, V should be decoupled
VC
= VC
= 0V allows I
OUT
= 4mV/R to flow
to ground with a low ESR capacitor.
SNK
in or out of V
SRC
OUT
SENSE
.
Package Base: The exposed backside of the package is
ISRC (Pin 16): Sourcing Current Limit Digital Output Flag.
ISRC is an open collector digital output. ISRC pulls low
whenever the sourcing current limit amplifier assumes
control of the output. This pin can sink up to 10mA of
current. The current limit flag is off when the source
electrically connected to the V pins on the IC die. The
EE
package base should be soldered to a heat spreading pad
on the PC board that is electrically connected to V .
EE
1970fe
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For more information www.linear.com/LT1970
LT1970
block DiagraM anD TesT circuiT
R
V
FB
CC
7
1k
+
V
15V
19
+IN
9
8
+
–
Q1
Q2
OUT
+
V
IN
1×
GM1
3
–
–IN
R
G
1k
10k
10k
10k
ISNK
ISRC
TSD
17
16
18
–
+
D1
D2
R
1Ω
CS
+
–
I
V
V
SINK
SNK
SRC
+
SENSE
FILTER
15V
4
5
6
ENABLE
+
–
ENABLE
15
12
–
SENSE
VC
SNK
5V
VC
SNK
–
+
R
FIL
R
LOAD
1k
1k
–
VC
SRC
V
I
SRC
VC
13
14
SRC
2
V
COMMON
EE
–15V
1, 10, 11, 20
1970TC
applicaTions inForMaTion
The LT1970 power op amp with precision controllable
current limit is a flexible voltage and current source
module. The drawing on the front page of this data sheet
is representative of the basic application of the circuit,
however many alternate uses are possible with proper
understanding of the sub circuit capabilities.
between –IN and +IN. No current will flow at the inputs
when differential input voltage is present. This feature is
important when the precision current sense amplifiers
“I
” and “I ” become active.
SINK
SRC
Current Limit Amplifiers
Amplifierstages“I ”and“I ”areveryhightranscon-
SINK
SRC
CIRCUIT DESCRIPTION
ductance amplifier stages with independently controlled
offset voltages. These amplifiers monitor the voltage be-
+
–
Main Operational Amplifier
tweeninputpinsSENSE andSENSE whichusuallysense
the voltage across a small external current sense resistor.
The transconductance amplifiers outputs connect to the
same high impedance node as the main input stage GM1
Sub circuit block GM1, the 1X unity-gain current buffer
and output transistors Q1 and Q2 form a standard opera-
tionalamplifier. Thisamplifierhas 500mAcurrentoutput
capability and a 3.6MHz gain bandwidth product. Most
applications of the LT1970 will use this op amp in the main
signalpath. Allconventionalopampcircuitconfigurations
are supported. Inverting, noninverting, filter, summation
or nonlinear circuits may be implemented in a conven-
tional manner. The output stage includes current limiting
at 800mA to protect against fault conditions. The input
stage has high differential breakdown of 36V minimum
+
amplifier. Small voltage differences between SENSE and
–
SENSE ,smallerthantheusersetVC /10andVC /10
SNK
SRC
inmagnitude,causethecurrentlimitamplifierstodecouple
fromthesignalpath.Thisisfunctionallyindicatedbydiodes
D1 and D2 in the Block Diagram. When the voltage V
SENSE
increasesinmagnitudesufficienttoequalorovercomeone
oftheoffsetvoltagesVC /10orVC /10, theappropri-
SNK
SRC
ate current limit amplifier becomes active and because of
1970fe
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LT1970
applicaTions inForMaTion
itsveryhightransconductance,takescontrolfromtheinput
stage, GM1. The output current is regulated to a value of
The transfer function from V to the associated V is
C OS
linear from about 0.1V to 5V in, or 10mV to 500mV at
thecurrentlimitamplifierinputs. Anintentionalnonlinear-
ity is built into the transfer functions at low levels. This
nonlinearity insures that both the sink and source limit
amplifiers cannot become active simultaneously. Simul-
taneous activation of the limit amplifiers could result in
uncontrolledoutputs.AsshownintheTypicalPerformance
Characteristics curves, the control inputs have a “hockey
stick” shape, to keep the minimum limit threshold at 4mV
for each limit amplifier.
I
= V
/R
= (VC
or VC )/(10 • R
).
OUT
SENSE SENSE
SRC
SNK
SENSE
The time required for the current limit amplifiers to take
control of the output is typically 4µs.
Linearoperationofthecurrentlimitsenseamplifieroccurs
+
–
with the inputs SENSE and SENSE ranging between V
CC
– 1.5V and V + 1.5
V
. Most applications will connect pins
EE
+
SENSE and OUT together, with the load on the opposite
–
side of the external sense resistor and pin SENSE . Feed-
back to the inverting input of GM1 should be connected
–
from SENSE to –IN. Ground side sensing of load current
Figure 1 illustrates an interesting use of the current
sense input pins. Here the current limit control ampli-
fiers are used to produce a symmetrically limited output
voltage swing. Instead of monitoring the output current,
the output voltage is divided down by a factor of 20 and
may be employed by connecting the load between pins
+
–
OUT and SENSE . Pin SENSE would be connected to
ground in this instance. Load current would be regulated
in exactly the same way as the conventional connection.
However, voltage mode accuracy would be degraded in
+
–
applied to the SENSE input, with the SENSE input
+
this case due to the voltage across R
.
grounded. When the threshold voltage between SENSE
SENSE
–
and SENSE (V
/10) is reached, the current limit
+
CLAMP
Creative applications are possible where pins SENSE and
stage takes control of the output and clamps it a level of
±2 • V . With control inputs V and V tied
–
SENSE monitor a parameter other than load current. The
CLAMP
CSRC
CSNK
operating principle that at most one of the current limit
stages may be active at one time, and that when active,
the current limit stages take control of the output from
GM1, can be used for many different signals.
together, a single polarity input voltage sets the same +
and – output limit voltage for symmetrical limiting. In this
circuit the output will current limit at the built-in fail-safe
level of typically 800mA.
Current Limit Threshold Control Buffers
12V
80mV
Input pins VC
and VC
are used to set the response
SRC
SNK
TO
V
CLꢀMꢁ
R3
3k
10V
thresholds of current limit amplifiers “I
” and “I ”.
SINK
SRC
OV TO 5V
–80mV
TO
–10V
Each of these inputs may be independently driven by a
voltage of 0V to 5V above the COMMON reference pin.
The 0V to 5V input voltage is attenuated by a factor of 10
and applied as an offset to the appropriate current limit
amplifier. AC signals may be applied to these pins. The AC
CLꢀMꢁ
VC
SRC
VC
REꢀCHED
SNK
OUTꢁUT CLꢀMꢁS
EN
ꢀT 2× V
CLꢀMꢁ
+IN
V
V
IN
CC
+
V
ISRC
ISNK
TSD
OUT
LT1970
bandwidth from a V pin to the output is typically 2MHz.
+
C
SENSE
–
R1
21.5k
For proper operation of the LT1970, these control inputs
SENSE
FILTER
R
L
cannot be left floating.
–
V
–IN
V
R2
1.13k
EE
COMMON
For low V supply applications it is important to keep
CC
the maximum input control voltages, VC
and VC
,
SRC
SNK
–12V
at least 2.5V below the V potential. This ensures linear
CC
R
R
F
G
1970 F01
controlofthecurrentlimitthreshold.Reducingthecurrent
limit sense resistor value allows high output current from
a smaller control voltage which may be necessary if the
Figure 1. Symmetrical Output Voltage Limiting
V
CC
supply is only 5V.
1970fe
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LT1970
applicaTions inForMaTion
ENABLE Control
activationoftheassociatedcurrentlimitamplifier.TheTSD
outputindicatesexcessivedietemperaturehascausedthe
circuittoenterthermalshutdown.Thethreedigitaloutputs
may be wire “OR’d” together, monitored individually or left
open. These outputs do not affect circuit operation, but
provide an indication of the present operational status of
the chip.
The ENABLE input pin puts the LT1970 into a low sup-
ply current, high impedance output state. The ENABLE
pin responds to TTL threshold levels with respect to the
COMMON pin. Pulling the ENABLE pin low is the best
way to force zero current at the output. Setting VC
=
SNK
VC
= 0V allows the output current to remain as high
SRC
as 4mV/R
.
Forslowvaryingoutputsignals,theassertionofalowlevel
at the current limit output flags occurs when the current
limit threshold is reached. For fast moving signals where
the LT1970 output is moving at the slew limit, typically
1.6V/µs, the flag assertion can be somewhat premature
at typically 75% of the actual current limit value.
SENSE
In applications such as circuit testers (ATE), it may be
preferable to apply a predetermined test voltage with a
preset current limit to a test node simultaneously. The
ENABLE pin can be used to provide this gating action as
shown in Figure 2. While the LT1970 is disabled, the load
is essentially floating and the input voltage and current
limit control voltages can be set to produce the load test
levels. Enabling the LT1970 then drives the load. The
LT1970 enables and disables in just a few microseconds.
The actual enable and disable times at the load are a
function of the load reactance.
The operating status flags are designed to drive LEDs to
provide a visual indication of current limit and thermal
conditions. As such, the transition edges to and from
the active low state are not particularly sharp and may
exhibitsomeuncertainty.Addingsomepositivefeedback
to the current limit control inputs helps to sharpen these
transitions.
Operating Status Flags
WiththevaluesshowninFigure3, thecurrentlimitthresh-
old is reduced by approximately 0.5% when either current
limit status flag goes low. With sharp logic transitions, the
status outputs can be used in a system control loop to
The LT1970 has three digital output indicators; TSD, ISRC
andISNK.Theseoutputsareopencollectordriversreferred
to the COMMON pin. The outputs have 36V capabilities
and can sink in excess of 10mA. ISRC and ISNK indicate
ENABLE
5V
V
OUT
DISABLE
0V
1V/DIV
0V
5V
12V
EN
10V/DIV
VC
SRC
VC
0V
SNK
V
IN
= 0.5V
V
= –0.5V
IN
EN
+IN
V
IN
V
CC
5µs/DIV
+
V
ISRC
ISNK
R
S
1Ω
TSD
OUT
LT1970
+
SENSE
–
R
L
SENSE
FILTER
V
10Ω
–
–IN
V
EE
COMMON
R
R
F
10k
–12V
G
10k
1970 F02
Figure 2. Using the ENABLE pin
1970fe
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LT1970
applicaTions inForMaTion
take protective measures when a current limit condition
is detected automatically.
initially sets a high value of current limit (500mA). The
circuit operates normally until the signal is large enough
to enter current limit. When either current limit flag goes
low, the current limit control voltage is reduced by a fac-
tor of 10. This then forces a low level of output current
(50mA) until the signal is reduced in magnitude. When
the load current drops below the lower level, the current
limit is then restored to the higher value. This action is
similar to a self resettable fuse that trips at dangerously
high current levels and resets only when conditions are
safe to do so.
The current limit status flag can also be used to produce
a dramatic change in the current limit value of the ampli-
fier. Figure 4 illustrates a “snap-back” current limiting
characteristic. In this circuit, a simple resistor network
R1
100Ω
R3
20k
CURRENT
LIMIT
CONTROL
VOLTAGE
(0.1V TO 5V)
I
FLAG
SOURCE
R2
100Ω
R4
20k
I FLAG
SINK
12V
WHEN CURRENT LIMIT
VC
IS FLAGGED, I
SRC
VC
LIMIT
THERMAL MANAGEMENT
TRESHOLD IS REDUCED
BY 0.5%
SNK
EN
+IN
V
V
IN
CC
+
V
Minimizing Power Dissipation
ISRC
ISNK
R
S
1Ω
The LT1970 can operate with up to 36V total supply volt-
age with output currents up to 500mA. The amount of
power dissipated in the chip could approach 18W under
worst-case conditions. This amount of power will cause
die temperature to rise until the circuit enters thermal
shutdown. While the thermal shutdown feature prevents
damage to the circuit, normal operation is impaired.
Thermal design of the LT1970 operating environment is
essential to getting maximum utility from the circuit.
TSD
OUT
LT1970
+
SENSE
–
SENSE
R
L
FILTER
V
–
–IN
V
EE
COMMON
–12V
R
G
R
F
1970 F03
Figure 3. Adding Positive Feedback to Sharpen the Transition
Edges of the Current Limit Status Flags
The first concern for thermal management is minimizing
the heat which must be dissipated. The separate power
+
–
12V
pins V and V can be a great aid in minimizing on-chip
+
power. The output pin can swing to within 1.0V of V or
R1
54.9k
R2
39.2k
R3
2.55k
–
V even under maximum output current conditions. Using
+
separate power supplies, or voltage regulators, to set V
VC
SRC
VC
SNK
500mA
EN
I
MAX
+IN
V
V
IN
CC
+
V
ISRC
ISNK
50mA
0
I
LOW
R
S
I
OUT
1Ω
TSD
OUT
LT1970
+
SENSE
–
–500mA
SENSE
FILTER
V
R
L
–
V
• R2
CC
–IN
V
I
I
≈
≈
EE
MAX
LOW
(R1 + R2) • 10 • R
S
COMMON
V
• (R2||R3)
CC
[R1 + (R2||R3)] • 10 • R
S
R
R
G
–12V
F
10k
10k
1970 F04
Figure 4. “Snap-Back” Current Limiting
1970fe
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LT1970
applicaTions inForMaTion
–
and V to their minimum values for the required output
not very effective. Expanding the area on various layers
significantly reduces the overall thermal resistance. The
addition of vias (small 13 mil holes which fill during PCB
plating) connecting all layers of metal also helps reduce
the operating temperature of the LT1970. These are also
shown in Figure 5.
swing will minimize power dissipation. The supplies V
CC
and V may also be reduced to a minimal value, but these
EE
supply pins do not carry high currents, and the power
saving is much less. V and V must be greater than
CC
EE
the maximum output swing by 1.5V or more.
–
+
WhenV andV areprovidedseparatelyfromV andV ,
It is important to note that the metal planes used for heat
CC
EE
–
+
care must be taken to insure that V and V are always less
than or equal to the main supplies in magnitude. Protec-
tion Schottky diodes may be required to insure this in all
cases, including power on/off transients.
sinking are connecting electrically to V . These planes
EE
must be isolated from any other power planes used in
the PCB design.
Anothereffectivewaytocontrolthepoweramplifieroperat-
ing temperature is to use airflow over the board. Airflow
can significantly reduce the total thermal resistance as
also shown in Figure 5.
+
–
Operation with reduced V and V supplies does not affect
any performance parameters except maximum output
swing.AllDCaccuracyandACperformancespecifications
guaranteed with V = V and V = V are still valid with
the reduced output signal swing range.
+
–
CC
EE
DRIVING REACTIVE LOADS
Capacitive Loads
Heat Sinking
The power dissipated in the LT1970 die must have a path
to the environment. With 100°C/W thermal resistance in
free air with no heat sink, the package power dissipation
is limited to only 1W. The 20-pin TSSOP package with
exposed copper underside is an efficient heat conductor
if it is effectively mounted on a PC board. Thermal resis-
tances as low as 40°C/W can be obtained by soldering the
bottom of the package to a large copper pattern on the PC
board. For operation at 85°C, this allows up to 1.625W of
power to be dissipated on the LT1970. At 25°C operation,
up to 3.125W of power dissipation can be achieved. The
PC board heat spreading copper area must be connected
The LT1970 is much more tolerant of capacitive loading
than most operational amplifiers. In a worst-case con-
figuration as a voltage follower, the circuit is stable for
capacitiveloadslessthan2.5nF.Highergainconfigurations
improve the C
handling. If very large capacitive loads
LOAD
are to be driven, a resistive decoupling of the amplifier
fromthecapacitiveloadiseffectiveinmaintainingstability
and reducing peaking. The current sense resistor, usually
connected between the output pin and the load can serve
as a part of the decoupling resistance.
Inductive Loads
to V .
EE
Load inductance is usually not a problem at the outputs
of operational amplifiers, but the LT1970 can be used as a
highoutputimpedancecurrentsource.Thisconditionmay
be the main operating mode, or when the circuit enters
a protective current limit mode. Just as load capacitance
degrades the phase margin of normal op amps, load
inductance causes a peaking in the loop response of the
feedbackcontrolledcurrentsource.Theinductiveloadmay
be caused by long lead lengths at the amplifier output. If
the amplifier will be driving inductive loads or long lead
lengths (greater than 4 inches) a 500pF capacitor from the
Figure5showsexamplesofPCBmetalbeingusedforheat
spreading.Theseareprovidedasareferenceforwhatmight
be expected when using different combinations of metal
area on different layers of a PCB. These examples are with
a 4-layer board using 1oz copper on each layer. The most
effective layers for spreading heat are those closest to the
LT1970junction. Solderingtheexposedthermalpadofthe
TSSOPpackagetotheboardproducesathermalresistance
from junction-to-case of approximately 3°C/W.
As a minimum, the area directly beneath the package on
all PCB layers can be used for heat spreading. However,
limiting the area to that of the metal heat sinking pad is
–
SENSE pin to the ground plane will cancel the inductive
load and ensure stability.
1970fe
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LT1970
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STILL AIR θ
PACKAGE
TOP LAYER
2ND LAYER
3RD LAYER
BOTTOM LAYER
JA
TSSOP
100°C/W
TSSOP
50°C/W
TSSOP
45°C/W
1970 F05a
Typical Reduction in θ with
JA
Laminar Airflow Over the Device
0
–10
–20
–30
–40
–50
–60
% REDUCTION RELATIVE
TO θ IN STILL AIR
JA
0
100 200 300 400 500 600 700 800 900 1000
AIRFLOW (LINEAR FEET PER MINUTE, lfpm)
1970 F05b
Figure 5. Examples of PCB Metal Used for Heat Dissipation. Driver Package Mounted on Top
Layer. Heat Sink Pad Soldered to Top Layer Metal. Metal Areas Drawn to Scale of Package Size
1970fe
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LT1970
applicaTions inForMaTion
Figure 6 shows the LT1970 driving an inductive load with
a controlled amount of current. This load is shown as
a generic magnetic transducer, which could be used to
create and modulate a magnetic field. Driving the current
limit control inputs directly forces a current through the
load that could range up to 2MHz in modulation. Biasing
the input stage to the midpoint of the modulation signal
allows symmetrical bidirectional current flow through
the load. Clamp diodes are added to protect the LT1970
output from large inductive flyback potentials caused by
rapid di/dt changes.
Figure 7 shows the connection of these back-to-back
+
clamp diodes between the FILTER pin and the SENSE pin.
With this connection, the internal 1k resistor between the
–
SENSE pinandtheFILTERpinlimitsthediodecurrent.The
BAV99diodesaresmallSOT-23packagedgeneralpurpose
silicon diodes. The maximum current limit sense voltage
is now the diode voltage drop, determined by the voltage
across the sense resistor and the 1k internal resistor. As
the diode begins to conduct current, with a voltage drop
of around 300mV, an error in the expected current limit
level at the high end of the control becomes apparent, as
Abrupt Load Short Protection
R
SENSE
MAIN
AMPLIFIER
OUT
3
An abrupt short-circuit connection, often referred to as
screwdriver or crowbar short, to ground or other supply
potentials is the worst-case load condition for the LT1970.
The current limit sense amplifier normally operates with
an input voltage differential equal to the voltage across the
sense resistor, which is only 500mV maximum in a typical
application. During an abrupt load short to ground, the
load end of the sense resistor is immediately connected to
ground while the amplifier output remains at the normal
outputvoltage. Thiscanimposealargedifferentialvoltage
to the sense amplifier inputs for a brief period. If this delta
V can be greater than 2V, it is beneficial to add clamps
between the current limit sense amplifier inputs. These
clampsensureasmoothtransitionfromthemainamplifier
control to the current limit amplifier control under all load
short conditions that may arise.
LOAD
CURRENT
LIMIT SENSE
AMPLIFIER
3
+
–
SENSE
BAV99
+
–
4
5
1
2
FILTER
100Ω*
1nF TO 10nF
1k
SENSE
6
+
SENSE
*OPTIONAL—SEE TEXT
2N3904
2N3904
FILTER
1970 F07
HIGHER CLAMP VOLTAGE
ALTERNATIVE
Figure 7. Adding Protection for Abrupt Load Shorts
5V
V
IN
12V
0V
VC
SRC
VC
SNK
D1
EN
1N4001
+IN
V
CC
+
V
ISRC
ISNK
R
1Ω
S
500ꢀm
TSD
OUT
LT1970
12V
+
SENSE
–
MmGNETIC
TRmNSDUCER
R1
95.3K
SENSE
FILTER
V
2.5V
–
–IN
V
EE
LT1634-2.5
D2
1N4001
COMMON
1970 F06
C1
500pF
–12V
Figure 6. Current Modulation of a Magnetic Transducer
1970fe
16
For more information www.linear.com/LT1970
LT1970
applicaTions inForMaTion
V
is less than the voltage across R . Adding an
SENSE
the current limit amplifier to go to the incorrect current
limit direction and hang up. Adding a small filter capaci-
DIODE
optionalexternal100Ωresistorinparallelwiththeinternal
1k resistor forces the diode voltage closer to the sensed
current limit voltage and reduces the current limit error.
–
tor between the SENSE and FILTER pins, 1nF to 10nF is
fairly typical, which charges through the clamp diodes
forces the correct current limit polarity at the instant of the
load short. This holds the amplifier in current limit until
the capacitor discharges through the internal 1k resistor,
eliminating transient induced behavior and creating a
smooth transition into current limit.
Alternatively, the base-emitter junctions of back-to-back
2N3904NPNtransistorscanprovidethisclampingaction.
These diodes begin to conduct at a higher voltage level
nearer to 600mV. With a 500mV maximum current limit
threshold very little error will be noticed. Comparisons
of typical current limit error with three ways of adding
clamping protection are shown in Figure 8. Scaling the
currentsenseresistorandthecurrentlimitcontrolvoltage
down so that a 0V to 300mV current limit sense voltage
range also prevents these accuracy errors caused by the
abrupt-short clamping diodes.
Supply Bypassing
The LT1970 can supply large currents from the power
supplies to a load at frequencies up to 4MHz. Power sup-
ply impedance must be kept low enough to deliver these
currents without causing supply rails to droop. Low ESR
capacitors,suchas0.1µFor1µFceramics, locatedcloseto
the pins are essential in all applications. When large, high
speedtransientcurrentsarepresentadditionalcapacitance
may be needed near the chip. Check supply rails with a
scope and if signal related ripple is seen on the supply rail,
increase the decoupling capacitor as needed.
Also shown in Figure 7 is a small filtering capacitor. This
too provides an extra measure of control under abrupt
load shorting conditions. A fast short-circuit makes ap-
parent all parasitic interconnect lead inductances between
the LT1970 and the load. These distributed parasitic ele-
ments can cause significant transient voltage spikes in
the short time after the application or removal of a short
circuit. These uncontrolled voltage transients could actu-
ally couple back to the current limit amplifier and cause
polarity reversal from sourcing current limit to sinking or
vice versa. This can act as positive feedback and cause
To ensure proper start-up biasing of the LT1970, it is rec-
ommended that the rate of change of the supply voltages
at turn-on be limited to be no faster than 6V/µs.
Application Circuit Ideas
The digitally controlled analog pin driver is shown in
Figure 9. All of the control signals are provided by an
LTC®1664 quad, 10-bit DAC by way of a 3-wire serial
interface. The LT1970 is configured as a simple differ-
ence amplifier with a gain of 3. This gain is required to
produce 15V from the 0V to 5V outputs from DACs C
and D. To provide voltage headroom, the supplies for the
LT1970 are set to the maximum value of 18V. As 18V
is the absolute maximum rating of supply voltage for the
LT1970, caremustbetakentonotallowthesupplyvoltage
to increase. DACs A and B separately control the sinking
and sourcing current limit to the load over the range of
4mA to 500mA. An optional ON/OFF control for the pin
driver using the ENABLE input is shown. If always enabled
25
20
BA±99 w 1kΩ
15
10
BA±99 w 100Ω
5
0
2N3904 w 1kΩ
–5
–10
50
200
300 350 400 450 500
±± SENSE (m±)
100 150
250
CL
1970 F08
Figure 8. Current Limit Accuracy with Different Clamps
the ENABLE pin should be tied to V .
CC
1970fe
17
For more information www.linear.com/LT1970
LT1970
applicaTions inForMaTion
OPTIONAL TEST PIN
ON/OFF CONTROL
APPLY LOAD
DRIVE
5V
Hi-Z
0V
5V
CODE C – CODE D
V
= 15V
≈ 15V
OUT
(
)
1024
V
CLR
V
CC
REF
0.5 • CODE B
I
=
≈ –4mA TO –500mA
≈ 4mA TO 500mA
SOURCE(MAX)
1024 • R
S
DAC A
0.5 • CODE A
I
=
SINK(MAX)
1024 • R
S
18V
+
3-WIRE
DAC B
DAC C
R5
R6
3k
10µF
0.1µF
SERIAL
3k
INTERFACE
CS/LD
SCK
DI
DECODER
VC
SRC
VC
R1
SNK
3.4k
EN
+IN
V
CC
+
V
R2
10.2k
ISRC
ISNK
R
S
1Ω
FORCE
TSD
OUT
LT1970
+
SENSE
–
TEST PIN
LOAD
SENSE
FILTER
V
R3
3.4k
–
DAC D
–IN
V
EE
COMMON
SENSE
10µF
0.1µF
+
–18V
R4
10.2k
LTC1664
QUAD 10-BIT DAC
1970 F09
Figure 9. Digitally Controlled Analog Pin Driver
In some applications it may be necessary to know what
the current into the load is at any time. Figure 10 shows an
LT1787 high side current sense amplifier monitoring the
The LT1970 is just as easy to use as a standard operational
amplifier. Basic amplification of a precision reference
voltage creates a very simple bench DC power supply as
shown in Figure 11. The built-in power stage produces an
adjustable 0V to 25V at 4mA to 100mA of output current.
Voltage and current adjustments are derived from the
LT1634-5 5V reference. The output current capability is
500mA, but this supply is restricted to 100mA for power
dissipation reasons. The worst-case output voltage for
maximum power dissipated in the LT1970 output stage
occurs if the output is shorted to ground or set to a voltage
near zero. Limiting the output current to 100mA sets the
maximum power dissipation to 3W. To allow the output to
current through sense resistor R . The LT1787 is biased
S
from the V supply to accommodate the common mode
EE
input range of 10V. The sense resistor is scaled down
to provide a 100mV maximum differential signal to the
current sense amplifier to preserve linearity. The LT1880
amplifier provides gain and level shifting to produce a 0V
to 5V output signal (2.5V DC 5mV/mA) with up to 1kHz
full-scale bandwidth. An A/D converter could then digi-
tize this instantaneous current reading to provide digital
feedback from the circuit.
1970fe
18
For more information www.linear.com/LT1970
LT1970
applicaTions inForMaTion
V
CC
0V TO 1V
12V
VC
SRC
VC
SNK
EN
+IN
V
CC
+
V
ISRC
ISNK
R
S
0.2Ω
TSD
OUT
LT1970
+
SENSE
–
SENSE
R
LOAD
FILTER
V
–
–IN
V
EE
COMMON
R4
LT1787
255k
–
+
V
V
V
S
–12V
S
BIAS
R
G
R
F
–12V
12V
LT1880
–12V
R1
60.4k
20k
–
+
V
OUT
EE
R2
10k
2.5V
5ꢀVꢁꢀA
1kHz FULL CURRENT
BANDWIDTH
R3
20k
–12V
0V TO 5V
AꢁD
1970 F10
OPTIONAL DIGITAL FEEDBACK
Figure 10. Sensing Output Current
30V DC
R2 40k
R1
2.1k
CURRENT LIMIT
ADJUST
R5
5.49k
R3
10k
R4 10k
LOAD
FAULT
OUTPUT
VOLTAGE
ADJUST
VC
SRC
VC
SNK
EN
+IN
V
CC
+
V
ISRC
ISNK
R
S
1Ω
V
OUT
0V TO 25V
TSD
OUT
LT1970
LT1634-5
+
SENSE
–
4mA TO 100mA
C3
10µF
+
SENSE
FILTER
V
–
–IN
V
EE
GND
COMMON
–5V
LTC1046
C2
+ 10µF
+
R
R
G
F
2.55k
10.2k
C1 10µF
1970 F11
Figure 11. Simple Bench Power Supply
1970fe
19
For more information www.linear.com/LT1970
LT1970
applicaTions inForMaTion
R6
18.2k
15V
+
+
R7
R8
0.1
10µF
3k
3k
+OUT
CURRENT FAULT
LIMIT
THERMAL
VC
SRC
VC
R5
13k
SNK
EN
–IN
V
CC
+
V
ISRC
ISNK
R
S1
1Ω
+OUT
0V TO 12V
4mA TO 150mA
TSD
OUT
LT1970
+
SENSE
–
C2
10µF
SENSE
FILTER
–
V
+IN
V
EE
COMMON
18V
R1
R9
10k
1%
5V
C1
1µF
6.19k
REF
V
–15V
OUT
R3
23.2k
ADJUST
R2
10k
R4
10k
15V
+
–
LT1634-5
OPTIONAL SYMMETRY
ADJUST
–
+
CURRENT
R11
10k
1/2 LT1881
LIMIT
100Ω
ADJUST
1/2 LT1881
–15V
R12
10k
GROUND
R13
25.5k
15V
R15
3k
R10
10k
1%
TO TSD PIN
OF +OUT
–OUT
CURRENT
LIMIT
VC
SRC
VC
R14
10.7k
SNK
EN
–IN
V
CC
+
V
ISRC
ISNK
R
S2
1Ω
–OUT
TSD
0V TO –12V
4mA TO 150mA
OUT
+
LT1970
C3
SENSE
–
+
10µF
SENSE
FILTER
–
V
+IN
V
EE
1970 F12
COMMON
10µF
0.1µF
+
–15V
Figure 12. Dual Tracking Bench Power Supply
1970fe
20
For more information www.linear.com/LT1970
LT1970
applicaTions inForMaTion
range all the way to 0V, an LTC1046 charge pump inverter
is used to develop a –5V supply. This produces a negative
rail for the LT1970 which has to sink only the quiescent
current of the amplifier, typically 7mA.
Another simple linear power amplifier circuit is shown in
Figure 13. This uses the LT1970 as a linear driver of a DC
motor with speed control. The ability to source and sink
the same amount of output current provides for bidirec-
tional rotation of the motor. Speed control is managed by
sensing the output of a tachometer built on to the motor.
A typical feedback signal of 3V/1000rpm is compared
with the desired speed-set input voltage. Because the
LT1970 is unity-gain stable, it can be configured as an
integrator to force whatever voltage across the motor as
necessary to match the feedback speed signal with the
set input signal.
Using a second LT1970, a 0V to 12V dual tracking power
supply is shown in Figure 12. The midpoint of two 10k
resistors connected between the + and – outputs is held
at 0V by the LT1881 dual op amp servo feedback loop. To
maintain 0V, both outputs must be equal and opposite in
polarity, thus they track each other. If one output reaches
current limit and drops in voltage, the other output fol-
lows to maintain a symmetrical + and – voltage across a
common load. Again, the output current limit is less than
the full capability of the LT1970 due to thermal reasons.
Separate current limit indicators are used on each LT1970
because one output only sources current and the other
only sinks current. Both devices can share the same
thermal shutdown indicator, as the output flags can be
ORed together.
Additionally, the current limit of the amplifier can be ad-
justed to control the torque and stall current of the motor.
For reliability, a feedback scheme similar to that shown in
Figure 4 can be used. Assuming that a stalled rotor will
generate a current limit condition, the stall current limit
can be significantly reduced to prevent excessive power
dissipation in the motor windings.
OV TO 5V
TORQUE/STALL
CURRENT CONTROL
15V
VC
SRC
VC
SNK
EN
+IN
V
CC
+
V
ISRC
ISNK
R
S
1Ω
TSD
OUT
LT1970
+
SENSE
–
SENSE
FILTER
12V DC
MOTOR
–
V
–IN
V
EE
COMMON
GND
15V
C1
1µF
R1
1.2k
–15V
TACH
FEEDBACK
REVERSE
3V/1000rpm
R4
49.9k
R5
49.9k
1970 F13
R2
10k
FORWARD
R3
1.2k
–15V
Figure 13. Simple Bidirectional DC Motor Speed Controller
1970fe
21
For more information www.linear.com/LT1970
LT1970
applicaTions inForMaTion
external N- and P-channel MOSFETs to provide the ad-
ditional current. The output stage power supply inputs,
For motor speed control without using a tachometer, the
circuit in Figure 14 shows an approach. Using the en-
able feature of the LT1970, the drive to the motor can be
removed periodically. With no drive applied, the spinning
motor presents a back EMF voltage proportional to its
rotational speed. The LT1782 is a tiny rail-to-rail amplifier
with a shutdown pin. The amplifier is enabled during this
interval to sample the back EMF voltage across the motor.
This voltage is then buffered by one-half of an LT1638 dual
op amp and used to provide the feedback to the LT1970
integrator.Whenre-enabledtheLT1970willadjustthedrive
to the motor until the speed feedback voltage, compared
to the speed-set input voltage, settles the output to a fixed
value. A 0V to 5V signal for the motor speed input controls
both rotational speed and direction.
+
–
V and V , are used to provide gate drive as needed. With
higher output currents, the sense resistor R , is reduced
CS
in value to maintain the same easy current limit control.
This Class B power stage is intended for DC and low
frequency, <1kHz, applications as crossover distortion
becomes evident at higher frequencies.
Figure 15 shows some optional resistor dividers between
theoutputconnectionsandthecurrentsenseinputs. They
are required only if the load of this power stage is removed
or at a very low current level. Large power devices with
no load on them can saturate and pull the output voltage
very close to the power supply rails. The current sense
amplifiers operate properly with input voltages at least
The other half of the LT1638 is used as a simple pulse
oscillator to control the periodic sampling of the motor
back EMF.
1V away from the V and V supply rails. In boosted
CC
EE
current applications, it may be necessary to attenuate the
maximum output voltage levels by 1V before connecting
to the sense input pins. This only slightly deceases the
current limit thresholds.
Figure 15 shows how easy it is to boost the output current
of the LT1970. This 5A power stage uses complementary
1970fe
22
For more information www.linear.com/LT1970
LT1970
applicaTions inForMaTion
12V
OV TO 5V
TORQUE/STALL
CURRENT CONTROL
R3
2k
FAULT/STALL
VC
SRC
FWD
R1
10k
5V
STOP
VC
SNK
V
MOTOR SPEED
CONTROL
CC
+IN
+
V
R2
20k
ISRC
0V
REV
R
S
1Ω
ISNK
TSD
OUT
LT1970
+
SENSE
–
SENSE
12V DC
MOTOR
FILTER
V
–
–IN
V
EE
EN
COM
C1
4.7µF
–12V
R6
49.9k
R14
10k
R4
100k
12V
–
R5
120k
–
+
R15
12V
1/2 LT1638
–12V
100Ω
+
LT1782
–12V
C2
0.01µF
SHDN
R7
10k
R8
20k
R13
10k
R12
10k
+
–
12V
1/2 LT1638
D1
R9
20k
R10
1N4148
82.5k
C3
0.1µF
D2
1N4148
R11
9.09k
1970 F14
–12V
Figure 14. Simple Bidirectional DC Motor Speed Controller Without a Tachometer
1970fe
23
For more information www.linear.com/LT1970
LT1970
package DescripTion
Please refer to http://www.linear.com/product/LT1970#packaging for the most recent package drawings.
FE Package
20-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev K)
Exposed Pad Variation CA
6.07
(.239)
6.40 – 6.60*
DETAIL A
4.95
(.195)
(.252 – .260)
4.95
(.195)
1.98
(.078)
REF
20 1918 17 16 15 14 1312 11
6.60 ±0.10
4.50 ±0.10
DETAIL A
2.74
0.56
(.022)
REF
(.108)
6.40
(.252)
BSC
2.74
(.108)
SEE NOTE 4
0.45 ±0.05
1.05 ±0.10
DETAIL A IS THE PART OF
THE LEAD FRAME FEATURE
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
0.65 BSC
5
7
8
1
2
3
4
6
9 10
RECOMMENDED SOLDER PAD LAYOUT
6.07
(.239)
1.20
(.047)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0° – 8°
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
0.195 – 0.30
FE20 (CA) TSSOP REV K 0913
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
1970fe
24
For more information www.linear.com/LT1970
LT1970
revision hisTory (Revision history begins at Rev C)
REV
DATE
07/12 Corrected Block Diagram
Changed supply voltage, added R6 in figure 14.
DESCRIPTION
PAGE NUMBER
C
10
23
2
D
E
09/14 Corrected Order Information table
Corrected TSD pin description.
9
11/15 Update Package Drawing
24
1970fe
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
25
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT1970
applicaTions inForMaTion
V
CC
CURRENT LIMIT
CONTROL VOLTAGE
0V TO 5V
15V
R2
100Ω
10µF
0.1µF
IRF9530
V
CC
R1
1k
ENABLE
+IN
VC
SRC
VC
SNK
R4
100Ω
+
V
OUT
LT1970
+
SENSE
–
R5
100Ω
SENSE
R
0.1Ω
5W
CS
COMMON
V
*
*
–IN
–
V
EE
*
*
R
LOAD
R
F
G
2.2k
2.2k
V
IN
IRF530
R3
100Ω
V
EE
–15V
10µF
0.1µF
*OPTIONAL, SEE TEXT
1970 F15
Figure 15. AV = –1 Amplifier with Discrete Power Devices to Boost Output Current to 5A
relaTeD parTs
PART NUMBER
LT1010
DESCRIPTION
COMMENTS
Fast 150mA Power Buffer
20MHz Bandwidth, 75V/µs Slew Rate
Shutdown Mode, Adjustable Supply Current
LT1206
250mA/60MHz Current Feedback Amplifier
1.1A/35MHz Current Feedback Amplifier
LT1210
Stable with C = 10,000pF
L
1970fe
LT 1115 REV E • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
26
●
●
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LT1970
LINEAR TECHNOLOGY CORPORATION 2002
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