LT1993IUD-10 [Linear]
700MHz Low Distortion, Low Noise Differential Amplifi er/ADC Driver (AV = 10V/V); 700MHz的低失真,低噪声差分功率放大器ER / ADC驱动器(AV = 10V / V)型号: | LT1993IUD-10 |
厂家: | Linear |
描述: | 700MHz Low Distortion, Low Noise Differential Amplifi er/ADC Driver (AV = 10V/V) |
文件: | 总16页 (文件大小:731K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1993-10
700MHz Low Distortion, Low
Noise Differential Amplifier/
ADC Driver (AV = 10V/V)
U
DESCRIPTIO
FEATURES
The LT®1993-10 is a low distortion, low noise Differential
Amplifier/ADC driver for use in applications from DC to
700MHz. The LT1993-10 has been designed for ease of
use, with minimal support circuitry required. Exception-
ally low input-referred noise and low distortion products
(with either single-ended or differential inputs) make the
LT1993-10 an excellent solution for driving high speed
12-bitand14-bitADCs.Inadditiontothenormalunfiltered
outputs (+OUT and –OUT), the LT1993-10 has a built-in
175MHz differential lowpass filter and an additional pair
of filtered outputs (+OUTFILTERED, –OUTFILTERED) to
reduce external filtering components when driving high
speedADCs.Theoutputcommonmodevoltageiseasilyset
■
700MHz –3dB Bandwidth
■
Fixed Gain of 10V/V (20dB)
■
Low Distortion:
40dBm OIP3, –70dBc HD3 (70MHz 2V
)
P-P
)
50.5dBm OIP3, –91dBc (10MHz 2V
P-P
■
■
■
■
■
■
■
Low Noise: 12.7dB NF, e = 1.9nV/√Hz
n
Differential Inputs and Outputs
Additional Filtered Outputs
Adjustable Output Common Mode Voltage
DC- or AC-Coupled Operation
Minimal Support Circuitry Required
Small 0.75mm Tall 16-Lead 3 × 3 QFN Package
U
via the V
pin, eliminating either an output transformer
or AC-coupling capacitors in many applications.
APPLICATIO S
OCM
■
Differential ADC Driver for:
TheLT1993-10isdesignedtomeetthedemandingrequire-
ments of communications transceiver applications. It can
be used as a differential ADC driver, a general-purpose
differential gain block, or in any other application requir-
ing differential drive. The LT1993-10 can be used in data
acquisition systems required to function at frequencies
down to DC.
Imaging
Communications
Differential Driver/Receiver
Single Ended to Differential Conversion
Differential to Single Ended Conversion
Level Shifting
IF Sampling Receivers
SAW Filter Interfacing/Buffering
■
■
■
■
■
■
The LT1993-10 operates on a 5V supply and consumes
100mA. It comes in a compact 16-lead 3 × 3 QFN package
and operates over a –40°C to 85°C temperature range.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
U
4-Tone WCDMA Waveform,
LT1993-10 Driving LTC2255
14-Bit ADC at 92.16Msps
TYPICAL APPLICATIO
4-Channel WCDMA Receive Channel
0
–10
32768 POINT FFT
TONE CENTER FREQUENCIES
–20
–30
AT 62.5MHz, 67.5MHz,
72.5MHz, 77.5MHz
1:1
Z-RATIO
70MHz
–INB
–40
IF IN
–OUT
AIN–
LTC2255
–50
–INA
–OUTFILTERED
–60
82nH 52.3pF
LT1993-10
ADC
–70
+OUTFILTERED
–80
–90
+INB
AIN+
+OUT
OCM
MA/COM
ETC 1-1-13
+INA
V
LTC2255 125Msps
14-BIT ADC SAMPLING
AT 92.16Msps
–100
–110
–120
ENABLE
2.2V
20dB Gain
199310 TA01
0
10 15 20 25 30 35 40 45
FREQUENCY (MHz)
5
199310 • TA02
199310fb
1
LT1993-10
W W U W
U
W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
TOP VIEW
Total Supply Voltage (V /V /V
to
CCA CCB CCC
V
/V /V ) ...................................................5.5V
EEA EEB EEC
Input Current (+INA, –INA, +INB, –INB,
16 15 14 13
V
1
2
3
4
12
V
EEC
CCC
V
, ENABLE)................................................ 10mA
OCM
V
11 ENABLE
OCM
17
Output Current (Continuous) (Note 6)
V
V
V
10
9
CCA
CCB
EEB
+OUT, –OUT (DC) .......................................... 100mA
(AC) .......................................... 100mA
V
EEA
5
6
7
8
+OUTFILTERED, –OUTFILTERED (DC)............. 15mA
(AC) ............. 45mA
Output Short Circuit Duration (Note 2) ............ Indefinite
Operating Temperature Range (Note 3) ... –40°C to 85°C
Specified Temperature Range (Note 4) .... –40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
Junction Temperature ........................................... 125°C
Lead Temperature Range (Soldering 10 sec) ........ 300°C
UD PACKAGE
16-LEAD (3mm × 3mm) PLASTIC QFN
= 125°C, θ = 68°C/W, θ = 4.2°C/W
T
JMAX
JA
JC
EXPOSED PAD IS V (PIN 17)
EE
MUST BE SOLDERED TO THE PCB
ORDER PART NUMBER
UD PART MARKING*
LT1993CUD-10
LT1993IUD-10
LBNT
LBNT
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grade is identified by a label on the shipping container.
DC ELECTRICAL CHARACTERISTICS
The
CCA
●
denotes the specifications which apply over the full operating
= V = 5V, V = V = V = 0V, ENABLE = 0.8V, +INA
temperature range, otherwise specifications are at T = 25°C. V
= V
A
CCB
CCC
EEA
EEB
EEC
shorted to +INB (+IN), –INA shorted to –INB (–IN), V
= 2.2V, Input common mode voltage = 2.2V, no R
unless otherwise noted.
OCM
CONDITIONS
Input/Output Characteristics (+INA, +INB, –INA, –INB, +OUT, –OUT, +OUTFILTERED, –OUTFILTERED)
LOAD
SYMBOL
PARAMETER
MIN
TYP
MAX
UNITS
●
●
●
GDIFF
Gain
Differential (+OUT, –OUT), V
=
160mV Differential
18.9
19.7
0.25
20.9
dB
IN
V
V
V
Single-Ended +OUT, –OUT, +OUTFILTERED,
0.35
0.5
V
V
SWINGMIN
SWINGMAX
SWINGDIFF
OUT
–OUTFILTERED. V = 600mV Differential
IN
Single-Ended +OUT, –OUT, +OUTFILTERED,
3.6
3.5
3.75
7
V
V
–OUTFILTERED. V = 600mV Differential
IN
Output Voltage Swing
Differential (+OUT, –OUT), V
=
600mV Differential
6.5
6
V
V
IN
P-P
P-P
●
●
I
Output Current Drive
Input Offset Voltage
(Note 5)
40
45
1
mA
V
–6.5
–10
6.5
10
mV
mV
OS
●
●
●
●
●
TCV
Input Offset Voltage Drift
Input Voltage Range, MIN
Input Voltage Range, MAX
Differential Input Resistance
Differential Input Capacitance
T
MIN
to T
MAX
2.5
µV/°C
V
OS
VRMIN
VRMAX
I
I
Single-Ended
Single-Ended
0.9
3.9
77
V
Ω
R
100
1
122
INDIFF
INDIFF
C
pF
199310fb
2
LT1993-10
DC ELECTRICAL CHARACTERISTICS
The
CCA
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T = 25°C. V
= V
= V
= 5V, V = V = V = 0V, ENABLE = 0.8V, +INA
CCC EEA EEB EEC
A
CCB
shorted to +INB (+IN), –INA shorted to –INB (–IN), V
= 2.2V, Input common mode voltage = 2.2V, no R
unless otherwise noted.
OCM
LOAD
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
70
MAX
UNITS
dB
●
CMRR
Common Mode Rejection Ratio
Output Resistance
Input Common Mode 0.9V to 3.9V
45
Ω
R
0.3
0.8
OUTDIFF
OUTDIFF
C
Output Capacitance
pF
Common Mode Voltage Control (V
Pin)
OCM
GCM
Common Mode Gain
Differential (+OUT, –OUT), V
Differential (+OUT, –OUT), V
= 1.2V to 3.6V
= 1.4V to 3.4V
0.9
0.9
1
1.1
1.1
V/V
V/V
OCM
OCM
●
●
V
V
V
Output Common Mode Voltage
Adjustment Range, MIN
Measured Single-Ended at +OUT and –OUT
1.2
1.4
V
V
OCMMIN
OCMMAX
OSCM
Output Common Mode Voltage
Adjustment Range, MAX
Measured Single-Ended at +OUT and –OUT
3.6
3.4
V
V
●
●
Output Common Mode Offset
Voltage
Measured from V
to Average of +OUT and –OUT
–30
2
30
15
mV
OCM
●
●
I
V
V
V
Input Bias Current
Input Resistance
Input Capacitance
5
3
1
µA
MΩ
pF
BIASCM
OCM
OCM
OCM
R
0.8
INCM
INCM
C
ENABLE Pin
●
●
●
●
V
V
ENABLE Input Low Voltage
ENABLE Input High Voltage
ENABLE Input Low Current
ENABLE Input High Current
0.8
V
V
IL
2
IH
I
I
ENABLE = 0.8V
ENABLE = 2V
0.5
3
µA
µA
IL
IH
1
Power Supply
●
●
●
●
V
Operating Range
4
5
5.5
112
500
V
mA
µA
S
I
I
Supply Current
ENABLE = 0.8V
ENABLE = 2V
4V to 5.5V
88
100
250
90
S
Supply Current (Disabled)
Power Supply Rejection Ratio
SDISABLED
PSRR
55
dB
AC ELECTRICAL CHARACTERISTICS
T = 25°C, V
= V
= V
= 5V, V = V = V = 0V,
A
CCA
CCB
CCC EEA EEB EEC
ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), V
unless otherwise noted.
= 2.2V, Input common mode voltage = 2.2V, no R
LOAD
OCM
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input/Output Characteristics
–3dBBW
0.1dBBW
0.5dBBW
SR
–3dB Bandwidth
200mV Differential (+OUT, –OUT)
500
700
50
MHz
MHz
MHz
V/µs
ns
P-P
Bandwidth for 0.1dB Flatness
Bandwidth for 0.5dB Flatness
Slew Rate
200mV Differential (+OUT, –OUT)
P-P
200mV Differential (+OUT, –OUT)
100
1100
4
P-P
3.2V Differential (+OUT, –OUT)
P-P
t
1% Settling Time
1% Settling for a 1V Differential Step
s1%
P-P
(+OUT, –OUT)
t
t
Turn-On Time
Turn-Off Time
40
ns
ns
ON
250
OFF
Common Mode Voltage Control (V
Pin)
OCM
–3dBBW
Common Mode Small-Signal –3dB
Bandwidth
0.1V at V , Measured Single-Ended at +OUT
OCM
300
MHz
CM
P-P
and –OUT
199310fb
3
LT1993-10
AC ELECTRICAL CHARACTERISTICS
T = 25°C, V
= V
= V
= 5V, V = V = V = 0V,
CCC EEA EEB EEC
A
CCA
CCB
ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), V
unless otherwise noted.
= 2.2V, Input common mode voltage = 2.2V, no R
OCM
LOAD
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SRCM
Common Mode Slew Rate
1.2V to 3.6V Step at V
500
V/µs
OCM
Noise/Harmonic Performance Input/output Characteristics
1kHz Signal
Second/Third Harmonic Distortion
2V Differential (+OUTFILTERED, –OUTFILTERED)
–100
–100
–100
–91
dBc
dBc
dBc
dBc
dBc
dBc
dBc
P-P
2V Differential (+OUT, –OUT)
P-P
2V Differential (+OUT, –OUT), R = 100Ω
P-P
L
3.2V Differential (+OUTFILTERED, –OUTFILTERED)
P-P
3.2V Differential (+OUT, –OUT)
–91
P-P
3.2V Differential (+OUT, –OUT), R = 100Ω
–91
P-P
L
Third-Order IMD
2V Differential Composite (+OUTFILTERED,
–102
P-P
–OUTFILTERED), f1 = 0.95kHz, f2 = 1.05kHz
2V Differential Composite (+OUT, –OUT),
L
–102
–93
54
dBc
dBc
P-P
R = 100Ω, f1 = 0.95kHz, f2 = 1.05kHz
3.2V Differential Composite (+OUTFILTERED,
P-P
–OUTFILTERED), f1 = 0.95kHz, f2 = 1.05kHz
OIP3
Output Third-Order Intercept
Differential (+OUTFILTERED, –OUTFILTERED),
f1 = 0.95kHz, f2 = 1.05kHz
dBm
1k
e
n1k
Input Referred Noise Voltage Density
1dB Compression Point
1.7
nV/√Hz
dBm
22.7
10MHz Signal
Second/Third Harmonic Distortion
2V Differential (+OUTFILTERED, –OUTFILTERED)
–91
–91
–83
–82
–82
–74
–95
dBc
dBc
dBc
dBc
dBc
dBc
dBc
P-P
2V Differential (+OUT, –OUT)
P-P
2V Differential (+OUT, –OUT), R = 100Ω
P-P
L
3.2V Differential (+OUTFILTERED, –OUTFILTERED)
P-P
3.2V Differential (+OUT, –OUT)
P-P
3.2V Differential (+OUT, –OUT), R = 100Ω
P-P
L
Third-Order IMD
2V Differential Composite (+OUTFILTERED,
P-P
–OUTFILTERED), f1 = 9.5MHz, f2 = 10.5MHz
2V Differential Composite (+OUT, –OUT),
L
–94
–85
50.5
dBc
dBc
P-P
R = 100Ω, f1 = 9.5MHz, f2 = 10.5MHz
3.2V Differential Composite (+OUTFILTERED,
P-P
–OUTFILTERED), f1 = 9.5MHz, f2 = 10.5MHz
OIP3
NF
Output Third-Order Intercept
Differential (+OUTFILTERED, –OUTFILTERED),
f1 = 9.5MHz, f2 = 10.5MHz
dBm
10M
Noise Figure
Measured Using DC800A Demo Board
11.8
1.7
dBm
nV/√Hz
dBm
e
Input Referred Noise Voltage Density
1dB Compression Point
n10M
22.6
50MHz Signal
Second/Third Harmonic Distortion
2V Differential (+OUTFILTERED, –OUTFILTERED)
–77
–77
–73
–68
–66
dBc
dBc
dBc
dBc
dBc
P-P
2V Differential (+OUT, –OUT)
P-P
2V Differential (+OUT, –OUT), R = 100Ω
P-P
L
3.2V Differential (+OUTFILTERED, –OUTFILTERED)
P-P
3.2V Differential (+OUT, –OUT)
P-P
199310fb
4
LT1993-10
AC ELECTRICAL CHARACTERISTICS
T = 25°C, V
= V
= V
= 5V, V = V = V = 0V,
A
CCA
CCB
CCC EEA EEB EEC
ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), V
unless otherwise noted.
= 2.2V, Input common mode voltage = 2.2V, no R
OCM
LOAD
SYMBOL
PARAMETER
CONDITIONS
3.2V Differential (+OUT, –OUT), R = 100Ω
MIN
TYP
–63
–82
MAX
UNITS
dBc
dBc
P-P
L
Third-Order IMD
2V Differential Composite (+OUTFILTERED,
P-P
–OUTFILTERED), f1 = 49.5MHz, f2 = 50.5MHz
2V Differential Composite (+OUT, –OUT),
L
–81
–72
44
dBc
dBc
P-P
R = 100Ω, f1 = 49.5MHz, f2 = 50.5MHz
3.2V Differential Composite (+OUTFILTERED,
P-P
–OUTFILTERED), f1 = 49.5MHz, f2 = 50.5MHz
OIP3
NF
Output Third-Order Intercept
Differential (+OUTFILTERED, –OUTFILTERED),
f1 = 49.5MHz, f2 = 50.5MHz
dBm
50M
Noise Figure
Measured Using DC800A Demo Board
12.3
1.8
dB
nV/√Hz
dBm
e
Input Referred Noise Voltage Density
1dB Compression Point
n50M
19.7
70MHz Signal
Second/Third Harmonic Distortion
Third-Order IMD
2V Differential (+OUTFILTERED, –OUTFILTERED)
–70
–67
–66
–74
dBc
dBc
dBc
dBc
P-P
2V Differential (+OUT, –OUT)
P-P
2V Differential (+OUT, –OUT), R = 100Ω
P-P
L
2V Differential Composite (+OUTFILTERED,
P-P
–OUTFILTERED), f1 = 69.5MHz, f2 = 70.5MHz
2V Differential Composite (+OUT, –OUT),
L
–71
40
dBc
P-P
R = 100Ω, f1 = 69.5MHz, f2 = 70.5MHz
OIP3
NF
Output Third-Order Intercept
Differential (+OUTFILTERED, –OUTFILTERED),
f1 = 69.5MHz, f2 = 70.5MHz
dBm
70M
Noise Figure
Measured Using DC800A Demo Board
12.7
1.9
dB
nV/√Hz
dBm
e
Input Referred Noise Voltage Density
1dB Compression Point
n70M
18.5
100MHz Signal
Second/Third Harmonic Distortion
Third-Order IMD
2V Differential (+OUTFILTERED, –OUTFILTERED)
–60
–55
–52
–61
dBc
dBc
dBc
dBc
P-P
2V Differential (+OUT, –OUT)
P-P
2V Differential (+OUT, –OUT), R = 100Ω
P-P
L
2V Differential Composite (+OUTFILTERED,
P-P
–OUTFILTERED), f1 = 99.5MHz, f2 = 100.5MHz
2V Differential Composite (+OUT, –OUT),
L
–60
dBc
P-P
R = 100Ω, f1 = 99.5MHz, f2 = 100.5MHz
OIP3
NF
Output Third-Order Intercept
Differential (+OUTFILTERED, –OUTFILTERED),
f1 = 99.5MHz, f2 = 100.5MHz
33.5
dBm
100M
Noise Figure
Measured Using DC800A Demo Board
13.2
2.0
dB
nV/√Hz
dBm
e
Input Referred Noise Voltage Density
1dB Compression Point
n100M
17.8
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: As long as output current and junction temperature are kept below
the Absolute Maximum Ratings, no damage to the part will occur.
Note 4: The LT1993C-10 is guaranteed to meet specified performance
from 0°C to 70°C. It is designed, characterized and expected to meet
specified performance from –40°C and 85°C but is not tested or QA
sampled at these temperatures. The LT1993I-10 is guaranteed to meet
specified performance from –40°C to 85°C.
Note 5: This parameter is pulse tested.
Note 3: The LT1993C-10 is guaranteed functional over the operating
temperature range of –40°C to 85°C.
Note 6: This parameter is guaranteed to meet specified performance
through design and characterization. It has not been tested.
199310fb
5
LT1993-10
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Frequency Response
= 400Ω
Frequency Response vs C
LOAD
Frequency Response
R = 100Ω
LOAD
LOAD
R
LOAD
R
= 400Ω
26
23
20
17
14
11
8
35
32
29
26
23
20
17
14
11
26
23
20
17
14
11
8
V
= 20mV
IN
P-P
UNFILTERED OUTPUTS
UNFILTERED OUTPUTS
FILTERED OUTPUTS
UNFILTERED OUTPUTS
FILTERED OUTPUTS
10pF
5pF
1.8pF
0pF
V
= 20mV
P-P
IN
UNFILTERED: R
FILTERED: R
(EXTERNAL) + 50Ω
= 100Ω
V
= 20mV
P-P
LOAD
= 50Ω
IN
UNFILTERED: R
FILTERED: R
(EXTERNAL) + 50Ω (INTERNAL,
FILTERED OUTPUTS)
= 400Ω
LOAD
LOAD
= 350Ω
LOAD
5
5
(INTERNAL, FILTERED
OUTPUTS)
2
2
1
10
100
1000
10000
1
10
100
1000
10000
1
10
100
1000
10000
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
199310 G01
199310 G02
199310 G03
Third Order Intermodulation
Distortion vs Frequency
Third Order Intermodulation
Distortion vs Frequency
Third Order Intermodulation
Distortion vs Frequency
Differential Input, R
= 400Ω
Differential Input, R
= 100Ω
Differential Input, No R
LOAD
LOAD
LOAD
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
2 TONES, 2V COMPOSITE
P-P
2 TONES, 2V COMPOSITE
P-P
2 TONES, 2V COMPOSITE
P-P
1MHz TONE SPACING
1MHz TONE SPACING
1MHz TONE SPACING
FILTERED OUTPUTS
FILTERED OUTPUTS
FILTERED OUTPUTS
UNFILTERED OUTPUTS
UNFILTERED OUTPUTS
UNFILTERED OUTPUTS
0
40
60
80
100 120 140
0
40
60
80
100 120 140
0
40
60
80
100 120 140
20
20
20
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
199310 G04
199310 G05
199310 G06
Output Third Order Intercept
vs Frequency, Differential Input
No R
Output Third Order Intercept
Output Third Order Intercept
vs Frequency, Differential Input
R = 100Ω
LOAD
vs Frequency, Differential Input
R
LOAD
= 400Ω
LOAD
60
55
50
45
40
35
30
25
20
60
55
50
45
40
35
30
25
20
60
55
50
45
40
35
30
25
20
2 TONES, 2V COMPOSITE
P-P
1MHz TONE SPACING
2 TONES, 2V COMPOSITE
P-P
1MHz TONE SPACING
2 TONES, 2V COMPOSITE
P-P
1MHz TONE SPACING
UNFILTERED OUTPUTS
UNFILTERED OUTPUTS
UNFILTERED
OUTPUTS
FILTERED
OUTPUTS
FILTERED OUTPUTS
FILTERED OUTPUTS
0
40
60
80
100 120 140
0
40
60
80
100 120 140
20
20
0
40
60
80
100 120 140
20
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
199310 G07
199310 G08
199310 G09
199310fb
6
LT1993-10
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Distortion vs Output Amplitude
70MHz Differential Input, No R
Distortion (Filtered) vs Frequency
Distortion (Unfiltered) vs Frequency
Differential Input, No R
Differential Input, No R
LOAD
LOAD
LOAD
–10
–20
–30
–40
–10
–20
–30
–40
–50
–55
–60
–65
–70
–75
–80
–85
–90
–95
–100
UNFILTERED OUTPUTS
FILTERED OUTPUTS
V
= 2V
V
= 2V
P-P
OUT
P-P
OUT
HD3 UNFILTERED OUTPUTS
HD3 FILTERED OUTPUTS
HD3
HD2
HD3
HD2
–50
–60
–50
–60
–70
–80
–70
–80
–90
–90
HD2 FILTERED OUTPUTS
HD2 UNFILTERED
–100
–110
–100
–110
OUTPUTS
1
10
100
1000
–1
1
5
7
9
11
3
1
10
100
1000
OUTPUT AMPLITUDE (dBm)
FREQUENCY (MHz)
FREQUENCY (MHz)
199310 G11
199310 G12
Output 1dB Compression vs
Frequency
Input Referred Noise Voltage vs
Frequency
Noise Figure vs Frequency
5
4
3
2
1
0
30
25
20
15
10
5
25
20
15
10
5
UNFILTERED OUTPUTS
MEASURED USING
DC800A DEMO BOARD
R
LOAD
= 400Ω
R
= 100Ω
LOAD
0
–5
–10
0
100
1000
10
100
1000
1
10
FREQUENCY (MHz)
100
1000
10
FREQUENCY (MHz)
FREQUENCY (MHz)
199310 G13
Differential Input Impedance vs
Frequency
Differential Output Impedance vs
Frequency
Reverse Isolation vs Frequency
–40
–50
100
10
1
150
125
100
75
UNFILTERED OUTPUTS
UNFILTERED OUTPUTS
IMPEDANCE MAGNITUDE
IMPEDANCE PHASE
–60
50
25
–70
–80
0
–25
–90
–50
–100
–110
–75
0.1
–100
1
10
100
1000
10000
1
10
100
1000
1
10
100
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
199310 G16
199310fb
7
LT1993-10
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input Reflection Coefficient vs
Frequency
Output Reflection Coefficient vs
Frequency
PSRR, CMRR vs Frequency
100
90
80
70
60
50
40
30
20
10
0
0
–5
0
–5
UNFILTERED OUTPUTS
MEASURED USING DC800A DEMO BOARD
MEASURED USING DC800A DEMO BOARD
–10
–15
–20
–25
–30
–35
–40
–45
–50
–10
–15
–20
–25
–30
–35
–40
–45
–50
CMRR
PSRR
1
10
100
1000
10
100
1000
10
100
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
199310 G21
199310 G19
199310 G20
Small-Signal Transient Response
Large-Signal Transient Response
Overdrive Recovery Time
2.28
2.26
2.24
2.22
2.20
2.18
2.16
2.14
2.12
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
R
LOAD
= 100 PER OUTPUT
R
= 100 PER OUTPUT
LOAD
+OUT
R
= 100Ω
LOAD
PER OUTPUT
–OUT
0
5
10 15 20 25 30 35 40 45 50
TIME (ns)
0
5
10 15 20 25 30 35 40 45 50
TIME (ns)
75 100
25 50
0
125 150 175 200 225 250
TIME (ns)
Distortion vs Output Common
Mode Voltage, LT1933-10 Driving
LTC2249 14-Bit ADC
Turn-On Time
Turn-Off Time
–64
–66
–68
–70
–72
–74
–76
4
3
4
3
FILTERED OUTPUTS, NO R
LOAD
+OUT
+OUT
V
= 70MHz 2V
OUT
P-P
2
2
–OUT
–OUT
1
1
R
LOAD
= 100Ω PER OUTPUT
0
0
HD3
HD2
4
4
ENABLE
2
2
ENABLE
0
0
R
= 100Ω PER OUTPUT
LOAD
–2
–2
1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
OUTPUT COMMON MODE VOLTAGE (V)
199310 G25
250
TIME (ns)
250
TIME (ns)
0
125
375
500
625
0
125
375
500
625
199310fb
8
LT1993-10
U W
TYPICAL PERFOR A CE CHARACTERISTICS
50MHz 8192 Point FFT, LT1993-10
Driving LTC2249 14-Bit ADC
70MHz 8192 Point FFT, LT1993-10
Driving LTC2249 14-Bit ADC
30MHz 8192 Point FFT, LT1993-10
Driving LT2249 14-Bit ADC
0
–10
0
–10
0
–10
8192 POINT FFT
8192 POINT FFT
8192 POINT FFT
f
= 50MHz, –1dBFS
f
= 30MHz, –1dBFS
f
= 70MHz, –1dBFS
IN
IN
IN
–20
–20
–20
FILTERED OUTPUTS
FILTERED OUTPUTS
FILTERED OUTPUTS
–30
–30
–30
–40
–40
–40
–50
–50
–50
–60
–60
–60
–70
–70
–70
–80
–80
–80
–90
–90
–90
–100
–110
–120
–100
–110
–120
–100
–110
–120
0
10 15 20 25 30 35 40
FREQUENCY (MHz)
5
0
10 15 20 25 30 35 40
FREQUENCY (MHz)
0
10 15 20 25 30 35 40
FREQUENCY (MHz)
5
5
199310 G29
199310 G28
199310 G30
70MHz 2-Tone 32768 Point FFT
LT1993-10 Driving LTC2249
14-Bit ADC
2-Tone WCDMA Waveform
LT1993-10 Driving LTC2255
14-Bit ADC at 92.16Msps
4-Tone WCDMA Waveform
LT1993-10 Driving LTC2255
14-Bit ADC at 92.16Msps
0
–10
0
–10
0
–10
32768 POINT FFT
TONE CENTER FREQUENCIES
AT 67.5MHz, 72.5MHz
32768 POINT FFT
32768 POINT FFT
TONE CENTER FREQUENCIES
AT 62.5MHz, 67.5MHz,
72.5MHz, 77.5MHz
TONE 1 AT 69.5MHz, –7dBFS
TONE 2 AT 70.5MHz, –7dBFS
FILTERED OUTPUTS
–20
–20
–20
–30
–30
–30
–40
–40
–40
–50
–50
–50
–60
–60
–60
–70
–70
–70
–80
–80
–80
–90
–90
–90
–100
–110
–120
–100
–110
–120
–100
–110
–120
0
5
20 25 30 35 40
10 15
FREQUENCY (MHz)
0
10 15 20 25 30 35 40 45
FREQUENCY (MHz)
0
10 15 20 25 30 35 40 45
FREQUENCY (MHz)
5
5
199310 G31
199310 G32
199310 G33
U
U
U
PI FU CTIO S
V
(Pin 2): This pin sets the output common mode
V
, V , V (Pins 4, 9, 12): Negative Power Supply
EEA EEB EEC
OCM
voltage. Without additional biasing, both inputs bias to
(Normally Tied to Ground). All three pins must be tied to
the same voltage. Split supplies are possible as long as
this voltage as well. This input is high impedance.
the voltage between V and V is 5V. If these pins are
CC
EE
V
, V , V
(Pins 3, 10, 1): Positive Power Supply
CCA CCB CCC
nottiedtoground, bypasseachpinwith1000pFand0.1µF
(Normally Tied to 5V). All three pins must be tied to the
same voltage. Bypass each pin with 1000pF and 0.1µF
capacitors as close to the package as possible. Split
capacitors as close to the package as possible.
+OUT, –OUT (Pins 5, 8): Outputs (Unfiltered). These
pins are high bandwidth, low-impedance outputs. The DC
output voltage at these pins is set to the voltage applied
supplies are possible as long as the voltage between V
and V is 5V.
CC
EE
at V
.
OCM
199310fb
9
LT1993-10
U
U
U
PI FU CTIO S
+OUTFILTERED, –OUTFILTERED (Pins 6, 7): Filtered
Outputs. These pins add a series 25Ω resistor from the
unfiltered outputs and three 12pF capacitors. Each output
–INA, –INB (Pins 14, 13): Negative Inputs. These pins are
normally tied together. These inputs may be DC- or AC-
coupled. If the inputs are AC-coupled, they will self-bias
has 12pF to V , plus an additional 12pF between each pin
to the voltage applied to the V
pin.
EE
OCM
(See the Block Diagram). This filter has a –3dB bandwidth
of 175MHz.
+INA, +INB (Pins 16, 15): Positive Inputs. These pins are
normally tied together. These inputs may be DC- or AC-
coupled. If the inputs are AC-coupled, they will self-bias
ENABLE (Pin 11): This pin is a TTL logic input referenced
totheV pin. Iflow, theLT1993-10isenabledanddraws
to the voltage applied to the V
pin.
EEC
OCM
typically 100mA of supply current. If high, the LT1993-10
Exposed Pad (Pin 17): Tie the pad to V (Pin 12). If split
EEC
is disabled and draws typically 250µA.
supplies are used, DO NOT tie the pad to ground.
W
BLOCK DIAGRA
500Ω
V
EEA
V
CCA
–INA
–INB
12pF
100Ω
100Ω
14
13
–
+
+OUT
5
6
A
+OUTFILTERED
25Ω
V
EEA
V
500Ω
CCC
V
OCM
2
+
–
C
12pF
V
EEC
500Ω
100Ω
25Ω
–OUTFILTERED
–OUT
V
CCB
+INA
+INB
7
8
16
15
+
–
B
100Ω
12pF
V
EEB
V
EEB
500Ω
BIAS
11
199310 BD
3
10
1
4
9
12
V
V
V
ENABLE
V
V
V
EEC
CCA
CCB
CCC
EEA
EEB
199310fb
10
LT1993-10
U
W U U
APPLICATIO S I FOR ATIO
Circuit Description
Input Impedance and Matching Networks
The LT1993-10 is a low noise, low distortion differential
amplifier/ADC driver with:
Because of the internal feedback network, calculation of
the LT1993-10’s input impedance is not straightforward
from examination of the block diagram. Furthermore, the
inputimpedancewhendrivendifferentiallyisdifferentthan
when driven single-ended. When driven differentially, the
LT1993-10’sinputimpedanceis100Ω(differential);when
driven single-ended, the input impedance is 85.9Ω.
• DC to 700MHz –3dB bandwidth
• Fixed gain of 10V/V (20dB) independent of R
• 100Ω differential input impedance
• Low output impedance
LOAD
For single-ended 50Ω applications, a 121Ω shunt match-
ing resistor to ground will result in the proper input
termination (Figure 1). For differential inputs there are
several termination options. If the input source is 50Ω
differential, then input matching can be accomplished by
either a 100Ω shunt resistor across the inputs (Figure 3),
or a 49.9Ω shunt resistor on each of the inputs to ground
(Figure 2).
• Built-in, user adjustable output filtering
• Requires minimal support circuitry
Referring to the block diagram, the LT1993-10 uses a
closed-loop topology which incorporates 3 internal am-
plifiers. Two of the amplifiers (A and B) are identical and
drive the differential outputs. The third amplifier (C) is
used to set the output common mode voltage. Gain and
input impedance are set by the 100Ω/500Ω resistors in
the internal feedback network. Output impedance is low,
determinedbytheinherentoutputimpedanceofamplifiers
A and B, and further reduced by internal feedback.
13
–INB
–INA
8
5
–OUT
LT1993-10
+OUT
14
0.1
F
15
16
IF IN
+INB
+INA
The LT1993-10 also includes built-in single-pole output
filtering. The user has the choice of using the unfiltered
outputs, the filtered outputs (175MHz –3dB lowpass), or
modifying the filtered outputs to alter frequency response
by adding additional components. Many lowpass and
bandpass filters are easily implemented with just one or
two additional components.
121
Z
= 50
IN
SINGLE-ENDED
199310 F01
Figure 1. Input Termination for Single-Ended 50Ω
Input Impedance
13
–INB
–
IF IN
8
5
14
–OUT
LT1993-10
+OUT
–INA
The LT1993-10 has been designed to minimize the need
for external support components such as transformers or
AC-coupling capacitors. As an ADC driver, the LT1993-10
requires no external components except for power-supply
bypass capacitors. This allows DC-coupled operation for
applications that have frequency ranges including DC. At
49.9
49.9
Z
= 50
IN
DIFFERENTIAL
15
16
+INB
+INA
+
IF IN
199310 F02
Figure 2. Input Termination for Differential 50Ω Input Impedance
the outputs, the common mode voltage is set via the V
OCM
pin, allowing the LT1993-10 to drive ADCs directly. No
outputAC-couplingcapacitorsortransformersareneeded.
At the inputs, signals can be differential or single-ended
with virtually no difference in performance. Furthermore,
DC levels at the inputs can be set independently of the
outputcommonmodevoltage.Theseinputcharacteristics
often eliminate the need for an input transformer and/or
AC-coupling capacitors.
13
–INB
–
IF IN
8
5
14
–OUT
LT1993-10
+OUT
–INA
Z
= 50
IN
100
DIFFERENTIAL
15
16
+INB
+INA
+
IF IN
199310 F03
Figure 3. Alternate Input Termination for Differential
50Ω Input Impedance
199310fb
11
LT1993-10
U
W U U
APPLICATIO S I FOR ATIO
Single-Ended to Differential Operation
10 TO 25
10 TO 25
8
5
–OUT
LT1993-10
+OUT
The LT1993-10’s performance with single-ended inputs
is comparable to its performance with differential inputs.
This excellent single-ended performance is largely due
to the internal topology of the LT1993-10. Referring to
the block diagram, if the +INA and +INB pins are driven
with a single-ended signal (while –INA and –INB are tied
to AC ground), then the +OUT and –OUT pins are driven
differentially without any voltage swing needed from
amplifier C. Single-ended to differential conversion using
more conventional topologies suffers from performance
limitations due to the common mode amplifier.
ADC
199310 F04
Figure 4. Adding Small Series R at LT1993-10 Output
Filtered Applications
(Using the +OUTFILTERED and –OUTFILTERED Pins)
Filtering at the output of the LT1993-10 is often desired
to provide either anti-aliasing or improved signal to noise
ratio. To simplify this filtering, the LT1993-10 includes an
additional pair of differential outputs (+OUTFILTERED and
–OUTFILTERED) which incorporate an internal lowpass
filter network with a –3dB bandwidth of 175MHz (Figure
5). These pins each have an output impedance of 25Ω. In-
Driving ADCs
The LT1993-10 has been specifically designed to interface
directly with high speed Analog to Digital Converters
(ADCs). In general, these ADCs have differential inputs,
with an input impedance of 1k or higher. In addition, there
isgenerallysomeformoflowpassorbandpassfilteringjust
prior to the ADC to limit input noise at the ADC, thereby
improving system signal to noise ratio. Both the unfiltered
and filtered outputs of the LT1993-10 can easily drive the
high impedance inputs of these differential ADCs. If the
filtered outputs are used, then cutoff frequency and the
type of filter can be tailored for the specific application if
needed.
ternalcapacitancesare12pFtoV oneachfilteredoutput,
EE
plus an additional 12pF capacitor connected differentially
between the two filtered outputs. This resistor/capaci-
tor combination creates filtered outputs that look like a
series 25Ω resistor with a 36pF capacitor shunting each
filtered output to AC ground, giving a –3dB bandwidth of
175MHz.
LT1993-10
8
–OUT
V
EE
25
12pF
12pF
25
25
Wideband Applications
7
6
–OUTFILTERED
FILTERED OUTPUT
(350MHz)
12pF
(Using the +OUT and –OUT Pins)
+OUTFILTERED
25
In applications where the full bandwidth of the LT1993-10
is desired, the unfiltered output pins (+OUT and –OUT)
should be used. They have a low output impedance;
therefore, gain is unaffected by output load. Capacitance
in excess of 5pF placed directly on the unfiltered outputs
results in additional peaking and reduced performance.
When driving an ADC directly, a small series resistance
is recommended between the LT1993-10’s outputs and
the ADC inputs (Figure 4). This resistance helps eliminate
any resonances associated with bond wire inductances of
either the ADC inputs or the LT1993-10’s outputs. A value
between 10Ω and 25Ω gives excellent results.
V
EE
5
+OUT
199310 F05
Figure 5. LT1993-10 Internal Filter Topology –3dB BW ≈175MHz
The filter cutoff frequency is easily modified with just a
fewexternalcomponents.Toincreasethecutofffrequency,
simplyadd2equalvalueresistors, onebetween+OUTand
+OUTFILTEREDandtheotherbetween–OUTand–OUTFIL-
TERED (Figure 6). These resistors are in parallel with the
internal 25Ω resistor, lowering the overall resistance and
increasingfilterbandwidth. Todoublethefilterbandwidth,
for example, add two external 25Ω resistors to lower
the series resistance to 12.5Ω. The 36pF of capacitance
remains unchanged, so filter bandwidth doubles.
199310fb
12
LT1993-10
U
W U U
APPLICATIO S I FOR ATIO
LT1993-10
LT1993-10
8
8
7
–OUT
–OUT
V
EE
V
EE
25
12pF
12pF
25
25
25
25
–OUTFILTERED
39nH
7
6
–OUTFILTERED
FILTERED OUTPUT
(350MHz)
12pF
FILTERED OUTPUT
12pF
120pF
(71MHz BANDPASS,
+OUTFILTERED
25
–3dB @ 55MHz/87MHz)
12pF
+OUTFILTERED
6
5
V
EE
12pF
5
+OUT
19932 F06
V
EE
+OUT
199310 F08
Figure 6. LT1993-10 Internal Filter Topology Modified
for 2x Filter Bandwidth (2 External Resistors)
Figure 8. LT1993-10 Output Filter Topology Modified for
Bandpass Filtering (1 External Inductor, 1 External Capacitor)
To decrease filter bandwidth, add two external capaci-
tors, one from +OUTFILTERED to ground, and the other
from –OUTFILTERED to ground. A single differential
capacitor connected between +OUTFILTERED and –OUT-
FILTERED can also be used, but since it is being driven
differentially it will appear at each filtered output as a
single-ended capacitance of twice the value. To halve the
filter bandwidth, for example, two 36pF capacitors could
be added (one from each filtered output to ground). Al-
ternatively one 18pF capacitor could be added between
the filtered outputs, again halving the filter bandwidth.
Combinations of capacitors could be used as well; a three
capacitor solution of 12pF from each filtered output to
ground plus a 12pF capacitor between the filtered outputs
would also halve the filter bandwidth (Figure 7).
Output Common Mode Adjustment
The LT1993-10’s output common mode voltage is set by
the V
pin. It is a high-impedance input, capable of
OCM
setting the output common mode voltage anywhere in
a range from 1.1V to 3.6V. Bandwidth of the V pin is
OCM
typically 300MHz, so for applications where the V
pin
OCM
is tied to a DC bias voltage, a 0.1µF capacitor at this pin is
recommended.Forbestdistortionperformance,thevoltage
at the V
pin should be between 1.8V and 2.6V.
OCM
WheninterfacingwithmostADCs,thereisgenerallyaV
OCM
output pin that is at about half of the supply voltage of the
ADC. For 5V ADCs such as the LTC17XX family, this V
OCM
outputpinshouldbeconnecteddirectly(withtheadditionof
a 0.1µF capacitor) to the input V pin of the LT1993-10.
OCM
LT1993-10
8
–OUT
For 3V ADCs such as the LTC22XX families, the LT1993-
V
EE
10 will function properly using the 1.65V from the ADC’s
12pF
25
25
12pF
7
–OUTFILTERED
V
reference pin, but improved Spurious Free Dynamic
CM
FILTERED OUTPUT
(87.5MHz)
Range(SFDR)anddistortionperformancecanbeachieved
12pF
12pF
bylevel-shiftingtheLTC22XX’sV referencevoltageupto
CM
+OUTFILTERED
6
5
12pF
atleast1.8V. ThiscanbeaccomplishedasshowninFigure
12pF
V
EE
9 by using a resistor divider between the LTC22XX’s V
CM
+OUT
199310 F07
output pin and V and then bypassing the LT1993-10’s
CC
V
OCM
pinwitha0.1µFcapacitor. Foracommonmodevolt-
Figure 7. LT1993-10 Internal Filter Topology Modified
for 1/2x Filter Bandwidth (3 External Capacitors)
ageabove1.9V, ACcouplingcapacitorsarerecommended
between the LT1993-10 and the LTC22XX ADC because of
the input voltage range constraints of the ADC.
Bandpass filtering is also easily implemented with just a
few external components. An additional 120pF and 39nH,
each added differentially between +OUTFILTERED and
–OUTFILTERED creates a bandpass filter with a 71MHz
center frequency, –3dB points of 55MHz and 87MHz, and
1.6dB of insertion loss (Figure 8).
199310fb
13
LT1993-10
U
W U U
APPLICATIO S I FOR ATIO
3V
input bias current is determined by the voltage difference
betweentheinputcommonmodevoltageandtheV pin
11k
OCM
1.9V
(which sets the output common mode voltage). At both
the positive and negative inputs, any voltage difference is
imposed across 100Ω, generating an input bias current.
0.1
F
4.02k
31 1.5V
2
13
14
–INB
–INA
V
OCM
V
CM
10
10
6
1
2
+
–
+OUTFILTERED
LT1993-10
AIN
AIN
0.1
F
For example, if the inputs are tied to 2.5V with the V
OCM
LTC22xx
–OUTFILTERED
pin at 2.2V, then a total input bias current of 3mA will flow
into the LT1993-10’s +INA and +INB pins. Furthermore,
an additional input bias current totaling 3mA will flow into
the –INA and –INB inputs.
15
16
7
+INB
+INA
IF IN
80.6
199310 F09
Figure 9. Level Shifting 3V ADC V Voltage for
Improved SFDR
CM
Application (Demo) Boards
Large Output Voltage Swings
TheDC800ADemoBoardhasbeencreatedforstand-alone
evaluation of the LT1993-10 with either single-ended or
differential input and output signals. As shown, it accepts
a single-ended input and produces a single-ended output
so that the LT1993-10 can be evaluated using standard
laboratory test equipment. For more information on this
Demo Board, please refer to the Demo Board section of
this datasheet.
The LT1993-10 has been designed to provide the 3.2V
P-P
output swing needed by the LTC1748 family of 14-bit
low-noise ADCs. This additional output swing improves
system SNR by up to 4dB. Typical performance curves
and AC specifications have been included for these
applications.
Input Bias Voltage and Bias Current
There are also additional demo boards available that
combine the LT1993-10 with a variety of different Linear
Technology ADCs. Please contact the factory for more
information on these demo boards.
The input pins of the LT1993-10 are internally biased to
the voltage applied to the V
pin. No external biasing
OCM
resistors are needed, even for AC-coupled operation. The
U
PACKAGE DESCRIPTIO
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
BOTTOM VIEW—EXPOSED PAD
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
R = 0.115
TYP
0.75 0.05
3.00 0.10
(4 SIDES)
15 16
0.70 0.05
PIN 1
TOP MARK
(NOTE 6)
0.40 0.10
1
2
1.45 0.10
(4-SIDES)
3.50 0.05
2.10 0.05
1.45 0.05
(4 SIDES)
PACKAGE
OUTLINE
(UD16) QFN 0904
0.200 REF
0.25 0.05
0.25 0.05
0.50 BSC
0.00 – 0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
199310fb
14
LT1993-10
U
TYPICAL APPLICATIO
199310fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT1993-10
U
TYPICAL APPLICATIO
Demo Circuit DC800A Schematic (AC Test Circuit)
R18
0
R17
0
V
CC
V
CC
GND
V
CC
1
SW1
3
2
1
2
1
TP1
ENABLE
C17
1000pF
C18
0.01
R16
0
F
2
1
1
2
R2
R4
50
R14
0
C11
[1]
12
11
10
9
C2
0.1
C4
0.1
0
R6
R12
75
R10
24.9
F
F
V
ENABLE
V
V
EEC
CCB EEB
–OUT
0
13
14
15
16
8
–INB
1
2
1
2
J1
–IN
R8
[1]
J4
–OUT
T1
T2
C21
0.1
7
6
5
1:1 Z-RATIO
4:1 Z-RATIO
F
5
4
1
3
–INA
+INB
+INA
–OUTFILTERED
LT1993-10
+OUTFILTERED
3
1
4
5
2
1
2
2
L1
[1]
C8
[1]
R15
[1]
R7
[1]
0dB
+18.8dB
+14dB
1
2
MA/COM
ETC1-1-13
MINI-
0dB
+8dB
J2
+IN
J5
+OUT
C1
0.1
C3
0.1
CIRCUITS
TCM 4-19
R11
75
R5
0
R9
24.9
F
F
+OUT
1
2
1
2
V
V
OCM
V
V
4
CCC
CCA
EEA
1
2
2
1
R1
[1]
R3
50
R13
[1]
C16
[1]
C22
0.1
1
2
3
F
V
CC
V
CC
2
1
2
1
2
1
2
1
C10
C9
1000pF
C12
1000pF
C13
0.01
V
CC
0.01
F
F
R19
14k
J3
V
OCM
2
1
C7
0.01
R20
11k
F
C5
0.1
F
J6
TEST IN
T3
T4
J7
1:4
4:1
TEST OUT
4
5
5
1
3
3
2
C19 0.1
F
1
2
R22
C20 0.1 F
2
R21
[1]
C6
0.1
1
F
[1]
1
2
1
2
4
1
MINI-
CIRCUITS
TCM 4-19
MINI-
CIRCUITS
TCM 4-19
2
TP2
CC
V
CC
V
NOTES: UNLESS OTHERWISE SPECIFIED,
[1] DO NOT STUFF.
1
1
2
2
1
C14
4.7
C15
1 F
F
1
TP3
GND
199310 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1993-2
800MHz Differential Amplifier/ADC Driver
900MHz Differential Amplifier/ADC Driver
Ultralow Distortion IF Amplifier/ADC Driver
Av = 2V/V, NF = 12.3dB, OIP3 = 38dBm at 70MHz
Av = 4V/V, NF = 14.5dB, OIP3 = 40dBm at 70MHz
LT1993-4
LT5514
Digitally Controlled Gain Output IP3 47dBm at 100MHz
LT6600-2.5
LT6600-5
Very Low Noise Differential Amplifier and 2.5MHz Lowpass Filter 86dB S/N with 3V Supply, SO-8 Package
Very Low Noise Differential Amplifier and 5MHz Lowpass Filter
Very Low Noise Differential Amplifier and 10MHz Lowpass Filter
Very Low Noise Differential Amplifier and 20MHz Lowpass Filter
82dB S/N with 3V Supply, SO-8 Package
82dB S/N with 3V Supply, SO-8 Package
76dB S/N with 3V Supply, SO-8 Package
LT6600-10
LT6600-20
199310fb
LT 0406 REV B • PRINTED IN USA
LinearTechnology Corporation
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
© LINEAR TECHNOLOGY CORPORATION 2005
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