LT1997IMS-3#PBF [Linear]

LT1997-3 - Precision, Wide Voltage Range Gain Selectable Amplifier; Package: MSOP; Pins: 16; Temperature Range: -40°C to 85°C;
LT1997IMS-3#PBF
型号: LT1997IMS-3#PBF
厂家: Linear    Linear
描述:

LT1997-3 - Precision, Wide Voltage Range Gain Selectable Amplifier; Package: MSOP; Pins: 16; Temperature Range: -40°C to 85°C

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LT1997-3  
Precision, Wide Voltage  
Range Gain Selectable  
Amplifier  
FeaTures  
DescripTion  
TheLT®1997-3combinesaprecisionoperationalamplifier  
with highly-matched resistors to form a one-chip solution  
for accurately amplifying voltages. Gains from –13 to +14  
with accuracy of 0.006% (60ppm) can be achieved using  
noexternalcomponents. TheLT1997-3isparticularlywell  
suited for use as a difference amplifier, where the excellent  
resistor matching results in a common mode rejection  
ratio of greater than 91dB.  
n
Pin Configurable as a Difference Amplifier, Inverting  
Amplifier or Noninverting Amplifier  
n
91dB Minimum DC CMRR (Gain = 1)  
n
65dB AC CMRR (at 100kHz, Gain = 1)  
n
0.006% (60ppm) Maximum Gain Error (Gain = 1)  
n
1ppm/°C Maximum Gain Error Drift  
n
2ppm Maximum Gain Nonlinearity  
n
160V Common Mode Voltage Range  
n
Wide Supply Voltage Range: 3.3V to 50V  
Theamplifierfeaturesa6Vmaximuminputoffsetvoltage  
anda3dBbandwidthof1.1MHz(Gain=1).TheLT1997-3  
operates from any supply voltage from 3.3V to 50V and  
draws only 350μA supply current. The output typically  
swings to within 100mV of either supply rail.  
n
Rail-to-Rail Output  
350µA Supply Current  
n
n
60µV Maximum Op Amp Offset Voltage  
n
1.1MHz –3dB Bandwidth (Gain = 1)  
n
Low-Power Shutdown: 20µA  
n
The resistors maintain their excellent matching over  
temperature; the matching temperature coefficient is  
guaranteedlessthan1ppm/°C.Theresistorsareextremely  
linear with voltage, resulting in a gain nonlinearity of less  
than 2ppm.  
Space-Saving MSOP and DFN Packages  
applicaTions  
n
High Side or Low Side Current Sensing  
n
Bidirectional Wide Common Mode Range Current  
The LT1997-3 is fully specified at 5V and 15V supplies  
and from –40°C to 125°C. The device is available in space  
saving 16-lead MSOP and 4mm × 4mm DFN14 packages.  
L, LT, LTC, LTM, Linear Technology, Over-The-Top and the Linear logo are registered  
trademarks of Analog Devices, Inc. All other trademarks are the property of their respective  
owners.  
Sensing  
n
n
n
n
High Voltage to Low Voltage Level Translation  
Industrial Data-Acquisition Front-Ends  
Replacement for Isolation Circuits  
Differential to Single-Ended Conversion  
Typical applicaTion  
Typical Distribution of CMRR (G = 1)  
Gain = 1 Difference Amplifier  
1200  
V
= –28V TO 26.5V  
15V  
SOURCE  
V
= ±±1V  
S
V
CM  
= –28V TO +26.1V  
+
–INA –INB –INC  
V
LT1997-3  
1000  
800  
600  
400  
200  
0
4621 UNITS  
2.5k  
7.5k  
FROM 3 RUNS  
22.5k  
22.5k  
22.5k  
+
OUT  
R
R
C
SENSE  
V
OUT  
= 1ꢀV/ꢀA  
1Ω  
1Ω  
7.5k  
2.5k  
45k  
45k  
REF2  
REF1  
LOAD  
–30  
–20  
–10  
0
10  
20  
30  
V
CMRR (µV/V = ppm)  
+INA +INB +INC  
SHDN  
19973 TA01b  
19973 TA01a  
–15V  
19973f  
1
For more information www.linear.com/LT1997-3  
LT1997-3  
absoluTe MaxiMuM raTings  
(Note 1)  
+
Output Short-Circuit Duration  
(Note 3) ..........................................Thermally Limited  
Temperature Range (Notes 4, 5)  
LT1997I-3 ................................................–40 to 85°C  
LT1997H-3.............................................40 to 125°C  
Maximum Junction Temperature .......................... 150°C  
Storage Temperature Range ......................–65 to 150°C  
MSOP Lead Temperature (Soldering, 10 sec)........300°C  
Supply Voltages (V to V )........................................60V  
+INA, –INA (Note 2)......................................... V 160V  
+INB, –INB, +INC, –INC  
(Note 2) ..............................(V + 80V) to (V – 0.3V)  
REF, REF1, REF2..................... (V + 60V) to (V – 0.3V)  
+
SHDN..................................... (V + 0.3V) to (V – 0.3V)  
Output Current (Continuous) (Note 6)....................50mA  
pin conFiguraTion  
TOP VIEW  
TOP VIEW  
+INA  
1
14 –INA  
1
3
+INA  
+INB  
16 –INA  
14 –INB  
+INB  
NC  
3
4
5
6
7
12 –INB  
11 NC  
15  
5
6
7
8
+INC  
REF1  
REF2  
12 –INC  
+
V
11  
V
+INC  
SHDN  
REF  
10 –INC  
+
10 SHDN  
V
9
OUT  
V
9
8
MS PACKAGE  
OUT  
VARIATION: MS16 (12)  
16-LEAD PLASTIC MSOP  
T
= 150°C, θ = 130°C/W  
JA  
JMAX  
DF PACKAGE  
14(12)-LEAD (4mm × 4mm) PLASTIC DFN  
T
= 150°C, θ = 45°C/W , θ = 3°C/W  
JA JC  
JMAX  
EXPOSED PAD (PIN 15) IS V , MUST BE SOLDERED TO PCB  
orDer inForMaTion  
http://www.linear.com/product/LT1997-3#orderinfo  
SPECIFIED  
TEMPERATURE RANGE  
LEAD FREE FINISH  
TAPE AND REEL  
PART MARKING*  
PACKAGE DESCRIPTION  
LT1997IDF-3#PBF  
LT1997HDF-3#PBF  
LT1997IMS-3#PBF  
LT1997HMS-3#PBF  
LT1997IDF-3#TRPBF  
LT1997HDF-3#TRPBF  
LT1997IMS-3#TRPBF  
LT1997HMS-3#TRPBF  
19973  
19973  
19973  
19973  
14-Lead (4mm × 4mm) Plastic DFN  
14-Lead (4mm × 4mm) Plastic DFN  
16-Lead Plastic MSOP  
–40°C to 85°C  
–40°C to 125°C  
–40°C to 85°C  
–40°C to 125°C  
16-Lead Plastic MSOP  
*The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.  
Parts ending with PBF are RoHS and WEEE compliant.  
For more information on lead free part marking, go to: http://www.linear.com/leadfree/  
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/.  
19973f  
2
For more information www.linear.com/LT1997-3  
LT1997-3  
elecTrical characTerisTics The l denotes the specifications which apply over the full operating  
temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H-grade parts, otherwise specifications are at  
TA = 25°C. Difference Amplifier Configuration, V+ = 15V, V= –15V, VCM = VOUT = VREF = VREF1 = VREF2 = 0V. VCMOP is the common  
mode voltage of the internal op amp.  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
TYP  
0.001  
0.001  
0.002  
MAX  
UNITS  
∆G  
Gain Error  
V
= 10V  
OUT  
G = 1  
G = 3  
G = 9  
0.006  
0.012  
%
%
l
l
0.015  
0.02  
%
%
0.03  
0.04  
%
%
l
l
∆G/∆T  
GNL  
Gain Drift vs Temperature (Note 6)  
Gain Nonlinearity  
V
V
= 10V  
= 10V  
0.2  
1
1
ppm/°C  
OUT  
2
3
ppm  
ppm  
OUT  
l
+
V
OS  
Op Amp Offset Voltage (Note 9)  
V < V  
< V – 1.75V  
20  
60  
200  
µV  
µV  
CMOP  
l
l
+
∆V /∆T Op Amp Offset Voltage Drift (Note 6)  
OS  
V < V  
< V – 1.75V  
0.5  
2
1.5  
µV/°C  
CMOP  
+
I
Op Amp Input Bias Current  
Op Amp Input Offset Current  
Input Impedance (Note 8)  
V + 0.25V < V  
< V – 1.75V  
–5  
–15  
5
15  
nA  
nA  
B
CMOP  
CMOP  
l
l
+
I
V + 0.25V < V  
< V – 1.75V  
–3  
–10  
0.5  
3
10  
nA  
nA  
OS  
R
Common Mode  
G = 1  
G = 3  
G = 9  
IN  
l
l
l
19  
12.6  
10.5  
22.5  
15  
12.5  
26  
17.4  
14.5  
kΩ  
kΩ  
kΩ  
Differential  
G = 1  
l
l
l
38  
12.6  
4.2  
45  
15  
5
52  
17.4  
5.8  
kΩ  
kΩ  
kΩ  
G = 3  
G = 9  
CMRR  
CMRR  
Common Mode Rejection Ratio,  
MS16 Package  
G = 1, V = –28V to +26.5V  
91  
87  
106  
dB  
dB  
CM  
l
l
l
l
l
l
l
l
l
G = 3, V = –15V to +17.6V  
90  
86  
99  
dB  
dB  
CM  
G = 9, V = –15V to +14.7V  
96  
94  
112  
101  
94  
dB  
dB  
CM  
Common Mode Rejection Ratio,  
DF14 Package  
G = 1, V = –28V to +26.5V  
91  
87  
dB  
dB  
CM  
G = 1, V = –90V to +90V, +INB = –INB = 0V,  
83  
80  
dB  
dB  
CM  
V = 25V  
S
G = 1, V = –120V to +120V, +INC = –INC = 0V,  
81  
77  
91  
dB  
dB  
CM  
V = 25V, T = –40°C to 125°C  
S
A
G = 1, V = –160V to +160V, +INC = –INC = 0V,  
81  
78  
91  
dB  
dB  
CM  
V = 25V, T = –40°C to 85°C  
S
A
G = 3, V = –15V to +17.6V  
90  
86  
98  
dB  
dB  
CM  
G = 9, V = –15V to +14.7V  
96  
94  
103  
dB  
dB  
CM  
l
l
l
l
V
Input Voltage Range (Note 7)  
+INA/–INA  
–30  
–160  
–15  
26.5  
160  
17.6  
14.7  
V
V
V
V
CM  
+INA/–INA, +INC/–INC Connected to Ground  
+INB/–INB  
+INC/–INC  
–15  
19973f  
3
For more information www.linear.com/LT1997-3  
LT1997-3  
elecTrical characTerisTics The l denotes the specifications which apply over the full operating  
temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H-grade parts, otherwise specifications are at  
TA = 25°C. Difference Amplifier Configuration, V+ = 15V, V= –15V, VCM = VOUT = VREF = VREF1 = VREF2 = 0V. VCMOP is the common  
mode voltage of the internal op amp.  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
∆R/R  
Reference Divider Matching Error  
∆R RREF1 RREF2  
Available in MS16 Package Only  
0.001  
0.006  
0.012  
%
%
l
l
=
R
REF1+RREF2  
R
2
PSRR  
Power Supply Rejection Ratio  
V = 1.65V to 25V, V = V  
= Mid-Supply  
114  
124  
dB  
S
CM  
OUT  
(Note 9)  
e
ni  
Input Referred Noise Voltage Density  
f = 1kHz  
G = 1  
50  
30  
22  
nV/√Hz  
nV/√Hz  
nV/√Hz  
G = 3  
G = 9  
Input Referred Noise Voltage  
f = 0.1Hz to 10Hz  
G = 1  
1.4  
1
0.8  
µV  
µV  
µV  
P-P  
P-P  
P-P  
G = 3  
G = 9  
l
l
V
V
Output Voltage Swing Low (Referred  
No Load  
100  
280  
150  
500  
mV  
mV  
OL  
to V )  
I
= 5mA  
SINK  
l
l
Output Voltage Swing High (Referred  
No Load  
SOURCE  
100  
530  
180  
900  
mV  
mV  
OH  
+
to V )  
I
= 5mA  
+
l
l
I
SC  
Short-Circuit Output Current  
50Ω to V  
50Ω to V  
10  
10  
28  
30  
mA  
mA  
l
SR  
Slew Rate  
∆V  
= 5V  
0.45  
0.75  
V/µs  
OUT  
BW  
Small Signal –3dB Bandwidth  
G = 1  
G = 3  
G = 9  
1100  
700  
300  
kHz  
kHz  
kHz  
t
Settling Time  
G = 1  
S
0.1%, ∆V  
= 10V  
OUT  
14.6  
95  
µs  
µs  
OUT  
0.01%, ∆V  
= 10V  
G = 3  
0.1%, ∆V  
= 10V  
OUT  
13.6  
29  
µs  
µs  
OUT  
0.01%, ∆V  
= 10V  
G = 9  
0.1%, ∆V  
= 10V  
OUT  
13.8  
29  
µs  
µs  
OUT  
0.01%, ∆V  
= 10V  
V
Supply Voltage  
Turn-On Time  
3
50  
50  
V
V
S
l
3.3  
t
16  
µs  
V
ON  
+
l
l
l
V
V
SHDN Input Logic Low (Referred to V )  
–2.5  
IL  
+
SHDN Input Logic High (Referred to V )  
–1.2  
V
IH  
I
I
SHDN Pin Current  
–10  
350  
–15  
µA  
SHDN  
S
+
+
Supply Current  
Active, V  
Active, V  
≥ V – 1.2V  
400  
600  
25  
µA  
µA  
µA  
µA  
SHDN  
SHDN  
Shutdown, V  
Shutdown, V  
l
l
≥ V – 1.2V  
+
+
≤ V – 2.5V  
≤ V – 2.5V  
20  
SHDN  
SHDN  
70  
19973f  
4
For more information www.linear.com/LT1997-3  
LT1997-3  
elecTrical characTerisTics  
The l denotes the specifications which apply over the full operating  
temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H-grade parts, otherwise specifications are at  
TA = 25°C. Difference Amplifier Configuration, V+ = 5V, V= 0V, VCM = VOUT = VREF = VREF1 = VREF2 = Mid-Supply. VCMOP is the  
common mode voltage of the internal op amp.  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
TYP  
0.001  
0.001  
0.002  
MAX  
UNITS  
∆G  
Gain Error  
V
OUT  
= 1V to 4V  
G = 1  
G = 3  
G = 9  
0.006  
0.012  
%
%
l
l
0.015  
0.02  
%
%
0.03  
0.04  
%
%
l
l
∆G/∆T  
GNL  
Gain Drift vs Temperature (Note 6)  
Gain Nonlinearity  
V
V
= 1V to 4V  
= 1V to 4V  
0.2  
1
1
ppm/°C  
ppm  
OUT  
OUT  
+
V
Op Amp Offset Voltage (Note 9)  
V < V  
< V – 1.75V  
20  
60  
200  
µV  
µV  
OS  
CMOP  
l
l
+
∆V /∆T Op Amp Offset Voltage Drift (Note 6)  
OS  
V < V  
< V – 1.75V  
0.5  
2
1.5  
µV/°C  
CMOP  
+
I
Op Amp Input Bias Current  
Op Amp Input Offset Current  
Input Impedance (Note 8)  
V + 0.25V < V  
< V – 1.75V  
–5  
–15  
5
15  
nA  
nA  
B
CMOP  
l
l
+
I
OS  
V + 0.25V < V  
< V – 1.75V  
–3  
–10  
0.5  
3
10  
nA  
nA  
CMOP  
R
Common Mode  
G = 1  
G = 3  
G = 9  
IN  
l
l
l
19  
12.6  
10.5  
22.5  
15  
12.5  
26  
17.4  
14.5  
kΩ  
kΩ  
kΩ  
l
l
l
l
Differential  
G = 1  
38  
12.6  
4.2  
45  
15  
5
52  
17.4  
5.8  
kΩ  
kΩ  
kΩ  
G = 3  
G = 9  
CMRR  
CMRR  
Common Mode Rejection Ratio,  
MS16 Package  
G = 1, V = –2.5V to +4.0V  
90  
88  
100  
103  
108  
96  
dB  
dB  
CM  
l
l
l
l
l
l
l
G = 3, V = 0V to +3.5V  
90  
87  
dB  
dB  
CM  
G = 9, V = 0V to +3.3V  
96  
94  
dB  
dB  
CM  
Common Mode Rejection Ratio,  
DF14 Package  
G = 1, V = –2.5V to +4.0V  
90  
88  
dB  
dB  
CM  
G = 3, V = 0V to +3.5V  
90  
87  
101  
107  
0.001  
dB  
dB  
CM  
G = 9, V = 0V to +3.3V  
96  
94  
dB  
dB  
CM  
∆R/R  
Reference Divider Matching Error  
Available in MS16 Package Only  
0.006  
0.012  
%
%
∆R RREF1 RREF2  
=
R
REF1+RREF2  
R
2
l
PSRR  
Power Supply Rejection Ratio  
V = 1.65V to 25V, V = V  
= Mid-Supply  
114  
124  
dB  
S
CM  
OUT  
(Note 9)  
e
Input Referred Noise Voltage Density  
f = 1kHz  
G = 1  
ni  
50  
30  
22  
nV/√Hz  
nV/√Hz  
nV/√Hz  
G = 3  
G = 9  
19973f  
5
For more information www.linear.com/LT1997-3  
LT1997-3  
elecTrical characTerisTics The l denotes the specifications which apply over the full operating  
temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H-grade parts, otherwise specifications are at  
TA = 25°C. Difference Amplifier Configuration, V+ = 5V, V= 0V, VCM = VOUT = VREF = VREF1 = VREF2 = Mid-Supply. VCMOP is the  
common mode voltage of the internal op amp.  
SYMBOL PARAMETER  
Input Referred Noise Voltage  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
f = 0.1Hz to 10Hz  
G = 1  
G = 3  
G = 9  
1.4  
1
0.8  
µV  
µV  
µV  
P-P  
P-P  
P-P  
l
l
V
V
Output Voltage Swing Low (Referred to V ) No Load  
= 5mA  
15  
280  
50  
500  
mV  
mV  
OL  
I
SINK  
+
l
l
Output Voltage Swing High (Referred to V ) No Load  
15  
450  
50  
800  
mV  
mV  
OH  
I
= 5mA  
SOURCE  
+
l
l
I
SC  
Short-Circuit Output Current  
50Ω to V  
50Ω to V  
10  
10  
27  
25  
mA  
mA  
l
SR  
Slew Rate  
∆V  
OUT  
= 3V  
0.45  
0.75  
V/µs  
BW  
Small signal –3dB Bandwidth  
G = 1  
G = 3  
G = 9  
1100  
700  
300  
kHz  
kHz  
kHz  
t
Settling Time  
G = 1  
S
0.1%, ∆V  
= 2V  
OUT  
5.4  
91  
µs  
µs  
OUT  
0.01%, ∆V  
= 2V  
G = 3  
0.1%, ∆V  
= 2V  
OUT  
6
21  
µs  
µs  
OUT  
0.01%, ∆V  
= 2V  
G = 9  
0.1%, ∆V  
= 2V  
OUT  
7
36  
µs  
µs  
OUT  
0.01%, ∆V  
= 2V  
V
Supply Voltage  
Turn-On Time  
3
50  
50  
V
V
S
l
3.3  
t
22  
µs  
V
ON  
+
l
l
l
V
V
SHDN Input Logic Low (Referred to V )  
–2.5  
IL  
+
SHDN Input Logic High (Referred to V )  
–1.2  
V
IH  
I
I
SHDN Pin Current  
–10  
330  
–15  
µA  
SHDN  
S
+
+
Supply Current  
Active, V  
≥ V – 1.2V  
370  
525  
20  
µA  
µA  
µA  
µA  
SHDN  
SHDN  
l
l
Active, V  
≥ V –1.2V  
+
+
Shutdown, V  
Shutdown, V  
≤ V – 2.5V  
≤ V – 2.5V  
15  
SHDN  
SHDN  
40  
Note 1: Stresses beyond those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. Exposure to any Absolute  
Maximum Rating condition for extended periods may affect device  
reliability and lifetime.  
Note 5: The LT1997I-3 is guaranteed to meet specified performance  
from –40°C to 85°C. The LT1997H-3 is guaranteed to meet specified  
performance from –40°C to 125°C.  
Note 6: This parameter is not 100% tested.  
Note 2: See “Common Mode Voltage Range” and “High Common Mode  
Voltage Difference Amplifiers” in the Applications Information section of  
this data sheet for other considerations when taking +INA/–INA pins to  
160V and +INB/–INB/+INC/–INC pins to +80V.  
Note 3: A heat sink may be required to keep the junction temperature  
below absolute maximum. This depends on the power supply, input  
voltages and the output current.  
Note 7: The Input Voltage Range numbers specified in the table guarantee  
that the internal op amp operates in its normal operating region. The Input  
voltage range can be significantly higher if the internal op amp operates in  
its Over-The-Top® operating region. See “Common Mode Voltage Range”  
in the Applications Information section to determine the valid input voltage  
range under various operating conditions.  
Note 8: Input impedance is tested by a combination of direct  
Note 4: The LT1997I-3 is guaranteed functional over the operating  
temperature range of –40°C to 85°C. The LT1997H-3 is guaranteed  
functional over the operating temperature range of –40°C to 125°C.  
measurements and correlation to the CMRR and gain error tests.  
Note 9: Offset voltage, offset voltage drift and PSRR are defined as  
referred to the internal op amp. You can calculate output offset as follows.  
In the case of balanced source resistance, V  
= (V NOISEGAIN)  
OS,OUT  
OS  
+ (I 22.5k) + (I 22.5k (1– R /R )) where R and R are the total  
OS  
B
P
N
P
N
resistance at the op amp positive and negative terminal, respectively.  
19973f  
6
For more information www.linear.com/LT1997-3  
LT1997-3  
TA = 25°C, VS = ±15V, Difference Amplifier  
Typical perForMance characTerisTics  
configuration, unless otherwise noted.  
Typical Distribution of CMRR  
(G = 1)  
Typical Distribution of CMRR  
(G = 1)  
Typical Distribution of CMRR  
(G = 3)  
1200  
1000  
800  
600  
400  
200  
0
500  
450  
400  
350  
300  
250  
200  
150  
100  
50  
1400  
1200  
1000  
800  
600  
400  
200  
0
22.  
k
22.  
k
k
V
= ±1 V  
V
= ±1 V  
V = 25V  
S
S
S
2.5k  
7.  
7.  
k
k
22.  
22.  
k
k
+
+
V
CM  
= –1 V TO +17.6V  
V
CM  
= –28V TO +26. V  
V
CM  
= –160V TO +160V  
+INC = –INC = 0V  
22.5k  
22.5k  
22.5k  
+
44 0 UNITS  
FROM 3 RUNS  
462 UNITS  
FROM 3 RUNS  
2709 UNITS  
FROM 2 RUNS  
22.  
k
22.  
22.5k  
2.5k  
0
–30  
–20  
–10  
0
10  
20  
30  
–100 –75 –50 –25  
0
25 50 75 100  
–30  
–20  
–10  
0
10  
20  
30  
CMRR (µV/V = ppm)  
CMRR (µV/V = ppm)  
CMRR (µV/V = ppm)  
19973 G01  
19973 G02  
19973 G03  
Typical Distribution of CMRR  
(G = 9)  
Typical Distribution of Gain Error  
(G = 1)  
Typical Distribution of Gain Error  
(G = 3)  
1200  
1000  
800  
600  
400  
200  
0
800  
700  
600  
500  
400  
300  
200  
100  
0
800  
700  
600  
500  
400  
300  
200  
100  
0
22.  
k
22.  
k
V
= ±1 V  
V
OUT  
= ±1 V  
= ±1 V  
22.  
k
V = ±1 V  
S
OUT  
S
S
2.  
2.  
k
k
22.  
22.  
k
k
V
CM  
= –1 V TO +14.7V  
V
V
= ±1 V  
+
+
7.  
7.  
k
k
+
44 0 UNITS  
FROM 3 RUNS  
4864 UNITS  
FROM 3 RUNS  
22.  
k
22.  
k
22.  
k
4864 UNITS  
FROM 3 RUNS  
–15  
–10  
–5  
0
5
10  
15  
–50 –40 –30 –20 –10  
0
10 20 30 40 50  
–150 –100 –50  
0
50  
100  
150  
CMRR (µV/V=ppm)  
GAIN ERROR (ppm)  
GAIN ERROR (ppm)  
19973 G04  
19973 G05  
19973 G06  
Typical Distribution of Gain Error  
(G = 9)  
Typical Distribution of Gain  
Nonlinearity  
CMRR vs Frequency  
140  
120  
100  
80  
800  
700  
600  
500  
400  
300  
200  
100  
0
1200  
1000  
800  
600  
400  
200  
0
22.  
k
22.  
k
V
OUT  
= ±1 V  
= ±1 V  
V
= ±1 V  
= ±1 V  
G = 1  
S
S
2.  
2.  
k
k
V
V
OUT  
22.  
22.  
k
k
+
+
4864 UNITS  
FROM 3 RUNS  
22.  
k
22.  
k
60  
40  
G = 1  
G = 3  
G = 9  
20  
4864 UNITS  
FROM 3 RUNS  
0
10  
100  
1k  
10k 100k  
1M  
10M  
–300 –200 –100  
0
100  
200  
300  
0
0.2 0.4 0.6 0.8  
1
1.2 1.4 1.6 1.8 2.0  
FREQUENCY (Hz)  
GAIN ERROR (ppm)  
GAIN NONLINEARITY (ppm)  
19973 G09  
19973 G07  
19973 G08  
19973f  
7
For more information www.linear.com/LT1997-3  
LT1997-3  
T = 25°C, V = ±15V, Difference Amplifier  
Typical perForMance characTerisTics  
A
S
configuration, unless otherwise noted.  
Typical Distribution of  
Op Amp PSRR  
Typical Gain Error for RL = 10kΩ  
G = 1 (Curves Offset for Clarity)  
Typical Distribution of Op Amp  
Offset Voltage  
1200  
1000  
800  
600  
400  
200  
0
800  
700  
600  
500  
400  
300  
200  
100  
0
4864 UNITS  
V
= ±±1.65 ꢀt ±ꢁ65  
S
6360 UNITS  
FROM 3 RUNS  
FROM 3 RUNS  
V
V
V
V
= ±±18  
= ±±15  
= ±±12  
= ±±10  
S
S
S
S
–20 –16 –12 –8 –4  
0
4
8
12 16 20  
–1.5  
–1  
–0.5  
0
0.5  
1
1.5  
–60  
–40  
–20  
0
20  
40  
60  
OUTPUT VOLTAGE (V)  
PSRR (µV/V)  
OFFSET VOLTAGE (µV)  
19973 G12  
19973 G11  
19973 G10  
Typical Gain Error for Low Supply  
Voltages, G = 1  
(Curves Offset for Clarity)  
Typical Gain Error for RL = 5kΩ  
G = 1 (Curves Offset for Clarity)  
Typical Gain Error for RL = 2kΩ  
G = 1 (Curves Offset for Clarity)  
V
S
V
S
V
S
V
S
= ±±18  
= ±±15  
= ±±12  
= ±±10  
V
S
V
S
V
S
V
S
= ±±18  
= ±±15  
= ±±12  
= ±±10  
V
= ±±5, R =10kΩ  
S
L
V
= ±±5, R =2kΩ  
S
L
V
= ±±5, R =1kΩ  
L
S
V
= ±±2.5, R =1kΩ  
L
S
–6 –5 –4 –3 –2 –1  
0
1
2
3
4
5
6
–20 –16 –12 –8 –4  
0
4
8
12 16 20  
–20 –16 –12 –8 –4  
0
4
8
12 16 20  
OUTPUT VOLTAGE (V)  
OUTPUT VOLTAGE (V)  
OUTPUT VOLTAGE (V)  
19973 G15  
19973 G13  
19973 G14  
Typical Gain Error for RL = 10kΩ  
G = 3 (Curves Offset for Clarity)  
Typical Gain Error for RL = 5kΩ  
G = 3 (Curves Offset for Clarity)  
Typical Gain Error for RL = 2kΩ  
G = 3 (Curves Offset for Clarity)  
V
V
V
V
= ±±18  
= ±±15  
= ±±12  
= ±±10  
V
V
V
V
= ±±18  
= ±±15  
= ±±12  
= ±±10  
V
V
V
V
= ±±18  
= ±±15  
= ±±12  
= ±±10  
S
S
S
S
S
S
S
S
S
S
S
S
–20 –16 –12 –8 –4  
0
4
8
12 16 20  
–20 –16 –12 –8 –4  
0
4
8
12 16 20  
–20 –16 –12 –8 –4  
0
4
8
12 16 20  
OUTPUT VOLTAGE (V)  
OUTPUT VOLTAGE (V)  
OUTPUT VOLTAGE (V)  
19973 G16  
19973 G17  
19973 G18  
19973f  
8
For more information www.linear.com/LT1997-3  
LT1997-3  
T = 25°C, V = ±15V, Difference Amplifier  
Typical perForMance characTerisTics  
A
S
configuration, unless otherwise noted.  
Typical Gain Error for RL = 10kΩ  
G = 9 (Curves Offset for Clarity)  
Typical Gain Error for RL = 5kΩ  
G = 9 (Curves Offset for Clarity)  
Typical Gain Error for RL = 2kΩ  
G = 9 (Curves Offset for Clarity)  
V
= ±±18  
V
= ±±18  
S
V
V
V
= ±±18  
= ±±15  
= ±±12  
S
S
S
S
V
= ±±15  
S
V
S
V
S
V
S
= ±±15  
= ±±12  
= ±±10  
V
= ±±12  
S
V
= ±±10  
S
V
= ±±10  
S
–20 –16 –12 –8 –4  
0
4
8
12 16 20  
–20 –16 –12 –8 –4  
0
4
8
12 16 20  
–20 –16 –12 –8 –4  
0
4
8
12 16 20  
OUTPUT VOLTAGE (V)  
OUTPUT VOLTAGE (V)  
OUTPUT VOLTAGE (V)  
19973 G20  
19973 G21  
19973 G19  
Gain Error vs Temperature  
CMRR vs Temperature  
50  
40  
30  
20  
10  
0
100  
80  
10  
8
V
= ±±15  
S
10 UNITS,  
G=1  
60  
6
40  
4
20  
2
0
0
–10  
–20  
–30  
–40  
–50  
–20  
–40  
–60  
–80  
–100  
–2  
–4  
–6  
–8  
–10  
V
= ±±15  
OUT  
= 10kΩ  
S
V
= ±±10  
R
L
10 UNITS  
G=1  
–75 –50 –25  
0
25 50 75 100 125 150 175  
–75 –50 –25  
0
25 50 75 100 125 150 175  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
19973 G23  
19973 G22  
Maximum Power Dissipation vs  
Temperature  
Output Voltage vs Load Current  
20  
15  
5
4
3
2
1
0
DF14(12) θ = 45°C/W  
JA  
10  
5
130°C  
85°C  
25°C  
–45°C  
0
–5  
–10  
–15  
–20  
MS16(12) θ = 130°C/W  
JA  
0
5
10  
15  
20  
25  
30  
–60 –40 –20  
0
20 40 60 80 100 120 140 160  
OUTPUT CURRENT (mA)  
AMBIENT TEMPERATURE (°C)  
19973 G24  
19973 G25  
19973f  
9
For more information www.linear.com/LT1997-3  
LT1997-3  
T = 25°C, V = ±15V, Difference Amplifier  
Typical perForMance characTerisTics  
A
S
configuration, unless otherwise noted.  
Frequency Response vs  
Capacitive Load (G = 1)  
Frequency Response vs  
Capacitive Load (G = 3)  
Gain vs Frequency  
30  
25  
20  
15  
10  
5
30  
20  
30  
20  
10  
0
G = 9  
10  
G = 3  
0
–10  
–20  
–30  
–10  
–20  
–30  
G = 1  
0pF  
0pF  
0
220pF  
220pF  
560pF  
680pF  
560pF  
–5  
680pF  
1000pF  
–10  
0.001  
0.01  
0.1  
1
2
0.001  
0.01  
0.1  
1
10  
0.001  
0.01  
0.1  
1
10  
FREQUENCY (MHz)  
FREQUENCY (MHz)  
FREQUENCY (MHz)  
19973 G26  
19973 G27  
19973 G28  
Frequency Response vs  
Capacitive Load (G = 9)  
Op Amp Noise Density vs  
Frequency  
0.1Hz to 10Hz Noise  
40  
35  
30  
25  
20  
15  
10  
5
30  
20  
MEASURED IN G = 13  
REFERRED TO OP AMP INPUTS  
MEASURED IN G = 13  
REFERRED TO OP AMP INPUTS  
10  
0
–10  
–20  
–30  
0pF  
220pF  
560pF  
680pF  
1000pF  
0
1
10  
100  
1k  
10k  
100k  
0.001  
0.01  
0.1  
1
10  
FREQUENCY (Hz)  
TIME (10s/DIV)  
FREQUENCY (MHz)  
19973 G30  
19973 G31  
19973 G29  
Negative PSRR vs Frequency  
Positive PSRR vs Frequency  
140  
120  
100  
80  
160  
140  
120  
100  
80  
60  
60  
40  
40  
G = 1  
G = 3  
G = 9  
G = 1  
G = 3  
G = 9  
20  
20  
0
0
10  
100  
1k  
10k  
100k  
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
19973 G33  
19973 G32  
19973f  
10  
For more information www.linear.com/LT1997-3  
LT1997-3  
T = 25°C, V = ±15V, Difference Amplifier  
Typical perForMance characTerisTics  
A
S
configuration, unless otherwise noted.  
Slew Rate vs Temperature  
Large-Signal Step Response  
Small-Signal Step Response  
140  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
G = 1  
G = 1  
R
L
= 10kΩ  
120  
100  
80  
R
L
= 10kΩ  
= 560pF  
R =10kΩ  
L
L
C
C
= 680pF  
L
RISING EDGE  
60  
40  
20  
0
–20  
–40  
–60  
–80  
–100  
FALLING EDGE  
C
= 560pF  
L
C
= 0pF  
L
0
5
10 15 20 25 30 35 40  
–75 –50 –25  
0
25 50 75 100 125 150 175  
TIME (µs)  
TIME (10µs/DIV)  
TEMPERATURE (°C)  
19973 G36  
19973 G35  
19973 G34  
Small-Signal Step Response  
Small-Signal Step Response  
140  
120  
100  
80  
140  
120  
100  
80  
G = 3  
G = 9  
R =10kΩ  
L
R =10kΩ  
L
C
L
= 1000pF  
C = 1000pF  
L
C
= 680pF  
C
= 680pF  
L
L
60  
60  
40  
40  
20  
20  
0
0
–20  
–40  
–60  
–80  
–100  
–20  
–40  
–60  
–80  
–100  
C
= 560pF  
C
= 560pF  
L
L
C
L
= 0pF  
C = 0pF  
L
0
5
10 15 20 25 30 35 40  
0
5
10 15 20 25 30 35 40  
TIME (µs)  
TIME (µs)  
19973 G37  
19973 G38  
Settling Time  
Settling Time  
6
5
6
6
5
6
OUTPUT VOLTAGE  
G = 1  
G = 1  
5
5
4
4
4
4
3
3
3
3
ERROR VOLTAGE  
2
2
2
2
ERROR VOLTAGE  
1
1
1
1
0
0
0
0
–1  
–2  
–3  
–4  
–5  
–6  
–1  
–2  
–3  
–4  
–5  
–6  
–1  
–2  
–3  
–4  
–5  
–6  
–1  
–2  
–3  
–4  
–5  
–6  
OUTPUT VOLTAGE  
TIME (20µs/DIV)  
TIME (20µs/DIV)  
19973 G39  
19973 G40  
19973f  
11  
For more information www.linear.com/LT1997-3  
LT1997-3  
T = 25°C, V = ±15V, Difference Amplifier  
Typical perForMance characTerisTics  
A
S
configuration, unless otherwise noted.  
Op Amp Offset Voltage vs  
Quiescent Current vs Temperature  
Thermal Shutdown vs Hysteresis  
Temperature  
550  
500  
450  
400  
350  
300  
250  
200  
600  
200  
150  
100  
50  
10 UNITS  
20 UNITS  
500  
400  
300  
200  
100  
0
0
–50  
–100  
–150  
–200  
–75 –50 –25  
0
25 50 75 100 125 150 175  
145  
150  
155  
160  
165  
170  
–60 –40 –20  
0
20 40 60 80 100 120 140  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
19973 G42  
19973 G43  
19973 G41  
Quiescent Current vs Supply  
Voltage  
Shutdown Quiescent Current vs  
Supply Voltage  
600  
500  
400  
300  
200  
100  
0
50  
40  
30  
20  
10  
0
PARAMETRIC SWEEP IN ~25°C  
INCREMENTS  
150°C  
125°C  
85°C  
25°C  
–40°C  
–55°C  
T
= 150°C  
A
V
= 0V  
SHDN  
T
= –55°C  
A
0
10  
20  
30  
40  
50  
0
10  
20  
30  
40  
50  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
19973 G44  
19973 G45  
Quiescent Current vs SHDN  
Voltage  
Minimum Supply Voltage  
550  
500  
450  
400  
350  
300  
250  
200  
150  
100  
50  
20  
15  
10  
5
V
= ±±15  
S
150°C  
125°C  
85°C  
25°C  
–40°C  
–55°C  
T
= 125°C  
A
0
–5  
T
= 25°C  
A
–10  
–15  
–20  
T
= –45°C  
A
0
0
5
10  
15  
0
1
2
3
4
5
SHDN VOLTAGE (V)  
TOTAL SUPPLY VOLTAGE (V)  
19973 G46  
19973 G47  
19973f  
12  
For more information www.linear.com/LT1997-3  
LT1997-3  
pin FuncTions (DFN/MSOP)  
V (Pin 9/Pin 11): Positive Supply Pin.  
+
–INC (Pin 10/Pin 12): Inverting Gain-of-9 input Pin.  
Connects a 2.5k internal resistor to the internal op amp’s  
inverting input.  
V (EXPOSED PAD Pin 15/Pin 8): Negative Supply Pin.  
OUT (Pin 8/Pin 9): Output Pin.  
REF (Pin 7/NA): Reference Input Pin. Sets the output level  
when the difference between the inputs is zero.  
+INA (Pin 1/Pin 1): Noninverting Gain-of-1 Input Pin.  
Connects a 22.5k internal resistor to the internal op amp’s  
noninverting input.  
REF1 (NA/Pin 6): Reference 1 Input Pin. With REF2, sets  
the output level when the difference between the inputs  
is zero.  
+INB (Pin 3/Pin 3): Noninverting Gain-of-3 Input Pin.  
Connects a 7.5k internal resistor to the internal op amp’s  
noninverting input.  
REF2 (NA/Pin 7): Reference 2 Input. Pin. With REF1, sets  
the output level when the difference between the inputs  
is zero.  
+INC (Pin 5/Pin 5): Noninverting Gain-of-9 Input Pin.  
Connects a 2.5k internal resistor to the internal op amp’s  
noninverting input.  
SHDN (Pin 6/Pin 10): Shutdown Pin. Amplifier is active  
+
when this pin is tied to V or left floating. Pulling the pin  
+
–INA (Pin 14/Pin 16): Inverting Gain-of-1 input Pin. Con-  
nects a 22.5k internal resistor to the internal op amp’s  
inverting input.  
>2.5V below V causes the amplifier to enter a low power  
state.  
–INB (Pin 12/Pin 14): Inverting Gain-of-3 input Pin.  
Connects a 7.5k internal resistor to the internal op amp’s  
inverting input.  
block DiagraM  
MSOP  
DFN  
+
+
–INA –INB –INC  
V
–INA –INB –INC  
V
2.5k  
2.5k  
22.5k  
22.5k  
7.5k  
7.5k  
22.5k  
22.5k  
OUT  
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
45k  
REF1  
22.5k  
REF  
45k  
+
+
REF2  
V
V
10µA  
10µA  
+INA +INB +INC  
SHDN  
V
+INA +INB +INC  
SHDN  
V
19973 BD01  
19973 BD02  
19973f  
13  
For more information www.linear.com/LT1997-3  
LT1997-3  
applicaTions inForMaTion  
+
V
V +  
S
–IN  
op amp (V  
is between V and V – 1.75V, the op  
CMOP)  
amp operates in its normal region; b) If V  
is between  
+
CMOP  
–INA –INB –INC  
2.5k  
V
LT1997-3  
+
V – 1.75V and V + 76V, the op amp continues to oper-  
ate, but in its Over-The-Top (OTT) region with degraded  
performance (see Over-The-Top Operation section of this  
data sheet for more detail).  
7.5k  
22.5k  
22.5k  
22.5k  
+
OUT  
REF  
V
V
The LT1997-3 will not operate correctly if the common-  
OUT  
REF  
mode voltage at the inputs of the internal op amp (V  
CMOP)  
7.5k  
22.5k  
is below V , but the part will not be damaged as long as  
2.5k  
V
CMOP  
is greater than V – 25V and the junction tempera-  
ture of the LT1997-3 does not exceed 150ºC.  
+INA +INB +INC SHDN  
V
TheallowedvoltagerangeonLT1997-3’sinputpinsareas  
follows: The voltages at +INA and –INA input pins should  
never be higher than V + 160V or lower than V – 160V  
under any circumstances; The voltages at +INB, –INB,  
+INC and –INC input pins should not go below V – 0.3V  
19973 F01  
V
+
V –  
S
IN  
Figure 1. Difference Amplifier with Dual-Supply  
Operation (Gain = 1)  
or above V + 80V.  
Introduction  
The common-mode voltage at the inputs of the internal op  
TheLT1997-3isaprecision, highvoltage generalpurpose  
opampcombinedwithahighly-matchedresistornetwork.  
Itcaneasilybeconfiguredintomanydifferentclassicalgain  
circuits without adding external components. The several  
pages of simple circuits in this data sheet demonstrate  
how easy the LT1997-3 is to use. It can be configured into  
a difference amplifier (Figure 1), as well as into inverting  
(Figure 7) and noninverting (Figure 3) single ended ampli-  
fiers. The LT1997-3 provides the resistors and op amp  
togetherinasmallpackageinordertosaveboardspaceand  
reduce complexity. Highly accurate measurement circuits  
can be easily constructed with the LT1997-3. The circuits  
can be tailored to specific measurement applications.  
amp (V  
is determined by the voltages on pins +INA,  
CMOP)  
+INB, +INC and REF (see the “Calculating Input Voltage  
Range” section). This condition is true provided that the  
internal op amp’s output is not clipped and feedback  
maintainstheinternalopamp’sinputsatthesamevoltage.  
In addition to the limits mentioned above, the common  
mode input voltage of the amplifier should be chosen so  
that the input resistors do not dissipate too much power.  
The power dissipated in a 22.5k resistor must be less than  
1.5W. It must be less than 0.5W for the 7.5k resistor and  
less than 0.165W for the 2.5k resistor. For most applica-  
tions, the pin voltage limitations will be reached before  
the resistor power limitation is reached.  
Common Mode Voltage Range  
Calculating Input Voltage Range  
The common mode voltage range of the LT1997-3 is set  
by the voltage range allowed on the LT1997-3’s input pins  
and by the input voltage range of the internal op amp.  
Figure 2 shows the LT1997-3 in the generalized case of a  
differenceamplifier,withtheinputsshortedforthecommon  
mode calculation. The values of R and R are dictated  
by how the positive inputs and REF pin are connected.  
F
G
The internal op amp of LT1997-3 has 2 operating regions:  
a)ifthecommon-modevoltageattheinputsoftheinternal  
19973f  
14  
For more information www.linear.com/LT1997-3  
 
LT1997-3  
applicaTions inForMaTion  
By superposition we can write:  
They are limited by the output swing of the amplifier (and  
obviously by the allowed voltage range for the input pins).  
RF  
RF +RG  
RG  
RF +RG  
VCMOP = V  
+ VREF •  
EXT  
Over-The-Top Operation  
When the input common mode voltage of the internal op  
Or, solving for V  
:
EXT  
amp (V  
) in the LT1997-3 is biased near or above the  
CMOP  
+
RG  
RF  
RG  
RF  
V supply, the op amp is operating in the Over-The-Top  
(OTT) region. The op amp continues to operate with an  
input common mode voltage of up to 76V above V (re-  
gardless of the positive power supply voltage V ), but its  
V
= V  
1+  
– V  
REF  
EXT  
CMOP  
+
But valid V  
voltages are limited to V + – 1.75V  
S
CMOP  
(V – + 76V OTT) on the high side and V – on the low  
performanceisdegraded.Theopamp’sinputbiascurrents  
change from under 2nA to 14µA. The op amp’s input  
offset current rises to 50nA, which adds 1.1mV to the  
output offset voltage.  
S
S
side, so:  
RG  
RF  
RG  
RF  
MAX V = V + –1.75 1+  
– V  
(
)
EXT  
REF  
S
In addition, when operating in the Over-The-Top region,  
the differential input impedance decreases from 1MΩ in  
normaloperationtoapproximately3.7kΩinOver-The-Top  
operation. This resistance appears across the summing  
nodes of the internal op amp and boosts noise and offset  
while decreasing speed. Noise and offset will increase by  
between75%and450%dependingonthegainsetting.The  
bandwidth will be reduced by 2X to 5.5X. For more detail  
onOver-The-Topoperation,consulttheLT6015datasheet.  
and:  
RG  
RF  
RG  
RF  
MIN V = V – 1+  
– V  
REF  
(
)
EXT  
S
R
F
V +  
S
R
R
G
G
+
V
V
OUT  
EXT  
V
CMOP  
The Classical Noninverting Amplifier: High Input Z  
V –  
S
R
F
AcommonopampconfigurationenabledbytheLT1997-3  
is the noninverting amplifier. Figure 3 shows the textbook  
representation of the circuit on the top. The LT1997-3 is  
shown onthe bottomconfigured in aprecisiongainof 5.5.  
One of the benefits of the noninverting op amp configu-  
ration is that the input impedance is extremely high. The  
LT1997-3 maintains this benefit. A large number of gains  
can be achieved with the LT1997-3 in the noninverting  
configuration. The complete list of such Hi-Z input non-  
inverting gain configuration is shown in Table 1. Many of  
these are also represented in Figure 4 in schematic form.  
Note that the positive inputs are connected such that the  
source impedance seen by the positive and negative in-  
puts of the internal op amp are equal. This minimizes the  
offset voltage due to the input bias current of the op amp.  
The noise gain and amplifier’s gain in the noninverting  
configuration are identical.  
V
REF  
19973 F02  
Figure 2. Calculating the Common Mode Input Voltage Range  
Exceeding the MAX V  
limit will cause the amplifier to  
EXT  
transition into the Over-The-Top region. The maximum  
input voltage for the Over-The-Top region is:  
RG  
RF  
RG  
RF  
MAX V  
= V – +76 1+  
– V  
(
)
REF  
EXTOTT  
S
Keep in mind that the above MAX and MIN values for input  
voltagerangeshouldnotexceedtheallowedvoltagerange  
specified earlier for LT1997-3’s input pins.  
The negative inputs are not limited by the internal op amp  
commonmoderange(V  
becausetheydonotaffectit.  
CMOP)  
19973f  
15  
For more information www.linear.com/LT1997-3  
 
LT1997-3  
applicaTions inForMaTion  
Table 1. Configuring the Negative Pins for Noninverting Gains.  
The Positive Inputs Are Driven as Shown in the Examples in  
Figure 4  
R
F
R
G
+
R //R  
G
F
V
OUT  
Negative Input Connections  
V
IN  
V
= GAIN • V  
OUT  
IN  
G
Gain  
1
-INA  
-INB  
-INC  
GAIN = 1 + R /R  
F
V
V
V
NONINVERTING OP AMP CONFIGURATION  
OUT  
OUT  
OUT  
1.077  
1.1  
1.25  
1.273  
1.3  
1.4  
2
GND  
GND  
GND  
V
V
V
OUT  
OUT  
OPEN  
V +  
S
OUT  
V
OPEN  
+
OUT  
–INA –INB –INC  
V
LT1997-3  
V
OUT  
GND  
GND  
GND  
OPEN  
GND  
V
V
V
OUT  
OUT  
OUT  
2.5k  
OPEN  
GND  
GND  
7.5k  
22.5k  
22.5k  
OPEN  
OPEN  
GND  
GND  
GND  
OPEN  
OPEN  
GND  
GND  
GND  
GND  
GND  
GND  
OUT  
REF  
V
22.5k  
OUT  
2.5  
2.8  
3.25  
3.5  
4
V
OUT  
V
OUT  
+
7.5k  
2.5k  
22.5k  
V
V
V
OUT  
OUT  
OUT  
OPEN  
GND  
+INA +INB +INC SHDN  
V
OPEN  
GND  
GND  
GND  
V –  
S
5
19973 F03  
V
IN  
5.5  
7
V
OUT  
V
OUT  
OPEN  
GND  
NONINVERTING OP AMP CONFIGURATION  
IMPLEMENTED WITH THE LT1997-3, R = 11.25k, R = 2.5k, GAIN = 5.5  
F
G
GAIN IS ACHIEVED BY GROUNDING, FLOATING OR FEEDING BACK  
THE AVAILABLE RESISTORS TO ARRIVE AT THE DESIRED R AND R  
10  
OPEN  
GND  
OPEN  
OPEN  
GND  
F
G
11  
Figure 3. The LT1997-3 Configured as a Noninverting Op Amp  
13  
OPEN  
GND  
14  
GND  
19973f  
16  
For more information www.linear.com/LT1997-3  
 
LT1997-3  
applicaTions inForMaTion  
V +  
S
V +  
S
V +  
S
+
+
+
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
+
+
+
V
OUT  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
REF  
22.5k  
REF  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V –  
V –  
V –  
S
S
S
V
IN  
V
IN  
V
IN  
V
IN  
V
IN  
V
IN  
V
IN  
GAIN = 1  
GAIN = 2  
GAIN = 3.25  
V +  
V +  
S
V +  
S
S
+
+
+
V
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
+
+
+
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
REF  
22.5k  
REF  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V –  
V –  
V –  
S
S
S
V
IN  
GAIN = 4  
GAIN = 5  
GAIN = 5.5  
V +  
S
V +  
S
V +  
S
+
+
+
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
+
+
+
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
REF  
22.5k  
REF  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V –  
V –  
V –  
S
S
S
V
IN  
GAIN = 7  
GAIN = 10  
GAIN = 11  
V +  
S
V +  
S
+
+
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
22.5k  
+
+
V
OUT  
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
REF  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V –  
S
V –  
S
19973 F04  
V
IN  
V
IN  
GAIN = 13  
GAIN = 14  
Figure 4. Some Implementations of Classical Noninverting Gains Using the LT1997-3. High Input Z is Maintained  
19973f  
17  
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LT1997-3  
applicaTions inForMaTion  
Attenuation  
Table 2. Configuring the Positive Pins for Various Attenuations  
Positive Input Connections  
The positive input resistors can be configured to attenuate  
the input signal (Figure 5). This allows a trade-off to be  
made between input range and precision. Attenuating the  
inputcanpreventtheopampfromenteringthelessprecise  
Over-the-Top operating region at the cost of decreasing  
Gain  
0.0714  
0.0769  
0.0909  
0.1  
+INA  
+INB  
GND  
+INC  
GND  
GND  
GND  
GND  
GND  
GND  
OPEN  
GND  
GND  
OPEN  
GND  
GND  
GND  
OPEN  
OPEN  
OPEN  
REF  
GND  
V
IN  
V
IN  
V
IN  
V
IN  
V
IN  
V
IN  
V
IN  
GND  
OPEN  
GND  
OPEN  
OPEN  
GND  
OPEN  
theoutputsignal.Thefourpositiveresistors(R  
+INC REF  
attenuators. These are shown in Table 2.  
,R  
,
+INA +INB  
0.143  
0.182  
0.2  
V
IN  
V
IN  
R
, R ) can be arranged to make many precise input  
OPEN  
GND  
GND  
GND  
LT1997-3  
0.214  
0.231  
0.25  
GND  
V
IN  
V
IN  
+
V
IN  
22.5k  
OPEN  
GND  
R
A
R
G
7.5k  
22.5k  
REF  
V
IN  
V
IN  
V
IN  
V
IN  
V
IN  
V
IN  
GND  
OPEN  
GND  
V
CMOP  
2.5k  
+INA +INB +INC  
0.286  
0.308  
0.357  
0.4  
V
IN  
V
IN  
V
IN  
V
= A • V  
IN  
CMOP  
A = R /(R + R )  
G
A
G
OPEN  
19973 F05  
V
IN  
V
IN  
V
IN  
UP TO +160V  
GND  
ATTENUATOR  
ATTENUATING THE POSITIVE INPUT  
BY GROUNDING AN UNUSED INPUT  
0.5  
OPEN  
GND  
GND  
GND  
GND  
GND  
GND  
OPEN  
R
= 22.5k, R = 2.5k, A = 0.1  
A
G
0.6  
GND  
GND  
V
IN  
0.643  
0.692  
0.714  
0.75  
GND  
GND  
GND  
V
IN  
V
IN  
V
IN  
Figure 5. The Input of the LT1997-3 Can Be Attenuated to Increase  
the Usable Input Range. The +INA Input Can Be Taken to ±160V.  
OPEN  
V
IN  
The attenuations and noninverting gains are set indepen-  
dently and can be combined to produce even more gain  
options.346uniquegainsbetween0.0714and14(Figure6)  
can be realized. When using the positive side resistors as  
an attenuator, the benefit of canceling input bias current  
effects on offset voltage reduces. The impedance seen by  
the two op amp input nodes will not be identical.  
OPEN  
V
IN  
OPEN  
0.769  
0.786  
0.8  
V
IN  
V
IN  
V
IN  
GND  
GND  
V
IN  
V
IN  
V
IN  
V
IN  
OPEN  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
0.818  
0.857  
0.9  
GND  
GND  
OPEN  
V
IN  
V
IN  
V
IN  
V
IN  
V
IN  
V
IN  
V
IN  
V
IN  
OPEN  
OPEN  
OPEN  
100  
0.909  
0.923  
0.929  
1
V
IN  
OPEN  
V
IN  
V
IN  
V
IN  
10  
V
IN  
V
IN  
V
IN  
1
0.1  
0.01  
50  
100  
200  
150  
COUNT  
300  
0
250  
350  
19973 F06  
Figure 6. Many Unique Gains Can Be Achieved by  
Combining Attenuation with Noninverting Gain  
19973f  
18  
For more information www.linear.com/LT1997-3  
 
 
LT1997-3  
applicaTions inForMaTion  
The Inverting Configuration  
Table 3. Configuring the Negative Pins for Inverting Gains  
Negative Input Connections  
-INB -INC  
The inverting amplifier, shown in Figure 7, is another clas-  
sical op amp configuration. The circuit is actually identical  
to the noninverting amplifier of Figure 3, except that V  
and GND have been swapped. The list of available gains  
is shown in Table 3, and some of the circuits are shown  
in Figure 8. Noise gain is 1+|Gain|, as is the usual case for  
inverting amplifiers. For the best DC precision, match the  
source impedances seen by the op amp inputs.  
Gain  
–0.077  
–0.1  
–0.25  
–0.273  
–0.3  
–0.4  
–1  
-INA  
V
IN  
V
IN  
V
IN  
V
V
OUT  
V
OUT  
OUT  
IN  
OPEN  
V
OPEN  
OUT  
V
OUT  
V
V
OUT  
V
OUT  
V
OUT  
IN  
IN  
IN  
OPEN  
V
V
IN  
V
IN  
V
OPEN  
OPEN  
OPEN  
R
F
–1.5  
–1.8  
–2.25  
–2.5  
–3  
V
OUT  
V
OUT  
V
IN  
R
G
+
V
OUT  
V
OUT  
V
OUT  
V
IN  
V
IN  
V
IN  
V
IN  
R //R  
G
F
V
OUT  
OPEN  
V
= GAIN • V  
IN  
OUT  
V
IN  
GAIN = –R /R  
F
G
INVERTING OP AMP CONFIGURATION  
OPEN  
V
OPEN  
OPEN  
IN  
IN  
–4  
V
IN  
V
V
IN  
V +  
S
–4.5  
–6  
V
OUT  
V
OUT  
OPEN  
V
IN  
V
V
+
IN  
IN  
–INA –INB –INC  
V
LT1997-3  
–9  
OPEN  
OPEN  
OPEN  
V
IN  
V
IN  
V
IN  
V
IN  
2.5k  
–10  
V
IN  
7.5k  
22.5k  
22.5k  
–12  
OPEN  
V
V
IN  
IN  
–13  
V
IN  
+
OUT  
REF  
V
22.5k  
OUT  
7.5k  
2.5k  
22.5k  
+INA +INB +INC SHDN  
V
V –  
S
19973 F07  
INVERTING OP AMP CONFIGURATION  
IMPLEMENTED WITH THE LT1997-3, R = 11.25k, R = 2.5k, GAIN = –4.5  
F
G
GAIN IS ACHIEVED BY GROUNDING, FLOATING OR FEEDING BACK  
THE AVAILABLE RESISTORS TO ARRIVE AT THE DESIRED R AND R  
F
G
Figure 7. The LT1997-3 Configured as an Inverting Op Amp  
19973f  
19  
For more information www.linear.com/LT1997-3  
 
LT1997-3  
applicaTions inForMaTion  
V
V +  
V
IN  
V
IN  
V
IN  
V +  
S
V
IN  
V
IN  
V
IN  
V +  
S
IN  
S
+
+
+
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
+
+
+
V
OUT  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
REF  
22.5k  
REF  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V –  
S
V –  
S
V –  
S
GAIN = –0.25  
V +  
GAIN = –1  
GAIN = –2.25  
V +  
V
IN  
V +  
S
S
S
+
+
+
V
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
+
+
+
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
REF  
22.5k  
REF  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V –  
S
V –  
S
V –  
S
GAIN = –3  
GAIN = –4  
GAIN = –4.5  
V +  
V
IN  
V +  
S
V +  
S
S
+
+
+
V
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
+
+
+
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
REF  
22.5k  
REF  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V –  
S
V –  
S
V –  
S
GAIN = –6  
GAIN = –9  
GAIN = –10  
V
IN  
V +  
S
V
IN  
V +  
S
+
+
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
22.5k  
+
+
V
OUT  
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
REF  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V –  
S
V –  
S
19973 F08  
GAIN = –12  
GAIN = –13  
Figure 8. Inverting Gains with Input Impedance that Varies from 1.73kΩ (Gain = –13) to 22.5kΩ (Gain = –1)  
19973f  
20  
For more information www.linear.com/LT1997-3  
 
LT1997-3  
applicaTions inForMaTion  
Difference Amplifiers  
The Common Mode Voltage at the inputs of the internal  
CMOP  
+INC and REF.  
op amp (V  
) is set by the voltages at pins +INA, +INB,  
The LT1997-3 is ideally suited to be used as a difference  
amplifier. Figure 9 shows the basic 4-resistor difference  
amplifierandtheLT1997-3.Adifferencegainof3isshown,  
but can be altered by additional dashed connections. By  
connecting the 22.5k resistors in parallel, the gain is re-  
duced by a factor of 2. Of course there are many possible  
gains. Table 4 shows the difference gains and how they  
are achieved. Note that, as for inverting amplifiers, the  
noise gain is equal to the signal gain plus 1.  
Table 4. Difference Amplifier Gains  
Gain  
0.077  
0.1  
0.25  
0.273  
0.3  
0.4  
1
V
V
OUT  
–INB, –INC  
–INC  
GND (REF)  
+INB, +INC  
+INC  
+IN  
–IN  
+INA  
+INA  
–INA  
–INA  
+INA  
–INA  
–INB  
+INB  
+INB  
–INB  
–INA, –INC  
–INC  
+INA, +INC  
+INC  
+INB  
–INB  
R
F
+INA, +INB  
+INA  
–INA, –INB  
–INA  
–INC  
+INC  
R
R
G
G
+
V
V
+
IN  
IN  
V
OUT  
1.5  
1.8  
2.25  
2.5  
3
+INB  
–INB  
–INA  
–INA, –INB  
–INB  
+INA  
+INA, +INB  
+INB  
V
= GAIN • (V – V  
GAIN = R /R  
)
–IN  
+
OUT  
IN  
R
F
+INC  
–INC  
F
G
+INC  
–INC  
DIFFERENCE AMPLIFIER CONFIGURATION  
+INA, +INC  
+INB  
–INA, –INC  
–INB  
–INB  
+INB  
V +  
S
V
4
+INA, +INB  
+INC  
–INA, –INB  
–INC  
–IN  
4.5  
6
–INA  
–INA  
+INA  
+INA  
+
–INA –INB –INC  
V
LT1997-3  
+INB, +INC  
+INC  
–INB, –INC  
–INC  
2.5k  
9
7.5k  
22.5k  
22.5k  
22.5k  
10  
+INA, +INC  
+INB, +INC  
–INA, –INC  
–INB, –INC  
12  
+
OUT  
REF  
V
22.5k  
OUT  
13  
+INA, +INB,  
+INC  
–INA, –INB,  
–INC  
7.5k  
2.5k  
+INA +INB +INC SHDN  
V
V
+
IN  
V –  
S
19973 F09  
DIFFERENCE AMPLIFIER CONFIGURATION  
IMPLEMENTED WITH THE LT1997-3, R = 22.5k, R = 7.5k, GAIN = 3  
F
G
ADDING THE DASHED CONNECTIONS CONNECT THE  
TWO 22.5k RESISTORS IN PARALLEL, SO R IS REDUCED TO 11.25k.  
F
THE GAIN BECOMES 11.25k/7.5k = 1.5  
Figure 9. The LT1997-3 Configured as a Difference  
Amplifier. Gain Is Set by Connecting the Correct  
Resistors or Combinations of Resistors. Gain of 3 Is  
Shown, with Dashed Lines Modifying It to a Gain of 1.5  
19973f  
21  
For more information www.linear.com/LT1997-3  
 
LT1997-3  
applicaTions inForMaTion  
V
V +  
S
V
V +  
S
V
V +  
S
–IN  
–IN  
–IN  
+
+
+
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
+
+
+
V
OUT  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
REF  
22.5k  
REF  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V
V
V –  
V
V
V –  
V
V
V –  
S
+IN  
–IN  
S
+IN  
–IN  
S
+IN  
–IN  
GAIN = 0.25  
V +  
GAIN = 1  
GAIN = 2.25  
V +  
S
V +  
S
S
+
+
+
V
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
+
+
+
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
REF  
22.5k  
REF  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V
V
V –  
V
V
V –  
V
V
V –  
S
+IN  
–IN  
S
+IN  
–IN  
S
+IN  
–IN  
GAIN = 3  
GAIN = 4  
GAIN = 4.5  
V +  
S
V +  
S
V +  
S
+
+
+
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
+
+
+
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
REF  
22.5k  
REF  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V
V –  
S
V
V –  
S
V
V –  
S
+IN  
+IN  
+IN  
GAIN = 6  
GAIN = 9  
GAIN = 10  
V
V +  
S
V
V +  
S
–IN  
–IN  
+
+
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
22.5k  
+
+
V
OUT  
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
REF  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V
V –  
S
V
V –  
S
+IN  
+IN  
19973 F10  
GAIN = 12  
GAIN = 13  
Figure 10. Many Difference Amplifier Gains Can Be Achieved by Strapping Pins  
19973f  
22  
For more information www.linear.com/LT1997-3  
LT1997-3  
applicaTions inForMaTion  
Difference Amplifier: Additional Integer Gains Using  
Cross-Coupling  
R
R
F
R
R
G
G
+
V
V
+
IN  
IN  
V
OUT  
Figure 11 shows the basic difference amplifier as well as  
the LT1997-3 with cross-coupled inputs. The additional  
dashed connections reduce the differential gain from  
3 to 2. Using this method, additional integer gains are  
achievable, as shown in Table 5, so that all integer gains  
from 1 to 13 are achieved with the LT1997-3. Note that  
V
= GAIN • (V – V  
GAIN = R /R  
)
–IN  
+
F
OUT  
IN  
F
G
DIFFERENCE AMPLIFIER CONFIGURATION  
V
–IN  
V +  
S
the equations can be written by inspection from the V  
+
+IN  
–INA –INB –INC  
V
LT1997-3  
connections, and that the V connections are simply the  
–IN  
2.5k  
opposite(swap+forandfor+). Noisegain, bandwidth,  
and input impedance specifications for the various cases  
are also shown. Schematics of the difference amplifiers  
using cross-coupling are shown in Figure 12. Additional  
non-integergainsproducedwithcross-couplingarelisted  
in Table 6.  
7.5k  
22.5k  
22.5k  
22.5k  
+
OUT  
REF  
V
22.5k  
OUT  
7.5k  
2.5k  
+INA +INB +INC SHDN  
V
19973 F12  
V –  
S
V
+
IN  
DIFFERENCE AMPLIFIER CONFIGURATION  
IMPLEMENTED WITH THE LT1997-3, R = 22.5k, R = 7.5k, GAIN = 3  
F
G
GAIN CAN BE ADJUSTED BY CROSS-COUPLING THE INPUTS.  
MAKING THE DASHED CONNECTIONS REDUCES THE GAIN FROM 3 TO 2  
Figure 11. Cross-Coupling the Inputs of the LT1997-3 Allows  
Additional Integer Gains to Be Constructed. The LT1997-3  
Provides All Integer Gains from 1 to 13  
Table 5. Connections Using Cross-Coupling. Note that Equations Can Be Written by Inspection of the V+IN Column  
Differential  
Input Impedance  
(kΩ)  
Common Mode  
–3dB BW  
(kHz)  
Input Impedance  
(kΩ)  
Gain  
2
V
V
Equation  
3 – 1  
Noise Gain  
+IN  
–IN  
+INB, –INA  
–INB, +INA  
5
540  
222  
222  
277  
222  
11.25  
3.5  
14.1  
12.1  
12.1  
12.4  
12.1  
5
+INC, –INB, –INA –INC, +INB, +INA  
+INC, +INA, –INB –INC, –INA, +INB  
9 – 3 – 1  
9 + 1 – 3  
9 – 1  
14  
14  
11  
14  
7
3.5  
8
+INC, –INA  
–INC, +INA  
4.5  
11  
+INC, +INB, –INA –INC, –INB, +INA  
9 + 3 – 1  
3.5  
Table 6. Additional Non-Integer Gains that Can Be Achieved Using Cross-Coupling  
Gain  
0.143  
0.2  
V
V
OUT  
GND (REF)  
–INB, +INC  
+INC  
+IN  
–IN  
+INA  
–INA, +INB  
+INB  
–INA  
+INA, –INB  
–INB  
+INB, –INC  
–INC  
0.333  
+INA, –INC  
–INA, +INC  
19973f  
23  
For more information www.linear.com/LT1997-3  
 
LT1997-3  
applicaTions inForMaTion  
V
V
V
–IN  
V +  
S
V +  
S
–IN  
–IN  
V +  
S
+
+
+
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
+
+
+
OUT  
REF  
V
V
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
OUT  
OUT  
22.5k  
REF  
22.5k  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V –  
S
V –  
S
V –  
S
V
V
V
+IN  
+IN  
+IN  
GAIN = 2  
GAIN = 5  
GAIN = 7  
V
V
V +  
S
V +  
S
–IN  
–IN  
+
+
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
2.5k  
7.5k  
7.5k  
7.5k  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
22.5k  
+
+
OUT  
REF  
V
V
OUT  
22.5k  
7.5k  
2.5k  
OUT  
22.5k  
REF  
22.5k  
2.5k  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
19973 F13  
V –  
S
V –  
S
V
V
+IN  
+IN  
GAIN = 8  
GAIN = 11  
Figure 12. Integer Gain Difference Amplifiers Using Cross-Coupling  
High Common Mode Voltage Difference Amplifiers  
factor and is set by the voltage at the op amp’s positive  
input (V ). By superposition we can write:  
CMOP  
The input range of a difference amplifier can be extended  
by configuring the amplifier to divide the input common  
modevoltage.Figure13showsthebasiccircuitonthetop.  
The effective input voltage range of the circuit is extended  
RF RT  
RG +RF RT  
RG RT  
RF +RG RT  
VCMOP = V  
+ VREF •  
EXT  
RF RG  
RT +RF RG  
by the fact that resistors R attenuate the common mode  
+VTERM  
T
(CM) voltage seen by the internal op amp inputs (V  
).  
CMOP  
For the LT1997-3, the most useful resistors for R are the  
G
Solving for V  
:
EXT  
+INAandINA22.5kΩresistors,becausetheydonothave  
diode clamps to the V – supply and therefore can be taken  
RG RT  
RF +RG RT  
S
V
CMOP VREF  
beyond both rails. +INB, –INB, +INC and –INC pins can be  
RG  
RF RT  
taken 80V above V –, but not below V –. As before, the  
V
= 1+  
S
S
EXT  
RF RG  
RT +RF RG  
input common mode of the internal op amp is the limiting  
–V  
TERM  
19973f  
24  
For more information www.linear.com/LT1997-3  
 
LT1997-3  
applicaTions inForMaTion  
R
Given the values of the resistors in the LT1997-3, this  
equation has been simplified and evaluated, and the  
resulting equations are provided in Table 7. Substituting  
F
V +  
S
R
R
G
G
+
V
V
IN  
V + – 1.75V and V – for V will give the valid upper  
S
S
LIM  
V
OUT  
V
CMOP  
+
IN  
)
and lower common mode extremes respectively for the  
V
= GAIN • (V – V  
)
–IN  
(= V  
+
OUT  
IN  
EXT  
normal operating region of the op amp. Substituting  
GAIN = R /R  
F
G
R
R
T
T
V –  
S
R
F
V – + 76V and V – for V will give the valid upper  
LIM  
S
S
V
V
REF  
TERM  
and lower common mode extremes respectively for the  
Over-The-Top region of the op amp (see Over-The-Top  
Operation section of this data sheet for more detail).  
Following are sample calculations for the case shown  
in Figure 13. Note that +INC and –INC are terminated so  
row 3 of Table 7 provides the equation:  
HIGH COMMON MODE VOLTAGE DIFFERENCE AMPLIFIER  
INPUT COMMON MODE VOLTAGE TO OP AMP IS  
ATTENUATED BY RESISTORS R CONNECTED TO V  
T
TERM  
V
–IN  
V + = 12V  
S
+
–INA –INB –INC  
V
LT1997-3  
2.5k  
MAX V = 11V + –1.75 – V – 9 VTERM  
(
)
EXT  
REF  
S
7.5k  
22.5k  
22.5k  
= 11(10.25V)2.5 – 9 12  
+
OUT  
REF  
= 2.25V  
V
= 12V  
V
V
22.5k  
TERM  
OUT  
REF  
7.5k  
2.5k  
22.5k  
and:  
MIN V = 11V – – V – 9 VTERM  
= 2.5V  
(
)
EXT  
REF  
S
+INA +INB +INC SHDN  
V
19973 F14  
= 11(0)2.5 – 9 12  
V
+
= –110.5V  
IN  
HIGH NEGATIVE COMMON MODE VOLTAGE DIFFERENCE AMPLIFIER  
IMPLEMENTED WITH THE LT1997-3, R = 22.5k, R = 22.5k, R = 2.5k, GAIN = 1  
If the calculated V voltage exceeds the 160V absolute  
F
G
T
EXT  
V
= V + = 12V, V  
S
= 2.5V, V – = 0V  
REF S  
TERM  
maximum rating of the +INA, –INA pins, 160V or –160V  
would become the de facto common mode limit. Several  
moreexamplesofhighCMcircuitsareshowninFigure14,  
Figure 15 and Figure 16 for various supplies.  
Figure 13. Extending Common Mode Input Range  
Table 7. Input Common Mode Voltage Ranges for the LT1997-3 when Configured as a High Common Mode Voltage Difference Amplifier  
Max, Min V (Substitute V + – 1.75 (Normal Region)  
EXT  
S
Gain  
V
+IN  
V
R
T
Noise Gain  
or V – + 76 (OTT), and V – for V  
)
–IN  
S
S
LIM  
1
1
1
1
+INA  
+INA  
+INA  
+INA  
–INA  
–INA  
–INA  
–INA  
2
5
2 V – V  
LIM REF  
R
R
, R  
5 V – V – 3 V  
LIM REF TERM  
+INB –INB  
, R  
+INC –INC  
11  
14  
11 V – V – 9 V  
LIM REF TERM  
R
||R  
, R  
||R  
14 V – V – 12 V  
LIM REF TERM  
+INB +INC –INB –INC  
19973f  
25  
For more information www.linear.com/LT1997-3  
 
LT1997-3  
applicaTions inForMaTion  
5V  
5V  
5V  
V
–IN  
V
V
–IN  
–IN  
+
+
+
V
–INA –INB –INC  
V
–INA –INB –INC  
V
–INA –INB –INC  
LT1997-3  
LT1997-3  
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
+
+
+
OUT  
REF  
OUT  
REF  
V
V
V
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
OUT  
OUT  
OUT  
22.5k  
REF  
2.5V  
5V  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V
V
V
V
V
V
+IN  
+IN  
+IN  
V
= 4V TO –2.5V  
V
= 6.5V TO 0V  
V
= 1.5V TO –5V  
CM  
CM  
CM  
2.5V  
5V  
5V  
5V  
5V  
+
–IN  
–IN  
–IN  
+
+
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
+
+
+
OUT  
REF  
V
V
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
OUT  
OUT  
22.5k  
REF  
22.5k  
REF  
2.5V  
2.5V  
2.5V  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V
V
V
V
V
V
+IN  
+IN  
+IN  
2.5V  
5V  
V
= 6.25V TO –10V  
V
= 13.75V TO –2.5V  
V
= –1.25V TO –17.5V  
CM  
CM  
CM  
2.5V  
5V  
5V  
5V  
5V  
–IN  
–IN  
–IN  
+
+
+
V
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
+
+
+
OUT  
REF  
OUT  
REF  
V
V
V
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
OUT  
OUT  
OUT  
22.5k  
REF  
2.5V  
2.5V  
2.5V  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V
V
V
V
V
V
+IN  
+IN  
+IN  
2.5V  
5V  
V
= 10.75V TO –25V  
V
= 33.25V TO –2.5V  
V
= –11.75V TO –47.5V  
CM  
CM  
CM  
2.5V  
5V  
5V  
5V  
5V  
–IN  
–IN  
–IN  
+
+
+
V
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
+
+
+
OUT  
REF  
OUT  
REF  
OUT  
REF  
V
V
V
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
OUT  
OUT  
OUT  
2.5V  
2.5V  
2.5V  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
19973 F15  
V
+IN  
V
+IN  
V
+IN  
2.5V  
5V  
V
= 13V TO –32.5V  
V
= 43V TO –2.5V  
V
= –17V TO –62.5V  
CM  
CM  
CM  
Figure 14. Common Mode Ranges for Various LT1997-3 Configurations on VS = 5V, 0V, with Gain = 1.  
These Ranges Guarantee that the Internal Op Amp Operates in Its Normal Operating Region  
19973f  
26  
For more information www.linear.com/LT1997-3  
 
LT1997-3  
applicaTions inForMaTion  
15V  
15V  
+
15V  
+
V
–IN  
V
–IN  
V
–IN  
+
–INA –INB –INC  
V
–INA –INB –INC  
V
–INA –INB –INC  
V
LT1997-3  
LT1997-3  
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
+
+
+
OUT  
REF  
OUT  
REF  
V
V
V
V
V
V
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
22.5k  
REF  
–15V  
15V  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V
V
V
V
V
V
+IN  
+IN  
+IN  
–IN  
–15V  
= 41.5V TO –15V  
–15V  
= 26.5V TO –30V  
–15V  
= 11.5V TO –45V  
V
V
CM  
V
CM  
CM  
15V  
+
–15V  
15V  
+
15V  
15V  
+
–IN  
–IN  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
+
+
+
OUT  
REF  
OUT  
REF  
OUT  
REF  
V
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
OUT  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
–15V  
V
+INA +INB +INC SHDN  
V
V
V
V
V
V
V
+IN  
+IN  
+IN  
–IN  
–15V  
= 66.25V TO –75V  
–15V  
= 111.25V TO –30V  
15V  
–15V  
= 21.25V TO –120V  
V
V
V
CM  
CM  
CM  
15V  
15V  
+
–15V  
15V  
+
15V  
+
–IN  
–IN  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
+
+
+
OUT  
REF  
OUT  
REF  
OUT  
REF  
V
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
OUT  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
–15V  
= 160V TO –30V  
V
+INA +INB +INC SHDN  
15V  
= 10.75V TO –160V  
V
V
V
V
V
V
V
+IN  
+IN  
+IN  
–IN  
–15V  
= 145.75V TO –160V  
–15V  
–15V  
V
V
V
CM  
CM  
CM  
–15V  
15V  
15V  
+
15V  
15V  
+
–IN  
–IN  
+
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
22.5k  
22.5k  
OUT  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
+
+
+
OUT  
REF  
OUT  
REF  
V
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
OUT  
22.5k  
REF  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
19973 F16  
V
+IN  
V
+IN  
V
+IN  
–15V  
= 160V TO –160V  
–15V  
= 160V TO –30V  
–15V  
= 5.5V TO –160V  
–15V  
15V  
V
V
V
CM  
CM  
CM  
Figure 15. Common Mode Ranges for Various LT1997-3 Configurations on VS = ±15V, with Gain = 1.  
These Ranges Guarantee that the Internal Op Amp Operates in Its Normal Operating Region  
19973f  
27  
For more information www.linear.com/LT1997-3  
 
LT1997-3  
applicaTions inForMaTion  
25V  
25V  
+
25V  
+
V
–IN  
V
–IN  
V
–IN  
+
–INA –INB –INC  
V
–INA –INB –INC  
V
–INA –INB –INC  
V
LT1997-3  
LT1997-3  
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
+
+
+
OUT  
REF  
OUT  
REF  
OUT  
REF  
V
V
V
V
V
V
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
22.5k  
22.5k  
22.5k  
–25V  
25V  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN V  
V
V
V
V
V
V
+IN  
+IN  
+IN  
–25V  
= 71.5V TO –25V  
–25V  
= 46.5V TO –50V  
–25V  
V
V
V = 21.5V TO –75V  
CM  
CM  
CM  
25V  
+
–25V  
25V  
+
25V  
25V  
+
–IN  
–IN  
–IN  
–INA –INB –INC  
V
–INA –INB –INC  
V
–INA –INB –INC  
V
LT1997-3  
LT1997-3  
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
+
+
+
OUT  
REF  
OUT  
REF  
OUT  
REF  
V
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
OUT  
22.5k  
22.5k  
22.5k  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN V  
V
V
V
V
V
V
+IN  
+IN  
+IN  
–25V  
–25V  
–25V  
25V  
–25V  
V
= 116.25V TO –125V  
V
= 160V TO –50V  
V
= 41.25V TO –160V  
CM  
CM  
CM  
25V  
+
–25V  
25V  
+
25V  
25V  
+
–IN  
–IN  
–IN  
–INA –INB –INC  
V
–INA –INB –INC  
V
–INA –INB –INC  
V
LT1997-3  
LT1997-3  
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
+
+
+
OUT  
REF  
OUT  
REF  
OUT  
REF  
V
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
OUT  
22.5k  
22.5k  
22.5k  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
V
V
V
V
V
V
+IN  
+IN  
+IN  
–25V  
–25V –25V  
25V –25V  
V
= 160V TO –160V  
V
= 160V TO –50V  
V
= 30.75V TO –160V  
CM  
CM  
CM  
–25V  
25V  
25V  
+
25V  
+
25V  
+
–IN  
–IN  
–IN  
–INA –INB –INC  
V
–INA –INB –INC  
V
–INA –INB –INC  
V
LT1997-3  
LT1997-3  
LT1997-3  
2.5k  
7.5k  
2.5k  
7.5k  
2.5k  
7.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
22.5k  
+
+
+
OUT  
REF  
OUT  
REF  
OUT  
REF  
V
V
OUT  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
22.5k  
7.5k  
2.5k  
OUT  
22.5k  
22.5k  
22.5k  
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN  
V
+INA +INB +INC SHDN V  
19973 F17  
V
+IN  
V
+IN  
V
+IN  
–25V  
–25V  
–25V  
–25V  
25V  
V
= 160V TO –160V  
V
= 160V TO –50V  
V = 25.5V TO –160V  
CM  
CM  
CM  
Figure 16. Common Mode Ranges for Various LT1997-3 Configurations on VS = ±±2V, with Gain = 1.  
These Ranges Guarantee that the Internal Op Amp Operates in Its Normal Operating Region  
19973f  
28  
For more information www.linear.com/LT1997-3  
LT1997-3  
applicaTions inForMaTion  
Reference Resistors  
V +  
S
V
–IN  
In the preceding discussions, the Reference resistor is  
shown as a single 22.5k resistor. This is true in the DFN  
package. In the MSOP package the reference resistor is  
split into two 45k resistors (Figure 17). Tying the REF1  
and REF2 pins to the same voltage produces the same  
+
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
7.5k  
22.5k  
22.5k  
22.5k  
+
OUT  
reference voltage as tying the V pin in the DFN package  
V
OUT  
REF  
to that voltage. Connecting REF1 and REF2 to different  
45k  
45k  
REF1  
REF2  
V
V
REF1  
REF2  
voltages produces an effective reference voltage that is  
2.5k  
the average of V  
and V . This is especially useful  
REF2  
REF1  
when the desired reference voltage is half way between  
thesupplies. TyingREF1toV +andREF2toV –produces  
+INA +INB +INC SHDN  
V
S
S
V
V
V –  
S
thedesiredmid-supplyvoltagewithoutthehelpofanother  
+
IN  
LT1997-3 MSOP  
external reference voltage (Figure 17). The ratio of R  
REF1  
V +  
S
to R  
is very precise:  
–IN  
REF2  
+
–INA –INB –INC  
V
LT1997-3  
∆R  
R
RREF1 RREF2  
=
< 60ppm  
2.5k  
RREF1+RREF2  
7.5k  
7.5k  
22.5k  
2
22.5k  
22.5k  
+
OUT  
REF  
V
OUT  
22.5k  
V
REF  
2.5k  
+INA +INB +INC SHDN  
V
V
V –  
S
+
IN  
19973 F11  
LT1997-3 DFN  
Figure 17. The LT1997-3 Reference Resistors: Split Resistors in  
the MSOP Package Above, Single Resistor in the DFN Package  
Below  
19973f  
29  
For more information www.linear.com/LT1997-3  
 
LT1997-3  
applicaTions inForMaTion  
Shutdown  
Power Dissipation Considerations  
The LT1997-3 has a shutdown pin (SHDN). Under normal  
Because ofthe ability ofthe LT1997-3 to operate onpower  
supplies up to 25V, to withstand very high input volt-  
ages and to drive heavy loads, there is a need to ensure  
the die junction temperature does not exceed 150°C. The  
+
operation this pin should be tied to V or allowed to float.  
+
Tying this pin 2.5V or more below V will cause the part  
to enter a low power state. The supply current is reduced  
to less than 25µA and the op amp output becomes high  
impedance. The voltages at the input pins can be still be  
present even in shutdown mode.  
LT1997-3 is housed in DF14 (θ = 45°C/W, θ = 3°C/W)  
JA  
JC  
and MS16 (θ = 130°C/W) packages.  
JA  
In general, the die junction temperature (T ) can be es-  
J
timated from the ambient temperature (T ), the device’s  
A
Supply Voltage  
power dissipation (P ) and the thermal resistance of the  
D
ThepositivesupplypinoftheLT1997-3shouldbebypassed  
withasmallcapacitor(typically0.1µF)asclosetothesupply  
pins as possible. When driving heavy loads, an additional  
4.7µF electrolytic capacitor should be added. When using  
device and board (θ ).  
JA  
T = T + P θ  
JA  
J
A
D
The thermal resistance from the junction to the ambient  
split supplies, the same is true for the V supply pin.  
environment (θ ) is the sum of the thermal resistance  
JA  
fromthejunctiontotheexposedpad(θ )andthethermal  
JC  
Output  
resistance from the exposed pad to the ambient environ-  
ment (θ ). The θ value depends on how much PCB  
CA  
CA  
The output of the LT1997-3 can typically swing to within  
100mVofeitherrailwithnoloadandiscapableofsourcing  
andsinkingapproximately25mAat25°C.TheLT1997-3is  
internallycompensatedtodriveatleast1nFofcapacitance  
under any output loading conditions. For larger capacitive  
loads, a 0.22µF capacitor in series with a 150Ω resistor  
between the output and ground will compensate the  
amplifier to drive capacitive loads greater than 1nF. Ad-  
ditionally, the LT1997-3 has more gain and phase margin  
as its gain is increased.  
metal is connected to the exposed pad in the board. The  
more PCB metal that is used, the lower θ and θ will be.  
CA  
JA  
Powerisdissipatedbytheamplifier’squiescentcurrent,by  
the output current driving a resistive load, and by the input  
current driving the LT1997-3’s internal resistor network.  
P = V + – V – I +P +P  
RESD  
(
)
(
)
D
S
S
S
OD  
For a given supply voltage, the worst-case output power  
dissipationP  
occurswiththeoutputvoltageathalf  
OD(MAX)  
of either supply voltage. P  
is given by:  
OD(MAX)  
Distortion  
2
The LT1997-3 features excellent distortion performance  
when the internal op amp is operating in the normal op-  
erating region. Operating the LT1997-3 with the internal  
op amp in the over the top region will increase distortion  
due to the lower loop gain of the op amp. Operating the  
LT1997-3 with input common mode voltages that go from  
the normal to Over-The-Top operation will significantly  
degrade the LT1997-3’s linearity as the op amp must  
transition between two different input stages. Driving  
resistiveloadssignificantlysmallerthanthe22.5kinternal  
feedback resistor will also degrade the amplifier’s linearity  
performance.  
V 2  
(
)
S
POD(MAX)  
=
RLOAD  
The power dissipated in the internal resistors (P  
)
RESD  
depends on the manner the input resistors have been  
configured as well as the input voltage, the output voltage  
and the voltage on the REF pin. The following equations  
and Figure 18 show the different components of P  
RESD  
corresponding to the different groups of the LT1997-3’s  
internalresistors,assumingthattheLT1997-3isusedwith  
a dual supply configuration with +INC, –INC, and REF pins  
19973f  
30  
For more information www.linear.com/LT1997-3  
LT1997-3  
applicaTions inForMaTion  
at ground (refer to Figure 13 for resistor terminologies  
used in equations below).  
Example: For an LT1997-3 in a DFN package mounted on  
a PC board with a thermal resistance of 45°C/W, operating  
on 25V supplies and driving a 2.5kΩ load to 12.5V with  
2
V
(
)
+IN  
V
= 160V and +INC = –INC = REF = 0V, the total power  
+IN  
P
=
=
=
=
RESDA  
RG +RF RT  
dissipation is given by:  
12.52 1602  
2.5k 24.75k  
2
R R  
P = 50 0.6mA +  
+
(
)
(
)
F
T
D
V–IN V+IN •  
R +RF RT  
G
P
RESDB  
2
2
2
RG  
160  
11  
22.5k  
160  
11  
160  
11  
147.5 –  
– 12.5  
+
+
+
2
R R  
(
)
2.5k  
22.5k  
F
T
V
+IN  
R +RF RT  
G
= 2W  
P
RESDC  
RT  
Assuming a thermal resistance of 45°C/W, the die tem-  
perature will experience an 90°C rise above ambient.  
This implies that the maximum ambient temperature the  
LT1997-3 should operate under the above conditions is:  
2
R R  
(
)
F
T
V
VOUT  
+IN  
RG +RF RT  
P
RESDD  
RF  
T = 150°C – 90°C = 60°C  
A
It is recommended that the exposed pad of the DFN pack-  
agehaveasmuchPCBmetalconnectedtoitasreasonably  
available. The more PCB metal connected to the exposed  
pad, the lower the thermal resistance. Connecting a large  
amount of PCB metal to the exposed pad can reduce the  
P
= P  
+ P  
+ P  
+ P  
RESDC RESDD  
RESD  
RESDA  
RESDB  
In general, P  
lower output and REF pin voltages.  
increases with higher input voltage and  
RESD  
V +  
S
= 25V  
V
= 160V – V  
= 147.5V  
–IN  
OUT  
θ
to even less than 45°C/W. Use multiple vias from the  
+
JA  
–INA –INB –INC  
V
LT1997-3  
exposedpadtotheV plane.Theexposedpadiselectrically  
P
P
RESDD  
RESDC  
connected to the V pin. In addition, a heat sink may be  
2.5k  
22.5k  
necessaryifoperatingnearmaximumjunctiontemperature.  
7.5k  
P
The MSOP package has no exposed pad and a higher  
22.5k  
22.5k  
RESDB  
+
thermal resistance (θ = 130°C/W). It should not be used  
JA  
P
OUT  
V
=
RESDA  
OUT  
12.5V  
in applications which have a high ambient temperature,  
require driving a heavy load, or require an extreme input  
voltage.  
7.5k  
2.5k  
22.5k  
REF  
Thermal Shutdown  
+INA +INB +INC SHDN  
V
For safety, the LT1997-3 will enter shutdown mode when  
the die temperature rises to approximately 163°C. This  
thermal shutdown has approximately 9°C of hysteresis  
requiring the die temperature to cool 9°C before enabling  
the amplifier again.  
V
+
IN  
19973 F18  
= 160V  
V –  
S
= –25V  
Figure 18. Power Dissipation Example  
19973f  
31  
For more information www.linear.com/LT1997-3  
 
LT1997-3  
ESD Protection  
LT1997-3  
+
–INA –INB –INC  
V
The LT1997-3 is protected by a number of ESD structures.  
The structures are shown in Figure 19.  
2.5k  
V
V
V
The ESD structures serve to protect the internal circuitry  
but also limit signal swing on certain nodes. The structures  
on the +INB, –INB, +INC, –INC pins and on the internal op  
amp inputs limit the voltage on these nodes to 0.3V below  
7.5k  
22.5k  
22.5k  
+
OUT  
22.5k  
V
V and 80V above V . The voltage on the REF (DFN), REF1  
(MSOP) and REF2 (MSOP) pins are limited to 0.3V below  
V
7.5k  
45k  
45k  
REF1  
+
V
V
V and 60V above V . The voltage on the SHDN pin is  
2.5k  
REF2  
+
limited to 0.3V below V and 0.3V above V .  
10µA  
V
V
V
+INA +INB +INC  
SHDN  
V
19973 F19  
Figure 19. ESD Protection  
Typical applicaTions  
Differential Input/Output Gain of 10 Amplifier  
V +  
S
V
IN  
+
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
22.5k  
22.5k  
22.5k  
+
V
V
+
OUT  
OUT  
OCM  
10k  
10k  
+
LT6015  
7.5k  
2.5k  
22.5k  
REF  
V
OUT  
+INA +INB +INC SHDN  
V
19973 TA02  
V
+
IN  
V –  
S
USE V  
TO SET THE DESIRED  
OCM  
OUTPUT COMMON MODE LEVEL  
19973f  
32  
For more information www.linear.com/LT1997-3  
LT1997-3  
Typical applicaTions  
Bidirectional Current Sense Amplifier  
V +  
S
V
= –0.3V TO 50V  
SOURCE  
+
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
22.5k  
22.5k  
22.5k  
+
OUT  
V
V
= V  
REF  
+ 26 • I  
• R  
I
R
OUT  
LOAD SENSE  
LOAD  
SENSE  
R
C
7.5k  
2.5k  
45k  
45k  
REF2  
REF1  
REF  
LOAD  
+INA +INB +INC SHDN  
V
19973 TA03  
Precision RRIO Single-Supply Difference Amplifier  
V
BATTERY  
+
–INA –INB –INC  
V
LT1997-3  
2.5k  
7.5k  
22.5k  
22.5k  
22.5k  
+
V
–IN  
+IN  
OUT  
V
BATTERY  
V
VOUT  
=
+9 V+IN – V–IN  
( )  
CM  
2
V
7.5k  
2.5k  
45k  
45k  
REF2  
REF1  
V
= –0.3V TO V  
BATTERY  
CM  
+INA +INB +INC SHDN  
V
19973 TA04  
19973f  
33  
For more information www.linear.com/LT1997-3  
LT1997-3  
package DescripTion  
Please refer to http://www.linear.com/product/LT1997-3#packaging for the most recent package drawings.  
DF Package  
14(12)-Lead Plastic DFN (4mm × 4mm)  
(Reference LTC DWG # 05-08-1963 Rev Ø)  
3.00 REF  
ꢀ.00  
BSC  
0.70 0.05  
4.50 0.05  
ꢀ.70 0.05  
3.ꢀ0 0.05  
3.38 0.05  
PACKAGE OUTLINE  
0.25 0.05  
0.50 BSC  
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS  
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED  
3.00 REF  
4.00 0.ꢀ0  
(4 SIDES)  
ꢀ.00  
BSC  
8
ꢀ4  
0.40 0.ꢀ0  
3.38 0.ꢀ0  
ꢀ.70 0.ꢀ0  
PIN ꢀ NOTCH  
0.35 × 45°  
CHAMFER  
PIN ꢀ  
TOP MARK  
(NOTE 6)  
(DFꢀ4)(ꢀ2) DFN ꢀꢀꢀ3 REV 0  
7
R = 0.ꢀꢀ5  
TYP  
0.25 0.05  
0.50 BSC  
0.200 REF  
0.75 0.05  
BOTTOM VIEW—EXPOSED PAD  
0.00 – 0.05  
NOTE:  
ꢀ. PACKAGE OUTLINE DOES NOT CONFORM TO JEDEC MO-229  
2. DRAWING NOT TO SCALE  
3. ALL DIMENSIONS ARE IN MILLIMETERS  
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE  
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.ꢀ5mm ON ANY SIDE  
5. EXPOSED PAD SHALL BE SOLDER PLATED  
6. SHADED AREA IS ONLY A REFERENCE FOR PIN ꢀ LOCATION  
ON THE TOP AND BOTTOM OF PACKAGE  
19973f  
34  
For more information www.linear.com/LT1997-3  
LT1997-3  
package DescripTion  
Please refer to http://www.linear.com/product/LT1997-3#packaging for the most recent package drawings.  
MS Package  
16 (12)-Lead Plastic MSOP with 4 Pins Removed  
(Reference LTC DWG # 05-08-1847 Rev B)  
1.0  
0.889 ±0.127  
(.035 ±.005)  
(.0394)  
BSC  
5.10  
3.20 – 3.45  
(.201)  
4.039 ±0.102  
(.159 ±.004)  
(NOTE 3)  
(.126 – .136)  
MIN  
0.280 ±0.076  
(.011 ±.003)  
REF  
16 14 121110  
9
0.50  
(.0197)  
BSC  
0.305 ±0.038  
(.0120 ±.0015)  
TYP  
3.00 ±0.102  
(.118 ±.004)  
(NOTE 4)  
4.90 ±0.152  
(.193 ±.006)  
RECOMMENDED SOLDER PAD LAYOUT  
DETAIL “A”  
0.254  
(.010)  
0° – 6° TYP  
1
3 5 6 7 8  
GAUGE PLANE  
1.0  
(.0394)  
BSC  
0.53 ±0.152  
(.021 ±.006)  
0.86  
(.034)  
REF  
1.10  
(.043)  
MAX  
DETAIL “A”  
0.18  
(.007)  
SEATING  
PLANE  
0.17 – 0.27  
(.007 – .011)  
TYP  
0.1016 ±0.0508  
(.004 ±.002)  
MSOP (MS12) 0213 REV B  
0.50  
(.0197)  
BSC  
NOTE:  
1. DIMENSIONS IN MILLIMETER/(INCH)  
2. DRAWING NOT TO SCALE  
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.  
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.  
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX  
19973f  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-  
35  
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.  
LT1997-3  
Typical applicaTion  
Low Noise, High CMRR Instrumentation Amplifier  
+15V  
Gain vs Frequency  
+15V  
+
70  
60  
50  
40  
30  
20  
10  
0
–INA –INB –INC  
V
LT1997-3  
V
+
–IN  
2.5k  
7.5k  
LT6018  
22.5k  
1.91k  
49.9Ω  
1.91k  
22.5k  
22.5k  
–15V  
+
OUT  
REF  
V
V
OUT  
REF  
+15V  
7.5k  
2.5k  
22.5k  
+
LT6018  
V
+IN  
1
10  
100  
1000  
+INA +INB +INC SHDN  
V
FREQUENCY (kHz)  
–15V  
19973 TA05b  
19973 TA05a  
–15V  
INPUT REFERRED NOISE = 2.1nV/√Hz  
CMRR = 140dB  
relaTeD parTs  
PART NUMBER  
LT6375  
DESCRIPTION  
COMMENTS  
270V Common Mode Voltage Difference Amplifier  
250V Input Range Difference Amplifier  
3.3V to 50V Operation, CMRR > 97dB, Input Voltage = 270V  
2.7V to 36V Operation, CMRR > 70dB, Input Voltage = 250V  
LT1990  
LT1991  
Precision, 100µA Gain Selectable Amplifier  
Precision, 100µA Gain Selectable Amplifier  
High Voltage, Bidirectional Current Sense Amplifier  
Single, Dual, and Quad Over-The-Top Precision Op Amp  
2.7V to 36V Operation, 50μV Offset, CMRR > 75dB, Input Voltage = 60V  
Micropower, Pin Selectable Up to Gain = 118  
LT1996  
LT1999  
-5V to 80V, 750µV, CMRR 80dB at 100kHz, Gain: 10V/V, 20V/V, 50V/V  
LT6015/LT6016/  
LT6017  
3.2MHz, 0.8V/µs, 50µV V , 3V to 50V V , 0.335mA I , RRIO  
OS S S  
LT6018  
LTC6090  
LT6108  
33V, Ultralow Noise, Precision Op Amp  
140V Operational Amplifier  
V : 50µV, GBW: 15MHz, SR: 30V/µs, en: 1.2nV/√Hz, I : 7.2mA  
OS S  
50pA I , 1.6mV V , 9.5V to 140V V , 4.5mA I , RR Output  
B
OS  
S
S
High Side Current Sense Amplifier with Reference and  
Comparator with Shutdown  
2.7V to 60V, 125µV, Resistor Set Gain, 1.25ꢀ Threshold Error  
LT1787/LT1787HV Precision, Bidirectional High Side Current Sense Amplifier 2.7V to 60V Operation, 75μV Offset, 60μA Current Draw  
LT6100  
Gain-Selectable High Side Current Sense Amplifier  
High Voltage High Side Current Sense Amplifier  
Zero Drift High Side Current Sense Amplifier  
Bidirectional, High Side Current Sense  
4.1V to 48V Operation,  
Pin-Selectable Gain: 10V/V, 12.5V/V, 20V/V, 25V/V, 40V/V, 50V/V  
LTC6101/  
LTC6101HV  
4V to 60V/5V to 100V Operation, External Resistor Set Gain, SOT23  
LTC6102/  
LTC6102HV  
4V to 60V/5V to 100V Operation, 10μV Offset, 1μs Step Response,  
MSOP8/DFN Packages  
LTC6104  
4V to 60V, Gain Configurable, 8-Pin MSOP Package  
19973f  
LT 0317 • PRINTED IN USA  
www.linear.com/LT1997-3  
36  
LINEAR TECHNOLOGY CORPORATION 2017  

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