LT3028IDHC_技术文档

LT3028

Dual 100mA/500mA

Low Dropout, Low Noise,

Micropower Regulators with

Independent Inputs

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FEATURES

DESCRIPTIO

The LT^®3028 is a dual, micropower, low noise, low drop-

out regulator with independent inputs. With an external

0.01µF bypass capacitor, output noise is a low 20µV_RMS

over a 10Hz to 100kHz bandwidth. Designed for use in

battery-poweredsystems, thelow30µAquiescentcurrent

per output makes it an ideal choice. In shutdown, quies-

cent current drops to less than 0.1µA. Shutdown control

is independent for each output, allowing for flexibility in

power management. The device is capable of operating

over an input voltage range of 1.8V to 20V. Output 1 can

supply 500mA of output current with a dropout voltage of

320mV. The device can supply 100mA of output current

fromOutput2withadropoutvoltageof300mV. Quiescent

current is well controlled in dropout.

■

Low Noise: 20µV_RMS(10Hz to 100kHz)

■

Low Quiescent Current: 30µA/Output

■

Independent Inputs

■

Wide Input Voltage Range: 1.8V to 20V

■

Output Current: 100mA/500mA

■

Very Low Shutdown Current: <0.1µA

■

Low Dropout Voltage: 300mV/320mV at

100mA/500mA

■

Adjustable Outputs from 1.22V to 20V

Stable with as Low as 1µF/3.3µF Output Capacitor

Stable with Aluminum, Tantalum or

Ceramic Capacitors

■

Reverse-Battery Protected

No Protection Diodes Needed

Overcurrent and Overtemperature Protected

Tracking/Sequencing Capability

Thermally Enhanced 16-Lead TSSOP and 16-Lead

(5mm × 3mm) DFN Packages

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The LT3028 regulator is stable with output capacitors as

low as 1µF for the 100mA output and 3.3µF for the 500mA

output. Small ceramic capacitors can be used without the

series resistance required by other regulators.

Internal protection circuitry includes reverse-battery pro-

tection, current limiting and thermal limiting protection.

Thedeviceisavailableasanadjustabledevicewitha1.22V

reference voltage. The LT3028 regulator is available in the

thermally enhanced 16-lead TSSOP and 16-lead, low

profile (5mm × 3mm × 0.75mm) DFN packages.

APPLICATIO S

■

Cellular Phones

Pagers

■

Battery-Powered Systems

■

Frequency Synthesizers

■

Wireless Modems

, LTC and LT are registered trademarks of Linear Technology Corporation.

Protected by U.S. Patents including 6118263, 6144250.

■

Tracking/Sequencing Power Supplies

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TYPICAL APPLICATIO

10Hz to 100kHz Output Noise

3.3V/2.5V Low Noise Regulators

3.3V AT 500mA

20µV NOISE

OUT1

IN1

RMS

V

IN1

0.01µF

10µF

3.7V TO

20V

1µF

SHDN1

422k

249k

BYP1

ADJ1

V

OUT

100µV/DIV

20µV

RMS

LT3028

2.5V AT 100mA

20µV NOISE

OUT2

RMS

IN2

V

0.01µF

IN2

261k

2.9V TO

20V

1µF

SHDN2

BYP2

ADJ2

3028 TA01b

GND

249k

3028 TA01a

3028f

1

LT3028

ABSOLUTE AXI U RATI GS

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(Note 1)

IN1, IN2 Pin Voltage .............................................. ±20V

OUT1, OUT2 Pin Voltage ....................................... ±20V

Input-to-Output Differential Voltage....................... ±20V

ADJ1, ADJ2 Pin Voltage ......................................... ±7V

BYP1, BYP2 Pin Voltage ....................................... ±0.6V

SHDN1, SHDN2 Pin Voltage ................................. ±20V

Output Short-Circut Duration.......................... Indefinite

Operating Junction Temperature Range

(Note 2) ............................................ –40°C to 125°C

Storage Temperature Range

FE Package ....................................... –65°C to 150°C

DHC Package.................................... –65°C to 125°C

Lead Temperature (Soldering, 10 sec).................. 300°C

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PACKAGE/ORDER I FOR ATIO

TOP VIEW

ORDER PART

NUMBER

ORDER PART

NUMBER

GND

BYP1

OUT1

GND

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

GND

BYP1

NC

1

2

3

4

5

6

7

8

16 ADJ1

15 SHDN1

14 IN1

ADJ1

SHDN1

IN1

LT3028EFE

LT3028IFE

LT3028EDHC

LT3028IDHC

OUT1

GND

13 IN1

17

IN2

12 IN2

OUT2

BYP2

GND

SHDN2

ADJ2

GND

OUT2

BYP2

11 IN2

FE PART

MARKING

DHC PART

MARKING

10 SHDN2

9

ADJ2

FE PACKAGE

DHC PACKAGE

3028EFE

3028IFE

3028

3028I

16-LEAD PLASTIC TSSOP

16-LEAD (5mm × 3mm) PLASTIC DFN

T_JMAX= 150°C, θ_JA= 38°C/ W, θ_JC= 8°C/ W

T_JMAX= 125°C, θ_JA= 40°C/ W, θ_JC= 10°C/ W

EXPOSED PAD (PIN 17) IS GND

MUST BE SOLDERED TO PCB

EXPOSED PAD (PIN 17) IS GND

MUST BE SOLDERED TO PCB

Consult factory for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are T_A= 25°C. (Note 2)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Minimum Input Voltage

(Notes 3, 10)

Output 2, I

Output 1, I

= 100mA

= 500mA

●

1.8

2.3

V

LOAD

ADJ1, ADJ2 Pin Voltage

(Notes 3, 4)

V

= 2V, I

= 1mA

IN2

1.205

1.190

1.220

1.235

1.250

V

IN

LOAD

Output 2, 2.3V < V < 20V, 1mA < I

Output 1, 2.3V < V < 20V, 1mA < I

< 100mA

< 500mA

●

LOAD

IN1

Line Regulation (Note 3)

Load Regulation (Note 3)

∆V = 2V to 20V, I

= 1mA

●

1

10

mV

IN

LOAD

Output 2, V = 2.3V, ∆I

= 1mA to 100mA

12

25

mV

IN2

LOAD

V

= 2.3V, ∆I

IN2

Output 1, V = 2.3V, ∆I

= 1mA to 500mA

1

12

25

mV

IN1

LOAD

V

= 2.3V, ∆I

IN1

3028f

2

LT3028

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are T_A= 25°C. (Note 2)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Dropout Voltage

(Output 2)

I

= 1mA

0.10

0.15

0.19

V

LOAD

●

V

= V

IN2

OUT2(NOMINAL)

I

= 10mA

0.17

0.24

0.30

0.12

0.17

0.21

0.32

0.22

0.29

V

LOAD

(Notes 5, 6, 10)

I

= 50mA

0.31

0.40

V

LOAD

I

= 100mA

0.35

0.45

V

LOAD

Dropout Voltage

(Output 1)

I

= 10mA

0.19

0.25

V

LOAD

V

= V

IN1

OUT1(NOMINAL)

I

= 50mA

0.22

0.32

V

LOAD

(Notes 5, 6, 10)

I

= 100mA

0.28

0.34

V

LOAD

I

= 500mA

0.37

0.47

V

LOAD

GND Pin Current

(Output 2)

I

= 0mA

●

25

60

230

1

2.2

50

95

400

2

µA

LOAD

= 1mA

V

= V

= 10mA

= 50mA

= 100mA

µA

IN2

OUT2(NOMINAL)

(Notes 5, 7)

mA

4

GND Pin Current

(Output 1)

I

= 0mA

●

30

65

1

75

120

1.6

3

µA

mA

LOAD

= 1mA

V

= V

= 50mA

= 100mA

= 250mA

= 500mA

IN1

OUT1(NOMINAL)

(Notes 5, 7)

2

5

10

8

16

Output Voltage Noise

C

= 10µF, C

= 0.01µF, I

= Full Current,

20

µV

RMS

OUT

BYP

LOAD

BW = 10Hz to 100kHz

ADJ1/ADJ2 Pin Bias Current

Shutdown Threshold

ADJ1, ADJ2 (Notes 3, 8)

30

100

1.4

nA

V

= Off to On

= On to Off

●

0.80

0.65

V

OUT

0.25

55

SHDN1/SHDN2 Pin Current

(Note 9)

V

, V

= 0V

= 20V

●

0

1

0.5

3.0

µA

SHDN1 SHDN2

, V

SHDN1 SHDN2

Quiescent Current in Shutdown

Ripple Rejection

V

= 6V, V

= 0V, V = 0V

SHDN2

0.01

65

0.1

µA

IN

SHDN1

= 2.72V (Avg), V

= Full Current

= 0.5V , f = 120Hz,

P-P RIPPLE

dB

IN

RIPPLE

I

LOAD

Current Limit

Output 2, V = 7V, V

= 0V

500

1.3

mA

IN2

OUT2

V

= 2.3V, ∆V

= –0.1V

OUT2

●

110

520

IN2

Output 1, V = 7V, V

= 0V

= –0.1V

OUT1

A

mA

IN1

OUT1

= 2.3V, ∆V

V

●

IN1

Input Reverse Leakage Current

V

= –20V, V

= 0V

1

mA

IN

OUT

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

range are assured by design, characterization and correlation with

statistical process controls. The LT3028I is guaranteed and tested over the

full –40°C to 125°C operating junction temperature range.

Note 2: The LT3028 regulator is tested and specified under pulse load

conditions such that T ≈ T . The LT3028E is guaranteed to meet

performance specifications from 0°C to 125°C junction temperature.

Specifications over the –40°C to 125°C operating junction temperature

Note 3: The LT3028 is tested and specified for these conditions with the

ADJ1/ADJ2 pin connected to the corresponding OUT1/OUT2 pin.

J

A

3028f

3

LT3028

ELECTRICAL CHARACTERISTICS

Note 4: Operating conditions are limited by maximum junction

temperature. The regulated output voltage specification will not apply for

all possible combinations of input voltage and output current. When

operating at maximum input voltage, the output current range must be

limited. When operating at maximum output current, the input voltage

range must be limited.

Note 7: GND pin current is tested with V = 2.44V and a current source

IN

load. This means the device is tested while operating in its dropout region

or at the minimum input voltage specification. This is the worst-case GND

pin current. The GND pin current will decrease slightly at higher input

voltages. Total GND pin current is equal to the sum of GND pin currents

from Output 1 and Output 2.

Note 5: To satisfy requirements for minimum input voltage, the LT3028 is

tested and specified for these conditions with an external resistor divider

(two 250k resistors) for an output voltage of 2.44V. The external resistor

divider will add a 5µA DC load on the output.

Note 6: Dropout voltage is the minimum input to output voltage differential

needed to maintain regulation at a specified output current. In dropout, the

Note 8: ADJ1 and ADJ2 pin bias current flows into the pin.

Note 9: SHDN1 and SHDN2 pin current flows into the pin.

Note 10: For the LT3028 dropout voltage will be limited by the minimum

input voltage specification under some output voltage/load conditions. See

the curve of Minimum Input Voltage in the Typical Performance

Characteristics.

output voltage will be equal to: V – V

.

IN

DROPOUT

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TYPICAL PERFOR A CE CHARACTERISTICS

Output 2

Typical Dropout Voltage

Output 2

Guaranteed Dropout Voltage

Output 2 Dropout Voltage

500

450

400

350

300

250

200

150

100

50

500

450

400

350

300

250

200

150

100

50

500

450

400

350

300

250

200

150

100

50

= TEST POINTS

T

≤ 125°C

≤ 25°C

J

T

= 125°C

J

I

= 100mA

L

T

J

I

= 50mA

= 10mA

L

T

= 25°C

J

I

L

I

= 1mA

L

0

–50

0

25

50

75 100 125

–25

40

50 60 70 80 90 100

0

10 20 30

50 60 70 80 90 100

0

10 20 30

TEMPERATURE (°C)

OUTPUT CURRENT (mA)

3028 G03

3028 G01

3028 G02

Output 1

Typical Dropout Voltage

Output 1

Guaranteed Dropout Voltage

Output 1 Dropout Voltage

500

450

400

350

300

250

200

150

100

50

500

450

400

350

300

250

200

150

100

50

500

450

400

350

300

250

200

150

100

50

= TEST POINTS

I

= 500mA

L

I

L

= 250mA

T

J

= 125°C

T

J

≤ 125°C

≤ 25°C

I

= 100mA

L

I

= 50mA

T

J

L

T

J

= 25°C

I

= 1mA

L

I

L

= 10mA

0

–50

0

25

50

75 100 125

–25

200

250 300 350 400 450 500

0

50 100 150

250 300 350 400 450 500

0

50 100 150

TEMPERATURE (°C)

OUTPUT CURRENT (mA)

3028 G06

3028 G04

3028 G05

3028f

4

LT3028

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Quiescent Current (Per Output)

ADJ1 or ADJ2 Pin Voltage

Quiescent Current (Per Output)

40

35

30

25

20

15

10

5

1.240

1.235

1.230

1.225

1.220

1.215

1.210

1.205

1.200

50

45

40

35

30

25

20

15

10

5

T

= 25°C

I = 1mA

L

J

L

R

= 250k

V

= V

SHDN

IN

V

= V

IN

SHDN

V

R

= 6V

= 250k, I = 5µA

L

IN

L

V

= 0V

SHDN

0

–25

0

25

50

75

125

–25

0

25

50

75

125

2

4

6

10 12 14

–50

100

–50

100

0

8

16

18

20

TEMPERATURE (°C)

INPUT VOLTAGE (V)

3028 G07

3028 G08

3028 G09

Output 2

GND Pin Current vs I_LOAD

Output 1 GND Pin Current

Output 2 GND Pin Current

1200

1000

800

600

400

200

0

2.50

2.25

2.00

1.75

1.50

1.25

1.00

0.75

0.50

0.25

0

2.50

2.25

2.00

1.75

1.50

1.25

1.00

0.75

0.50

0.25

0

V

J

= V

+ 1V

OUT(NOMINAL)

IN

T = 25°C

J

T = 25°C

*FOR V

= 1.22V

OUT

R

L

= 24.4Ω

L

R

L

= 12.2Ω

L

I

= 50mA*

I

= 100mA*

T

= 25°C

J

V

= V

IN

SHDN

*FOR V

= 1.22V

R

L

= 24.4Ω

OUT

L

I

= 50mA*

R

L

= 122Ω

L

I

= 10mA*

= 1.22k

L

R

L

= 1.22k

L

R

L

= 122Ω

L

R

I

= 1mA*

I

= 10mA*

= 1mA*

L

4

40

4

0

1

2

3

5

6

7

8

9

10

0

10 20 30

50 60 70 80 90 100

0

1

2

3

5

6

7

8

9

10

INPUT VOLTAGE (V)

OUTPUT CURRENT (mA)

INPUT VOLTAGE (V)

3028 G10

3028 G11

3028 G12

Output 1

GND Pin Current vs I_LOAD

SHDN1 or SHDN2 Pin Threshold

(On-to-Off)

Output 1 GND Pin Current

12

10

8

12

10

8

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

V

J

= V

+ 1V

I

= 1mA

T

= 25°C

IN

OUT(NOMINAL)

L

J

V

T = 25°C

= V

IN

SHDN

*FOR V

= 1.22V

OUT

R

L

= 2.44Ω

L

I

= 500mA*

R

L

= 4.07Ω

L

6

I

= 300mA*

4

R

L

= 12.2Ω

L

I

= 100mA*

2

0

4

0

50 100 150 200

300 350 400 450 500

0

1

2

3

5

6

7

8

9

10

250

–50

0

25

50

75

125

–25

100

TEMPERATURE (°C)

INPUT VOLTAGE (V)

OUTPUT CURRENT (mA)

3028 G13

3028 G14

3028 G15

3028f

5

LT3028

TYPICAL PERFOR A CE CHARACTERISTICS

U W

SHDN1 or SHDN2 Pin Threshold

(Off-to-On)

SHDN1 or SHDN2 Pin Input

Current

SHDN1 or SHDN2 Pin Input

Current

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

T

J

= 25°C

V

SHDN

= 20V

I

= FULL

L

I

L

= 1mA

–50

0

25

50

75 100 125

0

1

2

3

4

6

7

8

9

10

–50

–25

0

25

50

75 100 125

–25

5

TEMPERATURE (°C)

SHDN PIN VOLTAGE (V)

3028 G16

3028 G17

3028 G18

ADJ1 or ADJ2 Pin Bias Current

Output 2 Current Limit

100

90

80

70

60

50

40

30

20

10

0

350

300

250

200

150

100

50

350

300

250

200

150

100

50

V

= 7V

OUT2

V

T

= 0V

IN2

OUT2

= 25°C

= 0V

J

0

–50

0

25

50

75 100 125

0

2

3

4

5

6

7

–50

–25

0

25

50

75 100 125

–25

1

TEMPERATURE (°C)

INPUT VOLTAGE (V)

TEMPERATURE (°C)

3028 G19

3028 G20

3028 G21

Output 1 Current Limit

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

1.2

1.0

0.8

0.6

0.4

0.2

0

V

T

= 0V

V

OUT1

= 7V

IN1

OUT1

J

V

= 0V

= 25°C

0

2

3

4

5

6

7

1

–50

0

25

50

75 100 125

TEMPERATURE (°C)

–25

INPUT VOLTAGE (V)

3028 G22

3028 G23

3028f

6

LT3028

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Output 2

Input Ripple Rejection

Output 2

Input Ripple Rejection

Output 2

Input Ripple Rejection

80

70

60

50

40

30

20

10

0

80

70

60

50

40

30

20

10

0

80

70

60

50

40

30

20

10

0

C

= 0.01µF

BYP

C

BYP

= 1000pF

C

= 100pF

BYP

C

= 10µF

OUT

C

= 1µF

OUT

V

= V

+

OUT2(NOMINAL)

I

= 100mA

I

= 100mA

IN2

L

IN2

OUT

J

1V + 0.5V RIPPLE

P-P

V

C

T

= 2.3V + 50mV

RIPPLE

V

C

T

= 2.3V + 50mV

RIPPLE

10

IN2

BYP

= 25°C

RMS

AT f = 120Hz

= 0

= 10µF

= 25°C

I

L

= 50mA

J

0.01

0.1

1

10

100

1000

–25

0

25

50

75

125

–50

100

0.01

0.1

1

100

1000

FREQUENCY (kHz)

TEMPERATURE (°C)

3028 G26

3028 G27

3028 G28

Output 1

Input Ripple Rejection

Output 1

Input Ripple Rejection

Output 1 Ripple Rejection

80

70

60

50

40

30

20

10

0

68

66

64

62

60

58

56

54

52

80

70

60

50

40

30

20

10

0

C

= 0.01µF

BYP

C

= 10µF

OUT

C

= 1000pF

BYP

C

= 100pF

BYP

I

= 500mA

I

= 500mA

= V

L

IN1

V

= V

+

V

= V

+

OUT1(NOMINAL)

V

+

OUT1(NOMINAL)

IN1

OUT1(NOMINAL)

IN1

C

= 4.7µF

OUT

1V + 50mV

C

T

RIPPLE

1V + 0.5V RIPPLE

P-P

1V + 50mV

RMS

RIPPLE

RMS

= 10µF

AT f = 120Hz

C

= 0

OUT

BYP

T = 25°C

= 25°C

I = 500mA

J

L

J

10

100

1k

10k

100k

1M

–50 –25

0

25

50

75 100 125

10

100

1k

10k

100k

1M

FREQUENCY (Hz)

TEMPERATURE (°C)

3028 G30

3028 G29

3028 G31

Output 2 Minimum Input Voltage

Output 1 Minimum Input Voltage

2.5

2.0

1.5

1.0

0.5

0

2.50

V

= 1.22V

OUT1

V

= 1.22V

OUT2

2.25

2.00

1.75

1.50

1.25

1.00

0.75

0.50

0.25

0

I

= 500mA

L

I

L

= 100mA

I

= 1mA

L

I

L

= 50mA

–50

0

25

50

75 100 125

–25

–50

0

25

50

75 100 125

–25

TEMPERATURE (°C)

3028 G33

3028 G32

3028f

7

LT3028

TYPICAL PERFOR A CE CHARACTERISTICS

U W

Channel-to-Channel Isolation

Output 2 Load Regulation

0

–1

–2

–3

–4

–5

–6

–7

–8

–9

–10

100

90

CHANNEL 2

80

V

OUT1

20mV/DIV

70

CHANNEL 1

60

50

V

OUT2

20mV/DIV

40

30

20

10

0

GIVEN CHANNEL IS TESTED

WITH 50mVRMS SIGNAL ON

OPPOSING CHANNEL, BOTH

CHANNELS DELIVERING FULL

CURRENT

C

_OUT1= 22µF

C_OUT2= 10µF

_BYP1= C_BYP2= 0.01µF

50µs/DIV

3028 G50

∆I = 1mA TO 100mA

L

T

= 25°C

J

C

∆I_L1= 50mA TO 500mA

∆I_L2= 10mA TO 100mA

–50 –25

0

25

50

75 100 125

10

100

1k

10k

100k

1M

TEMPERATURE (°C)

FREQUENCY (Hz)

V

_IN= 6V, V_OUT1= V_OUT2= 5V

3028 G34

3028 G35

Output 1 Load Regulation

Output Noise Spectral Density

10

1

10

1

5

0

C

I

J

= 10µF

OUT

C

I

= 10µF

∆I = 1mA TO 500mA

L

OUT

BYP

L

= FULL LOAD

= 0

L

T = 25°C

= FULL LOAD

= 25°C

V

SET FOR 5V

T

OUT

J

C

= 1000pF

BYP

V

SET FOR 5V

OUT

C

= 100pF

BYP

V

=V

ADJ

OUT

V

=V

OUT

ADJ

0.1

0.01

0.1

0.01

–5

C

= 0.01µF

BYP

–10

–50

–25

0

25

50

75

125

0.01

0.1

1

10

100

0.01

0.1

1

10

100

FREQUENCY (kHz)

TEMPERATURE (°C)

3028 G38

3028 G37

3028 G36

Output 2

RMS Output Noise vs Load

Current (10Hz to 100kHz)

Output 1

RMS Output Noise vs Load

Current (10Hz to 100kHz)

RMS Output Noise

vs Bypass Capacitor

160

140

120

100

80

140

120

100

80

160

140

120

100

80

C = 10µF

OUT2

C

I

= 10µF

V

= 5V

OUT

L

C

T

= 10µF

OUT

OUT1

T = 25°C

= FULL LOAD

J

= 25°C

J

C

= 0

= 0.01µF

f

= 10Hz TO 100kHz

= 25°C

BYP

BW

C

= 0

= 0.01µF

BYP

T

J

OUTPUT 2

OUTPUT 1

= 1.22V

V

OUT2

SET FOR 5V

V

SET FOR 5V

OUT1

V

OUT

60

V

=V

ADJ2

OUT2

60

OUTPUT 2

V

= V

ADJ1

OUT1

40

OUTPUT 1

V

OUT2

SET FOR 5V

V

SET FOR 5V

= V

OUT1

20

V

=V

V

OUT1

OUT2

10

ADJ2

100

ADJ1

0

0.01

0

0.01

0.1

1

10

100

1000

10000

0.1

1

10

100

1000

LOAD CURRENT (mA)

C

BYP

(pF)

3028 G40

3028 G39

3028 G41

3028f

8

LT3028

U W

TYPICAL PERFOR A CE CHARACTERISTICS

10Hz to 100kHz Output Noise

C_BYP= 0pF

10Hz to 100kHz Output Noise

C_BYP= 100pF

10Hz to 100kHz Output Noise

C_BYP= 1000pF

V_OUT

100µV/DIV

V_OUT

100µV/DIV

V_OUT

100µV/DIV

C_OUT= 10µF

I_L= FULL LOAD

V_OUTSET FOR 5V

1ms/DIV

3028 G42

C_OUT= 10µF

I_L= FULL LOAD

V_OUTSET FOR 5V

1ms/DIV

3028 G43

C_OUT= 10µF

I_L= FULL LOAD

V_OUTSET FOR 5V

1ms/DIV

3028 G44

10Hz to 100kHz Output Noise

_BYP= 0.01µF

Output 2 Transient Response

C_BYP= 0.01µF

Output 2 Transient Response

C_BYP= 0pF

C

V

C

= 6V, V

SET FOR 5V

V

C

= 6V, V

SET FOR 5V

IN2

OUT2

IN2

OUT2

0.2

0.1

0.04

0.02

0

= 10µF

OUT2

T

= 25°C

T = 25°C

J

0

V_OUT

100µV/DIV

–0.1

–0.2

–0.02

–0.04

100

50

0

100

50

0

C

_OUT= 10µF

1ms/DIV

3028 G45

I_L= FULL LOAD

V_OUTSET FOR 5V

800

TIME (µs)

80

0

400

1200

1600

2000

0

20 40 60

100 120 140 160 180 200

TIME (µs)

3028 G46

3028 G47

Output 1 Transient Response

C_BYP= 0pF

Output 1 Transient Response

C_BYP= 0.01µF

V

C

= 6V, V

SET FOR 5V

V

C

= 6V, V

SET FOR 5V

OUT1

IN1

OUT1

IN1

0.4

0.2

0

0.10

0.05

0

= 10µF

OUT1

T

= 25°C

T = 25°C

J

–0.2

–0.4

–0.05

–0.10

600

400

200

0

600

400

200

0

400

TIME (µs)

40

0

200

600

800

1000

0

10 20 30

50 60 70 80 90 100

TIME (µs)

3028 G48

3028 G49

3028f

9

LT3028

U

(DFN Package)/(TSSOP Package)

PI FU CTIO S

GND (Pins 5, 17)/(Pins 1, 5, 8, 9, 16, 17): Ground. The

Exposed Pad must be soldered to PCB ground for opti-

mum thermal performance.

SHDN1/SHDN2 (Pins 15/10)/(Pins 14/11): Shutdown.

The SHDN1/SHDN2 pins are used to put the correspond-

ing output of the LT3028 regulator into a low power

shutdown state. The output will be off when the pin is

pulled low. The SHDN1/SHDN2 pins can be driven either

by 5V logic or open-collector logic with pull-up resistors.

The pull-up resistors are required to supply the pull-up

current of the open-collector gates, normally several mi-

croamperes, and the SHDN1/SHDN2 pin current, typically

1µA. If unused, the pin must be connected to V_IN. The

device will not function if the SHDN1/SHDN2 pins are not

connected.

ADJ1/ADJ2 (Pins 16/9)/(Pins 15/10): Adjust Pin. These

are the inputs to the error amplifiers. These pins are

internally clamped to ±7V. They have a bias current of

30nAwhichflowsintothepin(seecurveofADJ1/ADJ2Pin

Bias Current vs Temperature in the Typical Performance

Characteristics section). The ADJ1 and ADJ2 pin voltage

is 1.22V referenced to ground and the output voltage

range is 1.22V to 20V.

BYP1/BYP2(Pins1/8)/(Pins2/7):Bypass.TheBYP1/BYP2

pins are used to bypass the reference of the LT3028

regulator to achieve low noise performance from the

regulator. The BYP1/BYP2 pins are clamped internally to

±0.6V (one V_BE) from ground. A small capacitor from the

corresponding output to this pin will bypass the reference

to lower the output voltage noise. A maximum value of

0.01µF can be used for reducing output voltage noise to a

typical 20µV_RMSover a 10Hz to 100kHz bandwidth. If not

used, this pin must be left unconnected.

IN1/IN2 (Pins 13, 14/11, 12)/(Pins 13/12): Inputs. Power

is supplied to the device through the IN pins. A bypass

capacitor is required on these pins if the device is more

than six inches away from the main input filter capacitor.

In general, the output impedance of a battery rises with

frequency, so it is advisable to include a bypass capacitor

in battery-powered circuits. A bypass capacitor in the

range of 1µF to 10µF is sufficient. The LT3028 regulator is

designedtowithstandreversevoltagesontheINpinswith

respect to ground and the OUT pins. In the case of a

reverse input, which can happen if a battery is plugged in

backwards, thedevicewillactasifthereisadiodeinseries

withitsinput. Therewillbenoreversecurrentflowintothe

regulator and no reverse voltage will appear at the load.

The device will protect both itself and the load.

OUT1/OUT2 (Pins 3, 4/6, 7)/(Pins 3, 4/6): Output. The

outputs supply power to the loads. A minimum output

capacitor of 1µF is required to prevent oscillations on

Output 2; Output 1 requires a minimum of 3.3µF. Larger

output capacitors will be required for applications with

large transient loads to limit peak voltage transients. See

theApplicationsInformationsectionformoreinformation

on output capacitance and reverse output characteristics.

W U U

U

APPLICATIO S I FOR ATIO

The LT3028 is a dual 100mA/500mA low dropout regula-

tor with independent inputs, micropower quiescent cur-

rent, and shutdown. The device is capable of supplying

100mA from Output 2 at a dropout voltage of 300mV.

Output 1 delivers 500mA at a dropout voltage of 320mV.

The two regulators have common GND pins and are

thermallycoupled, however, thetwoinputsandoutputsof

theLT3028operateindependently.Theycanbeshutdown

independently and a fault condition on one output will not

affect the other output electrically. Output voltage noise

can be lowered to 20µV_RMSover a 10Hz to 100kHz

bandwidth with the addition of a 0.01µF reference bypass

capacitor.Additionally,thereferencebypasscapacitorwill

improve transient response of the regulator, lowering the

settling time for transient load conditions. The low oper-

ating quiescent current (30µA per output) drops to less

3028f

10

LT3028

W U U

APPLICATIO S I FOR ATIO

U

than 1µA in shutdown. In addition to the low quiescent

current, the LT3028 regulator incorporates several pro-

tection features which make it ideal for use in battery-

powered systems. The device is protected against reverse

input voltages. Additionally, in dual supply applications

where the regulator load is returned to a negative supply,

the output can be pulled below ground by as much as 20V

and still allow the device to start and operate.

is –1mV typical at V_OUT= 1.22V. At V_OUT= 12V, load

regulation is:

(12V/1.22V)(–1mV) = –9.8mV

Bypass Capacitance and Low Noise Performance

The LT3028 regulator may be used with the addition of a

bypass capacitor from V_OUTto the corresponding BYP pin

to lower output voltage noise. A good quality low leakage

capacitor is recommended. This capacitor will bypass the

referenceoftheregulator,providingalowfrequencynoise

pole. The noise pole provided by this bypass capacitor will

lower the output voltage noise to as low as 20µV_RMSwith

the addition of a 0.01µF bypass capacitor. Using a bypass

capacitor has the added benefit of improving transient

response. With no bypass capacitor and a 10µF output

capacitor, a 10mA to 100mA load step on Output 2 will

settletowithin1%ofitsfinalvalueinlessthan100µs.With

the addition of a 0.01µF bypass capacitor, the output will

staywithin1%forthesameloadstep.Bothoutputsexhibit

this improvement in transient response (see Transient

Reponse in Typical Performance Characteristics section).

However, regulator start-up time is inversely proportional

to the size of the bypass capacitor, slowing to 15ms with

a 0.01µF bypass capacitor and 10µF output capacitor.

Adjustable Operation

The LT3028 has an output voltage range of 1.22V to 20V.

The output voltage is set by the ratio of two external resis-

tors as shown in Figure 1. The device servos the output to

maintain the corresponding ADJ pin voltage at 1.22V ref-

erenced to ground. The current in R1 is then equal to

1.22V/R1andthecurrentinR2isthecurrentinR1plusthe

ADJ pin bias current. The ADJ pin bias current, 30nA at

25°C, flows through R2 into the ADJ pin. The output volt-

age can be calculated using the formula in Figure 1. The

value of R1 should be no greater than 250k to minimize

errors in the output voltage caused by the ADJ pin bias

current. Note that in shutdown the output is turned off and

the divider current will be zero. Curves of ADJ Pin Voltage

vs Temperature and ADJ Pin Bias Current vs Temperature

appear in the Typical Performance Characteristics.

Output Capacitance and Transient Response

The device is tested and specified with the ADJ pin tied to

thecorrespondingOUTpinforanoutputvoltageof1.22V.

Specifications for output voltages greater than 1.22V will

be proportional to the ratio of the desired output voltage

to 1.22V: V_OUT/1.22V. For example, load regulation on

Output 2 for an output current change of 1mA to 100mA

TheLT3028regulatorisdesignedtobestablewithawide

rangeofoutputcapacitors. TheESRoftheoutputcapaci-

tor affects stability, most notably with small capacitors.

A minimum output capacitor of 1µF with an ESR of 3Ω or

lessisrecommendedforOutput2topreventoscillations.

A minimum output capacitor of 3.3µF with an ESR of 3Ω

or less is recommended for Output 1. The LT3028 is a

micropower device and output transient response will be

a function of output capacitance. Larger values of output

capacitance decrease the peak deviations and provide

improved transient response for larger load current

changes. Bypass capacitors, used to decouple individual

components powered by the LT3028, will increase the

effective output capacitor value. With larger capacitors

OUT1/OUT2

IN1/IN2

V

OUT

+

R2

⎞

⎟

⎠

R1

⎛

⎝

V_OUT= 1.22V 1+

+ I R2

( _ADJ)( )

R2

⎜

V

LT3028

IN

V

_ADJ= 1.22V

_ADJ= 30nA AT 25°C

OUTPUTRANGE = 1.22V TO20V

ADJ1/ADJ2

GND

I

R1

3024 F01

Figure 1. Adjustable Operation

3028f

11

LT3028

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APPLICATIO S I FOR ATIO

Extra consideration must be given to the use of ceramic

capacitors. Ceramic capacitors are manufactured with a

variety of dielectrics, each with different behavior across

temperature and applied voltage. The most common

dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and

Y5V dielectrics are good for providing high capacitances

in a small package, but exhibit strong voltage and tem-

perature coefficients as shown in Figures 4 and 5. When

used with a 5V regulator, a 10µF Y5V capacitor can exhibit

an effective value as low as 1µF to 2µF over the operating

temperature range. The X5R and X7R dielectrics result in

more stable characteristics and are more suitable for use

as the output capacitor. The X7R type has better stability

across temperature, while the X5R is less expensive and

is available in higher values.

used to bypass the reference (for low noise operation),

larger values of output capacitors are needed. For 100pF

of bypass capacitance on Output 2, 2.2µF of output

capacitor is recommended. With a 330pF bypass capaci-

tor or larger on this output, a 3.3µF output capacitor is

recommended. For Output 1, 4.7µF of output capacitor is

recommended for 100pF of bypass capacitance. With

1000pForlargerbypasscapacitoronthisoutput, a6.8µF

output capacitor is recommended. The shaded region of

Figures2and3definetheregionsoverwhichtheLT3028

regulator is stable. The minimum ESR needed is defined

by the amount of bypass capacitance used, while the

maximum ESR is 3Ω.

4.0

3.5

4.0

3.5

3.0

STABLE REGION

2.5

STABLE REGION

2.5

2.0

C

= 0

C

= 0

BYP

1.5

1.0

0.5

0

1.5

1.0

0.5

0

BYP

C

= 100pF

C

= 100pF

BYP

C

BYP

= 330pF

C

= 330pF

BYP

C

≥ 1000pF

C

> 3300pF

BYP

1

3

6

9 10

1

3

6

9 10

8

2

4

5

7

8

2

4

5

7

OUTPUT CAPACITANCE (µF)

3028 F02

3028 F03

Figure 2. Output 2 Stability

Figure 3. Output 1 Stability

40

20

0

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10µF

X5R

0

–20

–40

–60

–80

–100

–20

–40

–60

–80

–100

Y5V

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10µF

50

TEMPERATURE (°C)

100 125

0

8

12 14

–50 –25

0

25

75

2

4

6

10

16

DC BIAS VOLTAGE (V)

3028 F04

3028 F05

Figure 5. Ceramic Capacitor Temperature Characteristics

Figure 4. Ceramic Capacitor DC Bias Characteristics

3028f

12

LT3028

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APPLICATIO S I FOR ATIO

U

Voltage and temperature coefficients are not the only

sources of problems. Some ceramic capacitors have a

piezoelectric response. A piezoelectric device generates

voltage across its terminals due to mechanical stress,

similar to the way a piezoelectric accelerometer or

microphone works. For a ceramic capacitor the stress

can be induced by vibrations in the system or thermal

transients. The resulting voltages produced can cause

appreciable amounts of noise, especially when a ceramic

capacitor is used for noise bypassing. A ceramic capaci-

tor produced Figure 6’s trace in response to light tapping

from a pencil. Similar vibration induced behavior can

masquerade as increased output voltage noise.

For continuous normal conditions, the maximum junction

temperature rating of 125°C must not be exceeded. It is

important to give careful consideration to all sources of

thermal resistance from junction to ambient. Additional

heat sources mounted nearby must also be considered.

For surface mount devices, heat sinking is accomplished

by using the heat spreading capabilities of the PC board

and its copper traces. Copper board stiffeners and plated

through-holes can also be used to spread the heat gener-

ated by power devices.

The following tables list thermal resistance for several

different board sizes and copper areas. All measurements

were taken in still air on 3/32" FR-4 board with one ounce

copper.

C_OUT= 10µF

C

_BYP= 0.01µF

I_LOAD= 100mA

Table 1. FE Package, 16-Lead TSSOP

COPPER AREA

THERMAL RESISTANCE

TOPSIDE*

2500mm²

1000mm²

225mm²

BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)

V_OUT

500µV/DIV

2500mm²

38°C/W

43°C/W

48°C/W

60°C/W

100mm²

*Device is mounted on topside.

100ms/DIV

3028 F05

Table 2. DHC Package, 16-Lead DFN

COPPER AREA

Figure 6. Noise Resulting from Tapping on a Ceramic Capacitor

THERMAL RESISTANCE

TOPSIDE*

2500mm²

1000mm²

225mm²

BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)

2500mm²

40°C/W

45°C/W

50°C/W

62°C/W

Thermal Considerations

The power handling capability of the device will be limited

by the maximum rated junction temperature (125°C). The

power dissipated by the device will be made up of two

components for each output:

100mm²

*Device is mounted on topside.

1. Output current multiplied by the input/output voltage

differential: (I_OUT)(V_IN– V_OUT), and

The thermal resistance junction-to-case (θ_JC), measured

at the Exposed Pad on the back of the die is 10°C/W for the

DFN package and 8°C/W for the TSSOP package.

2. GND pin current multiplied by the input voltage:

(I_GND)(V_IN).

Calculating Junction Temperature

The ground pin current can be found by examining the

GND Pin Current curves in the Typical Performance Char-

acteristics section. Power dissipation will be equal to the

sum of the two components listed above.

Example: Given Output 1 set for an output voltage of 3.3V,

Output 2 set for an output voltage of 2.5V, an input voltage

range of 3.8V to 5V, an output current range of 0mA to

500mA for Output 1, an output current range of 0mA to

100mA for Output 2 and a maximum ambient temperature

of 50°C, what will the maximum junction temperature be?

The LT3028 regulator has internal thermal limiting de-

signed to protect the device during overload conditions.

3028f

13

LT3028

U

W U U

APPLICATIONS INFORMATION

The power dissipated by each output will be equal to:

Current limit protection and thermal overload protection

areintendedtoprotectthedeviceagainstcurrentoverload

conditions at the output of the device. For normal opera-

tion, the junction temperature should not exceed 125°C.

I

_OUT(MAX)(V_IN(MAX)– V_OUT) + I_GND(V_IN(MAX))

Where for Output 1:

I_OUT(MAX)= 500mA

The input of the device will withstand reverse voltages of

20V.Currentflowintothedevicewillbelimitedtolessthan

1mA (typically less than 100µA) and no negative voltage

will appear at the output. The device will protect both itself

and the load. This provides protection against batteries

which can be plugged in backward.

V

_IN(MAX)= 5V

I_GNDat (I_OUT= 500mA, V_IN= 5V) = 9mA

For Output 2:

I

_OUT(MAX)= 100mA

V_IN(MAX)= 5V

_GNDat (I_OUT= 100mA, V_IN= 5V) = 2mA

The output of the LT3028 can be pulled below ground

withoutdamagingthedevice.Iftheinputisleftopencircuit

or grounded, the output can be pulled below ground by

20V. The output will act like an open circuit; no current will

flow out of the pin. If the input is powered by a voltage

source, the output will source the short-circuit current of

the device and will protect itself by thermal limiting. In this

case, grounding the SHDN1/SHDN2 pins will turn off the

device and stop the output from sourcing the short-circuit

current.

I

So for Output 1:

P = 500mA (5V – 3.3V) + 9mA (5V) = 0.90W

For Output 2:

P = 100mA (5V – 2.5V) + 2mA (5V) = 0.26W

The thermal resistance will be in the range of 35°C/W to

55°C/W depending on the copper area. So the junction

temperature rise above ambient will be approximately

equal to:

The ADJ pins can be pulled above or below ground by as

muchas7Vwithoutdamagingthedevice.Iftheinputisleft

opencircuitorgrounded, theADJpinswillactlikeanopen

circuit when pulled below ground and like a large resistor

(typically 100k) in series with a diode when pulled above

ground.

(0.90W + 0.26W) 50°C/W = 57.8°C

The maximum junction temperature will then be equal to

the maximum junction temperature rise above ambient

plus the maximum ambient temperature or:

T_JMAX= 50°C + 57.8°C = 107.8°C

In situations where the ADJ pins are connected to a

resistor divider that would pull the pins above their 7V

clampvoltageiftheoutputispulledhigh, theADJpininput

current must be limited to less than 5mA. For example, a

resistor divider is used to provide a regulated 1.5V output

fromthe1.22Vreferencewhentheoutputisforcedto20V.

The top resistor of the resistor divider must be chosen to

limitthecurrentintotheADJpintolessthan5mAwhenthe

ADJ pin is at 7V. The 13V difference between output and

ADJpindividedbythe5mAmaximumcurrentintotheADJ

pin yields a minimum top resistor value of 2.6k.

Protection Features

The LT3028 regulator incorporates several protection

features which make it ideal for use in battery-powered

circuits. In addition to the normal protection features

associated with monolithic regulators, such as current

limiting and thermal limiting, the device is protected

against reverse input voltages and reverse voltages from

output to input. The two regulators have common inputs

andGNDpinsandarethermallycoupled,however,thetwo

outputsoftheLT3028operateindependently. Theycanbe

shut down independently and a fault condition on one

output will not affect the other output electrically.

3028f

14

LT3028

U

W U U

APPLICATIONS INFORMATION

In circuits where a backup battery is required, several

different input/output conditions can occur. The output

voltage may be held up while the input is either pulled to

ground, pulledtosomeintermediatevoltageorisleftopen

circuit.

for the corresponding regulator will typically drop to less

than 2µA. This can happen if the input of the device is

connectedtoadischarged(lowvoltage)batteryandtheout-

put is held up by either a backup battery or a second regu-

lator circuit. The state of the SHDN1/SHDN2 pin will have

no effect on the reverse output current when the output is

pulled above the input.

When the IN pin of the LT3028 is forced below either OUT

pinoreitherOUTpinispulledabovetheINpin,inputcurrent

U

PACKAGE DESCRIPTIO

FE Package

16-Lead Plastic TSSOP (4.4mm)

(Reference LTC DWG # 05-08-1663)

Exposed Pad Variation BB

4.90 – 5.10*

(.193 – .201)

3.58

(.141)

3.58

(.141)

16 1514 13 12 1110

9

6.60 ±0.10

4.50 ±0.10

2.94

(.116)

6.40

(.252)

BSC

SEE NOTE 4

2.94

(.116)

0.45 ±0.05

1.05 ±0.10

0.65 BSC

5

7

8

1

2

3

4

6

RECOMMENDED SOLDER PAD LAYOUT

1.10

(.0433)

MAX

4.30 – 4.50*

(.169 – .177)

0.25

REF

0° – 8°

0.65

(.0256)

BSC

0.09 – 0.20

(.0035 – .0079)

0.50 – 0.75

(.020 – .030)

0.05 – 0.15

(.002 – .006)

0.195 – 0.30

FE16 (BB) TSSOP 0204

(.0077 – .0118)

TYP

NOTE:

1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE

FOR EXPOSED PAD ATTACHMENT

*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.150mm (.006") PER SIDE

MILLIMETERS

(INCHES)

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE

3028f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

15

LT3028

U

PACKAGE DESCRIPTIO

DHC Package

16-Lead Plastic DFN (5mm × 3mm)

(Reference LTC DWG # 05-08-1706)

R = 0.115

TYP

0.40 ± 0.10

5.00 ±0.10

(2 SIDES)

9

16

R = 0.20

TYP

0.65 ±0.05

3.00 ±0.10

(2 SIDES)

3.50 ±0.05

1.65 ±0.05

1.65 ± 0.10

(2 SIDES)

PACKAGE

OUTLINE

2.20 ±0.05

PIN 1

NOTCH

TOP MARK

(SEE NOTE 6)

(DHC16) DFN 1103

8

1

0.25 ± 0.05

0.75 ±0.05

0.200 REF

0.25 ± 0.05

0.50 BSC

4.40 ±0.10

4.40 ±0.05

(2 SIDES)

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

NOTE:

1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC

PACKAGE OUTLINE MO-229

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

LT1129

700mA, Micropower, LDO

V : 4.2V to 30V, V

= 3.75V, I = 50µA, I < 16µA,

IN

OUT(MIN) Q SD

DD, SOT-223, S8,TO220, TSSOP20 Packages

Guaranteed Voltage Tolerance and Line/Load Regulation

V : –20V to –4.3V, V = –3.8V, I = 45µA, I < 10µA,

LT1175

500mA, Micropower Negative LDO

IN

OUT(MIN)

Q

SD

DD,SOT-223, S8 Packages

Accurate Programmable Current Limit, Remote Sense

V : –35V to –4.2V, V = –2.40V, I = 2.5mA, I < 1µA, TO220-5 Package

LT1185

LT1761

LT1762

LT1763

3A, Negative LDO

IN

OUT(MIN)

Q

SD

100mA, Low Noise Micropower, LDO

150mA, Low Noise Micropower, LDO

500mA, Low Noise Micropower, LDO

Low Noise < 20µV

IN

Stable with 1µF Ceramic Capacitors,

OUT(MIN)

RMS,

V : 1.8V to 20V, V

= 1.22V, I = 20µA, I < 1µA, ThinSOT Package

Q SD

Low Noise < 20µV

V : 1.8V to 20V, V

RMS,

OUT(MIN)

RMS,

= 1.22V, I = 25µA, I < 1µA, MS8 Package

IN

Q

SD

Low Noise < 20µV

V : 1.8V to 20V, V

= 1.22V, I = 30µA, I < 1µA, S8 Package

IN

OUT(MIN)

Q

SD

LT1764/LT1764A 3A, Low Noise, Fast Transient Response, LDO

Low Noise < 40µV

IN

"A" Version Stable with Ceramic Capacitors,

OUT(MIN)

RMS,

V : 2.7V to 20V, V

= 1.21V, I = 1mA, I < 1µA, DD, TO220 Packages

Q SD

LTC1844

LT1962

150mA, Very Low Drop-Out LDO

Low Noise < 30µV

IN

, Stable with 1µF Ceramic Capacitors,

RMS

V : 1.6V to 6.5V, V

= 1.25V, I = 40µA, I < 1µA, ThinSOT Package

Q SD

OUT(MIN)

300mA, Low Noise Micropower, LDO

Low Noise < 20µV

IN

RMS,

V : 1.8V to 20V, V

= 1.22V, I = 30µA, I < 1µA, MS8 Package

Q SD

LT1963/LT1963A 1.5A, Low Noise, Fast Transient Response, LDO

Low Noise < 40µV

IN

DD, TO220, SOT-223, S8 Packages

"A" Version Stable with Ceramic Capacitors,

OUT(MIN)

RMS,

V : 2.1V to 20V, V

= 1.21V, I = 1mA, I < 1µA,

Q SD

LT1964

LT3023

LT3024

200mA, Low Noise Micropower, Negative LDO

Dual 100mA, Low Noise, Micropower LDO

Low Noise < 30µV Stable with Ceramic Capacitors,

RMS,

V : –0.9V to –20V, V

= –1.21V, I = 30µA, I < 3µA, ThinSOT Package

Q SD

IN

OUT(MIN)

Low Noise < 20µV

IN

Stable with 1µF Ceramic Capacitors,

OUT(MIN)

RMS,

V : 1.8V to 20V, V

= 1.22V, I = 40µA, I < 1µA, MS10E, DFN Packages

Q SD

Dual 100mA/500mA, Low Noise,

Micropower LDO

Low Noise < 20µV

IN

Stable with 1µF Ceramic Capacitors,

OUT(MIN)

RMS,

V : 1.8V to 20V, V

= 1.22V, I = 30µA, I < 1µA, DFN, TSSOP Packages

Q SD

3028f

LT/TP 0904 1K • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

16

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LT3028IDHC
厂家：	Linear
描述：	Dual 100mA/500mA Low Dropout, Low Noise,Micropower Regulators with Independent Inputs 双100毫安/ 500毫安低压差，低噪声，微功耗稳压器，带有独立输入线性稳压器IC 调节器电源电路光电二极管输出元件
文件：	总16页 (文件大小：336K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT3028IDHC [Linear]

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