LT3060EDCTR_技术文档

LT3060

45V V , Micropower,

IN

Low Noise, 100mA Low

Dropout, Linear Regulator

DESCRIPTION

FEATURES

The LT^®3060 is a micropower, low dropout voltage (LDO)

linear regulator that operates over a 1.6V to 45V input

supplyrange.Thedevicesupplies100mAofoutputcurrent

with a typical dropout voltage of 300mV. A single external

capacitor provides programmable low noise reference

performance and output soft-start functionality. The

LT3060’s quiescent current is merely 40μA and provides

fast transient response with a minimum 2.2μF output

capacitor. In shutdown, quiescent current is less than 1μA

and the reference soft-start capacitor is reset.

n

Input Voltage Range: 1.6V to 45V

n

Output Current: 100mA

n

Quiescent Current: 40μA

n

Dropout Voltage: 300mV

n

Low Noise: 30μV

(10Hz to 100kHz)

REF

RMS

n

Adjustable Output: V

= 600mV

Output Tolerance: 2% Over Line, Load and

Temperature

n

Single Capacitor Soft-Starts Reference and Lowers

Output Noise

n

Shutdown Current: < 1ꢀA

Reverse Battery Protection

Current Limit Foldback Protection

Thermal Limit Protection

8-Lead 2mm × 2mm × 0.75mm DFN and 8-Lead

The LT3060 optimizes stability and transient response

with low ESR, ceramic output capacitors. The regulator

does not require the addition of ESR as is common with

other regulators. The LT3060 typically provides 0.1% line

regulation and 0.03% load regulation.

™

ThinSOT Packages

Internal protection circuitry includes reverse-battery

protection, reverse-output protection, reverse-current

protection,currentlimitwithfoldbackandthermalshutdown.

TheLT3060isanadjustablevoltageregulatorwithanoutput

voltage range from the 600mV reference to 44.5V. The

LT3060isofferedinthethermallyenhanced8-leadTSOT-23

and 8-lead (2mm × 2mm × 0.75mm) DFN packages.

APPLICATIONS

n

Battery-Powered Systems

n

Automotive Power Supplies

n

Industrial Power Supplies

Avionic Power Supplies

n

Portable Instruments

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. ThinSOT is a Trademark of Linear Technology Corporation. All other

trademarks are the property of their respective owners.

Dropout Voltage

TYPICAL APPLICATION

350

1.8V Low Noise Regulator

T

= 25°C

J

300

250

200

150

100

50

V

OUT

IN

OUT

1.8V AT 100mA

30ꢀV NOISE

V

RMS

IN

1ꢀF

LT3060

SHDN

249k

1%

C

FF

10nF

2.3V TO

45V

10ꢀF

ADJ

124k

1%

GND REF/BYP

10nF

3060 TA01

0

10 20 30 40 50 60 70 80 90 100

OUTPUT CURRENT (mA)

3060 TA02

3060f

1

LT3060

ABSOLUTE MAXIMUM RATINGS ^{(Note 1)}

IN Pin Voltage ........................................................ 50V

OUT Pin Voltage..................................................... 50V

Input-to-Output Differential Voltage (Note 2)......... 50V

ADJ Pin Voltage ..................................................... 50V

SHDN Pin Voltage .................................................. 50V

REF/BYP Pin Voltage....................................... – 0.3V, 1V

Output Short-Circuit Duration .......................... Indeﬁnite

Operating Junction Temperature (Notes 3, 5, 13)

LT3060E, LT3060I ..............................–40°C to 125°C

LT3060MPTS8.................................... –55°C to 125°C

LT3060HTS8 ...................................... –40°C to 150°C

Storage Temperature Range...................–65°C to 150°C

Lead Temperature (TS8 Soldering, 10 sec)........... 300°C

PIN CONFIGURATION

TOP VIEW

1

2

3

4

8

7

6

5

GND

SHDN

IN

REF/BYP

ADJ

SHDN 1

GND 2

GND 3

GND 4

8 REF/BYP

7 ADJ

6 OUT

5 IN

9

GND

OUT

IN

TS8 PACKAGE

8-LEAD PLASTIC TSOT-23

DC PACKAGE

8-LEAD (2mm s 2mm) PLASTIC DFN

T

= 150°C, θ = 57°C/W TO 67°C/W*, θ = 25°C/W

JMAX

JA

JC

T

= 125°C, θ = 48°C/W TO 60°C/W*, θ = 20°C/W

JA JC

JMAX

EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB

* SEE APPLICATIONS INFORMATION SECTION

ORDER INFORMATION

LEAD FREE FINISH

LT3060EDC#PBF

LT3060IDC#PBF

LT3060ETS8#PBF

LT3060ITS8#PBF

LT3060MPTS8#PBF

LT3060HTS8#PBF

LEAD BASED FINISH

LT3060EDC

TAPE AND REEL

PART MARKING*

LDTD

PACKAGE DESCRIPTION

8-Lead (2mm × 2mm) Plastic DFN

8-Lead Plastic ThinSOT

TEMPERATURE RANGE

–40°C to 125°C

–55°C to 125°C

–40°C to 150°C

TEMPERATURE RANGE

–40°C to 125°C

–55°C to 125°C

–40°C to 150°C

LT3060EDC#TRPBF

LT3060IDC#TRPBF

LT3060ETS8#TRPBF

LT3060ITS8#TRPBF

LT3060MPTS8#TRPBF

LT3060HTS8#TRPBF

TAPE AND REEL

LDTD

LTDTF

8-Lead Plastic ThinSOT

LTDTF

8-Lead Plastic ThinSOT

LTDTF

8-Lead Plastic ThinSOT

PART MARKING*

LDTD

PACKAGE DESCRIPTION

8-Lead (2mm × 2mm) Plastic DFN

8-Lead Plastic ThinSOT

LT3060EDC#TR

LT3060IDC

LT3060IDC#TR

LDTD

LT3060ETS8

LT3060ETS8#TR

LT3060ITS8#TR

LTDTF

LT3060ITS8

LTDTF

8-Lead Plastic ThinSOT

LT3060MPTS8

LT3060HTS8

LT3060MPTS8#TR

LT3060HTS8#TR

LTDTF

8-Lead Plastic ThinSOT

LTDTF

8-Lead Plastic ThinSOT

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *The temperature grade is identiﬁed by a label on the shipping container.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

3060f

2

LT3060

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. (Note 3)

PARAMETER

CONDITIONS

= 100mA

MIN

TYP

1.6

MAX

UNITS

l

Minimum Input Voltage (Notes 4, 12)

ADJ Pin Voltage (Notes 4, 5)

I

2.1

V

LOAD

V

= 2.1V, I

= 1mA

594

588

585

600

606

612

mV

IN

LOAD

l

2.1V < V < 45V, 1mA < I

< 100mA (E, I, MP Grade)

< 100mA (H Grade)

IN

LOAD

2.1V < V < 45V, 1mA < I

IN

l

Line Regulation (Note 4)

Load Regulation (Note 4)

0.6

0.2

3.5

mV

ΔV = 2.1V to 45V, I

= 1mA

IN

LOAD

l

V

IN

V

IN

= 2.1V, I

= 1mA to 100mA

(E, I, MP Grade)

(H Grade)

4

9

mV

LOAD

Dropout Voltage

I

= 1mA

75

110

180

mV

LOAD

l

V

= V

IN

OUT(NOMINAL)

(Notes 6, 7)

I

= 10mA

150

240

300

200

300

mV

LOAD

I

= 50mA (Note 14)

280

410

mV

LOAD

I

= 100mA (Note 14)

350

510

mV

LOAD

l

GND Pin Current

I

= 0ꢀA

40

60

160

0.8

2

80

100

350

1.8

4

ꢀA

LOAD

V

= V

+ 0.55V

= 1mA

IN

OUT(NOMINAL)

= 10mA

= 50mA

= 100mA

ꢀA

(Notes 6, 8)

mA

Quiescent Current in Shutdown

ADJ Pin Bias Current (Notes 4, 9)

Output Voltage Noise

V

= 45V, V

= 2.1V

= 0V

SHDN

0.3

15

30

1

ꢀA

nA

IN

l

60

C

OUT

V

OUT

= 10ꢀF, I

= 600mV, BW = 10Hz to 100kHz

= 100mA, C

= 0.01ꢀF

ꢀV

RMS

LOAD

BYP

l

Shutdown Threshold

SHDN Pin Current (Note 10)

Ripple Rejection (Note 4)

Current Limit

V

= Off to On

= On to Off

0.8

0.7

1.5

V

OUT

0.3

l

V

SHDN

V

SHDN

= 0V

= 45V

1

3

ꢀA

0.9

85

V

– V

= 1.5V (AVG), V

= 0.5V

P-P

,

65

dB

IN

OUT

RIPPLE

f

= 120Hz, I

= 100mA

LOAD

RIPPLE

V

IN

V

IN

= 7V, V

= V

= –45V, V

= 0

200

mA

OUT

OUT(NOMINAL)

l

+ 1V (Notes 6, 12), ΔV

= –5%

110

OUT

Input Reverse Leakage Current

Reverse Output Current (Note 11)

V

= 0

OUT

300

10

ꢀA

IN

= 1.2V, V = 0

0.2

OUT

IN

3060f

3

LT3060

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. (Note 3)

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: Absolute maximum input-to-output differential voltage is not

achievable with all combinations of rated IN pin and OUT pin voltages.

With the IN pin at 50V, the OUT pin may not be pulled below 0V. The total

measured voltage from IN to OUT must not exceed 50V.

Note 6: To satisfy minimum input voltage requirements, the LT3060 is

tested and speciﬁed for these conditions with an external resistor divider

(bottom 115k, top 365k) for an output voltage of 2.5V. The external

resistor divider adds 5ꢀA of DC load on the output. The external current is

not factored into GND pin current.

Note 7: Dropout voltage is the minimum input-to-output voltage

differential needed to maintain regulation at a speciﬁed output current. In

dropout, the output voltage equals: (V – V

). For some output

DROPOUT

IN

voltages, minimum input voltage requirements limit dropout voltage.

Note 3: The LT3060 is tested and speciﬁed under pulse load conditions

such that T ≅ T . The LT3060E regulator is 100% tested at T = 25°C.

Note 8: GND pin current is tested with V = V + 0.5V and a

current source load. GND pin current will increase in dropout. See GND pin

current curves in the Typical Performance Characteristics section.

Note 9: ADJ pin bias current ﬂows out of the ADJ pin.

Note 10: SHDN pin current ﬂows into the SHDN pin.

Note 11: Reverse output current is tested with the IN pin grounded and the

OUT pin forced to the rated output voltage. This current ﬂows into the OUT

pin and out of the GND pin.

J

A

IN

(OUT(NOMINAL)

Performance at –40°C to 125°C is assured by design, characterization

and correlation with statistical process controls. The LT3060I regulator is

guaranteed over the full –40°C to 125°C operating junction temperature

range. The LT3060MP is 100% tested over the –55°C to 125°C operating

junction temperature range. The LT3060H is 100% tested over the

–40°C to 150°C operating junction temperature range. High junction

temperatures degrade operating lifetimes. Operating lifetime is derated at

junction temperatures greater than 125°C.

Note 12: To satisfy requirements for minimum input voltage, current limit

Note 4: The LT3060 is tested and speciﬁed for these conditions with the

ADJ connected to the OUT pin.

is tested at V = V

+ 1V or V = 2.1V, whichever is greater.

IN

OUT(NOMINAL)

IN

Note 13: This IC includes overtemperature protection that protects the

device during momentary overload conditions. Junction temperature

will exceed 125°C (LT3060E, LT3060I, LT3060MP) or 150°C (LT3060H)

when overtemperature circuitry is active. Continuous operation above the

speciﬁed maximum junction temperature may impair device reliability.

Note 14: The dropout voltage speciﬁcation is guaranteed for the DFN

package. The dropout voltage speciﬁcation for high output currents cannot

be guaranteed for the TS8 package due to production test limitations.

Note 5: Maximum junction temperature limits operating conditions. The

regulated output voltage speciﬁcation does not apply for all possible

combinations of input voltage and output current. Limit the output current

range if operating at the maximum input-to-output voltage differential.

Limit the input-to-output voltage differential if operating at maximum

output current. Current limit foldback will limit the maximum output

current as a function of input-to-output voltage. See Current Limit vs

V

– V

in the Typical Performance Characteristics section.

IN

OUT

3060f

4

LT3060

T_A= 25°C, unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

Typical Dropout Voltage

Guaranteed Dropout Voltage

Dropout Voltage

550

500

450

400

350

300

250

200

150

100

50

550

500

450

400

350

300

250

200

150

100

50

550

500

450

400

350

300

250

200

150

100

50

= TEST POINTS

I

= 100mA

L

T

≤ 150°C

≤ 25°C

J

I

= 50mA

= 10mA

L

T

= 125°C

J

I

T

= 25°C

J

I

= 1mA

L

0

10 20 30 40 50 60 70 80 90 100

OUTPUT CURRENT (mA)

0

10 20 30 40 50 60 70 80 90 100

OUTPUT CURRENT (mA)

–75 –50 –25

0

25 50 75 100 125 150 175

TEMPERATURE (°C)

3060 G01

3060 G02

3060 G03

Quiescent Current

ADJ Pin Voltage

2.5V Quiescent Current

80

70

60

50

40

30

20

10

0

0.612

0.610

0.608

0.606

0.604

0.602

0.600

0.598

200

175

150

125

100

75

V

= 6V

I

= 1mA

IN

T

L

OUT

= 25°C

= 500k

= 2.5V

IN

L

J

R

= 120k, I = 5ꢀA

V

= 2.1V

R

L

V

= V

IN

SHDN

0.596

0.594

0.592

V

= V

IN

SHDN

50

25

0.590

0.588

V

= 0V

V

= 0

SHDN

0

–75 –50 –25

0

25 50 75 100 125 150 175

–75 –50 –25

0

25 50 75 100 125 150 175

0

5

10 15 20 25 30 35 40 45

INPUT VOLTAGE (V)

TEMPERATURE (°C)

3060 G04

3060 G05

3060 G06

Quiescent Current

2.5V GND Pin Current

0.6V GND Pin Current

80

70

60

50

40

30

20

10

0

2.50

2.25

2.00

1.75

1.50

1.25

1.00

0.75

0.50

0.25

2.50

2.25

2.00

1.75

1.50

1.25

1.00

0.75

0.50

0.25

T

L

OUT

= 25°C

= 120k

= 0.6V

T

OUT

SHDN

= 25°C

= 2.5V

= V

T

OUT

SHDN

= 25°C

= 0.6V

= V

J

R

*FOR V

V

IN

R

L

= 25Ω

R

L

= 6Ω

L

I

= 100mA*

I

= 100mA*

V

= V

IN

SHDN

R

= 50Ω

= 50mA*

L

R

= 12Ω

= 50mA*

L

I

L

I

L

R

L

= 2.5k

R = 600Ω

L

I = 1mA*

L

R

L

= 250Ω

= 10mA*

R

= 60Ω

= 10mA*

L

I

= 1mA*

I

L

V

= 0

SHDN

0

5

10 15 20 25 30 35 40 45

INPUT VOLTAGE (V)

0

1

2

3

4

5

6

7

8

9

10

0

1

2

3

4

5

6

7

8

9

10

INPUT VOLTAGE (V)

3060 G07

3060 G08

3060 G09

3060f

5

LT3060

T_A= 25°C, unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

SHDN Pin Input Current

GND Pin Current vs I_LOAD

SHDN Pin Threshold

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

1.5

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

2.0

V

= V

+ 1V

OUT(NOMINAL)

IN

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

OFF TO ON

ON TO OFF

0

10 20 30 40 50 60 70 80 90 100

OUTPUT CURRENT (mA)

–75 –50 –25

0

25 50 75 100 125 150 175

0

5

10 15 20 25 30 35 40 45

TEMPERATURE (°C)

SHDN PIN VOLTAGE (V)

3060 G10

3060 G11

3060 G12

SHDN Pin Input Current

ADJ Pin Bias Current

Current Limit vs V_IN–V_OUT

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

50

40

250

225

200

175

150

125

100

75

$V

OUT

= –5%

V

= 45V

SHDN

T

= 125°C

J

T

= 25°C

J

30

20

T

= –50°C

J

10

0

–10

–20

–30

–40

–50

50

25

0

–75 –50 –25

0

25 50 75 100 125 150 175

–75 –50 –25

0

25 50 75 100 125 150 175

0

5

10 15 20 25 30 35 40 45

INPUT/OUTPUT DIFFERENTIAL (V)

TEMPERATURE (°C)

3060 G13

3060 G14

3060 G15

Current Limit vs Temperature

Reverse Output Current

250

225

200

175

150

125

100

75

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

50

45

40

35

30

25

20

15

10

5

T

= 25°C

= 0V

V

= 0V

= V

J

IN

OUT

V

= 1.2V

ADJ

CURRENT FLOWS

INTO OUT PIN

V

OUT

= V

ADJ

50

V

= 7V

OUT

IN

OUT

25

OUT

= 0V

0

–75 –50 –25

0

25 50 75 100 125 150 175

0

5

10 15 20 25 30 35 40 45

OUTPUT VOLTAGE (V)

–75 –50 –25

0

25 50 75 100 125 150 175

TEMPERATURE (°C)

3060 G16

3060 G17

3060 G18

3060f

6

LT3060

T_A= 25°C, unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

Input Ripple Rejection

5V Input Ripple Rejection

Ripple Rejection vs Temperature

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

C

= C = 10nF

FF

REF/BYP

C

= 10nF

REF/BYP

V

= 0.6V

OUT

C

= 10nF, C = 0

FF

REF/BYP

C

= 0

REF/BYP

V

= 5V

OUT

C

= 10ꢀF

OUT

I

C

V

= 100mA

I

= 100mA

= 5V

L

OUT

I

V

= 100mA

= 0.6V

IN

= C = 0

V

C

V

L

OUT

C

= C = 0

FF

REF/BYP

= V

FF

REF/BYP

+ 1.5V +

= 10ꢀF

IN

OUT(NOMINAL)

RIPPLE

OUT

C

= 2.2ꢀF

= 2.6V + 0.5V RIPPLE AT f = 120Hz

50mV

= 6V + 50mV

RIPPLE

RMS

OUT

P-P

RMS

IN

10

100

1k

10k 100k 1M

10M

10

100

1k

10k 100k 1M

10M

–75 –50 –25

0

25 50 75 100 125 150 175

FREQUENCY (Hz)

TEMPERATURE (°C)

3060 G19

3060 G20

3060 G21

Output Noise Spectral Density

C_REF/BYP= 0, C_FF= 0

Minimum Input Voltage

Load Regulation

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

10

1

4

3

2

I

= 100mA

L

I

= 50mA

1

L

0

V

= 5V

OUT

–1

–2

–3

–4

= 3.3V

= 2.5V

= 1.8V

= 1.5V

= 1.2V

= 0.6V

0.1

0.01

V

= 2.1V

IN

OUT

L

C

I

= 10ꢀF

OUT

L

= 0.6V

V

= V

IN

= 100mA

SHDN

$I = 1mA TO 100mA

–75 –50 –25

0

25 50 75 100 125 150 175

TEMPERATURE (°C)

10

100

1k

FREQUENCY (Hz)

10k

100k

–75 –50 –25

0

25 50 75 100 125 150 175

TEMPERATURE (°C)

3060 G22

3060 G24

3060 G23

Output Noise Spectral Density

vs C_REF/BYP, C_FF= 0

Output Noise Spectral Density

vs C_FF, C_REF/BYP= 10nF

RMS Output Noise vs Load Current

vs C_REF/BYP, C_FF= 0

10

1

10

1

110

100

90

80

70

60

50

40

30

20

10

0

V

C

= 0.6V

= 10ꢀF

C

= 100pF

OUT

REF/BYP

V

= 5V

OUT

C

= 0

REF/BYP

C

= 10pF

C

= 0

REF/BYP

FF

V

= 0.6V

OUT

C

= 10nF

FF

C

= 100pF

REF/BYP

0.1

0.01

0.1

0.01

C

= 1nF

REF/BYP

C

= 10nF

REF/BYP

C

= 10nF

C

= 1nF

1k

C

= 1nF

REF/BYP

FF

REF/BYP

V

C

L

= 5V

OUT

C

= 100pF

C

L

= 10ꢀF

FF

OUT

= 10ꢀF

C

1

= 100nF

REF/BYP

I

= 100mA

I

= 100mA

10

100

1k

FREQUENCY (Hz)

10k

100k

10

100

10k

100k

0.01

0.1

10

100

FREQUENCY (Hz)

LOAD CURRENT (mA)

3060 G25

3060 G26

3060 G27

3060f

7

LT3060

T_A= 25°C, unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

RMS Output Noise vs Load Current

C_REF/BYP= 10nF, C_FF= 0

RMS Output Noise

vs Feedforward Capacitor (C_FF)

170

160

150

140

130

120

110

100

90

120

f = 10Hz TO 100kHz

= 10ꢀF

V

= 5V

V

= 5V

OUT

110

100

90

80

70

60

50

40

30

20

10

0

C

= 10nF

C

REF/BYP

OUT

V

= 3.3V

= 10ꢀF

OUT

V

= 2.5V

I

= 5ꢀA

OUT

FB-DIVIDER

= 100mA

L

V

= 2.5V

OUT

V

= 3.3V

OUT

V

= 1.8V

OUT

V

= 1.5V

OUT

80

70

60

50

40

V

= 1.2V

= 0.6V

OUT

30

V

= 1.8V

V

= 1.2V

V = 0.6V

OUT

20

= 1.5V

10

OUT

0

0.01

0.1

1

10

100

10p

100p

1n

10n

LOAD CURRENT (mA)

FEEDFORWARD CAPACITOR, C (F)

FF

3060 G28

3060 G29

5V 10Hz to 100kHz Output Noise

C_REF/BYP= 10nF, C_FF= 10nF

5V 10Hz to 100kHz Output Noise

C_REF/BYP= 10nF, C_FF= 0

V

OUT

100ꢀV/DIV

3060 G30

3060 G31

C

I

= 10ꢀF

1ms/DIV

C

I

= 10ꢀF

1ms/DIV

OUT

L

OUT

L

= 100mA

5V Transient Response

C_FF= 10nF

5V Transient Response

C_FF= 0

V

= 5V

V

= 5V

OUT

V

OUT

20mV/DIV

OUT

50mV/DIV

ΔI

= 10mA TO 100mA

ΔI

= 10mA TO 100mA

OUT

I

OUT

50mA/DIV

OUT

50mA/DIV

3060 G32

3060 G33

V

C

= 6V

100ꢀs/DIV

V

C

= 6V

20ꢀs/DIV

IN

OUT

IN

OUT

= C = 10ꢀF

IN

I

= 5ꢀA

I

= 5ꢀA

FB-DIVIDER

3060f

8

LT3060

T_A= 25°C, unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

5V Transient Response

Load Dump

SHDN Transient Response

C_REF/BYP= 0

V

OUT

V

= 5V

OUT

V

OUT

2V/DIV

= 50Ω

10mV/DIV

R

L

V

= 12V TO 45V

IN

REF/BYP

500mV/DIV

SHDN

1V/DIV

V

IN

10V/DIV

3060 G34

3060 G35

2ms/DIV

4ms/DIV

C

= C = 2.2ꢀF

C

= C = 2.2ꢀF

OUT IN

OUT

IN

= C = 10nF

C

= 0

FF

REF/BYP

FF

= 5ꢀA

I

FB-DIVIDER

SHDN Transient Response

C_REF/BYP= 10nF

Start-Up Time

vs REF/BYP Capacitor

100

10

C

= 0

FF

V

OUT

2V/DIV

= 50Ω

R

L

REF/BYP

500mV/DIV

1

SHDN

1V/DIV

0.1

3060 G36

4ms/DIV

C

= C = 2.2ꢀF

IN

OUT

FF

= 0

0.01

10p

100p

1n

10n

100n

REF/BYP CAPACITOR (F)

3060 G37

3060f

9

LT3060

PIN FUNCTIONS ^(DC8/TS8)

REF/BYP (Pin 1 / Pin 8): Reference/Bypass. Connecting

a single capacitor from this pin to GND bypasses the

LT3060’s reference noise and soft-starts the reference.

A 10nF bypass capacitor typically reduces output voltage

An input bypass capacitor in the range of 1ꢀF to 10ꢀF

sufﬁces. The LT3060 withstands reverse voltages on the

IN pin with respect to its GND and OUT pins. In a reversed

input situation, such as a battery plugged in backwards,

the LT3060 behaves as if a large resistor is in series with

its input. Limited reverse current ﬂows into the LT3060

and no reverse voltage appears at the load. The device

protects itself and the load.

noise to 30ꢀV

in a 10Hz to 100kHz bandwidth. Soft-

RMS

starttimeisdirectlyproportionaltotheREF/BYPcapacitor

value. If the LT3060 is placed in shutdown, REF/BYP is

actively pulled low by an internal device to reset soft-start.

If low noise or soft-start performance is not required, this

pin must be left ﬂoating (unconnected). Do not drive this

pin with any active circuitry.

SHDN (Pin 7 / Pin 1): Shutdown. Pulling the SHDN pin

low puts the LT3060 into a low power state and turns

the output off. Drive the SHDN pin with either logic or an

open collector/drain with a pull-up resistor. The resistor

supplies the pull-up current to the open collector/drain

logic, normally several microamperes, and the SHDN

pin current, typically less than 3ꢀA. If unused, connect

the SHDN pin to IN. The LT3060 does not function if the

SHDN pin is not connected. The SHDN pin cannot be

driven below GND unless tied to the IN pin. If the SHDN

pin is driven below GND while IN is powered, the output

may turn on. SHDN pin logic cannot be referenced to a

negative supply voltage.

ADJ (Pin 2 / Pin 7): Adjust. This pin is the error ampliﬁer’s

invertingterminal.It’stypicalbiascurrentof15nAﬂowsout

ofthepin(seecurveofADJPinBiasCurrentvsTemperature

in the Typical Performance Characteristics section). The

ADJ pin voltage is 600mV referenced to GND.

OUT(Pins3, 4/Pin6):Output. Thesepin(s)supplypower

to the load. Stability requirements demand a minimum

2.2ꢀF ceramic output capacitor to prevent oscillations.

Large load transient applications require larger output

capacitors to limit peak voltage transients. See the

Applications Information section for details on transient

response and reverse output characteristics. Permissible

output voltage range is 600mV to 44.5V.

GND (Pin 8, Exposed Pad Pin 9 / Pins 2, 3, 4): Ground.

Connectthebottomoftheexternalresistordividerthatsets

theoutputvoltagedirectlytoGNDforoptimumregulation.

FortheDFNpackage,tieexposedpadPin9directlytoPin8

andthePCBground. Thisexposedpadprovidesenhanced

thermalperformancewithitsconnectiontothePCBground.

See the Applications Information section for thermal

considerations and calculating junction temperature.

IN (Pins 5, 6 / Pin 5): Input. These pin(s) supply power to

thedevice.TheLT3060requiresalocalINbypasscapacitor

if it is located more than six inches from the main input

ﬁlter capacitor. In general, battery output impedance rises

with frequency, so adding a bypass capacitor in battery-

powered circuits is advisable.

3060f

10

LT3060

APPLICATIONS INFORMATION

TheLT3060isamicropower,lownoise,lowdropoutvoltage,

100mA linear regulator with micropower shutdown. The

device supplies up to 100mA at a typical dropout voltage

of 300mV and operates over a 1.6V to 45V input range.

IN

OUT

ADJ

V

OUT

V

LT3060

IN

R2

R1

⎛

⎞

R2

R1

SHDN

V_OUT= 0.6V 1+

– I

(

• R2

ADJ

)

⎜

⎟

⎝

⎠

GND REF/BYP

V_ADJ= 0.6V

A single external capacitor can provide programmable

low noise reference performance and output soft-start

functionality. For example, connecting a 10nF capacitor

from the REF/BYP pin to GND lowers output noise to

I_ADJ= 15nA at 25ºC

OUTPUT RANGE = 0.6V to 44.5V

3060 F01

Figure 1. Adjustable Operation

30ꢀV

overa10Hzto100kHzbandwidth.Thiscapacitor

RMS

The ADJ pin bias current, 15nA at 25˚C, ﬂows from the

ADJ pin through R1 to GND. Calculate the output voltage

usingtheformulainFigure1. ThevalueofR1shouldbeno

greater than 124k to provide a minimum 5ꢀA load current

so that errors in the output voltage, caused by the ADJ

pin bias current, are minimized. Note that in shutdown,

the output is turned off and the divider current is zero.

CurvesofADJPinVoltagevsTemperatureandADJPinBias

CurrentvsTemperatureappearintheTypicalPerformance

Characteristics Section.

also soft-starts the reference and prevents output voltage

overshoot at turn-on.

TheLT3060’squiescentcurrentismerely40μAbutprovides

fast transient response with a minimum low ESR 2.2μF

ceramic output capacitor. In shutdown, quiescent current

is less than 1μA and the reference soft-start capacitor is

reset.

The LT3060 optimizes stability and transient response

with low ESR, ceramic output capacitors. The regulator

does not require the addition of ESR as is common with

other regulators. The LT3060 typically provides 0.1% line

regulation and 0.03% load regulation.

The LT3060 is tested and speciﬁed with the ADJ pin tied

to the OUT pin, yielding V

= 0.6V. Speciﬁcations for

OUT

output voltages greater than 0.6V are proportional to the

ratio of the desired output voltage to 0.6V:V /0.6V. For

OUT

Internal protection circuitry includes reverse-battery

protection, reverse-output protection, reverse-current

protection, current limit with foldback and thermal

shutdown.

example, load regulation for an output current change

of 1mA to 100mA is 0.2mV (typical) at V

= 0.6V. At

OUT

V

= 12V, load regulation is:

OUT

12V

0.6V

• (0.2mV) = 4mV

This “bullet-proof” protection set makes it ideal for use in

battery-powered systems. In battery backup applications

where the output is held up by a backup battery and the

input is pulled to ground, the LT3060 acts like it has a

diodeinserieswithitsoutputandpreventsreversecurrent

ﬂow. Additionally, in dual supply applications where the

regulator load is returned to a negative supply, the output

can be pulled below ground by as much as 45V and the

device still starts normally and operates.

Table1shows1%resistordividervaluesforsomecommon

output voltages with a resistor divider current of 5ꢀA.

Table 1. Output Voltage Resistor Divider Values

V

(V)

R1

R2

(kΩ)

OUT

(kΩ)

1.2

118

121

124

115

124

115

118

182

249

365

499

562

845

1.5

1.8

2.5

3

Adjustable Operation

TheLT3060hasanoutputvoltagerangeof0.6Vto44.5V.The

output voltage is set by the ratio of two external resistors,

as shown in Figure 1. The device servos the output to

maintaintheADJpinvoltageat0.6Vreferencedtoground.

The current in R1 is then equal to 0.6V/R1, and the current

in R2 is the current in R1 minus the ADJ pin bias current.

3.3

5

3060f

11

LT3060

APPLICATIONS INFORMATION

Bypass Capacitance, Output Voltage Noise and

Transient Response

During start-up, the internal reference will soft-start if a

reference bypass capacitor is present. Regulator start-

up time is directly proportional to the size of the bypass

capacitor, slowing to 6ms with a 10nF bypass capacitor

(See Start-up Time vs REF/BYP Capacitor in the Typical

Performance Characteristics section). The reference

bypass capacitor is actively drained during shutdown to

reset the internal reference soft-start.

The LT3060 regulator provides low output voltage noise

over the 10Hz to 100kHz bandwidth while operating at

full load with the addition of a reference bypass capacitor

(C

) from the REF/BYP pin to GND. A good quality,

REF/BYP

lowleakagecapacitorisrecommended. Thiscapacitorwill

bypass the internal reference of the regulator, providing a

lowfrequencynoisepole.Withtheuseof10nFforC

REF/BYP,

IN

OUT

V

OUT

the output voltage noise decreases to as low as 30ꢀV

RMS

C

R2

R1

V

FF

OUT

LT3060

IN

when the output voltage is set for 0.6V. For higher output

voltages (generated by using a feedback resistor divider),

the output voltage noise gains up accordingly when using

SHDN

ADJ

GND REF/BYP

4.7nF

5ꢀA

C_FF

≥

• I

(

)

FB−DIVIDER

C

by itself.

C

REF/BYP

V_OUT

I_FB−DIVIDER

=

3060 F02

R1+R2

Tolowertheoutputvoltagenoiseforhigheroutputvoltages,

includeafeedforwardcapacitor(C )fromV totheADJ

Figure 2. Feedforward Capacitor for Fast Transient Response

FF

OUT

pin.Agoodquality,lowleakagecapacitorisrecommended.

Thiscapacitorwillbypasstheerrorampliﬁeroftheregulator,

providingalowfrequencynoisepole. Withtheuseof10nF

V

C

= 5V

OUT

= 10ꢀF

I

= 5ꢀA

FB-DIVIDER

0

for both C and C

, output voltage noise decreases

FF

RMS

REF/BYP

to 30ꢀV

when the output voltage is set to 5V by a 5ꢀA

100pF

1nF

feedback resistor divider. If the current in the feedback

resistor divider is doubled, C must also be doubled to

FF

10nF

achieve equivalent noise performance.

LOAD CURRENT

100mA/DIV

Higher values of output voltage noise are often measured

if care is not exercised with regard to circuit layout and

testing. Crosstalk from nearby traces induces unwanted

noise onto the LT3060’s output. Power supply ripple

rejection must also be considered. The LT3060 regulator

doesnothaveunlimitedpowersupplyrejectionandpasses

a small portion of the input noise through to the output.

3060 F03

100ꢀs/DIV

Figure 3. Transient Response vs Feedforward Capacitor

Start-uptimeisalsoaffectedbythepresenceofafeedforward

capacitor. Start-up time is directly proportional to the size

of the feedforward capacitor and the output voltage, and

is inversely proportional to the feedback resistor divider

current,slowingto15mswitha4.7nFfeedforwardcapacitor

and a 10ꢀF output capacitor for an output voltage set to

5V by a 5ꢀA feedback resistor divider.

Using a feedforward capacitor (C ) from V

to the ADJ

OUT

FF

pin has the added beneﬁt of improving transient response

foroutputvoltagesgreaterthan0.6V. Withnofeedforward

capacitor, the settling time will increase as the output

voltage is raised above 0.6V. Use the equation in Figure 2

Output Capacitance

to determine the minimum value of C to achieve a

FF

transient response that is similar to 0.6V output voltage

performance regardless of the chosen output voltage

(See Figure 3 and Transient Response in the Typical Perf-

ormance Characteristics section).

The LT3060 regulator is stable with a wide range of output

capacitors.TheESRoftheoutputcapacitoraffectsstability,

mostnotablywithsmallcapacitors.Useaminimumoutput

capacitor of 2.2ꢀF with an ESR of 3Ω or less to prevent

oscillations. If a feedforward capacitor is used with output

3060f

12

LT3060

APPLICATIONS INFORMATION

voltages set for greater than 24V, use a minimum output

capacitor of 4.7ꢀF. The LT3060 is a micropower device

and output load transient response is a function of output

capacitance. Larger values of output capacitance decrease

the peak deviations and provide improved transient

responseforlargerloadcurrentchanges.Bypasscapacitors,

used to decouple individual components powered by the

LT3060, increase the effective output capacitor value. For

applications with large load current transients, a low ESR

ceramic capacitor in parallel with a bulk tantalum capacitor

often provides an optimally damped response.

the system or thermal transients. The resulting voltages

produced cause appreciable amounts of noise. A ceramic

capacitorproducedthetraceinFigure6inresponsetolight

tapping from a pencil. Similar vibration induced behavior

can masquerade as increased output voltage noise.

20

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10ꢀF

0

X5R

–20

–40

Give extra consideration to the use of ceramic capacitors.

Manufacturers make ceramic capacitors with a variety of

dielectrics, each with different behavior across tempera-

ture and applied voltage. The most common dielectrics

are speciﬁed with EIA temperature characteristic codes

of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics

provide high C-V products in a small package at low cost,

butexhibitstrongvoltageandtemperaturecoefﬁcients, as

shown in Figures 4 and 5. When used with a 5V regulator,

a 16V 10ꢀF Y5V capacitor can exhibit an effective value

as low as 1ꢀF to 2ꢀF for the DC bias voltage applied, and

over the operating temperature range. The X5R and X7R

dielectrics yield much more stable characteristics and are

more suitable for use as the output capacitor.

–60

Y5V

–80

–100

0

8

12 14

2

4

6

10

16

DC BIAS VOLTAGE (V)

3060 F04

Figure 4. Ceramic Capacitor DC Bias Characteristics

40

20

X5R

0

–20

–40

Y5V

The X7R type works over a wider temperature range and

has better temperature stability, while the X5R is less

expensive and is available in higher values. Care still must

beexercisedwhenusingX5RandX7Rcapacitors;theX5R

and X7R codes only specify operating temperature range

and maximum capacitance change over temperature.

Capacitance change due to DC bias with X5R and X7R

capacitors is better than Y5V and Z5U capacitors, but can

still be signiﬁcant enough to drop capacitor values below

appropriate levels. Capacitor DC bias characteristics tend

toimproveascomponentcasesizeincreases,butexpected

capacitance at operating voltage should be veriﬁed.

–60

–80

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10ꢀF

–100

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

3060 F05

Figure 5. Ceramic Capacitor Temperature Characteristics

V

C

I

= 0.6V

= 10ꢀF

= 10nF

= 100mA

OUT

REF/BYP

LOAD

V

OUT

500ꢀV/DIV

Voltageandtemperaturecoefﬁcientsarenottheonlysources

ofproblems. Someceramiccapacitorshaveapiezoelectric

response. A piezoelectric device generates voltage across

its terminals due to mechanical stress, similar to the way

a piezoelectric accelerometer or microphone works. For a

ceramic capacitor, the stress is induced by vibrations in

3060 F06

4ms/DIV

Figure 6. Noise Resulting from Tapping on a Ceramic Capacitor

3060f

13

LT3060

APPLICATIONS INFORMATION

Overload Recovery

GND pin current is determined using the GND Pin Current

curvesintheTypicalPerformanceCharacteristicssection.

Power dissipation equals the sum of the two components

listed above.

Like many IC power regulators, the LT3060 has safe

operating area protection. The safe operating area

protection decreases current limit as input-to-output

voltage increases, and keeps the power transistor inside

a safe operating region for all values of input-to-output

voltage. The LT3060 provides some output current at all

values of input-to-output voltage up to the speciﬁed 45V

operational maximum.

The LT3060 regulator has internal thermal limiting that

protects the device during overload conditions. For

continuous normal conditions, the maximum junction

temperature of 125°C (E-grade, I-grade, MP-grade) or

150°C(H-grade)mustnotbeexceeded.Carefullyconsider

allsourcesofthermalresistancefromjunction-to-ambient

including other heat sources mounted in proximity to the

LT3060.

Whenpowerisﬁrstapplied, theinputvoltagerisesandthe

output follows the input; allowing the regulator to start-up

intoveryheavyloads. Duringstart-up, astheinputvoltage

is rising, the input-to-output voltage differential is small,

allowing the regulator to supply large output currents.

With a high input voltage, a problem can occur wherein

the removal of an output short will not allow the output

to recover. Other regulators, such as the LT1083/LT1084/

LT1085familyandLT1764Aalsoexhibitthisphenomenon,

so it is not unique to the LT3060. The problem occurs

with a heavy output load when the input voltage is high

and the output voltage is low. Common situations are: (1)

immediately after the removal of a short-circuit or (2) if

the shutdown pin is pulled high after the input voltage is

alreadyturnedon.Theloadlineintersectstheoutputcurrent

curve at two points creating two stable output operating

points for the regulator. With this double intersection, the

input power supply needs to be cycled down to zero and

brought up again for the output to recover.

The underside of the LT3060 DFN package has exposed

2

metal (1mm ) from the lead frame to the die attachment.

The package allows heat to directly transfer from the

die junction to the printed circuit board metal to control

maximumoperatingjunctiontemperature.Thedual-in-line

pin arrangement allows metal to extend beyond the ends

of the package on the topside (component side) of a PCB.

Connect this metal to GND on the PCB. The multiple IN

and OUT pins of the LT3060 also assist in spreading heat

to the PCB.

For surface mount devices, heat sinking is accomplished

by using the heat spreading capabilities of the PC board

and its copper traces. Copper board stiffeners and plated

through-holes also can spread the heat generated by

power devices.

The following tables list thermal resistance for several

different board sizes and copper areas. All measurements

were taken in still air on a 4 layer FR-4 board with 1oz

solid internal planes and 2oz top/bottom external trace

planes with a total board thickness of 1.6mm. The four

layers were electrically isolated with no thermal vias

present. PCB layers, copper weight, board layout and

thermal vias will affect the resultant thermal resistance.

For more information on thermal resistance and high

thermal conductivity test boards, refer to JEDEC standard

JESD51, notably JESD51-12 and JESD51-7. Achieving

low thermal resistance necessitates attention to detail

and careful PCB layout.

Thermal Considerations

The power handling capability of the device will be limited

by the maximum rated junction temperature (125°C for

LT3060E, LT3060I, LT3060MP or 150°C for LT3060H).

Two components comprise the power dissipated by the

device:

1. Output current multiplied by the input/output voltage

differential: I

• (V –V ), and

OUT

IN OUT

2. GND pin current multiplied by the input voltage:

• V

I

GND

IN

3060f

14

LT3060

APPLICATIONS INFORMATION

Table 2. DC Package, 8-Lead DFN

COPPER AREA

The maximum junction temperature equals the maximum

ambient temperature plus the maximum junction tem-

perature rise above ambient or:

BOARD AREA

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)

TOPSIDE* BACKSIDE

2

(mm )

T

= 85°C + 27.8°C = 112.8°C

JMAX

2500

1000

225

100

50

2500

48°C/W

49°C/W

50°C/W

54°C/W

60°C/W

Protection Features

The LT3060 incorporates several protection features

that make it ideal for use in battery-powered circuits. In

addition to the normal protection features associated with

monolithicregulators,suchascurrentlimitingandthermal

limiting, the device also protects against reverse-input

voltages, reverse-output voltages and reverse output-to-

input voltages.

*Device is mounted on topside

Table 3. TS8 Package, 8 Lead TSOT-23

COPPER AREA

BOARD AREA

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)

TOPSIDE* BACKSIDE

2

(mm )

Current limit protection and thermal overload protection

protect the device against current overload conditions at

the output of the device. The typical thermal shutdown

temperatureis165°C.Fornormaloperation,donotexceed

a junction temperature of 125°C (LT3060E, LT3060I,

LT3060MP) or 150°C (LT3060H).

2500

1000

225

100

50

2500

57°C/W

58°C/W

59°C/W

63°C/W

67°C/W

*Device is mounted on topside

The LT3060 IN pin withstands reverse voltages up to 50V.

Thedevicelimitscurrentﬂowtolessthan300ꢀA(typically

less than 50ꢀA) and no negative voltage appears at OUT.

Thedeviceprotectsbothitselfandtheloadagainstbatteries

that are plugged in backwards.

Calculating Junction Temperature

Example: Given an output voltage of 2.5V, an input volt-

age range of 12V 5%, an output current range of 0mA

to 50mA and a maximum ambient temperature of 85°C,

what will the maximum junction temperature be?

The SHDN pin cannot be driven below GND unless tied to

the IN pin. If the SHDN pin is driven below GND while IN is

powered, the output may turn on. SHDN pin logic cannot

be referenced to a negative supply voltage.

The power dissipated by the device equals:

I

• (V

–V ) + I

• V

OUT(MAX)

IN(MAX) OUT

GND IN(MAX)

The LT3060 incurs no damage if its output is pulled below

ground. If the input is left open-circuit or grounded, the

output can be pulled below ground by 50V. No current

ﬂows through the pass transistor from the output.

However, current ﬂows in (but is limited by) the resistor

divider that sets the output voltage. Current ﬂows from

the bottom resistor in the divider and from the ADJ pin’s

internal clamp through the top resistor in the divider to

the external circuitry pulling OUT below ground. If the

input is powered by a voltage source, the output sources

current equal to its current limit capability and the LT3060

protects itself by thermal limiting. In this case, grounding

the SHDN pin turns off the device and stops the output

from sourcing current.

where,

I

= 50mA

= 12.6V

OUT(MAX)

V

IN(MAX)

I

at (I = 50mA, V = 12.6V) = 0.6mA

OUT IN

GND

So,

P = 50mA • (12.6V – 2.5V) + 0.6mA • 12.6V = 0.513W

Using a DFN package, the thermal resistance ranges from

48°C/W to 60°C/W depending on the copper area with

no thermal vias. So the junction temperature rise above

ambient approximately equals:

0.513W • 54°C/W = 27.8°C

3060f

15

LT3060

APPLICATIONS INFORMATION

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

The LT3060 incurs no damage if the ADJ pin is pulled

above or below ground by less than 50V. If the input is

left open-circuit or grounded, the ADJ pin performs like

a large resistor (typically 30k) in series with a diode when

pulled below ground and like 30k in series with two diodes

when pulled above ground.

T

= 25°C

= 0V

J

IN

V

CURRENT FLOWS

INTO OUT PIN

V

= V

OUT

ADJ

In circuits where a backup battery is required, several

different input/output conditions can occur. The output

voltage may be held up while the input is either pulled to

ground, pulled to some intermediate voltage or left open-

circuit. Current ﬂow back into the output follows the curve

shown in Figure 7.

OUT

0

5

10 15 20 25 30 35 40 45

OUTPUT VOLTAGE (V)

3060 F07

Figure 7. Reverse Output Current

If the LT3060’s IN pin is forced below the OUT pin or the

OUT pin is pulled above the IN pin, input current typically

drops to less than 1ꢀA. This occurs if the LT3060 input is

connected to a discharged (low voltage) battery and either

abackupbatteryorasecondregulatorholdsuptheoutput.

The state of the SHDN pin has no effect on the reverse

current if the output is pulled above the input.

3060f

16

LT3060

TYPICAL APPLICATION

Paralleling of Regulators for Higher Output Current

R1

0.15Ω

2.5V

200mA

IN

OUT

ADJ

R8

1.91k

1%

+

C2

LT3060

C1

2.2ꢀF

V

IN

> 2.9V

4.7ꢀF

SHDN

R9

604Ω

1%

GND REF/BYP

C3

1nF

R2

0.15Ω

IN

OUT

LT3060

SHDN

GND REF/BYP

R6

1.74k

1%

SHDN

ADJ

R7

604Ω

1%

C4

1nF

R3

200Ω

R4

200Ω

R5

1k

7

3

+

–

6

LT1637

4

2

C5

10nF

3060 TA03

3060f

17

LT3060

PACKAGE DESCRIPTION

DC Package

8-Lead Plastic DFN (2mm × 2mm)

(Reference LTC DWG # 05-08-1719 Rev Ø)

0.70 0.05

2.55 0.05

0.64 0.05

1.15 0.05

(2 SIDES)

PACKAGE

OUTLINE

0.25 0.05

0.45 BSC

1.37 0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

R = 0.115

TYP

5

8

R = 0.05

TYP

0.40 0.10

PIN 1 NOTCH

2.00 0.10 0.64 0.10

(4 SIDES)

(2 SIDES)

R = 0.20 OR

0.25 s 45°

CHAMFER

PIN 1 BAR

TOP MARK

(SEE NOTE 6)

(DC8) DFN 0106 REVØ

4

1

0.23 0.05

0.45 BSC

0.75 0.05

0.200 REF

1.37 0.10

(2 SIDES)

BOTTOM VIEW—EXPOSED PAD

0.00 – 0.05

NOTE:

1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

3060f

18

LT3060

PACKAGE DESCRIPTION

TS8 Package

8-Lead Plastic TSOT-23

(Reference LTC DWG # 05-08-1637)

2.90 BSC

(NOTE 4)

0.52

MAX

0.65

REF

1.22 REF

1.50 – 1.75

(NOTE 4)

2.80 BSC

1.4 MIN

3.85 MAX 2.62 REF

PIN ONE ID

RECOMMENDED SOLDER PAD LAYOUT

PER IPC CALCULATOR

0.22 – 0.36

8 PLCS (NOTE 3)

0.65 BSC

0.80 – 0.90

0.20 BSC

DATUM ‘A’

0.01 – 0.10

1.00 MAX

0.30 – 0.50 REF

1.95 BSC

0.09 – 0.20

(NOTE 3)

TS8 TSOT-23 0802

NOTE:

1. DIMENSIONS ARE IN MILLIMETERS

2. DRAWING NOT TO SCALE

3. DIMENSIONS ARE INCLUSIVE OF PLATING

4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR

5. MOLD FLASH SHALL NOT EXCEED 0.254mm

6. JEDEC PACKAGE REFERENCE IS MO-193

3060f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

19

LT3060

RELATED PARTS

PART

DESCRIPTION

NUMBER

COMMENTS

LT1761

LT1762

LT1763

LT1764/A

100mA, Low Noise LDO

300mV Dropout Voltage, Low Noise: 20ꢀV

340mV Dropout Voltage, Low Noise: 40ꢀV

, V = 1.8V to 20V, ThinSOT package

RMS IN

150mA, Low Noise LDO

, V = 1.8V to 20V, MS8 package

RMS IN

500mA, Low Noise LDO

, V = 1.8V to 20V, SO-8 Package

RMS IN

3A, Fast Transient Response, Low Noise LDO

, V = 2.7V to 20V, TO-220 and DD

RMS IN

Packages “A” version stable also with ceramic caps

LT1962

300mA, Low Noise LDO

270mV Dropout Voltage, Low Noise: 20ꢀV , V = 1.8V to 20V, MS8 Package

RMS IN

LT1963/A

1.5A Low Noise, Fast Transient Response LDO

340mV Dropout Voltage, Low Noise: 40ꢀV

, V = 2.5V to 20V, “A” version stable

RMS IN

with ceramic caps, TO-220, DD, SOT-223 and SO-8 Packages

LT1964

LT1965

200mA, Low Noise, Negative LDO

340mV Dropout Voltage, Low Noise 30ꢀV , V = –1.8V to –20V, ThinSOT Package

RMS IN

1.1A, Low Noise, Low Dropout Linear Regulator 290mV Dropout Voltage, Low Noise: 40ꢀV

, V : 1.8V to 20V, V : 1.2V to 19.5V,

OUT

RMS IN

stable with ceramic caps, TO-220, DDPak, MSOP and 3 × 3 DFN Packages

LT3008

20mA, 45V, 3uA Iq Micropower LDO

300mV Dropout Voltage, Low Iq: 3ꢀA, V = 2.0V to 45V, V

= 0.6V to 39.5V;

IN

OUT

ThinSOT and 2 × 2 DFN-6 packages

LT3009

LT3010

20mA, 3uA Iq Micropower LDO

280mV Dropout Voltage, Low Iq: 3ꢀA, V = 1.6V to 20V, ThinSOT and SC-70 packages

IN

50mA, High Voltage, Micropower LDO

V : 3V to 80V, V : 1.275V to 60V, VDO = 0.3V, I = 30ꢀA, ISD < 1ꢀA, Low Noise:

IN

OUT

Q

<100ꢀV

, Stable with 1ꢀF Output Capacitor, Exposed MS8 Package

RMS

LT3011

50mA, High Voltage, Micropower LDO with

PWRGD

V : 3V to 80V, V : 1.275V to 60V, VDO = 0.3V, I = 46ꢀA, ISD < 1ꢀA, Low Noise:

IN

OUT

Q

<100ꢀV

, PowerGood, Stable with 1ꢀF Output Capacitor, 3 × 3 DFN-10 and Exposed

RMS

MS12E Packages

LT3012

LT3013

250mA, 4V to 80V, Low Dropout Micropower

Linear Regulator

V : 4V to 80V, V : 1.24V to 60V, VDO = 0.4V, I = 40ꢀA, ISD < 1ꢀA, TSSOP-16E and

IN OUT Q

4mm × 3mm DFN-12 Packages

250mA, 4V to 80V, Low Dropout Micropower

Linear Regulator with PWRGD

V : 4V to 80V, V : 1.24V to 60V, VDO = 0.4V, I = 65ꢀA, ISD < 1ꢀA, PowerGood

IN

OUT

Q

feature; TSSOP-16E and 4mm × 3mm DFN-12 Packages

LT3014/HV 20mA, 3V to 80V, Low Dropout Micropower

Linear Regulator

V : 3V to 80V (100V for 2ms, “HV” version), V : 1.22V to 60V, VDO = 0.35V, I =

IN

OUT

Q

7ꢀA, ISD < 1ꢀA, ThinSOT and 3mm × 3mm DFN-8 Packages

LT3050

100mA, Low Noise Linear Regulator with

340mV Dropout Voltage, Low Noise: 30ꢀV , V : 1.6V to 45V, V : 0.6V to 44.5V,

RMS IN

OUT

Precision Current Limit and Diagnostic Functions. Programmable Precision Current Limit: 5%, Programmable Minimum I

Monitor,

OUT

Output Current Monitor, Fault Indicator, Reverse Protection, 12-Lead 2mm × 3mm DFN

and MSOP Packages.

LT3080/-1

LT3082

1.1A, Parallelable, Low Noise, Low Dropout

Linear Regulator

300mV Dropout Voltage (2-supply operation), Low Noise: 40ꢀV

, V : 1.2V to 36V,

RMS IN

V

: 0V to 35.7V, current-based reference with 1-resistor V

set; directly parallelable

OUT

(no op amp required), stable with ceramic caps, TO-220, SOT-223, MSOP and 3 × 3

DFN Packages; “-1” version has integrated internal ballast resistor

200mA, Parallelable, Single Resistor, Low

Dropout Linear Regulator

Outputs May Be Paralleled for Higher Output, Current or Heat Spreading, Wide Input

Voltage Range: 1.2V to 40V Low Value Input/Output Capacitors Required: 0.22μF, Single

Resistor Sets Output Voltage Initial Set Pin Current Accuracy: 1%, Low Output Noise:

40μV

(10Hz to 100kHz) Reverse-Battery Protection, Reverse-Current Protection

RMS

8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages

LT3085

LT3092

500mA, Parallelable, Low Noise, Low Dropout

Linear Regulator

275mV Dropout Voltage (2-supply operation), Low Noise: 40ꢀV , V : 1.2V to 36V,

RMS IN

V

: 0V to 35.7V, current-based reference with 1-resistor V

set; directly parallelable

OUT

(no op amp required), stable with ceramic caps, MS8E and 2 × 3 DFN-6 packages

200mA Two-Terminal Programmable Current

Source

Programmable Two-Terminal Current Source, Maximum Output Current: 200mA Wide

Input Voltage Range: 1.2V to 40V, Resistor Ratio Sets Output Current Initial Set Pin

Current Accuracy: 1%, Current Limit and Thermal Shutdown Protection Reverse-

Voltage Protection, Reverse-Current Protection 8-Lead SOT-23, 3-Lead SOT-223 and

8-Lead 3mm × 3mm DFN Packages

3060f

LT 0110 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

20

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LT3060EDCTR
厂家：	Linear
描述：	45V VIN, Micropower, Low Noise, 100mA Low Dropout, Linear Regulator 45V VIN ，微功耗，低噪声， 100mA时的低压差，线性稳压器稳压器
文件：	总20页 (文件大小：277K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT3060EDCTR [Linear]

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