LT3756EUD#PBF [Linear]
LT3756/LT3756-1/LT3756-2 - 100VIN, 100VOUT LED Controller; Package: QFN; Pins: 16; Temperature Range: -40°C to 85°C;
| 型号： | LT3756EUD#PBF |
| 厂家： | 
Linear |
| 描述： | LT3756/LT3756-1/LT3756-2 - 100VIN, 100VOUT LED Controller; Package: QFN; Pins: 16; Temperature Range: -40°C to 85°C 控制器 |
| 文件： | 总20页 (文件大小：202K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3756/LT3756-1
100V , 100V
IN
OUT
LED Controller
FEATURES
n
DESCRIPTION
3000:1 True Color PWMTM Dimming
TheLT®3756andLT3756-1areDC/DCcontrollersdesigned
to operate as a constant-current source for driving high
current LEDs. They drive a low side external N-channel
power MOSFET from an internal regulated 7V supply. The
fixedfrequency,current-modearchitectureresultsinstable
operationoverawiderangeofsupplyandoutputvoltages.
A ground referenced voltage FB pin serves as the input for
severalLEDprotectionfeatures,andalsomakesitpossible
for the converter to operate as a constant-voltage source.
A frequency adjust pin allows the user to program the
frequency from 100kHz to 1MHz to optimize efficiency,
performance or external component size.
n
Wide Input Voltage Range: 6V to 100V
n
Output Voltage Up to 100V
n
Constant-Current and Constant-Voltage Regulation
n
100mV High Side Current Sense
n
Drives LEDs in Boost, Buck Mode, Buck-Boost Mode,
SEPIC or Flyback Topology
n
Adjustable Frequency: 100kHz to 1MHz
n
Open LED Protection
n
Programmable Undervoltage Lockout with Hysteresis
n
Open LED Status Pin (LT3756)
n
Frequency Synchronization (LT3756-1)
n
PWM Disconnect Switch Driver
The LT3756/LT3756-1 sense output current at the high
side of the LED string. High side current sensing is the
most flexible scheme for driving LEDs, allowing boost,
buck mode or buck-boost mode configuration. The PWM
inputprovidesLEDdimmingratiosofupto3000:1,andthe
CTRLinputprovidesadditionalanalogdimmingcapability.
Both parts are available in the 16-lead QFN (3mm × 3mm)
and MSOP packages.
n
CTRL Pin Provides Analog Dimming
n
Low Shutdown Current: <1μA
Programmable Soft-Start
n
n
Thermally Enhanced 16-Lead QFN (3mm × 3mm)
and MSOP Packages
APPLICATIONS
n
High Power LED Applications
LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
True Color PWM is a trademark of Linear Technology Corporation. All other trademarks are
the property of their respective owners. Protected by U.S. Patents, including 7199560
and 7321203.
n
Industrial
n
Automotive
TYPICAL APPLICATION
Efficiency vs VIN
94% Efficient 30W White LED Headlamp Driver
V
IN
8V TO 60V
(100V TRANSIENT)
22μH
100
4.7μF
1M
4.7μF
1M
V
IN
SHDN/UVLO
FB
96
V
ISP
332k
REF
14k
332k
LT3756
0.27Ω
370mA
92
88
CTRL
ISN
INTV
CC
40.2k
GATE
100k
SENSE
OPENLED
PWM
SS
30W
LED
STRING
0.018Ω
84
0.01μF
R
T
PWMOUT
V
C
GND INTV
CC
28.7k
400kHz
1%
80
0
20
60
80
40
(V)
10k
0.001μF
4.7μF
10k
V
IN
37561 TA01b
3756 TA01a
37561f
1
LT3756/LT3756-1
ABSOLUTE MAXIMUM RATINGS (Note 1)
V ..........................................................................100V
SYNC ..........................................................................8V
RT ............................................................................1.5V
SENSE......................................................................0.5V
Operating Junction Temperature Range
(Note 2) ............................................. –40°C to 125°C
Maximum Junction Temperature........................... 125°C
Storage Temperature Range................... –65°C to 125°C
IN
SHDN/UVLO.......................................... 100V, V + 0.3V
IN
ISP, ISN ...................................................................100V
INTV ...................................................... 8V, V + 0.3V
CC
IN
GATE, PWMOUT........................................INTV + 0.3V
CC
CTRL, PWM, OPENLED.............................................12V
VC, V , SS, FB .........................................................3V
REF
PIN CONFIGURATION
TOP VIEW
16 15 14 13
TOP VIEW
V
1
2
3
4
12 FB
REF
1
2
3
4
5
6
7
8
PWMOUT
FB
16 GATE
15 SENSE
PWM
SYNC OR OPENLED
SS
11 PWMOUT
ISN
14 V
IN
17
GATE
10
9
ISP
13 INTV
CC
VC
12 SHDN/UVLO
11 RT
SENSE
CTRL
V
10 SS
REF
5
6
7
8
PWM
9
SYNC OR OPENLED
MSE PACKAGE
16-LEAD PLASTIC MSOP
T
= 125°C, θ = 43°C/W, θ = 4°C/W
JA JC
JMAX
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
UD PACKAGE
16-LEAD (3mm s 3mm) PLASTIC QFN
T
= 125°C, θ = 68°C/W, θ = 4.2°C/W
JA JC
JMAX
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LT3756EMSE#PBF
LT3756IMSE#PBF
LT3756EMSE-1#PBF
LT3756IMSE-1#PBF
LT3756EUD#PBF
LT3756IUD#PBF
TAPE AND REEL
PART MARKING*
3756
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3756EMSE#TRPBF
LT3756IMSE#TRPBF
LT3756EMSE-1#TRPBF
LT3756IMSE-1#TRPBF
LT3756EUD#TRPBF
LT3756IUD#TRPBF
LT3756EUD-1#TRPBF
LT3756IUD-1#TRPBF
16-Lead Plastic MSOP
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
3756
16-Lead Plastic MSOP
37561
16-Lead Plastic MSOP
37561
16-Lead Plastic MSOP
LDMQ
16-Lead (3mm × 3mm) Plastic QFN
16-Lead (3mm × 3mm) Plastic QFN
16-Lead (3mm × 3mm) Plastic QFN
16-Lead (3mm × 3mm) Plastic QFN
LDMQ
LT3756EUD-1#PBF
LT3756IUD-1#PBF
LDMR
LDMR
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
37561f
2
LT3756/LT3756-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temp-
erature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
Tied to INTV
CC
MIN
TYP
MAX
UNITS
V
Minimum Operating Voltage
V
IN
6
V
IN
IN
V
Shutdown I
SHDN/UVLO = 0V, PWM = 0V
SHDN/UVLO = 1.15V, PWM = 0V
0.1
1
5
μA
μA
Q
V
V
V
Operating I (Not Switching)
VC = 0V, RT = 100k to GND
1.4
2.00
0.006
108
1.7
mA
V
IN
Q
l
Voltage
100μA ≤ I
≤ 0μA
VREF
1.965
98
2.045
REF
REF
Line Regulation
6V ≤ V ≤ 100V
%/V
mV
μA
IN
SENSE Current Limit Threshold
SENSE Input Bias Current
SS Pull-Up Current
118
13
Current Out of Pin
Current Out of Pin
40
8
10.5
μA
Error Amplifier
l
LED Current Sense Threshold (V – V
)
FB = 0V, V = 48V
96
–13
0
100
–10
103
–8
mV
mV
V
ISP
ISN
ISP
LED Current Sense Threshold at CTRL = 0V (V – V
)
ISN
CTRL = 0V, FB = 0V, V = 48V
ISP
ISP
CTRL Threshold Linear Programming Range
CTRL Input Bias Current
1.1
100
100
Current Out of Pin
50
nA
V
LED Current Sense Amplifier Input Common Mode
2.9
Range (V )
ISP
ISP/ISN Short-Circuit Threshold (V – V
)
V = 0V
ISN
115
0
150
200
3
mV
V
ISP
ISN
ISP/ISN Short-Circuit Fault Sensing Common Mode
Range (V
)
ISN
ISP/ISN Input Bias Current
PWM = 5V (Active), V = 48V
50
0
μA
μA
ISP
PWM = 0V (Standby), V = 48V
0.1
ISP
LED Current Sense Amplifier g
VC Output Impedance
V
– V = 100mV
120
μS
kΩ
nA
m
ISP
ISN
1V < V < 2V
15000
VC
VC Standby Input Bias Current
PWM = 0V
–20
20
l
FB Regulation Voltage (V
)
FB
1.220
1.232
1.250
1.250
1.270
1.265
V
V
V
ISP
= V
ISN
FB Amplifier g
FB = V , V = V
ISN
480
40
μS
nA
V
m
FB ISP
FB Pin Input Bias Current
FB Open LED Threshold
Current Out of Pin
100
OPENLED Falling (LT3756 Only)
V
–
V
–
V –
FB
40mV
FB
FB
60mV
50mV
FB Overvoltage Threshold
PWMOUT Falling
V
+
V
+
V +
FB
70mV
V
FB
FB
50mV
60mV
4
V/V
VC Current Mode Gain – ΔV /ΔV
VC
SENSE
Oscillator
l
Switching Frequency
R = 100k
T
90
925
105
1000
125
1050
kHz
kHz
T
R = 10k
Minimum Off-Time
170
ns
Linear Regulator
INTV Regulation Voltage
7
7.15
1
7.3
V
V
CC
Dropout (V – INTV
)
CC
I = –10mA, V = 7V
INTVCC IN
IN
INTV Undervoltage Lockout
3.9
14
4.1
18
8
4.3
23
12
V
CC
INTV Current Limit
mA
CC
INTV Current in Shutdown
SHDN/UVLO = 0V, INTV = 7V
μA
37561f
CC
CC
3
LT3756/LT3756-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temp-
erature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
1.5
45
TYP
MAX
UNITS
Logic Inputs/Outputs
PWM Input High Voltage
PWM Input Low Voltage
PWM Pin Resistance to GND
V
V
0.4
50
60
0
kΩ
mV
V
PWMOUT Output Low (V
)
OL
PWMOUT Output High (V
)
OH
INTV
CC
– 50mV
l
SHDN/UVLO Threshold Voltage Falling
SHDN/UVLO Rising Hysteresis
1.185
1.220
20
1.245
V
mV
V
SHDN/UVLO Input Low Voltage
SHDN/UVLO Pin Bias Current Low
SHDN/UVLO Pin Bias Current High
I
Drops Below 1μA
0.4
2.5
VIN
SHDN/UVLO = 1.15V
SHDN/UVLO = 1.30V
1.7
1.5
2.05
10
μA
nA
mV
kΩ
V
100
200
OPENLED Output Low (V
)
OL
I
= 0.5mA (LT3756 Only)
OPENLED
SYNC Pin Resistance to GND
SYNC Input High
SYNC Input Low
LT3756-1 Only
LT3756-1 Only
LT3756-1 Only
30
0.4
V
Gate Driver
t GATE Driver Output Rise Time
C = 3300pF
35
35
ns
ns
V
r
L
t GATE Driver Output Fall Time
f
C = 3300pF
L
GATE Output Low (V
)
OL
0.05
GATE Output High (V
)
OH
INTV
V
CC
– 50mV
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3756E and LT3756E-1 are guaranteed to meet performance
specifications from 0°C to 125°C junction temperature. Specifications
over the –40°C to 125°C operating junction temperature range are
assured by design, characterization and correlation with statistical process
controls. The LT3756I and LT3756I-1 are guaranteed to meet performance
specifications over the –40°C to 125°C operating junction temperature
range.
37561f
4
LT3756/LT3756-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
VISP – VISN Threshold
vs Temperature
VISP – VISN Threshold vs VCTRL
VISP – VISN Threshold vs VISP
103
102
101
100
99
120
100
80
103
102
101
100
99
V
= 2V
V
= 2V
CTRL
CTRL
60
40
20
98
98
0
97
–20
97
0
0.5
1
1.5
2
0
20
40
ISP VOLTAGE (V)
60
80
100
–50 –25
0
25
50
75 100 125
V
(V)
TEMPERATURE (°C)
CTRL
37561 G03
3756 G01
3756 G02
FB Voltage vs Temperature
VREF Voltage vs Temperature
VREF Voltage vs VIN
1.28
1.27
1.26
1.25
1.24
1.23
1.22
1.21
1.20
2.04
2.03
2.02
2.01
2.00
1.99
1.98
1.97
1.96
2.04
2.03
2.02
2.01
2.00
1.99
1.98
1.97
1.96
50
75 100 125
0
20
40
60
80
100
–50
0
25
–25
–50
0
25
50
75
125
–25
100
V
(V)
TEMPERATURE (°C)
TEMPERATURE (°C)
IN
37561 G04
37561 G06
37561 G05
SHDN/UVLO Hysteresis Current
vs Temperature
Switching Frequency
vs Temperature
Switching Frequency vs RT
1400
1300
1200
1100
1000
900
10000
1000
100
2.4
2.2
2.0
1.8
1.6
R
= 10k
T
800
700
600
10
10
100
50
125
50
TEMPERATURE (°C)
125
–50
0
25
75 100
–50
0
25
75 100
–25
–25
R
(k)
TEMPERATURE (°C)
T
37561 G07
37561 G08
37561 G09
37561f
5
LT3756/LT3756-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
SENSE Current Limit Threshold
vs Temperature
SHDN/UVLO Threshold
vs Temperature
Quiescent Current vs VIN
110
105
100
95
1.28
1.26
1.24
1.22
1.20
1.18
2.0
1.5
1.0
0.5
0
SHDN/UVLO RISING
SHDN/UVLO FALLING
90
–50
0
20
40
60
80
100
–50
0
25
50
75 100 125
0
25
50
75 100 125
–25
–25
V
(V)
TEMPERATURE (°C)
TEMPERATURE (°C)
IN
37561 G10
INTVCC Current Limit
vs Temperature
INTVCC Voltage vs VIN
INTVCC Voltage vs Temperature
20
18
16
14
12
10
8
6
4
2
0
7.4
7.3
7.2
7.1
7.0
50
75 100 125
0
20
40
60
80
100
–50
0
25
–25
50
TEMPERATURE (°C)
125
–50
0
25
75 100
–25
V
(V)
TEMPERATURE (°C)
IN
37561 G14
37561 G13
37561 G15
SENSE Current Limit Threshold
vs Duty Cycle
Gate Rise/Fall Time
vs Capacitance
V(ISP-ISN) Threshold vs FB Voltage
125
100
75
50
25
0
100
80
60
40
20
0
110
105
100
95
V
= 2V
10% TO 90%
CTRL
GATE RISE
TIME
GATE
FALL TIME
90
0
25
50
75
100
1.2
1.22
1.24
1.26
1.28
0
2
4
6
8
10
DUTY CYCLE (%)
FB VOLTAGE (V)
CAPACITANCE (nF)
37561 G16
37561 G17
37561 G18
37561f
6
LT3756/LT3756-1
PIN FUNCTIONS (MSOP/QFN)
PWMOUT(Pin1/Pin11):BufferedVersionofPWMSignal
forDrivingLEDLoadDisconnectNMOSorLevelShift.This
pinalsoservesaprotectionfunctionfortheFBovervoltage
condition—will toggle if the FB input is greater than the FB
V
(Pin7/Pin1):VoltageReferenceOutputPin,Typically
REF
2V.ThispindrivesaresistordividerfortheCTRLpin,either
foranalogdimmingorfortemperaturelimit/compensation
of LED load. Can supply up to 100ꢀA.
regulationvoltage(V )plus60mV(typical).ThePWMOUT
FB
PWM (Pin 8/Pin 2): A signal low turns off switcher, idles
oscillator and disconnects VC pin from all internal loads.
PWMOUT pin follows PWM pin. PWM has an internal
pin is driven from INTV . Use of a FET with gate cut-off
CC
voltage higher than 1V is recommended.
pull-down resistor. If not used, connect to INTV .
FB (Pin 2/Pin 12): Voltage Loop Feedback Pin. FB is
intendedforconstant-voltageregulationorforLEDprotec-
tion/open LED detection. The internal transconductance
amplifierwithoutputVCwillregulateFBto1.25V(nominal)
through the DC/DC converter. If the FB input is regulating
the loop, the OPENLED pull-down is asserted. This ac-
tion may signal an open LED fault. If FB is driven above
the FB threshold (by an external power supply spike, for
example),theOPENLEDpull-downwillbede-assertedand
the PWMOUT pin will be driven low to protect the LEDs
from an overcurrent event. Do not leave the FB pin open.
If not used, connect to GND.
CC
OPENLED (Pin 9/Pin 3, LT3756 Only): An open-drain
pull-down on OPENLED asserts if the FB input is greater
than the FB regulation threshold minus 50mV (typical).
To function, the pin requires an external pull-up resistor.
When the PWM input is low and the DC/DC converter is
idle, the OPENLED condition is latched to the last valid
state when the PWM input was high. When PWM input
goes high again, the OPENLED pin will be updated. This
pin may be used to report an open LED fault.
SYNC (Pin 9/Pin 3, LT3756-1 Only): The SYNC pin is used
to synchronize the internal oscillator to an external logic
ISN (Pin 3/Pin 13): Connection Point for the Negative
Terminal of the Current Feedback Resistor. If ISN is
greater than 2.9V, the LED current can be programmed
level signal. The R resistor should be chosen to program
T
aninternalswitchingfrequency20%slowerthantheSYNC
pulse frequency. Gate turn-on occurs a fixed delay after
the rising edge of SYNC. For best PWM performance, the
PWM rising edge should occur at least 200ns before the
SYNCrisingedge.Usea50%dutycyclewaveformtodrive
this pin. This pin replaces OPENLED on LT3756-1 option
parts. If not used, tie this pin to GND.
by I = 100mV/R when V
> 1.2V or I = V
LED
LED
CTRL
LED CTRL
–100mV/(10 • R ). Input bias current is typically 20μA.
LED
Below 3V, ISN is an input to the short-circuit protection
feature that forces GATE to 0V if ISN is more than 150mV
(typ) below ISP.
ISP (Pin 4/Pin 14): Connection Point for the Positive Ter-
minal of the Current Feedback Resistor. Input bias current
for this pin is typically 30μA. ISP is an input to the short-
circuit protection feature when ISP is less than 3.1V.
SS (Pin 10/Pin 4): Soft-Start Pin. This pin modulates
oscillator frequency and compensation pin voltage (VC)
clamp.Thesoft-startintervalissetwithanexternalcapaci-
tor. The pin has a 10μA (typical) pull-up current source
to an internal 2.5V rail. The soft-start pin is reset to GND
by an undervoltage condition (detected by SHDN/UVLO
pin) or thermal limit.
VC (Pin 5/Pin 15): Transconductance Error Amplifier
Output Pin Used to Stabilize the Voltage Loop with an RC
Network. This pin is high impedance when PWM is low, a
feature that stores the demand current state variable for
thenextPWMhightransition.Connectacapacitorbetween
this pin and GND; a resistor in series with the capacitor is
recommended for fast transient response.
RT (Pin 11/Pin 5): Switching Frequency Adjustment Pin.
Set the frequency using a resistor to GND (for resistor
values, see the Typical Performance curve or Table 1).
Do not leave the RT pin open.
CTRL(Pin6/Pin16):CurrentSenseThresholdAdjustment
SHDN/UVLO (Pin 12/Pin 6): Shutdown and Undervoltage
Detect Pin. An accurate 1.22V falling threshold with ex-
ternally programmable hysteresis detects when power is
OK to enable switching. Rising hysteresis is generated by
Pin. Regulating threshold V – V is 1/10th V plus
ISP
ISN
CTRL
an offset. CTRL linear range is from GND to 1.1V. Connect
CTRL to V for the 100mV default threshold. Do not
REF
the external resistor divider and an accurate internal 2μA
leave this pin open.
37561f
7
LT3756/LT3756-1
PIN FUNCTIONS
pull-down current. Above the 1.24V (nominal) threshold
(but below 6V), SHDN/UVLO input bias current is sub-
μA. Below the falling threshold, a 2μA pull-down current
is enabled so the user can define the hysteresis with the
external resistor selection. An undervoltage condition
resets soft-start. Tie to 0.4V, or less, to disable the device
SENSE (Pin 15/Pin 9): The current sense input for the
control loop. Kelvin connect this pin to the positive ter-
minal of the switch current sense resistor, R
, in the
SENSE
source of the NFET. The negative terminal of the current
sense resistor should be connected to the GND plane
close to the IC.
and reduce V quiescent current below 1μA. Do not tie
IN
GATE (Pin 16/Pin 10): N-Channel FET Gate Driver Output.
SHDN/UVLO to a voltage higher than V .
IN
Switches between INTV and GND. Driven to GND during
CC
INTV (Pin13/Pin7):RegulatedSupplyforInternalLoads,
shutdown, fault or idle states.
CC
GATE Driver and PWMOUT Driver. Supplied from V and
IN
ExposedPad(Pin17/Pin17):Ground.Thispinalsoserves
as current sense input for control loop, sensing negative
terminal of current sense resistor. Solder the Exposed Pad
directly to ground plane.
regulates to 7V (typical). INTV must be bypassed with
CC
a 4.7μF capacitor placed close to the pin. Connect INTV
CC
directly to V if V is always less than or equal to 7V.
IN
IN
V
(Pin 14/Pin 8): Input Supply Pin. Must be locally
IN
bypassed with a 0.22μF (or larger) capacitor placed close
to the IC.
BLOCK DIAGRAM
SHDN/UVLO
–
+
A6
FB
VC
PWMOUT PWM
1.25V
V
IN
–
+
SHDN
1.22V
2μA
1.3V
LDO
–
+
OVFB
COMPARATOR
A8
INTV
CC
7V
A5
+
–
10μA AT
FB = 1.25V
g
m
1.25V
SHORT-CIRCUIT
DETECT
SCILMB
10μA
+
SCILMB
A10
GATE
SENSE
GND
+
+
–
150mV
–
R
Q
–
g
m
A2
DRIVER
S
EAMP
ISN
ISP
PWM
COMPARATOR
+
–
10μA AT
5k
A1
I
+
–
SENSE
A4
A1 = A1
+
–
CTRL
BUFFER
CTRL
+
–
1.1V
A3
Q2
+
RAMP
GENERATOR
VC
SSCLAMP
10μA
50k
100kHz TO 1MHz
OSCILLATOR
OPENLED
FAULT
–
+
140μA
LOGIC
1.25V
+
+
–
1.2V
FB
(LT3756
ONLY)
V
REF
–
+
FREQ
PROG
TSD
A7
2V
SS
RT
SYNC (LT3756-1 ONLY)
37561f
8
LT3756/LT3756-1
OPERATION
of the output state of the PWM comparator. Likewise, at
an ISP/ISN common mode voltage less than 3V, the dif-
ference between ISP and ISN is monitored to determine if
the output is in a short-circuit condition. If the difference
between ISP and ISN is greater than 150mV (typical), the
SR latch will be reset regardless of the PWM comparator.
These functions are intended to protect the power switch,
as well as various external components in the power path
of the DC/DC converter.
TheLT3756isaconstant-frequency,currentmodecontrol-
ler with a low side NMOS gate driver. The GATE pin and
PWMOUT pin drivers, and other chip loads, are powered
from INTV , which is an internally regulated supply. In
CC
the discussion that follows, it will be helpful to refer to
the Block Diagram of the IC. In normal operation, with the
PWM pin low, the GATE and PWMOUT pins are driven to
GND, the VC pin is high impedance to store the previous
switching state on the external compensation capacitor,
and the ISP and ISN pin bias currents are reduced to
leakage levels. When the PWM pin transitions high, the
PWMOUT pin transitions high after a short delay. At the
same time, the internal oscillator wakes up and gener-
ates a pulse to set the PWM latch, turning on the external
power MOSFET switch (GATE goes high). A voltage input
proportional to the switch current, sensed by an external
current sense resistor between the SENSE and GND input
pins, is added to a stabilizing slope compensation ramp
and the resulting “switch current sense” signal is fed into
the positive terminal of the PWM comparator. The current
in the external inductor increases steadily during the time
the switch is on. When the switch current sense voltage
exceeds the output of the error amplifier, labeled “VC”,
the latch is reset and the switch is turned off. During the
switch off phase, the inductor current decreases. At the
completion of each oscillator cycle, internal signals such
asslopecompensationreturntotheirstartingpointsanda
new cycle begins with the set pulse from the oscillator.
In voltage feedback mode, the operation is similar to that
described above, except the voltage at the VC pin is set
by the amplified difference of the internal reference of
1.25V (nominal) and the FB pin. If FB is lower than the
reference voltage, the switch current will increase; if FB
is higher than the reference voltage, the switch demand
current will decrease. The LED current sense feedback
interacts with the FB voltage feedback so that FB will not
exceed the internal reference and the voltage between ISP
and ISN will not exceed the threshold set by the CTRL pin.
For accurate current or voltage regulation, it is necessary
to be sure that under normal operating conditions, the
appropriate loop is dominant. To deactivate the voltage
loop entirely, FB can be connected to GND. To deactivate
the LED current loop entirely, the ISP and ISN should be
tied together and the CTRL input tied to V
.
REF
Two LED specific functions featured on the LT3756 are
controlled by the voltage feedback pin. First, when the
FB pin exceeds a voltage 50mV lower (–4%) than the FB
regulation voltage, the pull-down driver on the OPENLED
pin is activated. This function provides a status indicator
thattheloadmaybedisconnectedandtheconstant-voltage
feedback loop is taking control of the switching regula-
tor. When the FB pin exceeds the FB regulation voltage
by 60mV (5% typical), the PWMOUT pin is driven low,
ignoring the state of the PWM input. In the case where
the PWMOUT pin drives a disconnect NFET, this action
isolates the LED load from GND, preventing excessive
current from damaging the LEDs. If the FB input exceeds
both the open LED and the overvoltage (OV) thresholds,
then an externally driven overvoltage event has caused
the FB pin to be too high and the OPENLED pull-down
will be deactivated and locked out until the FB pin drops
below both thresholds.
Through this repetitive action, the PWM control algorithm
establishes a switch duty cycle to regulate a current or
voltage in the load. The VC signal is integrated over many
switching cycles and is an amplified version of the differ-
ence between the LED current sense voltage, measured
between ISP and ISN, and the target difference voltage
set by the CTRL pin. In this manner, the error amplifier
sets the correct peak switch current level to keep the
LED current in regulation. If the error amplifier output
increases, more current is demanded in the switch; if it
decreases, less current is demanded. The switch current
is monitored during the on-phase and the voltage across
the SENSE pin is not allowed to exceed the current limit
threshold of 108mV (typical). If the SENSE pin exceeds
the current limit threshold, the SR latch is reset regardless
37561f
9
LT3756/LT3756-1
APPLICATIONS INFORMATION
Programming the Turn-On and Turn-Off Thresholds
with the SHDN/UVLO Pin
INTV Regulator Bypassing and Operation
CC
The INTV pin requires a capacitor for stable operation
CC
The falling UVLO value can be accurately set by the resis-
tor divider. A small 2μA pull-down current is active when
SHDN/UVLO is below the 1.24V threshold. The purpose
of this current is to allow the user to program the rising
hysteresis. The following equations should be used to
determine the values of the resistors:
and to store the charge for the large GATE switching cur-
rents. Choose a 10V rated low ESR, X7R or X5R ceramic
capacitor for best performance. The value of the capacitor
is determined primarily by the stability of the regulator
ratherthanthegatecharge,Q ,oftheswitchingNMOS—a
G
4.7μF capacitor will be adequate for many applications.
Place the capacitor close to the IC to minimize the trace
R1+ R2
VIN,FALLING = 1.24 •
length to the INTV pin and also to the IC ground.
CC
R2
An internal current limit on the INTV output protects
CC
V
= 2μA •R1
the LT3756 from excessive on-chip power dissipation.
The minimum value of this current should be considered
when choosing the switching NMOS and the operating
frequency.
IN,RISING HYST
V
IN
LT3756
R1
R2
I
can be calculated from the following equation:
INTVCC
SHDN/UVLO
I
= Q • f
G OSC
INTVCC
3756 F01
Careful choice of a lower Q FET will allow higher switch-
G
ingfrequencies, leadingtosmallermagnetics. TheINTV
CC
Figure 1
pin has its own undervoltage disable (UVLO) set to 4.3V
(typical)toprotecttheexternalFETsfromexcessivepower
dissipation caused by not being fully enhanced. If the
LED Current Programming
INTV pin drops below the UVLO threshold, the GATE
CC
The LED current is programmed by placing an appropriate
valuecurrentsenseresistorbetweentheISPandISNpins.
Typically, sensing of the current should be done at the top
of the LED string. If this option is not available, then the
current may be sensed at the bottom of the string, but take
caution that the minimum ISN value does not fall below
3V, which is the lower limit of the LED current regulation
function. The CTRL pin should be tied to a voltage higher
than 1.1V to get the full-scale 100mV (typical) threshold
across the sense resistor. The CTRL pin can also be used
to dim the LED current to zero, although relative accuracy
decreases with the decreasing voltage sense threshold.
When the CTRL pin voltage is less than 1.1V, the LED
current is:
and PWMOUT pins will be forced to 0V and the soft-start
pin will be reset.
If the input voltage, V , will not exceed 7V, then the
IN
INTV pin should be connected to the input supply. Be
CC
aware that a small current (typically less than 10ꢀA) will
load the INTV in shutdown. If V is normally above, but
CC
IN
occasionally drops below the INTV regulation voltage,
CC
then the minimum operating V will be close to 6V. This
IN
value is determined by the dropout voltage of the linear
regulator and the 4.5V (4.3V typical) INTV undervoltage
CC
lockout threshold mentioned above.
VCTRL − 100mV
ILED
=
RLED • 10
37561f
10
LT3756/LT3756-1
APPLICATIONS INFORMATION
When V
lated to:
is higher than 1.1V, the LED current is regu-
operationwillnotexceed1.1V. ForanLEDdriverofbuckor
a buck-boost configuration, the output voltage is typically
level-shifted to a signal with respect to GND as illustrated
in Figure 3. The output can be expressed as:
CTRL
100mV
RLED
ILED
=
R1
VOUT = VBE + 1.25 •
R2
The LED current programming feature can increase total
dimming range by a factor of 10. The CTRL pin should
not be left open (tie to V
can also be used in conjunction with a thermistor to
provide overtemperature protection for the LED load, or
with a resistor divider to V to reduce output power and
switching current when V is low. The presence of a time
varying differential voltage signal (ripple) across ISP and
ISN at the switching frequency is expected. The amplitude
of this signal is increased by high LED load current, low
switching frequency and/or a smaller value output filter
capacitor. Some level of ripple signal is acceptable: the
compensation capacitor on the VC pin filters the signal so
the average difference between ISP and ISN is regulated
to the user-programmed value. Ripple voltage amplitude
(peak-to-peak) in excess of 20mV should not cause mis-
operation, but may lead to noticeable offset between the
average value and the user-programmed value.
if not used). The CTRL pin
REF
ISP/ISN Short-Circuit Protection Feature
The ISP and ISN pins have a protection feature indepen-
dent of the LED current sense feature that operates at
ISN below 3V. The purpose of this feature is to provide
continuous current sensing when ISN is below the LED
current sense common mode range (during start-up or
an output short-circuit fault) to prevent the development
of excessive switching currents that could damage the
power components. The action threshold (150mV, typ) is
above the default LED current sense threshold, so that no
interference will occur over the ISN voltage range where
these two functions overlap. This feature acts in the same
manner as SENSE current limit—it prevents GATE from
going high (switch turn-on) until the ISP/ISN difference
falls below the threshold.
IN
IN
Programming Output Voltage (Constant-Voltage
Regulation) or Open LED/Overvoltage Threshold
Dimming Control
There are two methods to control the current source for
dimming using the LT3756. One method uses the CTRL
pin to adjust the current regulated in the LEDs. A second
method uses the PWM pin to modulate the current source
between zero and full current to achieve a precisely pro-
grammedaveragecurrent. Tomakethismethodofcurrent
controlmoreaccurate,theswitchdemandcurrentisstored
on the VC node during the quiescent phase when PWM is
low. This feature minimizes recovery time when the PWM
For a boost or SEPIC application, the output voltage can
be set by selecting the values of R1 and R2 (see Figure 2)
according to the following equation:
R1+ R2
VOUT = 1.25 •
R2
ForaboosttypeLEDdriver,settheresistorfromtheoutput
to the FB pin such that the expected V during normal
FB
+
R1
R
SEN(EXT)
LED
V
IN
V
OUT
LT3756
ARRAY
R1
R2
100k
–
LT3756
FB
FB
R2
3756 F02
3756 F03
Figure 2. Feedback Resistor Connection
for Boost or SEPIC LED Drivers
Figure 3. Feedback Resistor Connection for
Buck Mode or Buck-Boost Mode LED Driver
37561f
11
LT3756/LT3756-1
APPLICATIONS INFORMATION
signal goes high. To further improve the recovery time, a
disconnect switch may be used in the LED current path to
prevent the ISP node from discharging during the PWM
signal low phase. The minimum PWM on or off time will
depend on the choice of operating frequency through the
RT input. For best current accuracy, the minimum PWM
low or high time should be at least six switching cycles
resistor from the RT pin to GND is required—do not leave
this pin open.
Table 1. Switching Frequency vs RT Value (1% Resistors)
f
(kHz)
R (kΩ)
T
OSC
1000
10
400
200
100
28.7
53.6
100
(6ꢀsforf =1MHz).MaximumPWMperiodisdetermined
SW
by the system and is unlikely to be longer than 12ms.
The maximum PWM dimming ratio (PWM
) can be
) and the
(RATIO)
Duty Cycle Considerations
calculated from the maximum PWM period (t
MAX
Switching duty cycle is a key variable defining converter
operation, therefore, its limits must be considered when
programming the switching frequency for a particular
application. The fixed minimum on-time and minimum
off-time (see Figure 5) and the switching frequency define
the minimum and maximum duty cycle of the switch,
respectively. The following equations express the mini-
mum/maximum duty cycle:
minimum PWM pulse width (t ) as follows:
MIN
tMAX
tMIN
PWMRATIO
=
t
= 9ms, t
MIN
= 6ꢀs (f = 1MHz)
MAX
SW
PWM
= 9ms/6ꢀs = 1500:1
RATIO
Programming the Switching Frequency
Min Duty Cycle = (minimum on-time) • switching fre-
quency
The RT frequency adjust pin allows the user to program
the switching frequency from 100kHz to 1MHz to optimize
efficiency/performanceorexternalcomponentsize.Higher
frequency operation yields smaller component size but
increases switching losses and gate driving current, and
maynotallowsufficientlyhighorlowdutycycleoperation.
Lowerfrequencyoperationgivesbetterperformanceatthe
cost of larger external component size. For an appropri-
Max Duty Cycle = 1 – (minimum off-time) • switching
frequency
When calculating the operating limits, the typical values
for on/off-time in the data sheet should be increased by
at least 100ns to allow margin for PWM control latitude,
GATE rise/fall times and SW node rise/fall times.
ate R resistor value see Table 1 or Figure 4. An external
T
10000
1000
100
300
250
MINIMUM ON-TIME
200
MINIMUM OFF-TIME
150
100
50
0
10
50
75 100 125
10
100
–50
0
25
–25
R
(k)
TEMPERATURE (°C)
T
37561 F05
37561 F04
Figure 4. Switching Frequency vs RT
Figure 5. Typical Minimum On and
Off Pulse Width vs Temperature
37561f
12
LT3756/LT3756-1
APPLICATIONS INFORMATION
Thermal Considerations
agoodchoice, otherwise, maintainthedutycyclebetween
20%and60%. WhenusingbothPWMandSYNCfeatures,
the PWM signal rising edge should occur at least 200ns
The LT3756 and LT3756-1 are rated to a maximum input
voltage of 100V. Careful attention must be paid to the
internal power dissipation of the IC at higher input volt-
ages to ensure that a junction temperature of 125°C is not
exceeded. This junction limit is especially important when
operatingathighambienttemperatures.Themajorityofthe
power dissipation in the IC comes from the supply current
needed to drive the gate capacitance of the external power
MOSFET. This gate drive current can be calculated as:
before the SYNC rising edge (V ) for optimal PWM
IH
performance. If the SYNC pin is not used, it should be
connected to GND.
Open LED Detection (LT3756 Only)
The LT3756 provides an open-drain status pin, OPENLED,
that pulls low when the FB pin is within ~50mV of its
1.25V regulated voltage. If the open LED clamp voltage
is programmed correctly using the FB pin, then the FB
pin should never exceed 1.1V when LEDs are connected,
therefore, the only way for the FB pin to be within 50mV
of the 1.24V regulation voltage is for an open LED event to
haveoccurred. WhenanopenLEDfaultoccurs, theoutput
may initially overshoot the FB regulation point by several
percent,duetoslewratelimitationsonVCandtheabsence
of any load on the output. In order to ensure the voltage
on switching components remains below programmed
limits, and to guarantee accurate reporting of the open
LED fault, adding a silicon diode between OPENLED and
SS is recommended, as well as a 10k resistor in series
with the soft-start capacitor, if one is used.
I
= f • Q
SW G
GATE
A low Q power MOSFET should always be used when op-
G
eratingathighinputvoltages,andtheswitchingfrequency
should also be chosen carefully to ensure that the IC does
not exceed a safe junction temperature. The internal junc-
tion temperature of the IC can be estimated by:
T = T + [V (I + f • Q ) • θ ]
J
A
IN
Q
SW
G
JA
where T is the ambient temperature, I is the quiescent
A
Q
current of the part (maximum 1.5mA) and θ is the
JA
package thermal impedance (68°C/W for the 3mm × 3mm
QFN package). For example, an application with T
A(MAX)
= 85°C, V
= 60V, f = 400kHz, and having a FET
IN(MAX)
SW
with Q = 20nC, the maximum IC junction temperature
G
will be approximately:
Input Capacitor Selection
T = 85°C + [60V (1.5mA + 400kHz • 20nC) • 68°C/W]
J
Theinputcapacitorsuppliesthetransientinputcurrentfor
the power inductor of the converter and must be placed
andsizedaccordingtothetransientcurrentrequirements.
Theswitchingfrequency,outputcurrentandtolerableinput
voltage ripple are key inputs to estimating the capacitor
value. An X7R type ceramic capacitor is usually the best
choicesinceithastheleastvariationwithtemperatureand
DC bias. Typically, boost and SEPIC converters require a
lower value capacitor than a buck mode converter. As-
suming that a 100mV input voltage ripple is acceptable,
the required capacitor value for a boost converter can be
estimated as follows:
= 124°C
The Exposed Pad on the bottom of the package must be
soldered to a ground plane. This ground should then be
connectedtoaninternalcoppergroundplanewiththermal
vias placed directly under the package to spread out the
heat dissipated by the IC.
Frequency Synchronization (LT3756-1 Only)
TheLT3756-1switchingfrequencycanbesynchronizedto
anexternalclockusingtheSYNCpin.Forproperoperation,
theR resistorshouldbechosenforaswitchingfrequency
T
1μF
VOUT
CIN(μF) = ILED(A)
•
• TSW(μs) •
20% lower than the external clock frequency. The SYNC
pin is disabled during the soft-start period.
V
A • μs
IN
Observation of the following guidelines about the SYNC
waveform will ensure proper operation of this feature.
Driving SYNC with a 50% duty cycle waveform is always
Therefore, a 4.7μF capacitor is an appropriate selection
for a 400kHz boost regulator with 12V input, 48V output
and 1A load.
37561f
13
LT3756/LT3756-1
APPLICATIONS INFORMATION
WiththesameV voltagerippleof100mV,theinputcapaci-
Soft-Start Capacitor Selection
IN
tor for a buck converter can be estimated as follows:
For many applications, it is important to minimize the
inrush current at start-up. The built-in soft-start circuit
significantly reduces the start-up current spike and output
voltageovershoot. Thesoft-startintervalissetbythesoft-
start capacitor selection according to the equation:
4.7μF
A • μs
CIN(μF) = ILED(A) • TSW(μs)
•
A 10μF input capacitor is an appropriate selection for a
400kHz buck mode converter with a 1A load.
2V
10μA
TSS = CSS
•
In the buck mode configuration, the input capacitor has
large pulsed currents due to the current returned through
the Schottky diode when the switch is off. In this buck
convertercaseitisimportanttoplacethecapacitorasclose
as possible to the Schottky diode and to the GND return
of the switch (i.e., the sense resistor). It is also important
to consider the ripple current rating of the capacitor. For
best reliability, this capacitor should have low ESR and
ESL and have an adequate ripple current rating. The RMS
input current for a buck mode LED driver is:
A typical value for the soft-start capacitor is 0.01μF. The
soft-start pin reduces the oscillator frequency and the
maximum current in the switch. The soft-start capacitor
is discharged when SHDN/UVLO falls below its threshold,
during an overtemperature event or during an INTV
CC
undervoltage event. During start-up with SHDN/UVLO,
charging of the soft-start capacitor is enabled after the
first PWM high period.
IIN(RMS) = ILED
•
1–D •D
(
)
Power MOSFET Selection
Forapplicationsoperatingathighinputoroutputvoltages,
the power NMOS FET switch is typically chosen for drain
where D is the switch duty cycle.
Table 2. Recommended Ceramic Capacitor Manufacturers
voltage V rating and low gate charge Q . Consideration
DS
G
MANUFACTURER
TDK
PHONE
WEB
of switch on-resistance, R
cause switching losses dominate power loss. The INTV
, is usually secondary be-
DS(ON)
516-535-2600
408-986-0424
814-237-1431
408-573-4150
www.tdk.com
www.kemet.com
www.murata.com
www.t-yuden.com
CC
Kemet
regulator on the LT3756 has a fixed current limit to protect
the IC from excessive power dissipation at high V , so the
Murata
IN
Taiyo Yuden
FET should be chosen so that the product of Q at 7V and
G
switching frequency does not exceed the INTV current
CC
Output Capacitor Selection
limit. For driving LEDs be careful to choose a switch with
a V rating that exceeds the threshold set by the FB pin
The selection of the output capacitor depends on the load
and converter configuration, i.e., step-up or step-down
and the operating frequency. For LED applications, the
equivalent resistance of the LED is typically low and the
output filter capacitor should be sized to attenuate the
current ripple. Use of an X7R type ceramic capacitor is
recommended.
DS
in case of an open-load fault. Several MOSFET vendors
are listed in Table 3. The MOSFETs used in the application
circuits in this datasheet have been found to work well
with the LT3756. Consult factory applications for other
recommended MOSFETs.
Table 3. MOSFET Manufacturers
VENDOR
PHONE
WEB
To achieve the same LED ripple current, the required filter
capacitor is larger in the boost and buck-boost mode ap-
plications than that in the buck mode applications. Lower
operating frequencies will require proportionately higher
capacitor values.
Vishay Siliconix
Fairchild
402-563-6866
972-910-8000
310-252-7105
www.vishay.com
www.fairchildsemi.com
www.irf.com
International Rectifier
37561f
14
LT3756/LT3756-1
APPLICATIONS INFORMATION
Schottky Rectifier Selection
Inductor Selection
The power Schottky diode conducts current during the
interval when the switch is turned off. Select a diode rated
forthemaximumSWvoltage. IfusingthePWMfeaturefor
dimming, it is important to consider diode leakage, which
increaseswiththetemperature,fromtheoutputduringthe
PWM low interval. Therefore, choose the Schottky diode
with sufficiently low leakage current. Table 4 has some
recommended component vendors.
TheinductorusedwiththeLT3756shouldhaveasaturation
current rating appropriate to the maximum switch current
selectedwiththeR
resistor.Chooseaninductorvalue
SENSE
based on operating frequency, input and output voltage to
provide a current mode signal on SENSE of approximately
20mV magnitude. The following equations are useful to
estimate the inductor value (T = 1/f ):
SW
OSC
TSW •RSENSE • VLED V – V
(
)
IN
LED
LBUCK
=
Table 4. Schottky Rectifier Manufacturers
V • 0.02V
IN
VENDOR
PHONE
WEB
On Semiconductor
Diodes, Inc.
888-743-7826
805-446-4800
www.onsemi.com
www.diodes.com
www.centralsemi.com
TSW •RSENSE • VLED • V
IN
LBUCK-BOOST
=
V
LED + V • 0.02V
(
)
IN
Central Semiconductor 631-435-1110
TSW •RSENSE • V VLED – VIN
(
)
IN
LBOOST
=
Sense Resistor Selection
VLED • 0.02V
The resistor, R
, between the source of the exter-
SENSE
Table 5 provides some recommended inductor vendors.
nal NMOS FET and GND should be selected to provide
adequate switch current to drive the application without
exceeding the 108mV (typical) current limit threshold on
the SENSE pin of LT3756. For buck mode applications,
select a resistor that gives a switch current at least 30%
greater than the required LED current. For buck mode,
select a resistor according to:
Table 5. Inductor Manufacturers
VENDOR
PHONE
WEB
Sumida
408-321-9660
605-886-4385
561-998-4100
402-563-6866
847-639-6400
www.sumida.com
www.we-online.com
www.cooperet.com
www.vishay.com
www.coilcraft.com
Würth Elektronik
Coiltronics
Vishay
0.07V
Coilcraft
RSENSE,BUCK
≤
ILED
For buck-boost, select a resistor according to:
V • 0.07V
Loop Compensation
TheLT3756usesaninternaltransconductanceerrorampli-
fier whose VC output compensates the control loop. The
external inductor, output capacitor and the compensation
resistor and capacitor determine the loop stability.
IN
RSENSE,BUCK-BOOST
≤
V + V
I
(
)
IN
LED LED
For boost, select a resistor according to:
The inductor and output capacitor are chosen based on
performance, size and cost. The compensation resistor
and capacitor at VC are selected to optimize control loop
response and stability. For typical LED applications, a
2.2nF compensation capacitor at VC is adequate, and
a series resistor should always be used to increase the
slew rate on the VC pin to maintain tighter regulation of
LED current during fast transients on the input supply to
the converter.
V • 0.07V
IN
RSENSE,BOOST
≤
VLED •ILED
The placement of R
should be close to the source of
SENSE
the NMOS FET and GND of the LT3756. The SENSE input
to LT3756 should be a Kelvin connection to the positive
terminal of R
.
SENSE
37561f
15
LT3756/LT3756-1
APPLICATIONS INFORMATION
Board Layout
the LT3756. Likewise, the ground terminal of the bypass
capacitor for the INTV regulator should be placed near
CC
The high speed operation of the LT3756 demands careful
attention to board layout and component placement. The
Exposed Pad of the package is the only GND terminal of
the IC and is also important for thermal management of
the IC. It is crucial to achieve a good electrical and thermal
contact between the Exposed Pad and the ground plane of
theboard.Toreduceelectromagneticinterference(EMI),it
isimportanttominimizetheareaofthehighdV/dtswitching
node between the inductor, switch drain and anode of the
Schottky rectifier. Use a ground plane under the switching
node to eliminate interplane coupling to sensitive signals.
The lengths of the high dI/dt traces: 1) from the switch
node through the switch and sense resistor to GND, and
2) from the switch node through the Schottky rectifier and
filter capacitor to GND should be minimized. The ground
points of these two switching current traces should come
toacommonpointthenconnecttothegroundplaneunder
the GND of the switching path. Typically, this requirement
will result in the external switch being closest to the IC,
along with the INTV bypass capacitor. The ground for
CC
the compensation network and other DC control signals
should be star connected to the underside of the IC. Do
not extensively route high impedance signals such as FB
and VC, as they may pick up switching noise. In particular,
avoid routing FB and PWMOUT in parallel for more than
a few millimeters on the board. Since there is a small
variable DC input bias current to the ISN and ISP inputs,
resistance in series with these pins should be minimized
to avoid creating an offset in the current sense threshold.
Likewise, minimize resistance in series with the SENSE
inputtoavoidchanges(mostlikelyreduction)totheswitch
current limit threshold.
TYPICAL APPLICATIONS
VISP-VISN vs Temperature
for NTC Resistor Divider
30W White LED Headlamp Driver with Thermal Derating
V
8V TO 60V
IN
120
D1
L1, 22μH
(100V TRANSIENT)
100
80
60
40
20
0
4.7μF
1M
4.7μF
1M
V
IN
SHDN/UVLO
FB
V
ISP
332k
REF
14k
16.9k
LT3756
0.27Ω
370mA
CTRL
ISN
GATE
100k
NTC
RT1
INTV
CC
30W LED STRING
M1
100k
SENSE
OPENLED
PWM
SS
0.018Ω
D2
0.01μF
PWMOUT
GND INTV
25
45
65
85
105
125
V
R
C
CC
T
TEMPERATURE (°C)
37551 TA02b
28.7k
400kHz
10k
0.001μF
4.7μF
10V
M1: VISHAY SILICONIX Si7454DP
D1: DIODES INC PDS5100
L1: COILTRONICS DR127-220
RT1: MURATA NCP18WM104J
M2: VISHAY SILICONIX Si2328DS
D2: IN4448HWT
10k
M2
3756 TA02a
37561f
16
LT3756/LT3756-1
TYPICAL APPLICATIONS
Buck-Boost Mode LED Driver
Efficiency vs VIN
L1
68μH
D1
V
IN
V
9V TO
65V
100
OUT
C1
1μF
100V
C3
4.7μF
V
IN
4.7μF 1M
1M
90
80
70
60
50
SHDN/UVLO
FB
V
IN
V
ISP
185k
REF
13k
LT3756
1Ω
CTRL
INTV
ISN
CC
M1
GATE
100k
24V TO 32V
LED STRING
100mA
SENSE
OPENLED
PWM
SS
0.068Ω
RT
PWMOUT
0.1μF
V
C
GND INTV
0
40
(V)
60
80
20
1.5k
CC
V
36.5k
300kHz
IN
C2
2.2μF
10V
M3
10k
39k
37561 TA03b
V
IN
4700pF
M2
L1: COILCRAFT MSS1038-683
D1: ON SEMICONDUCTOR MBRS3100T3
M1: VISHAY SILICONIX Si2328DS
M2: VISHAY SILICONIX Si2328DS
M3: ZETEX ZXM6IP03F
1k
3756 TA03a
Efficiency vs VIN
90% Efficient, 20W SEPIC LED Driver
C4
1μF
L1A
33μH
D1
V
IN
8V TO
80V
100
96
92
88
84
80
C3
1:1
C1
4.7μF
100V
10μF
s2
1M
V
IN
511k
35V
SHDN/UVLO
FB
L1B
V
25k
185k
REF
CTRL
ISP
INTV
LT3756
CC
0.1Ω
1A
100k
ISN
M1
OPENLED
PWM
SS
R
V
GATE
20W
LED
STRING
SENSE
PWMOUT
T
C
0.033Ω
0.01μF
0
40
(V)
60
80
20
GND INTV
CC
V
IN
28.7k
400kHz
C2
4.7μF
10V
37561 TA04b
30k
0.001μF
10k
M2
3756 TA04a
L1: COILCRAFT MSD1278T-333
M1: VISHAY SILICONIX Si7430DP
D1: ON SEMICONDUCTOR MBRS3200T
M2: ZETEX ZXM61N03F
37561f
17
LT3756/LT3756-1
PACKAGE DESCRIPTION
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev Ø)
BOTTOM VIEW OF
EXPOSED PAD OPTION
3.556 p 0.102
(.140 p .004)
2.845 p 0.102
(.112 p .004)
3.835 p 0.102
(.151 p .004)
0.889 p 0.127
(.035 p .005)
1
8
5.23
(.206)
MIN
1.651 p 0.102 1.905 p 0.102
(.065 p .004) (.075 p .004)
2.159 p 0.102 3.20 – 3.45
(.085 p .004) (.126 – .136)
16
4.039 p 0.102
(.159 p .004)
(NOTE 3)
9
0.50
(.0197)
BSC
0.305 p 0.038
(.0120 p .0015)
TYP
0.280 p 0.076
(.011 p .003)
REF
RECOMMENDED SOLDER PAD LAYOUT
16151413121110
9
DETAIL “A”
0o – 6o TYP
0.254
(.010)
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
1 2 3 4 5 6 7 8
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 p 0.0508
(.004 p .002)
0.50
(.0197)
BSC
MSOP (MSE16) 0907 REV Ø
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
37561f
18
LT3756/LT3756-1
PACKAGE DESCRIPTION
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
0.70 0.05
3.50 0.05
2.10 0.05
1.45 0.05
(4 SIDES)
PACKAGE OUTLINE
0.25 0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
BOTTOM VIEW—EXPOSED PAD
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
R = 0.115
TYP
0.75 0.05
3.00 0.10
(4 SIDES)
15 16
PIN 1
TOP MARK
(NOTE 6)
0.40 0.10
1
2
1.45 0.10
(4-SIDES)
(UD16) QFN 0904
0.25 0.05
0.50 BSC
0.200 REF
0.00 – 0.05
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
37561f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT3756/LT3756-1
TYPICAL APPLICATION
Buck Mode 1A LED Driver with High Dimming Ratio and Open LED Reporting
Efficiency vs VIN
V
IN
100
96
92
88
84
80
24V TO
80V
+
365k 22V
–
C1
1M
V
ISP
C3
4.7μF
IN
1μF
SHDN/UVLO
0.1Ω
1A
100k
1.5k
61.9k
V
ISN
FB
REF
CTRL
PWM
22.1k
M3
M2
1k
PWMOUT
5 WHITE LEDs
20W
LT3756
INTV
CC
100k
L1
100μH
D1
20
50
(V)
60
70
80
30
40
OPENLED
V
IN
V
IN
C4
4.7μF
M1
SS
GATE
37561 TA05b
RT
VC
SENSE
0.1μF
10k
GND INTV
CC
0.043Ω
28.7k
400kHz
C2
4.7μF
47k
M1: VISHAY SILICONIX Si3430DV
D1: DIODES INC B1100/B
0.001μF
L1: COILCRAFT MSS1246-101
M2: VISHAY SILICONIX Si2328DS
M3: ZETEX ZXM61P03F
3756 TA05a
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT3474
36V, 1A (I ), 2MHz, Step-Down LED Driver
V : 4V to 36V, V
SD
= 13.5V, True Color PWM Dimming = 400:1,
LED
IN
OUT(MAX)
I
< 1μA, TSSOP16E Package
LT3475
Dual 1.5A (I ), 36V, 2MHz Step-Down LED Driver
V : 4V to 36V, V
SD
= 13.5V, True Color PWM Dimming = 3000:1,
LED
IN
OUT(MAX)
I
< 1μA, TSSOP20E Package
LT3476
Quad Output 1.5A, 36V, 2MHz High Current LED Driver V : 2.8V to 16V, V
= 36V, True Color PWM Dimming = 1000:1,
IN
OUT(MAX)
with 1000:1 Dimming
I
< 10μA, 5mm × 7mm QFN Package
SD
LT3477
3A, 42V, 3MHz Boost, Buck-Boost, Buck LED Driver
V : 2.5V to 25V, V
= 40V, Dimming = Analog/PWM, I < 1μA,
IN
OUT(MAX) SD
QFN and TSSOP20E Packages
LT3478/LT3478-1
LT3486
4.5A, 42V, 2.5MHz High Current LED Driver with
3000:1 Dimming
V : 2.8V to 36V, V
SD
= 42V, True Color PWM Dimming = 3000:1,
IN
OUT(MAX)
I
< 3μA, TSSOP16E Package
Dual 1.3A, 2MHz High Current LED Driver
Triple 0.75A, 2.1MHz, 45V LED Driver
1.5A, 2.5MHz, 45V LED Driver
V : 2.5V to 24V, V
SD
= 36V, True Color PWM Dimming = 1000:1,
IN
OUT(MAX)
I
< 1μA, 5mm × 3mm DFN and TSSOP16E Packages
LT3496
V : 3V to 30V, V
= 45V, Dimming = 3000:1, I < 1μA,
IN
OUT(MAX) SD
4mm × 5mm QFN and TSSOP16E Packages
LT3517
V : 3V to 30V, V = 45V, Dimming = 3000:1, I < 1μA,
IN
OUT(MAX)
SD
4mm × 4mm QFN and TSSOP16E Packages
LT3518
2.3A, 2.5MHz, 45V LED Driver
V : 3V to 30V, V = 45V, Dimming = 3000:1, I < 1μA,
IN
OUT(MAX)
SD
4mm × 4mm QFN and TSSOP16E Packages
LT3755/LT3755-1
LTC®3783
40V , 60V , Full Featured LED Controller
IN OUT
V : 4.5V to 40V, V = 60V, True Color PWM Dimming = 3000:1,
SD
IN
OUT(MAX)
I
< 1μA, 3mm × 3mm QFN-16 and MS16E Packages
High Current LED Controller
V : 3V to 36V, V
SD
= Ext FET, True Color PWM Dimming = 3000:1,
IN
OUT(MAX)
I
< 20μA, 5mm × 4mm QFN10 and TSSOP16E Packages
37561f
LT 0808 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
© LINEAR TECHNOLOGY CORPORATION 2008
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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