LT3999 [Linear]
Low Noise, 1A, 1MHz Push-Pull DC/DC Driver with Duty Cycle Control;型号: | LT3999 |
厂家: | Linear |
描述: | Low Noise, 1A, 1MHz Push-Pull DC/DC Driver with Duty Cycle Control |
文件: | 总16页 (文件大小:302K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT3999
Low Noise, 1A, 1MHz
Push-Pull DC/DC Driver
with Duty Cycle Control
FEATURES
DESCRIPTION
The LT®3999 is a monolithic, high voltage, high frequency
DC/DC transformer driver providing isolated power in a
n
Wide Input Operating Range: 2.7V to 36V
n
Dual 1A Switches with Programmable Current Limit
n
Programmable Switching Frequency: 50kHz to 1MHz small solution footprint.
n
n
n
n
n
n
n
n
Frequency Synchronization Up to 1MHz
The LT3999 has two 1A current limited power switches
∆V Compensation Using Duty Cycle Control
IN
that switch out of phase. The duty cycle is programmable
to adjust the output voltage. The switching frequency is
programmed up to 1MHz and can be synchronized to an
external clock for more accurate placement of switcher
harmonics. The input operating range is programmed
withtheprecisionundervoltageandovervoltagelockouts.
The supply current is reduced to less than 1µA during
shutdown. A user-defined RC time constant provides an
adjustable soft-start capability by limiting the inrush cur-
rent at start-up.
Low Noise Topology
Programmable Input Over and Undervoltage Lockout
Cross Conduction Prevention Circuitry
Programmable Soft-Start
Low Shutdown Current: <1µA
10-Lead MSOP and DFN Packages
APPLICATIONS
n
Low Noise Isolated Supplies
n
Medical Instrument and Safety
The LT3999 is available in a 10-lead MSOP and 3mm ×
3mm DFN package with exposed pad.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
n
Distributed Power
Multiple Output Supplies
Positive-to-Negative Supplies
Noise Immunity in Data Acquisition, RS232
and RS485
n
n
n
TYPICAL APPLICATION
LT3999 Line Regulation with
Duty Cycle Control
12V to 12V, 10W Low Noise Isolated DC/DC Converter
V
IN
16
15
12V
10µF
16V
V
IN
15.3µH
V
OUT
12V
SYNC
SWA
SWB
•
•
•
•
14
13
12
11
10
9
0.8A
255k
10k
UVLO
10µF
16V
I
= 400mA
OUT
OVLO/DC
RDC
I
= 200mA
OUT
LT3999
15.8k
I
= 800mA
OUT
3999 TA01a
RT
ILIM/SS
RBIAS
28k
GND
0.1µF 49.9k
500kHz
8
14 15
10 11 12 13
INPUT VOLTAGE (V)
16 17 18
3999 TA01b
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LT3999
(Note 1)
ABSOLUTE MAXIMUM RATINGS
SWA, SWB................................................. –0.3V to 80V
IN
OVLO/DC, SYNC ......................................... –0.3V to 8V
Operating Junction Temperature Range (Note 2)
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
V , UVLO .................................................. –0.3V to 60V
MSOP ...............................................................300°C
LT3999E ............................................ –40°C to 125°C
LT3999I ............................................. –40°C to 125°C
LT3999H............................................ –40°C to 150°C
LT3999MP......................................... –55°C to 150°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
SWA
1
2
3
4
5
10 SWB
SWA
1
2
3
4
5
10 SWB
RBIAS
9
8
7
6
ILIM/SS
RBIAS
9
8
7
6
ILIM/SS
11
GND
11
V
SYNC
RT
RDC
V
IN
SYNC
RT
IN
GND
UVLO
UVLO
OVLO/DC
OVLO/DC
RDC
MSE PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE
θ
= 40°CW, θ = 10°CW
JC
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
JA
10-LEAD (3mm × 3mm) PLASTIC DFN
θ
= 43°C/W, θ = 5.5°C/W
JC
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
JA
ORDER INFORMATION
LEAD FREE FINISH
LT3999EMSE#PBF
LT3999IMSE#PBF
LT3999HMSE#PBF
LT3999MPMSE#PBF
LT3999EDD#PBF
LT3999IDD#PBF
TAPE AND REEL
PART MARKING*
LTGKR
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3999EMSE#TRPBF
LT3999IMSE#TRPBF
LT3999HMSE#TRPBF
LT3999MPMSE#TRPBF
LT3999EDD#TRPBF
LT3999IDD#TRPBF
10-Lead Plastic MSOP
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
–40°C to 125°C
–40°C to 125°C
LTGKR
10-Lead Plastic MSOP
LTGKR
10-Lead Plastic MSOP
LTGKR
10-Lead Plastic MSOP
LGKQ
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
LGKQ
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
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LT3999
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 15V
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Supply and Shutdown
l
l
V
V
V
V
Minimum Operating Voltage
Overvoltage Lockout
Supply Current
2.7
42
V
V
IN
IN
IN
IN
Internal, Rising
(Note 3)
36
40
4.3
0.1
1.25
125
10
mA
μA
V
Shutdown Current
V
V
V
= 0.3V
1
UVLO
l
l
UVLO Threshold (Rising)
UVLO Hysteresis
1.15
1.15
1.35
mV
nA
V
UVLO Pin Current
= 1.25V
100
UVLO
OVLO/DC Threshold (Rising)
OVLO/DC Hysteresis
OVLO/DC Pin Current
Power Switches (SWA, SWB)
Switch Saturation Voltage
Switch Current Limit
Non Overlap Time
1.25
125
10
1.35
mV
nA
= 1.25V
100
1.7
OVLO/DC
I
= 1A
350
1.4
70
mV
A
SW
l
Internal Default
1.0
ns
Switch Base Drive Current
Oscillator/Sync
I
= 1A
35
mA
SW
Switching Frequency
R = 316k
50
kHz
kHz
kHz
T
l
R = 49.9k
280
100
300
320
T
R = 12.1k
1000
T
Synchronization Frequency Range
SYNC Voltage Threshold
SYNC Pin Input Resistance
ILIM/SS
1000
kHz
V
1.5
200
kΩ
l
SWA and SWB Current Limit
ILIM/SS Pin Current
Duty Cycle
R
= 43.2k
0.4
22
0.5
10
0.6
30
A
ILIM/SS
μA
Switch Duty Cycle
OVLO/DC = 0.8V, R = 24.3k, R = 49.9k
20
25
48
%
%
%
DC
T
l
OVLO/DC = 0.612V, R = 24.3k, R = 49.9k
DC
T
OVLO/DC = 0.3V, R = 24.3k, R = 49.9k
DC
T
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect the device
reliability and lifetime.
Note 3: Supply current specification does not include switch drive
currents. Actual supply currents will be higher.
Note 2: The LT3999E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization, and correlation with statistical process controls. The
LT3999I Is guaranteed over the –40°C to 125°C operating junction
temperature range. The LT3999H is guaranteed over the full –40°C to
150°C operating junction temperature range. The LT3999MP is 100%
tested and guaranteed over the –55°C to 150°C junction temperature
range. High junction temperatures degrade operating lifetimes; operating
lifetime is derated for junction temperatures greater than 125°C.
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LT3999
TYPICAL PERFORMANCE CHARACTERISTICS
V
IN Shutdown Current
Switching Frequency
VCESAT vs Switch Current
2.5
400
375
350
325
300
275
250
225
200
400
350
300
250
200
150
100
50
2.0
1.5
1.0
0.5
0
0
50 75
TEMPERAURE (°C)
–50 –25
0
25
100 125 150
50
TEMPERATURE (°C)
400 500
600 700
–50 –25
0
25
75 100 125 150
0
100
800 9001000
200 300
SWITCH CURRENT (mA)
3999 G02
3999 G01
3999 G03
Switch VCESAT
Switch Leakage Current
Switch Current Limit
2000
1800
1600
1400
1200
1000
800
600
3.0
2.5
2.0
1.5
1.0
0.5
0
SWITCH CURRENT = 1A
500
400
R
= OPEN
= 80.6k
ILIM/SS
R
ILIM/SS
ILIM/SS
300
200
100
R
= 43.2k
600
400
200
0
–50
50
100 125
150
75 100
–25
0
25
75
50
–50 –25
0
25 50
125 150
–50 –25
0
25
75 100 125 150
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3999 G06
3999 G04
3999 G05
UVLO Threshold Voltage
OVLO Threshold Voltage
1.40
1.35
1.30
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
1.40
1.35
1.30
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
OVLO RISING
UVLO RISING
OVLO FALLING
UVLO FALLING
–50
50
100 125
150
–25
0
25
75
–50
50
100 125
150
–25
0
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
3999 G08
3999 G07
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LT3999
TYPICAL PERFORMANCE CHARACTERISTICS
Soft-Start (ILIM/SS) Current
Switch Duty Cycle
14
13
12
11
10
9
40
35
30
25
20
15
10
8
7
6
5
4
75 100
–50
50
100 125
150
–50 –25
0
25 50
125 150
–25
0
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
3999 G09
3999 G10
PIN FUNCTIONS
SWA, SWB (Pin 1, Pin 10): SWA and SWB pins are the
open-collector nodes of the power switches. These pins
drive the transformer and are connected to the outer ter-
minals of the center tapped transformer. Large currents
flowthroughthesepinssokeepPCBtracesshortandwide.
RDC (Pin 6): The RDC pin is the duty cycle control pin. A
resistor to ground sets the duty cycle. If unused leave the
pin floating or connect to the OVLO/DC pin.
RT (Pin 7): The RT pin sets the switching frequency of
the power switches.
RBIAS (Pin 2): The RBIAS pin sets the bias current of
the power switches (SWA and SWB). Connect the pin to
a 49.9k resistor to GND.
SYNC (Pin 8): The SYNC pin synchronizes the part to an
external clock. Set the internal oscillator frequency below
the external clock frequency. Synchronizing the clock to
an external reference is useful for creating more stable
positioning of the switcher voltage or current harmonics.
Connect the SYNC pin to ground if not used.
V
IN
(Pin 3): The V pin is the main supply pin for the
IN
switch driver and internal regulator. Short duration, high
current pulses are produced during the turn on and turn
off of the power switches. Connect a low ESR capacitor
of 4.7µF or greater.
ILIM/SS (Pin 9): The ILIM/SS pin sets a threshold level
for the cycle by cycle maximum switch current. Imple-
UVLO (Pin 4): The UVLO pin has a precision threshold
ment soft-start with a capacitor, C , placed on this pin to
SS
with hysteresis to implement an accurate V undervolt-
ground. An internal current source charges the capacitor.
IN
age lockout. The UVLO function disables switching and
The R , C time constant sets the soft-start time and
ILIM SS
sets the part into a low current shutdown mode. Connect
ramps the maximum switch current threshold at start-up.
the UVLO pin directly to V or to a resistor divider string.
IN
If the ILIM/SS function is not used, float this pin and the
current limit will default to the internal limit.
OVLO/DC(Pin5):TheOVLO/DCpinhasaprecisionthresh-
old withhysteresistoimplementan accurateV overvolt-
IN
GND (Pin 11): The ground pin is the exposed pad of the
package. Solder the exposed pad directly to the ground
plane.
age lockout. The OVLO function disables the switching.
Connect OVLO/DC pin to ground to disable the function
or to a resistor divider string to program the duty cycle.
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LT3999
BLOCK DIAGRAM
D1
D2
T1
V
OUT
•
•
•
•
V
IN
C
IN
3
1
10
SWA SWB
V
IN
LINEAR
R
R
A2
A1
BANDGAP
REGULATOR
UVLO
+
+
–
4
INTERNAL
BIAS
+
+
–
RBIAS
SWITCH
CONTROL
2
OVLO/DC
R
5
BIAS
SWITCH A
SWITCH B
R
B
+
–
+
–
OSCILLATOR
+
+
–
–
DUTY CYCLE
CONTROL
+
R
SENSE
+
–
RDC
SYNC RT
7
GND ILIM/SS
6
8
11
9
3999 BD
R
ILIM
C
SS
R
DC
R
T
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LT3999
OPERATION
Overview
Current Limit and Soft-Start
The LT3999 is a monolithic isolated push-pull DC trans-
former driver. It includes functions such as duty cycle
control, soft-start and protection features.
The LT3999 ILIM/SS pin programs the cycle-by-cycle
switch current limit and the soft-start time. A resistor on
the ILIM/SS pin sets the current limit. A capacitor on the
pininconjunctionwiththeresistorsetsthesoft-starttime.
Push-Pull Topology
When the programmed current limit is reached the switch
isimmediatelyturnedoffandremainsofffortheremainder
of the cycle. Leaving the ILIM/SS pin unconnected will
disable the programmable current limit and the LT3999
will default to its internal current limit.
In a push-pull topology, a pair of switches operating out
of phase generate a square wave voltage pulse on the
primary side of a center tapped transformer. The diodes
on the secondary side rectify the voltage and generate
the output voltage. This voltage is simply V times the
IN
Thesoft-startfunctionrampsthemaximumswitchcurrent
over the programmed soft-start time. The purpose of the
soft-startistoreduceinrushcurrentfromtheinputsupply.
transformer turns ratio.
Duty Cycle Control
The LT3999 duty cycle control provides, to a degree, line
regulation. The duty cycle is programmed by a resistor
on the RDC pin and the OVLO/DC voltage. By making the
Other Features
The LT3999 protection features include overvoltage lock-
out (OVLO), undervoltage lockout (UVLO) and thermal
shutdown.
OVLO/DC voltage a function of V the duty cycle will
IN
adjust with varying V thereby keeping V
constant.
IN
OUT
The OVLO function is programmed with the OVLO/DC pin.
Switching is disabled during an OVLO event. An internal
ThisfeatureisusefulincaseswhereanLDOisusedtopost
regulate the output of the LT3999. By pseudo regulating
the output with the duty cycle control the power dissipa-
tion in the LDO is minimized.
overvoltage lockout on the V pin is also provided to
IN
protect the LT3999.
The UVLO function is programmed with the UVLO pin.
Switching is disabled during a UVLO event. The UVLO
pin is also used to put the LT3999 into a low quiescent
shutdown state.
Leaving the RDC pin floating or connecting it to the OVLO/
DC pin disables the duty cycle function and the LT3999
operates at close to 50% duty cycle.
At a junction temperature above the operating tempera-
ture range the thermal shutdown function turns off both
switches.
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LT3999
APPLICATIONS INFORMATION
Switching Frequency
Oscillator Sync
The LT3999 drives two output power switches out of
phase, thustheoscillatorfrequencyistwotimestheactual
switching frequency of each power switch. The choice
of switching frequency is a trade-off between power ef-
ficiency and the size of capacitive and inductive storage
components.
In applications where a more precise frequency is desired
toaccuratelyplacehighfrequencyharmonics, theLT3999
oscillator can be synchronized to an external clock. Set
the internal oscillator frequency 10% to 50% lower than
the external sync frequency. The switching frequency is
one-half the sync frequency.
Operating at low switching frequency reduces the switch-
inglosses(transientlosses)andconsequentlyimprovesthe
power converter efficiency. However, the lower switching
frequency requires greater inductance for a given amount
of ripple current, resulting in a larger design footprint and
higher cost.
Drive the SYNC pin with a 2V or greater square wave.
The rising edge of the sync square wave will initiate clock
discharge. If unused, connect the SYNC pin to ground.
Duty Cycle
To run the LT3999 at full duty cycle leave the RDC pin
unconnected.
TheLT3999switchingfrequencyissetintherangeof50kHz
to 1MHz. The value of R for a given operating frequency
T
Variations in V are, to a first order, compensated with
IN
is chosen from Table 1 or from the following equation:
the LT3999 duty cycle control function. The duty cycle
function is implemented with a resistor divider on V
IN
Table 1. Recommended 1% Standard Values
connected to the OVLO/DC pin and a resistor to ground
on the RDC pin. Use the following formula to calculate
the RDC resistor or duty cycle:
R
f
SW
T
316kΩ
158kΩ
76.8kΩ
49.9kΩ
36.5kΩ
28kΩ
50kHz
100kHz
200kHz
300kHz
400kHz
500kHz
600kHz
700kHz
800kHz
900kHz
1000kHz
1.25•RDC
Duty Cycle DC =
(
)
RB
V •
•RT •4
IN
RA +RB
22.6kΩ
19.1kΩ
16.2kΩ
14kΩ
RB
RA +RB
1.25
V •
•RT •DC•4
IN
RDC=
12.1kΩ
where R and R are the resistors from the V to OVLO/
A
B
IN
DC resistor divider and R is the frequency setting resis-
T
1
R kΩ =
–70ns •3.25•1010
(
)
T
tor. See Figure 1. Setting the OVLO/DC pin to be 0.612V
2•f
SW
at the nominal V voltage yields good line regulation over
IN
a wide input range.
The duty cycle refers to the duty cycle of the individual
switch. Normally each switch operates at close to 50%
duty cycle.
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LT3999
APPLICATIONS INFORMATION
Soft-Start and Current Limit
V
V
IN
IN
R
R
R
R
R
A
B
A2
A1
B
The LT3999 soft-start ramps the peak switch current over
a time programmed by either a capacitor or a resistor and
capacitor on the ILIM/SS pin.
UVLO
OR
OVLO/DC
UVLO
OVLO/DC
Whenprogrammingthesoft-starttimewithacapacitoronly
thesoft-starttimeiscalculatedwiththefollowingformula:
3999 F01
Figure 1. Precision UVLO and OVLO Resistor Divider
t
(ms) = C • 80
SS
SS
where C is in µF.
SS
Resistors are chosen by first selecting R . Then calculate
A
B
R with the following formula:
Thecurrentlimitdefaultstotheinternallysetvaluebecause
there is no resistor on the pin.
VTH
1.25V
–1
RA =RB
When programming the soft-start time with a resistor
and capacitor on the ILIM/SS pin the soft-start time is
calculated with the following formula:
where V is the V referred voltage at which the supply
TH
IN
is enabled (UVLO) or disabled (OVLO/DC).
τ = RC
Transformer Design
where 3τ will be 95% of the maximum current.
Table 3 lists recommended center tapped transformers
for a variety of input voltage, output voltage and power
combinations. These transformers will yield slightly high
output voltages so that they can accommodate an LDO
regulator on the output.
The cycle-by-cycle current limit of the LT3999 is set with
a resistor on the ILIM/SS pin. Use the following formula
to calculate the value of the resistor:
R
ILIM
(kΩ) = I • 86.4
LIM
OVLO/DC and UVLO
If your application is not listed, the LTC Applications group
is available to assist in the choice and/or the design of the
transformer. In the design/selection of the transformer
the following characteristics are critical and should be
considered:
The UVLO pin has a precision voltage threshold with
hysteresis to enable the LT3999. The pin is typically con-
nected to V through a resistor divider; however, it can
IN
be directly connected to V .
IN
Table 3. Recommended Center Tapped Transformers
The OVLO/DC pin has a precision voltage threshold with
hysteresis to disable the LT3999 switching operation. The
NOMINAL
INPUT
NOMINAL
OUTPUT
OUTPUT
pin is typically connected to V through a resistor divider.
IN
VOLTAGE (V) VOLTAGE (V) POWER (W)
PART NUMBER
Coilcraft PA6383
Coilcraft PA6381
The OVLO/DC pin can be directly connected to GND to
disable the function. It is possible to use two separate
resistor divider strings for OVLO/DC and UVLO pins or
combine them together and use one resistor divider string
to drive both pins. See Figure 1.
5
5
5
5
5
1
3
12
12
Cooper Bussmann
CTX02-19064
12
24
12
24
10
20
Coilcraft PA6384
Cooper Bussmann
CTX02-19061
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LT3999
APPLICATIONS INFORMATION
Turns Ratio
Winding Resistance
The turns ratio of the transformer determines the output
voltage. The following equation is used as a first pass to
calculate the turns ratio:
Resistance in either the primary or secondary winding
reduces overall efficiency and degrades load regulation.
If efficiency or load regulation is unsatisfactory, verify
that the voltage drops in the transformer windings are
not excessive.
NS
VOUT +VF
=
NP 2 V – V
DC
(
)
IN
SW
Capacitors
where V is the forward voltage of the output diode, V
F
SW
In applications with full duty cycle operation, the input
supplycurrentisapproximatelyconstant. Therefore, large
input “hold-up type” capacitors are not necessary. A low
value (>4.7µF), low ESR ceramic will be adequate to filter
high frequency noise at the input. The output capacitors
supply energy to the output load only during switch
transitions. Therefore, large capacitance values are not
necessary on the output.
is the voltage drop across the internal switches (see the
Typical Performance curves) and DC is the duty cycle.
Sufficient margin should be added to the turns ratio to
account for voltage drops due to transformer winding
resistance.
Magnetizing Current
The magnetizing inductance of the transformer causes
a ripple current that is independent of load current. This
ripple current is calculated by:
Transformer winding capacitance between the isolated
primary and secondary has parasitic currents that can
cause noise on the grounds. Providing a high frequency,
low impedance path between the primary and secondary
gives the parasitic currents a local return path. A 2.2nF,
1kV ceramic capacitor is recommended.
V •DC
fSW •LM
IN
∆I=
where∆IandL areprimaryripplecurrentandmagnetizing
M
Optional LC Filter
inductancereferredtotheprimarysideofthetransformer,
respectively. Increasing the transformer magnetizing in-
An optional LC filter, as shown on the Typical Application
on the first page of this data sheet, should be included if
ultralow noise and ripple are required. It is recommended
that the corner frequency of the filter should be set a
decade below the switching frequency so that the switch
noise is attenuated by a factor of 100. For example, if the
ductance,L ,reducestheripplecurrent.Theripplecurrent
M
formula shows the effect of the switching frequency on
the magnetizing inductance. Setting the LT3999 at high
switching frequency reduces the ripple current for the
same magnetizing inductance. Therefore, it is possible to
reduce the transformer turns and still achieve low ripple
current.Thishelpstoreducethepowerconverterfootprint
as well. The transformer magnetizing inductance should
be designed for the worst-case duty cycle and input line
voltage combination.
f
= 100kHz, then f
= 10kHz where:
OSC
CORNER
1
fCORNER
=
2•π LC
Switching Diode Selection
A good rule of thumb is to set the primary current ripple
A fast recovery, surface mount diode such as a Schottky
is recommended. The proximity of the diodes to the
transformer outputs is important and should be as close
as possible with short, wide traces connecting them.
amplitude 10% to 30% of the average primary current, I :
P
POUT
IP =
V •eff
IN
where P
is the output power of the converter and eff
OUT
is the converter efficiency, typically around 85%.
3999fa
10
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LT3999
APPLICATIONS INFORMATION
Output Voltage Regulation
The junction temperature is computed as:
T = T
+ P • θ
D
The output voltage of the DC transformer topology is
unregulated. Variations in the input voltage will cause
the output voltage to vary because the output voltage is
a function of the input voltage and the transformer turn
ratio. Also, variations in the output load will cause the
output voltage to change because of circuit parasitics,
such as the transformer DC resistance and power switch
on resistance. If regulation is necessary, a post regulator
such as a linear regulator can be added to the output of
the supply. See the Typical Applications for examples of
adding a linear regulator.
J
AMB
JA
where:
P = P
+ P
+ P and θ is the package
SW JA
D
VIN
VCESAT
thermal resistance.
Layout Consideration Check List
The following is a list of recommended layout consider-
ations:
• Locate the bypass capacitor on the V pin of the trans-
IN
former close to the transformer.
Power Consideration
• Create a solid GND plane, preferably on layer two of
the PCB.
The current derived from the V pin and the SWA and
IN
SWB switching currents are the sources of the LT3999
• Use short wide traces to connect to the transformer.
power dissipation. The power dissipation is the sum of:
• The transformer and PCB routing should be care-
fully designed to maximize the symmetry between two
switching half cycles.
1) The quiescent current and switch drive power
dissipation:
ISW •DC
30
• SoldertheLT3999exposedpadtothePCB.Addmultiple
vias to connect the exposed pad to the GND plane.
IN
VIN = V
P
+4mA
More Help
where I is the average switch current.
SW
AN70: “A Monolithic Switching Regulator with 100mV
Output Noise” contains much information concerning
applications and noise measurement techniques.
2) Theconductingpowerdissipationoftheswitchesduring
on state:
P
= V • I • 2DC
CESAT SW
VCESAT
where DC is the duty cycle and V
is the collector
CESAT
to emitter voltage drop during the switch saturation.
3) The dynamic power dissipation due to the switching
transitions:
P
SW
= V • I • f
• (t + t )
IN SW OSC r f
where t and t are the rise and fall times.
r
f
3999fa
11
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LT3999
TYPICAL APPLICATIONS
30V to 12V, 10W Push-Pull DC Transformer
V
IN
30V
C
10µF
50V
L1
IN
OPTIONAL
V
D1
IN
V
OUT
T1
R1
SYNC
12V
SWA
SWB
499k
•
•
•
•
C
10µF
16V
0.8A
OUT
UVLO
R2
19.1k
OVLO/DC
LT3999
RDC
D2
RT
3999 TA02
ILIM/SS
RBIAS
D1, D2: DIODES INC. B260
L1: COILCRAFT M56132-153
T1: COOPER BUSSMANN CTX02-19062
R
T
GND
R
49.9k
C1
0.1µF
BIAS
28k
500kHz
5V to 5V, 4W Low Part Count Push-Pull DC Transformer
V
IN
5V
C
IN
47µF
10V
V
D1
IN
V
OUT
T1
5V
UVLO
SWA
SWB
•
•
•
•
C
10µF
10V
0.8A
OUT
SYNC
OVLO/DC
LT3999
RDC
D2
RT
3999 TA03
ILIM/SS
RBIAS
D1, D2: CENTRAL SEMI. CMSH1-20M
T1: COILCRAFT PA6383
R
T
GND
R
BIAS
12.1k
1MHz
49.9k
10V-15V to 12V, 200mA Isolated Switching Regulator
V
IN
10V TO 15V
C
10µF
100V
IN
R1
L1
V
OUT
V
715k
IN
D1
39µH
SHDN OUT
12V
T1
C
10µF
25V
OUT1
SYNC
200mA
SWA
SWB
IN
1M
•
•
•
•
R2
36.5k
C1
LT3065
UVLO
C3
10µF
50V
ADJ
180pF
OVLO/DC
REF/BYP
R8
52.3k
D2
D3
R7
10k
L2
39µH
R3
66.5k
0.01µF
R4
39k
LT3999
–V
OUT
SHDN OUT
IN
–12V
R6 200mA
10k
RDC
C
OUT2
10µF
25V
C2
10µF
50V
RT
ILIM
D4
LT3090
ILIM/SS
RBIAS
SET
D1-D4: CENTRAL SEMI. CMSH1-200HE
L1, L2: COILCRAFT XFL3012-393MEG
T1: WÜRTH 750314781
R10
243k
GND
R
T
GND
R
C
R
BIAS
DC
SS
12.1k
1MHz
13.3k
0.01µF 49.9k
3999 TA04
3999fa
12
For more information www.linear.com/LT3999
LT3999
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev I)
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.88
(.074)
1.88 ±0.102
(.074 ±.004)
0.889 ±0.127
(.035 ±.005)
1
0.29
REF
1.68
(.066)
0.05 REF
5.10
(.201)
MIN
1.68 ±0.102
3.20 – 3.45
DETAIL “B”
(.066 ±.004) (.126 – .136)
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
10
NO MEASUREMENT PURPOSE
0.50
(.0197)
BSC
0.305 ± 0.038
(.0120 ±.0015)
TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.497 ±0.076
(.0196 ±.003)
10 9
8
7 6
RECOMMENDED SOLDER PAD LAYOUT
REF
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
DETAIL “A”
0.254
(.010)
0° – 6° TYP
1
2
3
4 5
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
0.50
(.0197)
BSC
MSOP (MSE) 0213 REV I
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
3999fa
13
For more information www.linear.com/LT3999
LT3999
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 ±0.05
3.55 ±0.05
2.15 ±0.05 (2 SIDES)
1.65 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.125
0.40 ± 0.10
TYP
6
10
3.00 ±0.10
(4 SIDES)
1.65 ± 0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
PIN 1
TOP MARK
(SEE NOTE 6)
0.35 × 45°
CHAMFER
(DD) DFN REV C 0310
5
1
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
0.200 REF
2.38 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3999fa
14
For more information www.linear.com/LT3999
LT3999
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
04/15 Corrected pin assignments
Revised schematics
5
13, 16
3999fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT3999
TYPICAL APPLICATION
5V to 12V, 1W Low Power Push-Pull DC Transformer
V
IN
5V
C
IN
10µF
V
D1A
IN
V
OUT
T1
R1
10V
12V
SYNC
SWA
SWB
261k
•
•
•
•
C
2.2µF
16V
0.08A
OUT
UVLO
R2
100k
OVLO/DC
LT3999
RDC
D1B
RT
3999 TA05
ILIM/SS
RBIAS
D1, D2: VISHAY BAT54C
T1: COOPER BUSSMANN CTX02-19065R
R
12.1k
1MHz
T
GND
R
R
BIAS
49.9k
C
ILIM
SS
40.3k
0.1µF
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LT3439
LT1533
LT1683
LT1738
Slew Rate Controlled Ultralow Noise 1A Isolated DC/DC
Transformer Driver
V : 2.7V to 17.5V, I (Supply) = 12mA, I < 12mA, SO-16,
IN Q SD
Low Noise: <100mV , Independent Control of Switch Voltage
P-P
and Current Slew Rates
Slew Rate Controlled Ultralow Noise 1A Switching Regulator
Slew Rate Controlled Ultralow Noise Push-Pull Controller
Slew Rate Controlled Ultralow Noise DC/DC Controller
V : 2.7V to 23V, I (Supply) = 12mA, I < 12mA, SO-16,
IN Q SD
Low Noise: <100mV , Independent Control of Switch Voltage
P-P
and Current Slew Rates
V : 2.7V to 20V, I (Supply) = 25mA, I < 24mA, SSOP-20,
IN
Q
SD
Low Noise: <200mV , Independent Control of Switch Voltage
P-P
and Current Slew Rates
V : 2.7V to 20V, I (Supply) = 12mA, I < 24mA, SSOP-20,
IN
Q
SD
Greatly Reduced Conducted and Radiated EMI, Independent
Control of Switch Voltage and Current Slew Rates
3999fa
LT 0415 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
LINEAR TECHNOLOGY CORPORATION 2014
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LT3999
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