LT6016_技术文档

LT6016/LT6017

Dual/Quad 3.2MHz, 0.8V/µs

Low Power, Over-The-Top

Precision Op Amp

DESCRIPTION

The LT^®6016/LT6017 are dual and quad rail-to-rail input

operationalamplifierswithinputoffsetvoltagetrimmedto

lessthan50μV.Theseamplifiersoperateonsingleandsplit

supplies with a total voltage of 3V to 50V and draw only

315μA per amplifier. They are reverse battery protected,

drawing very little current for reverse supplies up to 50V.

FEATURES

–

n

Input Common Mode Range: V to V + 76V

n

Rail-to-Rail Input and Output

Low Power: 315μA/Amplifier

Operating Temperature Range: –55°C to 150°C

V : 50μV ꢀMaꢁimumꢂ

OS

CMRR, PSRR: 126dB

Reverse Battery Protection to 50V

Gain Bandwidth Product: 3.2MHz

Specified on 5V and 15V Supplies

High Voltage Gain: 1000V/mV

No Phase Reversal

TheOver-The-Top^®inputstageoftheLT6016/LT6017isde-

signedtoprovideaddedprotectionintoughenvironments.

–

+

The input common mode range extends from V to V and

beyond: these amplifiers operate with inputs up to 76V

–

+

above V independent of V . Internal resistors protect the

inputsagainsttransientfaultsupto25Vbelowthenegative

supply. The LT6016/LT6017 can drive loads up to 25mA

and are unity-gain stable with capacitive loads as large

as 200pF. Optional external compensation can be added

to extend the capacitive drive capability beyond 200pF.

No Supply Sequencing Problems

Dual 8-Lead MSOP

Quad 22-Lead DFN (6mm × 3mm)

APPLICATIONS

The LT6016 dual op amp is available in an 8-lead MSOP

package. The LT6017 is offered in a 22-pin leadless DFN

package.

L, LT, LTC, LTM, Linear Technology, Over-The-Top and the Linear logo are registered

trademarks of Linear Technology Corporation. All other trademarks are the property of their

respective owners.

n

High Side or Low Side Current Sensing

n

Battery/Power Supply Monitoring

n

4mA to 20mA Transmitters

n

High Voltage Data Acquisition

n

Battery/Portable Instrumentation

TYPICAL APPLICATION

Output Error vs Load Current

Precision High Voltage High Side Load Current Monitor

0.2

0

–0.2

–0.4

–0.6

5V

V

BAT

= 1.5V TO 76V

0.1μF

200Ω

100Ω

1%

+

–

0.1Ω

10W

LT6016

BSP89

2k

200Ω

1V/A

0V TO 1V OUT

V

= 1.5V

= 5V

= 20V

= 75V

BAT

LOAD

–0.8

–1.0

60167 TA01a

0.01

0.1

1

LOAD CURRENT (A)

60167 TA01b

60167fa

1

LT6016/LT6017

ABSOLUTE MAXIMUM RATINGS

ꢀNote 1ꢂ

+

–

Supply Voltage (V to V )................................60V, –50V

Input Differential Voltage ........................................ 80V

Input Voltage (Note 2).....................................80V, –25V

Input Current (Note 2).......................................... 10mA

Output Short Circuit Duration

Temperature Range (Notes 4, 5)

LT6016I/LT6017I..................................–40°C to 85°C

LT6016H/LT6017H............................. –40°C to 125°C

LT6016MP/LT6017MP(T

) ..... –55°C to 150°C

JUNCTION

Storage Temperature Range .................. –65°C to 150°C

Maximum Junction Temperature .......................... 150°C

Lead Temperature (Soldering, 10sec)....................300°C

(Note 3).........................................................Continuous

PIN CONFIGURATION

TOP VIEW

OUTA

–INA

+INA

N/C

1

2

3

4

5

6

7

8

9

22 OUTD

21 –IND

20 +IND

A

D

19 N/C

+

TOP VIEW

+

–

V

18 V

OUTA 1

–INA 2

8 V

23

7 OUTB

6 –INB

5 +INB

N/C

17 N/C

+

A

+INA

V

3

4

–

B

–

V

16 V

N/C

15 N/C

MS8 PACKAGE

8-LEAD PLASTIC MSOP

+INB

14 +INC

13 –INC

12 OUTC

B

C

T

= 150°C, θ = 273°C/W, θ = 45°C/W

JA JC

JMAX

–INB 10

OUTB 11

DJC PACKAGE

22-LEAD (6mm × 3mm) PLASTIC DFN

T

= 150°C, θ = 31.8°C/W, θ = 4.3°C/W

JA JC

JMAX

–

UNDERSIDE METAL INTERNALLY CONNECTED TO V

ORDER INFORMATION

LEAD FREE FINISH

LT6016IMS8#PBF

LT6016HMS8#PBF

LT6016MPMS8#PBF

LT6017IDJC#PBF

LT6017HDJC#PBF

LT6017MPDJC#PBF

TAPE AND REEL

PART MARKING*

LTGFK

PACKAGE DESCRIPTION

8-Lead Plastic MSOP

22-Lead Plastic DFN

TEMPERATURE RANGE

–40°C to 85°C

LT6016IMS8#TRPBF

LT6016HMS8#TRPBF

LT6016MPMS8#TRPBF

LT6017IDJC#TRPBF

LT6017HDJC#TRPBF

LT6017MPDJC#TRPBF

LTGFK

–40°C to 125°C

–55°C to 150°C

–40°C to 85°C

LTGFK

6017

–40°C to 125°C

–55°C to 150°C

6017

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

60167fa

2

LT6016/LT6017

The l denotes the specifications which apply over the specified

ELECTRICAL CHARACTERISTICS

temperature range, –40°C < T_A< 85°C for I-grade parts, –40°C < T_A< 125°C for H–grade parts, otherwise specifications are at

T_A= 25°C, V_S= 5V, V_CM= V_OUT= mid-supply.

I-, H-GRADE

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

+

V

OS

Input Offset Voltage

0 < V < V – 1.75V

μV

CM

MS8 Package

–50

25

50

+

0 < V < V – 1.75V

CM

DJC22 Package

–80

45

50

45

50

80

μV

V

= 5V

=76V

–125

–135

–250

–350

125

135

250

350

CM

+

l

0 < V < V – 1.75V

CM

V

= 5V to V = 76V

CM

ΔV

Input Offset Voltage Drift

Long Term Voltage Offset Stability

Input Bias Current

0.75

μV/°C

OS

ΔTEMP

ΔV

ΔTIME

0.75

μV/Mo

OS

+

I

0.25V < V < V – 1.75V

CM

–5

–30

11

–15

–150

7

2

–16.5

14

5

0

nA

μA

nA

μA

B

CM

V

= 0V

= 5V to 76V

17.5

15

0

+

l

0.25V < V < V – 1.75V

2

CM

V

CM

= 0V

–16.5

14

CM

V

= 5V to 76V

V = 0V, V = 0V to 76V

23

1

0.001

S

CM

+

Input Offset Current

0.25V < V < V – 1.75V

–5

–500

–15

–500

2

5

500

15

500

nA

OS

CM

V

= 0V

CM

= 5V to 76V (Note 6)

50

2

+

l

0.25V < V < V – 1.75V

CM

V

= 0V

2

CM

= 5V to 76V (Note 6)

50

l

VCMR

Common Mode Input Range

Differential Input Capacitance

Differential Input Resistance

0

76

V

C

IN

5

pF

+

R

IN

0 < V < V – 1.75V

CM

1

3.7

MΩ

kΩ

CM

+

V

> V

+

R

Common Mode Input Resistance

0 < V < V – 1.75V

CM

>1

>100

GΩ

MΩ

INCM

CM

+

V

> V

e

n

Input Referred Noise Voltage Density

f = 1kHz

+

V

< V – 1.75V

18

25

nV/√Hz

CM

+

> V

CM

Input Referred Noise Voltage

f = 0.1Hz to 10Hz

CM

0.5

μV

P-P

+

V

< V – 1.75V

i

n

Input Referred Noise Current Density

f = 1kHz

+

V

< V – 1.75V

0.1

11.5

pA/√Hz

CM

+

> V

CM

l

A

Open Loop Gain

R = 10kΩ

OUT

300

110

3000

V/mV

VOL

L

ΔV

= 3V

PSRR

CMRR

Supply Rejection Ratio

V = 1.65V to 15V

126

dB

S

CM

V

= V

= Mid-Supply

OUT

l

Input Common Mode Rejection Ratio

Output Voltage Swing Low

Output Voltage Swing High

Short-Circuit Current

V

CM

V

CM

= 0V to 3.25V

= 5V to 76V

100

126

140

dB

l

V

V = 5V, No Load

3

280

55

mV

OL

S

V = 5V, 5mA

500

S

l

V = 5V, No Load

450

1000

700

1250

mV

OH

S

V = 5V, 5mA

S

+

–

l

I

SC

V = 5V, 50Ω to V

10

25

mA

S

V = 5V, 50Ω to V

S

60167fa

3

LT6016/LT6017

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the specified

temperature range, –40°C < T_A< 85°C for I-grade parts, –40°C < T_A< 125°C for H–grade parts, otherwise specifications are at

T_A= 25°C, V_S= 5V, V_CM= V_OUT= mid-supply.

I-, H-GRADE

SYMBOL PARAMETER

CONDITIONS

= 10kHz

MIN

TYP

MAX

UNITS

GBW

Gain Bandwidth Products

f

2.85

2.5

3.2

MHz

TEST

l

SR

Slew Rate

ΔV

= 3V

0.55

0.45

0.75

V/μs

OUT

t

S

Settling Time Due to Input Step

OUT

0.1% Settling

3.5

μs

ΔV

= 2V

V

S

Supply Voltage

3

3.3

50

–50

V

l

Reverse Supply (Note 7)

I < –25μA/Amplifier

S

–65

I

S

Supply Current Per Amplifier

V = 5V

S

315

335

500

μA

l

R

O

Output Impedance

ΔI = 5mA

O

0.15

Ω

The l denotes the specifications which apply over the specified temperature range, –40°C < T_A< 85°C for I-grade parts, –40°C < T_A<

125°C for H–grade parts, otherwise specifications are at T_A= 25°C, V_S= 15V, V_CM= V_OUT= mid-supply.

I-, H-GRADE

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Input Offset Voltage

–80

55

75

80

μV

OSI

l

–250

–110

–250

250

110

250

V = 25V

S

V = 25V

ΔV

Input Offset Voltage Drift

Input Bias Current

0.75

μV/°C

OSI

ΔTEMP

I

–5

–15

2

5

15

nA

B

l

I

Input Offset Current

–5

2

5

nA

OS

l

–15

15

VCMR

Common Mode Input Range

Differential Input Capacitance

Differential Input Resistance

–15

61

V

C

5

pF

IN

+

R

0 < V < V – 1.75V

CM

1

3.7

MΩ

kΩ

IN

CM

+

V

> V

+

R

Common Mode Input Resistance

0 < V < V – 1.75V

CM

>1

>100

GΩ

MΩ

INCM

CM

+

V

> V

e

n

Input Referred Noise Voltage Density

f = 1kHz

+

V

< V – 1.75V

18

25

nV/√Hz

CM

+

> V

CM

Input Referred Noise Voltage

f = 0.1Hz to 10Hz

CM

0.5

μV

P-P

+

V

< V – 1.25V

i

n

Input Referred Noise Current Density

f = 1kHz

+

V

< V – 1.75V

0.1

11.5

pA/√Hz

CM

+

> V

CM

l

A

Open Loop Gain

R = 10kΩ

OUT

200

114

110

1000

V/mV

VOL

L

ΔV

= 27V

PSRR

Supply Rejection Ratio

V = 2.5V to 25V

126

dB

S

CM

V

= V

= 0V

OUT

CMRR

Input Common Mode Rejection Ratio

Output Voltage Swing Low

V

CM

= –15V to 13.25V

126

dB

l

V

V = 15V, No Load

3

280

55

mV

OL

S

V = 15V, 5mA

500

S

l

Output Voltage Swing High

V = 15V, No Load

450

1000

700

1250

mV

OH

S

V = 15V, 5mA

S

60167fa

4

LT6016/LT6017

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the specified

temperature range, –40°C < T_A< 85°C for I-grade parts, –40°C < T_A< 125°C for H–grade parts, otherwise specifications are at

T_A= 25°C, V_S= 15V, V_CM= V_OUT= mid-supply.

I-, H-GRADE

SYMBOL PARAMETER

CONDITIONS

V = 15V, 50Ω to GND

MIN

TYP

MAX

UNITS

l

I

Short-Circuit Current

Gain Bandwidth Product

Slew Rate

10

30

32

mA

SC

S

V = 15V, 50Ω to GND

S

GBW

SR

f

= 10kHz

2.9

2.55

3.3

MHz

TEST

l

ΔV

= 3V

0.6

0.5

0.8

V/μs

OUT

t

Settling Time Due to Input Step

Supply Voltage

0.1% Settling

ΔV 2V

3.5

μs

S

=

OUT

V

3

3.3

50

–30

V

S

l

Reverse Supply

I = –25μA/Amplifier

S

–65

I

S

Supply Current Per Amplifier

325

340

350

525

360

550

μA

l

V = 25V

S

V = 25V

R

Output Impedance

ΔI = 5mA

O

0.15

Ω

O

The l denotes the specifications which apply over the specified temperature range, –55°C < T_JUNCTION< 150°C for MP-grade parts,

otherwise specifications are at T_A= 25°C, V_S= 5V, V_CM= V_OUT= mid-supply.

MP-GRADE

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

+

V

OS

Input Offset Voltage

0 < V < V – 1.75V

μV

CM

MS8 Package

–50

25

50

+

0 < V < V – 1.75V

CM

DJC22 Package

–80

45

50

45

50

80

μV

V

= 5V

= 76V

–125

–135

–500

–600

125

135

500

600

CM

+

l

0 < V < V –1.75V

CM

V

= 5V to V = 76V

CM

ΔV

Input Offset Voltage Drift

Long Term Voltage Offset Stability

Input Bias Current

0.75

μV/°C

OS

ΔTEMP

ΔV

ΔTIME

0.75

μV/Mo

OS

+

I

0.25V < V < V – 1.75V

CM

–5

–30

11

–100

–500

6.5

2

–16.5

14

5

0

nA

μA

nA

μA

B

CM

V

= 0V

= 5V to 76V

17.5

100

0

+

l

0.25V < V < V – 1.75V

2

CM

V

= 0V

–16.5

14

CM

= 5V to 76V

V = 0V, V = 0V to 76V

24

4

0.001

S

CM

+

Input Offset Current

0.25V < V < V – 1.75V

–5

2

5

nA

OS

CM

V

= 0V

CM

= 5V to 76V (Note 6)

–500

–50

50

2

500

50

+

l

0.25V < V < V – 1.75V

CM

V

= 0V

–200

–500

2

200

500

CM

= 5V to 76V (Note 6)

150

l

VCMR

Common Mode Input Range

Differential Input Capacitance

Differential Input Resistance

0

76

V

C

IN

5

pF

+

R

IN

0 < V < V – 1.75V

CM

1

3.7

MΩ

kΩ

CM

+

V

> V

+

R

Common Mode Input Resistance

0 < V < V – 1.75V

CM

>1

>100

GΩ

MΩ

INCM

CM

+

V

> V

60167fa

5

LT6016/LT6017

ELECTRICAL CHARACTERISTICS

The l denotes the specifications which apply over the specified temperature

range, –55°C < T_JUNCTION< 150°C for MP-grade parts, otherwise specifications are at T_A= 25°C, V_S= 5V, V_CM= V_OUT= mid-supply.

MP-GRADE

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

e

n

Input Referred Noise Voltage Density

f = 1kHz

+

V

< V – 1.75V

18

25

nV/√Hz

CM

+

> V

CM

Input Referred Noise Voltage

f = 0.1Hz to 10Hz

CM

0.5

μV

P-P

+

V

< V – 1.75V

i

n

Input Referred Noise Current Density

f = 1kHz

+

V

< V – 1.75V

0.1

11.5

pA/√Hz

CM

+

> V

CM

l

A

Open Loop Gain

R = 10kΩ

OUT

200

106

3000

126

V/mV

VOL

L

ΔV

= 3V

PSRR

CMRR

Supply Rejection Ratio

Input Common Mode Rejection Ratio

Output Voltage Swing Low

Output Voltage Swing High

Short-Circuit Current

V = 1.65V to 15V

dB

S

CM

V

= V

= Mid-Supply

OUT

l

V

CM

V

CM

= 0V to 3.25V

= 5V to 76V

90

120

126

140

dB

l

V

V = 5V, No Load

3

280

75

mV

OL

S

V = 5V, 5mA

550

S

l

V = 5V, No Load

450

1000

750

1300

mV

OH

S

V = 5V, 5mA

S

+

–

l

I

SC

V = 5V, 50Ω to V

8

25

mA

S

V = 5V, 50Ω to V

S

GBW

SR

Gain Bandwidth Product

Slew Rate

f

= 10kHz

2.85

2.4

3.2

MHz

TEST

l

ΔV

= 3V

0.55

0.4

0.75

V/μs

OUT

t

Settling Time Due to Input Step

Supply Voltage

0.1% Settling

ΔV 2V

3.5

μs

S

=

OUT

V

3

3.3

50

–50

V

S

l

Reverse Supply (Note 7)

I < –25VμA/Amplifier

S

–63

I

S

Supply Current Per Amplifier

V = 5V

S

315

335

540

μA

l

R

O

Output Impedance

ΔI = 5mA

O

0.15

Ω

The l denotes the specifications which apply over the specified temperature range, –55°C < T_JUNCTION< 150°C for MP-grade parts,

otherwise specifications are at T_A= 25°C, V_S= 15V, V_CM= V_OUT= mid-supply.

MP-GRADE

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Input Offset Voltage

–80

55

75

80

μV

OSI

l

–500

–110

–500

500

110

500

V = 25V

S

V = 25V

ΔV

Input Offset Voltage Drift

Input Bias Current

0.75

μV/°C

OSI

ΔTEMP

I

–5

–300

2

5

300

nA

B

l

I

Input Offset Current

–5

2

5

nA

OS

l

–50

50

VCMR

Common Mode Input Range

Differential Input Capacitance

Differential Input Resistance

–15

61

V

C

5

pF

IN

+

R

0 < V < V – 1.75V

CM

1

3.7

MΩ

kΩ

IN

CM

+

V

> V

60167fa

6

LT6016/LT6017

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the specified temperature

range, –55°C < T_JUNCTION< 150°C for MP-grade parts, otherwise specifications are at T_A= 25°C, V_S= 15V, V_CM= V_OUT= Mid-Supply.

MP-GRADE

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

+

R

INCM

Common Mode Input Resistance

0 < V < V – 1.75V

CM

>1

>100

GΩ

MΩ

CM

+

V

> V

e

Input Referred Noise Voltage Density

f = 1kHz

n

+

V

< V – 1.75V

18

25

nV/√Hz

CM

+

> V

CM

Input Referred Noise Voltage

f = 0.1Hz to 10Hz

CM

0.5

μV

P-P

+

V

< V – 1.75V

i

n

Input Referred Noise Current Density

f = 1kHz

+

V

< V – 1.75V

0.1

11.5

pA/√Hz

CM

+

> V

CM

l

A

Open Loop Gain

R = 10kΩ

OUT

100

106

100

1000

126

V/mV

VOL

L

ΔV

= 27V

PSRR

CMRR

Supply Rejection Ratio

V = 2.5V to 25V

dB

S

CM

V

= V

= 0V

OUT

Input Common Mode Rejection Ratio

Output Voltage Swing Low

V

CM

= –15V to 13.25V

126

dB

l

V

V = 15V, No Load

3

280

75

550

mV

OL

S

V = 15V, 5mA

S

l

V

Output Voltage Swing High

Short-Circuit Current

Gain Bandwidth Product

Slew Rate

V = 15V, No Load

S

450

750

1300

mV

OH

S

V = 15V, 5mA

1000

l

I

SC

V = 15V, 50Ω to GND

8

30

32

mA

S

V = 15V, 50Ω to GND

S

GBW

SR

f

= 10kHz

2.9

2.45

3.3

MHz

TEST

l

ΔV

= 3V

0.6

0.45

0.8

V/μs

OUT

t

Settling Time Due to Input Step

Supply Voltage

0.1% Settling

ΔV 2V

3.5

μs

S

=

OUT

V

3

3.3

50

–30

V

S

l

Reverse Supply

I = –25μA/Amplifier

S

–65

I

S

Supply Current Per Amplifier

325

340

350

575

360

600

μA

l

V = 25V

S

V = 25V

R

O

Output Impedance

ΔI = 5mA

O

0.15

Ω

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

junction temperature range of –55°C to 150°C. Junction temperatures

greater than 125°C will promote accelerated aging. The LT6016/LT6017

has a demonstrated typical performance beyond 1000 hours at T = 150°C.

J

Note 5: The LT6016I/LT6017I are guaranteed to meet specified

performance from –40°C to 85°C. The LT6016H/LT6017H are guaranteed

to meet specified performance from –40°C to 125°C. The LT6016MP/

LT6017MP are guaranteed to meet specified performance with junction

temperature ranging from –55°C to 150°C.

Note 6: Test accuracy is limited by high speed test equipment repeatability.

Bench measurements indicate the input offset current in the Over-The-Top

configuration is typically controlled to under 50nA at 25°C and 150nA

over temperature.

–

Note 2: Voltages applied are with respect to V . The inputs are tested to

–

the Absolute Maximum Rating by applying –25V (relative to V ) to each

input for 10ms. In general, faults capable of sinking current from either

input should be current limited to under 10mA. See the Applications

Information section for more details.

Note 3: A heat sink may be required to keep the junction temperature

below absolute maximum. This depends on the power supply voltage and

how many amplifiers are shorted.

Note 4: The LT6016I/LT6017 are guaranteed functional over the operating

temperature range of –40°C to 85°C. The LT6016H/LT6017H are

guaranteed functional over the operating temperature range of –40°C

to 125°C. The LT6016MP/LT6017MP are guaranteed functional over the

Note 7: The Reverse Supply voltage is tested by pulling 25ꢀA/Amplifier out

+

–

of the V pin while measuring the V pin’s voltage with both inputs and V

+

grounded, verifying V < –50V.

60167fa

7

LT6016/LT6017

TYPICAL PERFORMANCE CHARACTERISTICS

Typical Distribution of Input

Offset Voltage

Typical Distribution of Input

Offset Voltage

Typical Distribution of Over-The-Top

Input Offset Voltage

600

500

400

300

200

100

0

350

300

250

200

150

100

400

350

300

250

200

150

100

50

965 UNITS

1930 CHANNELS

FROM TWO RUNS

V

=

15V

V

= 5V

V

= 5V

S

V

T

= 0V

V

= 5V

V

T

= MID-SUPPLY

CM

A

CM

A

CM

A

= 25°C

T

= 25°C

MS8 PACKAGE

1285 UNITS

2570 CHANNELS

FROM TWO RUNS

1285 UNITS

2570 CHANNELS

FROM TWO RUNS

50

0

–50 –40 –30 –20 –10

0

10 20 30 40 50

–50 –40 –30 –20 –10

0

10 20 30 40 50

–30–25–20–15–10 –5

0

5

10 15 20 25 30

INPUT OFFSET VOLTAGE (μV)

60167 G02

60167 G03

60167 G01

Typical Distribution of Over-The-Top

Input Offset Voltage

Typical Distribution of Input

Offset Voltage

Typical Distribution of Over-The-Top

Input Offset Voltage

350

300

250

200

150

100

350

300

250

200

150

100

500

450

400

350

300

250

200

150

100

50

965 UNITS

1930 CHANNELS

FROM TWO RUNS

510 UNITS

2040 CHANNELS

FROM TWO RUNS

V

= 5V

V

= 5V

V = 5V

S

510 UNITS

2040 CHANNELS

FROM TWO RUNS

S

V

= 76V

V

= MID-SUPPLY

V

= 5V

CM

A

CM

A

CM

T

= 25°C

T

= 25°C

T = 25°C

A

MS8 PACKAGE

DJC22 PACKAGE

50

0

50

0

–50 –40 –30 –20 –10

0

10 20 30 40 50

–50 –40 –30 –20 –10

0

10 20 30 40 50

–100 –80 –60 –40 –20

0

20 40 60 80 100

INPUT OFFSET VOLTAGE (μV)

60167 G04

60167 G05

60167 G06

Voltage Offset Shift vs Lead Free

IR Reflow

Over-The-Top Voltage Offset Shift

vs Lead Free IR Reflow

Voltage Offset Shift vs Lead Free

IR Reflow

12

10

8

18

16

14

12

10

8

24 DEVICES

48 CHANNELS

MS8 PACKAGE

10 DEVICES

V = 5V

S

24 DEVICES

40 CHANNELS

DJC22 PACKAGE

V

= MID-SUPPLY

48 CHANNELS

MS8 PACKAGE

CM

V

CM

= 5V

14

12

10

8

V = 5V

S

CM

V

= 5V

V

= MID-SUPPLY

6

4

6

4

2

0

–20 –15 –10 –5

0

5

10 15 20 25

–25 –20 –15 –10 –5

0

5 10 15 20 25

–20 –15 –10 –5

0

5

10 15 20 25

VOLTAGE OFFSET SHIFT (μV)

60167 G08

60167 G09

60167 G07

60167fa

8

LT6016/LT6017

TYPICAL PERFORMANCE CHARACTERISTICS

Voltage Offset Shift vs Thermal

Cycling

Warm-Up Drift

Over-The-Top Warm-Up Drift

2.5

2.0

18

16

14

12

10

8

2.5

2.0

V

=

15V

= 0V

5 UNITS, 10 CHANNELS

MS8 PACKAGE

V

= 5V

= 50V

5 UNITS, 10 CHANNELS

MS8 PACKAGE

FOUR THERMAL CYCLES –55°C TO 130°C

S

CM

S

CM

V

T

= 25°C

A

20 DEVICES

1.5

40 CHANNELS

MS8 PACKAGE

1.0

V = 5V

S

CM

0.5

V

= MID-SUPPLY

0.0

–0.5

–1.0

–1.5

–2.0

–2.5

–0.5

–1.0

–1.5

–2.0

–2.5

6

4

CHANNEL A

CHANNEL B

2

CHANNEL A

CHANNEL B

0

1

2

3

4

5

–25 –20 –15 –10 –5

0

5 10 15 20 25

0

1

2

3

4

5

TIME AFTER POWER ON (MIN)

VOLTAGE OFFSET SHIFT (μV)

TIME AFTER POWER ON (MIN)

60167 G10

60167 G12

60167 G11

Voltage Offset Shift vs

Temperature Cycling

Over-The-Top Voltage Offset vs

Temperature

Voltage Offset vs Temperature

100

75

150

100

50

150

100

50

FOUR CYCLES –55°C TO 130°C

V

CM

= 5V

5 UNITS, 10 CHANNELS

V

CM

= 5V

5 UNITS, 10 CHANNELS

MS8 PACKAGE

S

V

= 5V, V = MID-SUPPLY

V

= MID-SUPPLY MS8 PACKAGE

V

= 50V

S

CM

40 CHANNELS MEASURED

MS8 PACKAGE

CHANNEL A

CHANNEL B

CHANNEL A

CHANNEL B

MAXIMUM SHIFT

MEASURED

50

25

TYPICAL

CHANNEL

0

–25

–50

–75

–100

–50

–100

–150

–50

–100

–150

MINIMUM SHIFT

MEASURED

WORST-CASE

CHANNEL

–75 –50 –25

0

25 50 75 100 125 150

–50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

–50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

60167 G13

60167 G14

60167 G15

Voltage Offset vs Input Common

Mode Voltage

Voltage Offset vs Supply Voltage

Minimum Supply Voltage

50

40

100

75

20

15

V

= 5V

S

T

= –45°C

A

30

50

10

T

A

= 125°C

20

25

5

10

T = 25°C

A

T

= 25°C

A

0

T

= 25°C

0

A

T

= –45°C

A

T

A

= –45°C

–10

–20

–30

–40

–50

–25

–50

–75

–100

–5

T

= 125°C

A

T

A

= 125°C

–10

–15

–20

0.01

0.1

1

10

100

5

10 15 20 25 30 35 40 45 50

TOTAL SUPPLY VOLTAGE (V)

0

1

2

3

4

5

V

(V)

TOTAL SUPPLY VOLTAGE (V)

CM

60167 G16

60167 G17

60167 G18

60167fa

9

LT6016/LT6017

TYPICAL PERFORMANCE CHARACTERISTICS

Long Term Stability of Five

Representative Units

Input Bias Current vs Input

Common Mode Voltage

Input Bias Current vs Input

Common Mode Voltage

20

15

10

5

25

0

5

4

V

= 5V

V

S

= 5V

5 UNITS, 10 CHANNELS

MS8 PACKAGE

S

3

2

1

0

–1

–2

–3

–4

–5

–25

T

= 125°C

= 85°C

T

= 125°C

= 85°C

= 25°C

= –45°C

= –55°C

A

0

= 25°C

= –45°C

= –55°C

CHANNEL A

CHANNEL B

–5

–50

0.1

1

10

100

0.001

0.01

0.1

1

10

0

1

2

3

4

INPUT COMMON MODE VOLTAGE (V)

TIME (MONTHS)

60167 G20

60167 G21

60167 G19

Input Bias Current vs Supply

Voltage

Reverse Supply Current vs

Reverse Supply Voltage

Supply Current vs Supply Voltage

12.5

10.0

7.5

600

500

400

300

200

100

0

10

T

= 125°C

= 85°C

A

NON-INVERTING OP AMP CONFIGURATION

–

T

= 150°C

A

+INA, +INB TIED TO V

= 25°C

5

0

= –45°C

= –55°C

T

= –55°C

T

= 130°C

A

5.0

T

= 150°C

A

–5

2.5

T

= –55°C

A

T

= 25°C

–10

–15

A

0.0

PARAMETRIC SWEEP IN ~25°C

INCREMENTS

–2.5

0

10

20

30

40

50

0

10

20

30

40

50

–60

–50

–40

–30

–20

–10

0

SUPPLY VOLTAGE (V)

60167 G22

60167 G23

60167 G24

Over-The-Top Noise Density vs

Frequency

Noise Density vs Frequency

0.1Hz to 10Hz Noise

40

35

30

25

20

15

10

5

2.00

1.75

1.50

1.25

1.00

0.75

0.50

0.25

0

60

50

40

30

20

10

0

60

50

40

30

20

10

0

V

T

=

2.5V TO 25V

V

= 5V

CM

S

A

S

= 25°C

= 5V

VOLTAGE NOISE

CURRENT NOISE

0

1

10

100

1000

0

2

4

6

8

10

1

10

100

1000

10k

100k

FREQUENCY (Hz)

TIME (SEC)

60167 G25

60167 G26

60167 G27

60167fa

10

LT6016/LT6017

TYPICAL PERFORMANCE CHARACTERISTICS

Output Impedance vs Frequency

PSRR vs Frequency

CMRR vs Frequency

100

80

60

40

20

0

1000

100

10

120

V

S

= 2.5V

V

=

2.5V

S

100

80

60

40

20

0

POSITIVE SUPPLY

A

= 100

V

A

= +1

V

1

NEGATIVE SUPPLY

A

= 10

0.10

0.01

V

0.1

1

10

100

1000

0

1

10

100

1000

10k

0.1

1

10

100

1000

FREQUENCY (kHz)

60167 G30

60167 G28

60167 G29

Closed-Loop Small Signal

Frequency Response

Gain and Phase Shift vs

Frequency

Gain Bandwidth Product and

Phase Margin vs Supply Voltage

60

40

90.00

3.5

3.4

3.3

3.2

3.1

3.0

60

56

52

48

44

40

50

40

C

= 30pF

LOAD

PHASE

100V/V

10V/V

1V/V

112.5

135.0

157.5

180.0

30

GBW

20

PM

GAIN

10

0

–10

–20

V

C

=

LOAD

2.5V

= 20pF

S

–20

0.01

0.1

1

10

0

10

20

30

40

50

1

10

100

1000

10k

FREQUENCY (kHz)

TOTAL SUPPLY VOLTAGE (V)

FREQUENCY (kHz)

60167 G32

60167 G33

60167 G31

Phase Margin vs Capacitive Load

Gain-Bandwidth vs Temperature

Channel Separation vs Frequency

4.0

3.5

3.0

2.5

2.0

45.0

42.5

40.0

37.5

35.0

32.5

30.0

140

130

120

110

100

90

V

= 2.5V

S

R

LOAD

= OPEN

R

LOAD

= 1kΩ

V

= 15V

S

I

= 150μA

SRC

V

= 5V

S

I

= 0

SRC

80

70

V

S

= 15V

60

–50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

0

50

100

150

200

250

300

0.1

1

10

FREQUENCY (kHz)

100

1000

CAPACITIVE LOAD (pF)

60167 G35

60167 G34

60167 G36

60167fa

11

LT6016/LT6017

TYPICAL PERFORMANCE CHARACTERISTICS

Settling Time to 0.1% vs Output

Step

Slew Rate vs Temperature

Short-Circuit vs Temperature

5

4

2.0

1.5

1.0

0.5

0

40

30

V

=

CM

15V

= 0V

V

= 5V

S

V

= 2.5V

S

SINKING

RISING EDGE

3

A

= +1

20

V

2

A

= –1

V

10

1

0

FALLING EDGE

–1

–2

–3

–10

–20

–30

–40

A

= –1

V

SOURCING

A

= +1

4

V

–4

–5

2

3

5

6

7

–50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

–50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

SETTLING TIME (μs)

60167 G37

60167 G38

60167 G39

Output Saturation Voltage vs

Input Overdrive

Small Signal Transient Response

Large Signal Transient Response

1000

100

10

A

V

C

= 1V/V

A

V

= 1V/V

V

S

V

S

OUTPUT HIGH

=

2.5V

=

15

= 20pF

LOAD

25mV/DIV

5V/DIV

OUTPUT LOW

V

=

2.5V

S

A

T

= 25°C

NO LOAD

1

60167 G40

60167 G41

1μs/DIV

10μs/DIV

1

10

100

1000

INPUT OVERDRIVE (mV)

60167 G42

Output Saturation Voltage ꢀV_OL

ꢂ

Output Saturation Voltage ꢀV_OH

ꢂ

vs Load Current

Open-Loop Gain

200

150

100

50

10k

1000

100

10

10k

1000

100

10

V

= 15V

S

R

= 2kΩ

LOAD

R

LOAD

= 10kΩ

0

R

= 1MΩ

LOAD

–50

–100

T

= 125°C

= 25°C

T

= 125°C

= 25°C

A

–150

–200

= –45°C

1

–20 –15 –10 –5

0

5

10 15 20

60167 G45

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

10

OUTPUT VOLTAGE (V)

SINKING LOAD CURRENT (mA)

SOURCING LOAD CURRENT (mA)

60167 G43

60167 G44

60167fa

12

LT6016/LT6017

APPLICATIONS INFORMATION

Supply Voltage

Inputs

The positive supply pin of the LT6016/LT6017 should

be bypassed with a small capacitor (typically 0.1ꢀF) as

close to the supply pins as possible. When driving heavy

loads an additional 4.7ꢀF electrolytic capacitor should be

added. When using split supplies, the same is true for

ReferringtotheSimplifiedSchematic, theLT6016/LT6017

has two input stages: a common emitter differential input

stage consisting of PNP transistors Q1 and Q2 which

–

operate when the inputs are biased between V and 1.5V

+

below V , and a common base input stage consisting of

–

the V supply pin.

PNPtransistorsQ3toQ6whichoperatewhenthecommon

+

mode input is biased greater than V –1.5V. This results

The LT6017 consists of two dual amplifier dice assembled

in a single DFN package which share a common substrate

in two distinct operating regions as shown in Figure 2.

–

(V ). While the V pins of the quad (pins 5 and 7) must

alwaysbetiedtogetherandtotheexposedpadunderneath,

For common mode input voltages approximately 1.5V or

+

more below the V supply (Q1 and Q2 active), the com-

+

the V power supply pins (pins 16 and 18) may be sup-

mon emitter PNP input stage is active and the input bias

current is typically under 2nA. When the common mode

plied independently. The B and C channel amplifiers are

+

supplied through V by pin 16, and the A and D channel

input is within approximately 1V of the V supply or higher

amplifiers are supplied by pin 18. If pin 16 and pin 18 are

+

nottiedtogetherandarebiasedindependently,eachV pin

–50V

5V

OK!

shouldhavetheirowndedicatedsupplybypasstoground.

+

–

+

–

Shutdown

WhiletherearenodedicatedshutdownpinsfortheLT6016/

LT6017, the amplifiers can effectively be shut down into

+

80V

REVERSE BATTERY

TOLERANT

+

a low power state by removing V . In this condition the

INPUTS DRIVEN ABOVE

SUPPLY TOLERANT

input bias current is typically less than 1nA with the inputs

–

biased between V and 76V above V , and if the inputs are

5V

–

OK!

taken below V , they appear as a diode in series with 1k of

+

resistance. The output may be pulled up to 50V above the

+

80V

V power supply in this condition (See Figure 1). Pulling

–

the output pin below V will produce unlimited current

–

and can damage the part.

25V

TRANSIENT

LARGE DIFFERENTIAL

INPUT VOLTAGE

TOLERANT

+

Reverse Battery

INPUTS DRIVEN BELOW

GROUND TOLERANT

The LT6016/LT6017 are protected against reverse battery

voltages up to 50V. In the event a reverse battery condi-

tion occurs, the supply current is typically less than 5μA

(assuming the inputs are biased within a diode drop from

0V

OK!

+

–

+

V ). For typical single supply applications with ground re-

50V

ferred loads and feedback networks, no other precautions

are required. If the reverse battery condition results in a

negative voltage at the input pins, the current into the pin

shouldbelimitedbyanexternalresistortolessthan10mA.

60167 F01

OUTPUT DRIVEN ABOVE THE

+

V

SUPPLY (IN SHUTDOWN)

TOLERANT

Figure 1. LT6016/LT6017 Fault Tolerant Conditions

60167fa

13

LT6016/LT6017

APPLICATIONS INFORMATION

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

(Over-The-Top operation), Q9 begins to turn on diverting

bias current away from the common emitter differential

input pair to the current mirror consisting of Q11 and Q12.

ThecurrentfromQ12willbiasthecommonbasedifferential

inputpairconsistingofQ3toQ6.BecausetheOver-The-Top

input pair is operating in a common base configuration,

the input bias current will increase to about, 14ꢀA. Both

input stages have their voltage offsets trimmed tightly and

are specified in the Electrical Characteristics table.

V

= 5V

S

TYPICAL COMMON MODE VOLTAGE

FOR ONSET OF OVER-THE-TOP

OPERATION

TYPICAL COMMON MODE VOLTAGE

WHERE OVER-THE-TOP OPERATION

FULLY ON

TRANSISTION REGION

The inputs are protected against temporary excursions to

–50

–25

0

25

50

75

100

125

150

–

TEMPERATURE (°C)

as much as 25V below V by internal 1k resistor in series

60167 F02

with each input and a diode from the input to the negative

supply. Adding additional external series resistance will

Figure 2. LT6016/LT6017 Over-The-Top Transition Region vs

Temperature

–

extend the protection beyond 25V below V . The input

stage of the LT6016/LT6017 incorporates phase reversal

protection to prevent the output from phase reversing for

Some implications should be understood about Over-

The-Top operation. The first, and most obvious is the

input bias currents change from under 2nA in normal

operation to 14μA in Over-The-Top operation as the input

stage transitions from common emitter to common base.

Even though the Over-The-Top input bias currents run

around 14 μA, they are very well matched and their offset

is typically under 100nA.

–

inputs below V .

There are no clamping diodes between the inputs. The

inputs may be over-driven differentially to 80V without

damage, or without drawing appreciable input current.

Figure 1 summarizes the kind of faults that may be applied

to the LT6016/LT6017 without damage.

Over-The-Top Operation Considerations

Thesecondandmoresubtlechangetoamplifieroperation

is the differential input impedance which decreases from

1MΩ in normal operation, to approximately 3.7kΩ in

When the input common mode of the LT6016/LT6017 is

+

biased near or above the V supply, the amplifier is said

Over-The-Top operation (specified as R in the Electrical

IN

to be operating in the Over-The-Top configuration. The

differential input pair which control amplifier operation

is common base pair Q3 to Q6 (refer to the Simplified

Schematic). If the input common mode is biased between

Characteristics table). This resistance appears across the

summing nodes in Over-The-Top operation and is due to

the common base input stage configuration. Its value is

easilyderivedfromthespecifiedinputbiascurrentflowing

into the op amp inputs and is equal to 2 • k • T/(q • Ib)

(k-Boltzmann’s constant, T – operating temperature,

Ib-operating input bias current of the amplifier in the

Over-The-Top region). And because the inputs are biased

proportional to absolute temperature, it is relatively

constant with temperature. The user may think this

effective resistance is relatively harmless because it

appears across the summing nodes which are forced

–

+

V and approximately 1.5V below V , the amplifier is said

tobeoperatinginthenormalconfiguration. Thedifferential

input pair which control amplifier operation is common

emitter pair Q1 and Q2.

AplotoftheOver-The-TopTransitionregionvsTemperature

(the region between normal operation and Over-The-Top

operation) on a 5V single supply is shown in Figure 2.

60167fa

14

LT6016/LT6017

APPLICATIONS INFORMATION

to 0V differential by feedback action of the amplifier.

However, depending on the configuration of the feedback

around the amplifier, this input resistance can boost noise

gain, lower overall amplifier loop gain and closed loop

bandwidth, raise output noise, with one benevolent effect

in increasing amplifier stability.

Likewise the closed loop bandwidth of the amplifier will

change going from normal mode operation to Over-The-

Top operation:

GBW

Normal mode:

BW

≈

CLOSED −LOOP

R

F

1+

R

I

–

+

In the normal mode of operation (where V < V < V

CM

Over-The-Top mode:

BW

–1.5V), R is typically large compared to the value of the

IN

inputresistorused,andR canbeignored(refertoFigure3).

GBW

IN

≈

CLOSED −LOOP

In this case the noise gain is defined by the equation:

R

F

1+

R || R +R ||R

(

)

I

IN

I

F

R

F

NOISE GAIN ≈ 1+

R

I

Andoutputnoiseisnegativelyimpactedgoingfromnormal

mode to Over-The-Top:

However, whentheamplifiertransitionsintoOver-The-Top

mode with the input common mode biased near or above

Normal mode: (neglecting resistor noise)

+

the the V supply, R should be considered. The noise

IN

gain of the amplifier changes to:

⎛

⎞

⎟

⎠

R

F

e

≈ e • 1+

⎜

ni

no

⎝

I

R

F

NOISE GAIN = 1+

R || R +R ||R

(

)

I

IN

I

F

Over-The-Top mode: (neglecting resistor noise)

R

F

5V

⎛

⎞

R

F

I

e

≈ e •⎜1+

⎟

+

no

ni

⎜

R || R +R ||R

(

)

1/2

LT6016

⎝

⎠

I

IN

I

F

V

R

IN

V

OUT

IN

ꢀ

–

Output

V

INCM

R

F

60167 F03

The output of the LT6016/LT6017 can swing within a

+

Schottky diode drop (~0.4V) of the V supply, and within

Figure 3. Difference Amplifier Configured for Both

Normal and Over-The-Top Operation

5mV of the negative supply with no load. The output is

capable of sourcing and sinking approximately 25mA.

The LT6016/LT6017 are internally compensated to drive

at least 200pF of capacitance under any output loading

conditions. For larger capacitive loads, a 0.22ꢀF capaci-

tor in series with a 150Ω resistor between the output and

groundwillcompensatetheseamplifierstodrivecapacitive

loads greater than 200pF.

While it is true that the DC closed loop gain will remain

R

F

mostly unaffected (=

), the loop gain of the amplifier

R

I

A

OL

F

OL

F

R

has decreased from

to

1+

R

R || R +R ||R

(

)

I

I IN I F

60167fa

15

LT6016/LT6017

APPLICATIONS INFORMATION

Distortion

In general, the die junction temperature (T ) can be esti-

J

mated from the ambient temperature T , and the device

A

There are two main contributors of distortion in op amps:

output crossover distortion as the output transitions

from sourcing to sinking current and distortion caused

by nonlinear common mode rejection. If the op amp is

operating in an inverting configuration there is no com-

mon mode induced distortion. If the op amp is operating

in the noninverting configuration within the normal input

power dissipation P :

D

T = T + P • θ

JA

J

A

D

The power dissipation in the IC is a function of supply

voltage and load resistance. For a given supply voltage,

the worst-case power dissipation P

occurs at the

D(MAX)

maximum supply current with the output voltage at half

of either supply voltage (or the maximum swing is less

–

+

common mode range (V to V –1.5V) the CMRR is very

good, typically over 120dB. When the LT6016 transitions

input stages going from the normal input stage to the

Over-The-Top input stage or vice-versa, there will be a

significant degradation in linearity due to the change in

input circuitry.

than one-half the supply voltage). P

is given by:

D(MAX)

2

P

= (V • I

) + (V /2) /R

D(MAX)

S

S(MAX)

S

LOAD

Example: An LT6016 in a MSOP package mounted on a PC

board has a thermal resistance of 273°C/W. Operating on

25Vsupplieswithbothamplifierssimultaneouslydriving

2.5kΩ loads, the worst-case IC power dissipation for the

Lower load resistance increases distortion due to a net

decrease in loop gain, and greater voltage swings internal

to the amp necessary to drive the load, but has no effect

on the input stage transition distortion. The lowest distor-

tion can be achieved with the LT6016/LT6017 sourcing in

class-A operation in an inverting configuration, with the

inputcommonmodebiasedmid-waybetweenthesupplies.

given load occurs when driving 12.5V

and is given by:

PEAK

2

P

= 2 • 50 • 0.6mA + 2 • (12.5) /2500 = 0.185W

D(MAX)

With a thermal resistance of 273°C/W, the die temperature

will experience approximately a 50°C rise above ambient.

This implies the maximum ambient temperate the LT6016

should ever operate under the assumed conditions:

Power Dissipation Considerations

T = 150°C – 50°C = 100°C

Because of the ability of the LT6016/LT6017 to operate on

power supplies up to 25V and to drive heavy loads, there

is a need to ensure the die junction temperature does not

exceed 150°C. The LT6016 is housed in an 8-lead MSOP

A

Tooperatetohigherambienttemperatures, usetwo chan-

nelsoftheLT6017quadwhichhaslowerthermalresistance

θ =31.8°C/W,andanexposedpadwhichmaybesoldered

JA

–

package (θ = 273°C/W). The LT6017 is housed in a 22

JA

down to a copper plane (connected to V ) to further lower

pin leadless DFN package (DJC22, θ = 31.8°C/W).

JA

the thermal resistance below θ = 31.8°C/W.

JA

60167fa

16

LT6016/LT6017

SIMPLIFIED SCHEMATIC

+

V

I1

I3

I4

D3

Q10

PNP

16μA

8μA

M2

M1

R5

PMOS

40k

R1, 1k

R2, 1k

Q9

–IN

PNP

I2

P

N

CLASS AB

ADJUST

Q1

PNP

Q2

PNP

OUT

+IN

5μA

Q3

Q4

PNP

Q6

Q5

PNP

Q7

NPN

Q8

NPN

Q13

NPN

Q11

NPN

Q12

NPN

R3

6k

R4

6k

D1

D2

D4

–

V

60167 SS

60167fa

17

LT6016/LT6017

TYPICAL APPLICATIONS

Gain of 100 High Voltage Difference Amplifier with –5V/75V Common Mode Range

CMRR

ADJUST

97.6k

5k

5V

1/2

1k

+

V

ꢀꢁꢀꢂꢃꢃꢀtꢀ7

IN

V

OUT

IN

LT6016

–

+

–

–5V

V

CM

100k

–

60167 TA02

60167fa

18

LT6016/LT6017

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

MS8 Package

8-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1660 Rev F)

0.889 0.127

(.035 .005)

5.23

3.20 – 3.45

(.206)

(.126 – .136)

MIN

3.00 0.102

(.118 .004)

(NOTE 3)

0.52

(.0205)

REF

0.65

(.0256)

BSC

0.42 0.038

(.0165 .0015)

TYP

8

7 6

5

RECOMMENDED SOLDER PAD LAYOUT

3.00 0.102

(.118 .004)

(NOTE 4)

4.90 0.152

(.193 .006)

DETAIL “A”

0.254

(.010)

0° – 6° TYP

GAUGE PLANE

1

2

3

4

0.53 0.152

(.021 .006)

1.10

(.043)

MAX

0.86

(.034)

REF

DETAIL “A”

0.18

(.007)

SEATING

PLANE

0.22 – 0.38

0.1016 0.0508

(.009 – .015)

(.004 .002)

0.65

(.0256)

BSC

TYP

MSOP (MS8) 0307 REV F

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

60167fa

19

LT6016/LT6017

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

DJC Package

22-Lead Plastic DFN ꢀ6mm w 3mmꢂ

(Reference LTC DWG # 05-08-1714 Rev Ø)

0.889

0.70 0.05

R = 0.10

0.889

3.60 0.05

1.65 0.05

(2 SIDES)

2.20 0.05

PACKAGE

OUTLINE

0.25 0.05

0.50 BSC

5.35 0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

NOTE:

1. DIMENSIONS ARE IN MILLIMETERS

2. APPLY SOLDER MASK TO AREAS THAT

ARE NOT SOLDERED

3. DRAWING IS NOT TO SCALE

R = 0.115

TYP

0.40 0.05

6.00 0.10

(2 SIDES)

0.889

12

22

R = 0.10

TYP

0.889

3.00 0.10

(2 SIDES)

1.65 0.10

(2 SIDES)

PIN 1

TOP MARK

(NOTE 6)

PIN #1 NOTCH

R0.30 TYP OR

0.25mm w 45°

CHAMFER

11

1

0.25 0.05

0.50 BSC

0.75 0.05

0.200 REF

5.35 0.10

(2 SIDES)

(DJC) DFN 0605

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

NOTE:

1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WXXX)

IN JEDEC PACKAGE OUTLINE M0-229

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON TOP AND BOTTOM OF PACKAGE

60167fa

20

LT6016/LT6017

REVISION HISTORY

REV

DATE

DESCRIPTION

PAGE NUMBER

A

01/13 Corrected Block Diagram Q7 and Q8

17

60167fa

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

21

LT6016/LT6017

TYPICAL APPLICATION

Eꢁtended Supply Current Boosted Gain of Three Amplifier Drives 100Ω Load to 30V, with 600mA Current Limit

47nF

1k

0.1μF

35V

1k

330pF

20k

820pF

35V

Q1

24V *

Z

–

+

604Ω

1Ω

10k

1k

1/2

LT6016

V

= 30V

–

OUT

330Ω

1/2W

1/2

LT6016**

+

Q2

24V *

Z

V

IN

–35V

1k

–35V

100k

10nF

47nF

2 × 1N4148

OR EQUIVALENT

60167 TA03

*ZENER DIODES: CENTRAL SEMI CMZ5934

Q1, Q2: ON-SEMI D44VH10 NPN, D45VH10 PNP WITH HEAT SINK

**BOTH HALVES OF LT6016 ON SAME SUPPLY

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

Over-The-Top Inputs, 50ꢀA/Amplifier, Reverse Battery Protection to 18V

LT1490A/LT1491A

Dual and Quad Micropower Rail-to-Rail Input and

Output Op amp

LT1638/LT1639

1.2MHz, 0.4V/μs Over-The-Top Rail-to-Rail Input and Over-The-Top Inputs, 230ꢀA/Amplifier, 1.2MHz GBW, 0.4V/μs Slew Rate

Output Op Amp

LT1494/LT1495/LT1496 1.5ꢀA Max, Single, Dual, and Quad, Over-The-Top

Precision Rail-to-Rail Input and Output Op Amps

Over-The-Top Inputs, 1.5ꢀA/Amplifier, 375ꢀV Voltage Offset

LT1112/LT1114

LT1013/LT1014

Dual/Quad Low Power Precision, pA Input Op Amp

Dual/Quad Precision Op Amp

60ꢀV Offset Voltage, 400 ꢀA/Amplifier

150ꢀV Offset Voltage, 500 ꢀA/Amplifier

60167fa

LT 0113 REV A • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

22

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LT6016
厂家：	Linear
描述：	Dual/Quad 3.2MHz, 0.8V/Î¼s Low Power, Over-The-Top Precision Op Amp 双/四路3.2MHz的， 0.8V / Î¼s低功耗，过度的顶级精密运算放大器运算放大器
文件：	总22页 (文件大小：860K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT6016 [Linear]

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