LT6402IUD-12_技术文档

LT6402-12

300MHz Low Distortion, Low

Noise Differential Ampliﬁer/

ADC Driver (A = 12dB)

DESCRIPTION

V

FEATURES

n

300 MHz –3dB Bandwidth

The LT^®6402-12 is a low distortion, low noise differential

ampliﬁer/ADC driver for use in applications from DC to

300MHz. The LT6402-12 has been designed for ease of

use,withminimalsupportcircuitryrequired.Exceptionally

low input-referred noise and low distortion (with either

single-ended or differential inputs) make the LT6402-12

an excellent solution for driving high speed 12-bit and

14-bit ADCs. In addition to the normal unﬁltered outputs

(+OUT and –OUT), the LT6402-12 has a built-in 75MHz

differential low pass ﬁlter and an additional pair of ﬁltered

outputs (+OUTFILTERED, –OUTFILTERED) to reduce

external ﬁltering components when driving high speed

ADCs. The output common mode voltage is easily set via

n

Fixed Gain of 12dB

n

Low Distortion:

43dBm OIP3, –82dBc HD3 (20MHz, 2V

)

P-P

n

Low Noise:

15dB NF, e = 2.6nV/√Hz (20MHz)

n

Differential Inputs and Outputs

Additional Filtered Outputs

Adjustable Output Common Mode Voltage

DC- or AC-Coupled Operation

Minimal Support Circuitry Required

Small 0.75mm Proﬁle 16-Lead 3mm × 3mm QFN

Package

the V

pin, eliminating an output transformer or AC-

OCM

coupling capacitors in many applications.

APPLICATIONS

n

TheLT6402-12isdesignedtomeetthedemandingrequire-

ments of communications transceiver applications. It can

be used as a differential ADC driver, a general-purpose

differential gain block, or in other applications requiring

differential drive. The LT6402-12 can be used in data

acquisition systems required to function at frequencies

down to DC.

Differential ADC Driver for:

Imaging

Communications

n

Differential Driver/Receiver

n

Single Ended to Differential Conversion

n

Differential to Single Ended Conversion

n

Level Shifting

IF Sampling Receivers

SAW Filter Interfacing/Buffering

n

TheLT6402-12operatesona5Vsupplyandconsumes30mA.

It comes in a compact 16-lead 3mm × 3mm QFN package

and operates over a –40°C to 85°C temperature range.

n

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

TYPICAL APPLICATION

Distortion vs Frequency, Differential Input, No R_LOAD

–40

FILTERED OUTPUTS

V

= 2V

OUT

P-P

5V

–50

–60

0.1μF

–INB

V

–70

CC

V

CM

–INA

V

10Ω

OCM

+OUT

+

–

AIN

0.1μF

–80

LT6402-12

–OUT

LTC^®2249

HD3

HD2

AIN

0.1μF

–90

+INB

+INA

IF IN

V

EE

64026 TA01a

–100

1

10

FREQUENCY (MHz)

100

640212 TA01b

640212fa

1

LT6402-12

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Note 1)

TOP VIEW

Total Supply Voltage (V /V /V

EEA EEB EEC

Input Current (+INA, –INA, +INB, –INB,

to

CCA CCB CCC

/V /V ) ...................................................5.5V

V

16 15 14 13

V

1

2

3

4

12

V

EEC

CCC

V

, ENABLE)................................................ 10mA

OCM

V

11 ENABLE

OCM

17

Output Current (Continuous)

V

10

9

CCA

CCB

EEB

+OUT, –OUT ................................................... 100mA

+OUTFILTERED, –OUTFILTERED...................... 30mA

Output Short-Circuit Duration (Note 2) ............ Indeﬁnite

Operating Temperature Range (Note 3).... –40°C to 85°C

Speciﬁed Temperature Range (Note 4) .... –40°C to 85°C

Storage Temperature Range................... –65°C to 125°C

Junction Temperature ........................................... 125°C

V

EEA

5

6

7

8

UD PACKAGE

16-LEAD (3mm × 3mm) PLASTIC QFN

T

JMAX

= 125°C, θ = 68°C/W, θ = 4.2°C/W

JA JC

EXPOSED PAD IS V (PIN 17)

EE

MUST BE SOLDERED TO THE PCB

ORDER INFORMATION

LEAD FREE FINISH

LT6402CUD-12#PBF

LT6402IUD-12#PBF

LEAD BASED FINISH

LT6402CUD-12

TAPE AND REEL

PART MARKING*

LCBB

PACKAGE DESCRIPTION

TEMPERATURE RANGE

–40°C to 85°C

LT6402CUD-12#TRPBF

LT6402IUD-12#TRPBF

TAPE AND REEL

16-Lead (3mm × 3mm) Plastic QFN

PACKAGE DESCRIPTION

LCBB

–40°C to 85°C

PART MARKING*

LCBB

TEMPERATURE RANGE

–40°C to 85°C

LT6402CUD-12#TR

LT6402IUD-12#TR

16-Lead (3mm × 3mm) Plastic QFN

LT6402IUD-12

LCBB

–40°C to 85°C

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *The temperature grade is identiﬁed by a label on the shipping container.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

The l denotes the speciﬁcations which apply over the full operating

DC ELECTRICAL CHARACTERISTICS

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_CCA= V_CCB= V_CCC= 5V, V_EEA= V_EEB= V_EEC= 0V, ENABLE = 0.8V, +INA

shorted to +INB (+IN), –INA shorted to –INB (–IN), V_OCM= 2.2V, Input common mode voltage = 2.2V, no R_LOADunless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Input/Output Characteristics (+INA, +INB, –INA, –INB, +OUT, –OUT, +OUTFILTERED, –OUTFILTERED)

l

GDIFF

Gain

Differential (+OUT, –OUT), V

=

400mV Differential

11.6

12

12.4

dB

IN

V

Single-Ended +OUT, –OUT, +OUTFILTERED,

0.25

0.35

0.5

V

SWINGMIN

SWINGMAX

SWINGDIFF

OUT

–OUTFILTERED, V 1.2V Differential

=

IN

Single-Ended +OUT, –OUT, +OUTFILTERED,

–OUTFILTERED, V 1.2V Differential

3.4

3.3

3.6

7

V

=

IN

Output Voltage Swing

Differential (+OUT, –OUT), V 1.2V Differential

=

6.1

5.6

V

IN

P-P

l

I

Output Current Drive

Input Offset Voltage

30

35

1

mA

V

OS

–6.5

–10

6.5

10

mV

l

TCV

Input Offset Voltage Drift

T

MIN

to T

MAX

2.5

μV/°C

OS

640212fa

2

LT6402-12

DC ELECTRICAL CHARACTERISTICS

shorted to +INB (+IN), –INA shorted to –INB (–IN), V_OCM= 2.2V, Input common mode voltage = 2.2V, no R_LOADunless otherwise noted.

The l denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_CCA= V_CCB= V_CCC= 5V, V_EEA= V_EEB= V_EEC= 0V, ENABLE = 0.8V, +INA

SYMBOL

PARAMETER

CONDITIONS

Single-Ended

MIN

TYP

MAX

UNITS

V

l

I

Input Voltage Range, MIN

Input Voltage Range, MAX

Input Resistance

0.5

VRMIN

VRMAX

4.3

77

V

Ω

R

100

1

122

INDIFF

C

Input Capacitance

pF

dB

Ω

INDIFF

l

CMRR

Common Mode Rejection Ratio Input Common Mode 0.5V to 4.3V

42

65

R

Output Resistance

Output Capacitance

0.3

0.8

OUTDIFF

C

pF

Common Mode Voltage Control (V

Pin)

OCM

GCM

Common Mode Gain

Differential (+OUT, –OUT), V

= 1.2V to 3.6V

= 1.4V to 3.4V

0.9

1

1.1

V/V

OCM

l

V

Output Common Mode Voltage

Adjustment Range, MIN

1.2

1.4

V

OCMMIN

OCMMAX

OSCM

Output Common Mode Voltage Single-Ended

Adjustment Range, MAX

3.6

3.4

V

Output Common Mode Offset

Voltage

Measured from V

to Average of +OUT and –OUT

–30

4

30

15

mV

OCM

l

I

V

Input Bias Current

Input Resistance

Input Capacitance

5

3

1

μA

MΩ

pF

BIASCM

OCM

R

0.8

INCM

C

INCM

ENABLE Pin

l

V

ENABLE Input Low Voltage

ENABLE Input High Voltage

ENABLE Input Low Current

ENABLE Input High Current

0.8

V

IL

V

2

IH

I

ENABLE = 0.8V

ENABLE = 2V

0.5

3

μA

IL

IH

1

Power Supply

l

V

Operating Range

4

5

5.5

37

V

mA

μA

S

I

Supply Current

ENABLE = 0.8V

ENABLE = 2V

4V to 5.5V

24

30

S

Supply Current (Disabled)

Power Supply Rejection Ratio

250

90

500

SDISABLED

PSRR

55

dB

640212fa

3

LT6402-12

AC ELECTRICAL CHARACTERISSTICS_{T = 25°C, V}

_CCA= V_CCB= V_CCC= 5V, V_EEA= V_EEB= V_EEC= 0V,

A

ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), V_OCM= 2.2V, Input common mode voltage = 2.2V, no R_LOAD

unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Input/Output Characteristics

–3dBBW

0.1dBBW

0.5dBBW

SR

–3dB Bandwidth

50mV Differential (+OUT, –OUT)

200

300

30

MHz

V/μs

ns

P-P

Bandwidth for 0.1dB Flatness

Bandwidth for 0.5dB Flatness

Slew Rate

50mV Differential (+OUT, –OUT)

P-P

50mV Differential (+OUT, –OUT)

80

P-P

3.2V Differential (+OUT, –OUT)

400

10

P-P

t

1% Settling

1% Settling for a 1V Differential Step

s1%

P-P

(+OUT, –OUT)

t

Turn-On Time

Turn-Off Time

200

1.5

ns

μs

ON

OFF

Common Mode Voltage Control (V

Pin)

OCM

–3dBBW

Common Mode Small-Signal –3dB

Bandwidth

0.1V at V , Measured Single-Ended at +OUT

OCM

200

250

MHz

V/μs

CM

P-P

and –OUT

SR

Common Mode Slew Rate

1.3V to 3.4V Step at V

OCM

CM

Noise/Harmonic Performance Input/Output Characteristics

10MHz Signal

Second/Third Harmonic Distortion

2V Differential (+OUTFILTERED, –OUTFILTERED)

–85

–83

dBc

P-P

2V Differential (+OUT, –OUT)

P-P

Third-Order IMD

2V Differential Composite (+OUTFILTERED,

–91.5

P-P

–OUTFILTERED), f1 = 9.5MHz, f2 = 10.5MHz

OIP3

NF

Output Third-Order Intercept

Differential (+OUTFILTERED, –OUTFILTERED),

f1 = 9.5MHz, f2 = 10.5MHz (Note 5)

47.5

dBm

10M

Noise Figure

Measured Using DC954A Demo Board

15.4

2.7

dB

nV/√Hz

dBm

e

Input Referred Noise Voltage Density

1dB Compression Point

n10M

R = 100Ω (Note 5)

L

20.5

20MHz Signal

Second/Third Harmonic Distortion

Third-Order IMD

2V Differential (+OUTFILTERED, –OUTFILTERED)

–82

–79

–87

dBc

P-P

2V Differential (+OUT, –OUT)

P-P

2V Differential Composite (+OUTFILTERED,

P-P

–OUTFILTERED), f1 = 19.5MHz, f2 = 20.5MHz

2V Differential Composite (+OUT, –OUT),

L

–80

43

dBc

P-P

R = 400Ω, f1 = 19.5MHz, f2 = 20.5MHz

OIP3

NF

Output Third-Order Intercept

Differential (+OUTFILTERED, –OUTFILTERED),

f1 = 19.5MHz, f2 = 20.5MHz (Note 5)

dBm

20M

Noise Figure

Measured Using DC954A Demo Board

15

2.6

17

dB

nV/√Hz

dBm

e

Input Referred Noise Voltage Density

1dB Compression Point

n20M

R = 100Ω (Note 5)

L

640212fa

4

LT6402-12

AC ELECTRICAL CHARACTERISTICS

T_A= 25°C, V_CCA= V_CCB= V_CCC= 5V,V_EEA= V_EEB= V_EEC= 0V,

ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), V_OCM= 2.2V, Input common mode voltage = 2.2V, no R_LOAD

unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

25MHz Signal

Second/Third Harmonic Distortion

Third-Order IMD

2V Differential (+OUTFILTERED, –OUTFILTERED)

–82

–73

–83

dBc

P-P

2V Differential (+OUT, –OUT)

P-P

2V Differential Composite (+OUTFILTERED,

P-P

–OUTFILTERED), f1 = 24.5MHz, f2 = 25.5MHz

2V Differential Composite (+OUT, –OUT),

L

–74

40

dBc

P-P

R = 400Ω, f1 = 24.5MHz, f2 = 25.5MHz

OIP3

NF

Output Third-Order Intercept

Differential (+OUTFILTERED, –OUTFILTERED),

f1 = 24.5MHz, f2 = 25.5MHz (Note 5)

dBm

25M

Noise Figure

Measured Using DC954A Demo Board

15.1

2.6

dB

nV/√Hz

dBm

e

Input Referred Noise Voltage Density

1dB Compression Point

n25M

R = 100Ω (Note 5)

L

13.5

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 4: The LT6402C is guaranteed to meet speciﬁed performance from

0°C to 70°C. It is designed, characterized and expected to meet speciﬁed

performance from –40°C and 85°C but is not tested or QA sampled

at these temperatures. The LT6402I is guaranteed to meet speciﬁed

performance from –40°C to 85°C.

Note 2: As long as output current and junction temperature are kept below

the Absolute Maximum Ratings, no damage to the part will occur.

Note 3: The LT6402 is guaranteed functional over the operating

temperature range of –40°C to 85°C.

Note 5: Since the LT6402-12 is a feedback ampliﬁer with low output

impedance, a resistive load is not required when driving an ADC.

Therefore, typical output power is very small. In order to compare the

LT6402-12 with typical g ampliﬁers that require 50Ω output loading, the

m

LT6402-12 output voltage swing driving an ADC is converted to OIP3 and

P1dB as if it were driving a 50Ω load.

TYPICAL PERFORMANCE CHARACTERISTICS

Frequency Response,

R_LOAD= 400Ω

Frequency Response vs C_LOAD

,

Frequency Response,

R_LOAD= 100Ω

R_LOAD= 400Ω

18

15

12

9

18

15

12

9

24

21

18

15

V

= 50V

P-P

IN

UNFILTERED OUTPUTS

FILTERED OUTPUTS

UNFILTERED OUTPUTS

FILTERED OUTPUTS

6

12

9

3

0

–3

–6

–9

–12

–15

–18

6

3

–3

–6

–9

–12

–15

V

= 50mV

P-P

IN

UNFILTERED: R

FILTERED: R

= 400Ω

V

= 50mV

P-P

LOAD

0pF

IN

0

= 300Ω

UNFILTERED: R

FILTERED: R

= 100Ω

LOAD

1.6pF

5pF

LOAD

(EXTERNAL) + 100Ω

(INTERNAL, FILTERED OUTPUTS)

= 100Ω

LOAD

–3

–6

(INTERNAL, FILTERED OUTPUTS)

10 100

FREQUENCY (MHz)

10pF

1

10 100

FREQUENCY (MHz)

1000

1

1000

1

10

100

1000

FREQUENCY (MHz)

640212 G01

640212 G03

640212 G02

640212fa

5

LT6402-12

TYPICAL PERFORMANCE CHARACTERISTICS

Third Order Intermodulation

Output Third Order Intercept vs

Frequency, Differential Input,

No R_LOAD

Distortion vs Frequency,

Differential Input, No R_LOAD

Distortion vs Frequency,

Differential Input, R_LOAD= 400Ω

–60

–65

–70

–75

–80

–85

–90

–95

–65

51

49

47

45

2 TONES

P-P

2 TONES

P-P

1MHz TONE SPACING

2V COMPOSITE

–70 1MHz TONE SPACING

UNFILTERED OUTPUTS

–75

UNFILTERED

OUTPUTS

UNFILTERED

OUTPUTS

–80

43

41

FILTERED OUTPUTS

2 TONES

–85

–90

–95

FILTERED

OUTPUTS

39

37

35

FILTERED

OUTPUTS

2V COMPOSITE

P-P

1MHz TONE SPACING

5

15

20

25

30

35

5

10

15

20

25

30

35

5

10

20

FREQUENCY (MHz)

10

25

30

35

15

FREQUENCY (MHz)

64026 G04

640212 G05

640212 G06

Output Third Order Intercept vs

Frequency, Differential Input,

R_LOAD= 400Ω

Distortion vs Frequency,

Differential Input, No R_LOAD

–40

–50

–60

–70

–80

–90

–100

51

49

47

45

–45

–55

–65

–75

–85

–95

FILTERED OUTPUTS

UNFILTERED OUTPUTS

V

= 2V

V

= 2V

OUT

P-P

OUT

P-P

FILTERED OUTPUTS

43

41

UNFILTERED OUTPUTS

2 TONES

HD3

HD2

HD3

HD2

39

37

35

2V COMPOSITE

P-P

1MHz TONE SPACING

5

10

20

FREQUENCY (MHz)

25

30

35

15

1

10

FREQUENCY (MHz)

100

1

10

FREQUENCY (MHz)

640212 G08

640212 G09

640212 G07

Distortion vs Output Amplitude,

20MHz Differential Input, No R_LOAD

Distortion vs Output Amplitude,

20MHz Differential Input, No R_LOAD

Output 1dB Compression

vs Frequency

–70

–75

–80

–85

–90

25

20

15

10

5

–70

–75

–80

UNFILTERED OUTPUTS

FILTERED OUTPUTS

UNFILTERED OUTPUTS

HD2

HD3

100Ω LOAD

400Ω LOAD

HD2

HD3

–85

–90

–95

0

–5

–10

–15

0

1

2

3

4

5

6

7

8

9

10

1

10

100

1000

0

1

2

3

4

5

6

7

8

9

10

OUTPUT AMPLITUDE (dBm)

FREQUENCY (MHz)

OUTPUT AMPLITUDE (dBm)

640212 G12

640212 G11

640212 G10

640212fa

6

LT6402-12

TYPICAL PERFORMANCE CHARACTERISTICS

Input Referred Noise Voltage

Noise Figure vs Frequency

vs Frequency

Reverse Isolation vs Frequency

30

25

20

15

10

5

12

10

8

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–110

MEASURED USING

DC954 DEMO BOARD

UNFILTERED OUTPUTS

6

4

2

0

10

100

FREQUENCY (MHz)

1000

10

100

1000

1

10

100

1000

FREQUENCY (MHz)

640212 G13

640212 G14

640212 G15

Differential Input Impedance

vs Frequency

Differential Output Impedance

vs Frequency

Input Reﬂection Coefﬁcient

vs Frequency

300

250

200

150

100

50

100

10

1

0

–5

MEASURED USING

DC954 DEMO BOARD

UNFILTERED OUTPUTS

–10

–15

–20

–25

–30

–35

–40

IMPEDANCE

MAGNITUDE

IMPEDANCE

PHASE

0

–50

–100

1

10

100

1000

1

10

100

1000

10

100

1000

FREQUENCY (MHz)

640212 G16

640212 G18

64206 G17

Output Reﬂection Coefﬁcient

vs Frequency

PSRR, CMRR vs Frequency

Small-Signal Transient Response

120

110

100

90

80

70

60

50

40

30

20

10

0

–5

2.280

2.260

2.240

2.220

2.200

2.180

2.160

2.140

2.120

UNFILTERED OUTPUTS

MEASURED USING

DC954 DEMO BOARD

PSRR

CMRR

–10

–15

–20

–25

–30

–35

–40

1

10

100

1000

1

10

100

1000

TIME (5ns/DIV)

FREQUENCY (MHz)

640212 G20

640212 G19

640212 G21

640212fa

7

LT6402-12

TYPICAL PERFORMANCE CHARACTERISTICS

Distortion vs Output Common

Mode Voltage, LT6402-12 Driving

an LTC2249 14-Bit ADC

Large-Signal Transient Response

Overdrive Recovery Time

–70

–75

–80

–85

3.7

3.2

2.7

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

FILTERED OUTPUTS

R

LOAD

= 100Ω PER OUTPUT

NO R

LOAD

= 20MHz 2V

V

OUT

P-P

+OUT

HD3

R

= 100Ω

LOAD

PER OUTPUT

2.2

1.7

1.2

HD2

–90

–95

–OUT

–100

1.8

2.2

2.4

1

1.2

1.4 1.6

2.0

TIME (25ns/DIV)

TIME (10ns/DIV)

OUTPUT COMMON MODE VOLTAGE (V)

640212 G24

640212 G23

640212 G22

10MHz 8192 Point FFT, LT6402-12

Driving an LTC2249 14-Bit ADC

Turn-On Time

Turn-Off Time

0

–10

–20

–30

–40

–50

–60

–70

–80

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

R

= 100Ω

8192 POINT FFT

R

= 100Ω PER OUTPUT

LOAD

PER OUTPUT

f

= 10MHz, –1dBFS

IN

FILTERED OUTPUTS

+OUT

–OUT

+OUT

–OUT

–90

–100

–110

–120

–130

–140

ENABLE

0

2

4

6

8

10 12 14 16 18 20

TIME (125ns/DIV)

TIME (250ns/DIV)

FREQUENCY (MHz)

640212 G27

640212 G25

640212 G26

20MHz 2-Tone 32768 Point FFT,

LT6402-12 Driving an LTC2249

14-Bit ADC

20MHz 8192 Point FFT, LT6402-12

Driving an LTC2249 14-Bit ADC

25MHz 8192 Point FFT, LT6402-12

Driving an LTC2249 14-Bit ADC

0

–10

–20

–30

–40

0

–10

–20

–30

–40

0

–10

–20

–30

–40

32768 POINT FFT

8192 POINT FFT

TONE 1 AT 19.5MHz, –7dBFS

TONE 2 AT 20.5MHz, –7dBFS

FILTERED OUTPUTS

f

= 20MHz, –1dBFS

f

= 25MHz, –1dBFS

IN

FILTERED OUTPUTS

–50

–60

–70

–80

–90

–100

–110

–120

–130

–140

–100

–110

–120

–130

–140

–100

–110

–120

–130

–140

0

2.5

5

7.5 10 12.5 15 17.5 20 22.5

FREQUENCY (MHz)

0

2

4

6

8

10 12 14 16 18 20

0

2

4

6

8

10 12 14 16 18 20

FREQUENCY (MHz)

640212 G30

640212 G28

640212 G29

640212fa

8

LT6402-12

PIN FUNCTIONS

V

(Pin 2): This pin sets the output common mode

+OUTFILTERED, –OUTFILTERED (Pins 6, 7): Filtered

Outputs. These pins add a series 50Ω resistor from the

unﬁltered outputs and three 14pF capacitors. Each output

OCM

voltage. Without additional biasing, both inputs bias to

this voltage as well. This input is high impedance.

has 14pF to V , plus an additional 14pF between each pin

EE

V

, V , V

CCA CCB CCC

(Pins 3, 10, 1): Positive Power Supply

(See the Block Diagram). This ﬁlter has a –3dB bandwidth

of 75MHz.

(Normally Tied to 5V). All three pins must be tied to the

same voltage. Bypass each pin with 1000pF and 0.1μF

capacitors as close to the package as possible. Split

ENABLE (Pin 11): This pin is a TTL logic input referenced

supplies are possible as long as the voltage between V

and V is 5V.

to the V pin. If low, the LT6402-12 is enabled and draws

CC

EEC

typically 30mA of supply current. If high, the LT6402-12

EE

is disabled and draws typically 250μA.

V

, V , V (Pins 4, 9, 12): Negative Power Supply

EEA EEB EEC

(Normally Tied to Ground). All three pins must be tied to

+INA, +INB (Pins 15, 16): Positive Inputs. These pins are

normally tied together. These inputs may be DC- or AC-

coupled. If the inputs are AC-coupled, they will self-bias

the same voltage. Split supplies are possible as long as

the voltage between V and V is 5V. If these pins are

CC

EE

nottiedtoground, bypasseachpinwith1000pFand0.1μF

to the voltage applied to the V

pin.

OCM

capacitors as close to the package as possible.

–INA, –INB (Pins 14, 13): Negative Inputs. These pins are

normally tied together. These inputs may be DC- or AC-

coupled. If the inputs are AC-coupled, they will self-bias

+OUT, –OUT (Pins 5, 8): Outputs (Unﬁltered). These pins

are high bandwidth, low-impedance outputs. The DC

output voltage at these pins is set to the voltage applied

to the voltage applied to the V

pin.

OCM

at V

.

OCM

Exposed Pad (Pin 17): Tie the pad to V (Pin 12). If split

EEC

supplies are used, DO NOT tie the pad to ground.

640212fa

9

LT6402-12

BLOCK DIAGRAM

200Ω

V

EEA

V

CCA

–INA

14

14pF

100Ω

–

+

+OUT

5

6

A

–INB

13

+OUTFILTERED

50Ω

V

EEA

V

CCC

200Ω

V

OCM

2

+

–

C

14pF

50Ω

14pF

V

EEC

200Ω

100Ω

–OUTFILTERED

–OUT

V

CCB

+INA

16

7

8

+

–

B

+INB

15

100Ω

V

EEB

V

EEB

200Ω

BIAS

11

64026 BD

3

10

1

4

9

12

V

ENABLE

V

EEC

CCA

CCB

CCC

EEA

EEB

APPLICATIONS INFORMATION

Circuit Description

Referring to the block diagram, the LT6402-12 uses a

closed-loop topology which incorporates 3 internal am-

pliﬁers. Two of the ampliﬁers (A and B) are identical and

drive the differential outputs. The third ampliﬁer is used

to set the output common mode voltage. Gain and input

impedance are set by the 200Ω resistors in the internal

feedback network. Output impedance is low, determined

by the inherent output impedance of ampliﬁers A and B,

and further reduced by internal feedback.

The LT6402-12 is a low noise, low distortion differential

ampliﬁer/ADC driver with:

• –3dB bandwidth

DC to 300MHz

• Fixed gain independent of R

4V/V (12dB)

LOAD

• Differential input impedance

The LT6402-12 also includes built-in single-pole output

ﬁltering. The user has the choice of using the unﬁltered

outputs, the ﬁltered outputs (75MHz –3dB lowpass), or

modifying the ﬁltered outputs to alter frequency response

by adding additional components. Many lowpass and

bandpass ﬁlters are easily implemented with just one or

100Ω

• Low output impedance

• Built-in, user adjustable output ﬁltering

• Requires minimal support circuitry

two additional components.

640212fa

10

LT6402-12

APPLICATIONS INFORMATION

The LT6402-12 has been designed to minimize the need

for external support components such as transformers or

AC-coupling capacitors. As an ADC driver, the LT6402-12

requires no external components except for power-supply

bypass capacitors. This allows DC-coupled operation for

applications that have frequency ranges including DC. At

impedance ratio transformer can also be used to better

match impedances.

Single-Ended to Differential Operation

The LT6402-12’s performance with single-ended inputs

is comparable to its performance with differential inputs.

This excellent single-ended performance is largely due

to the internal topology of the LT6402-12. Referring to

the block diagram, if the +INA and +INB pins are driven

with a single-ended signal (while –INA and –INB are tied

to AC ground), then the +OUT and –OUT pins are driven

differentially without any voltage swing needed from

ampliﬁer C. Single-ended to differential conversion using

more conventional topologies suffers from performance

limitations due to the common mode ampliﬁer.

the outputs, the common mode voltage is set via the V

OCM

pin, allowing the LT6402-12 to drive ADCs directly. No

outputAC-couplingcapacitorsortransformersareneeded.

At the inputs, signals can be differential or single-ended

with virtually no difference in performance. Furthermore,

DC levels at the inputs can be set independently of the

outputcommonmodevoltage.Theseinputcharacteristics

often eliminate the need for an input transformer and/or

AC-coupling capacitors.

Input Impedance and Matching Networks

Driving ADCs

Calculation of the input impedance of the LT6402-12 is

notstraightforwardfromexaminationoftheblockdiagram

because of the internal feedback network. In addition, the

inputimpedancewhendrivendifferentiallyisdifferentthan

when driven single-ended.

The LT6402-12 has been speciﬁcally designed to interface

directly with high speed Analog to Digital Converters

(ADCs).Ingeneral,theseADCshavedifferentialinputs,with

an input impedance of 1kΩ or higher. In addition, there is

generally some form of lowpass or bandpass ﬁltering just

DIFFERENTIAL

SINGLE-ENDED

LT6402-12

100Ω

75Ω

13

–INB

–

IF IN

8

5

14

For single-ended 50Ω applications, a 150Ω shunt match-

ing resistor to ground will result in the proper input

termination (Figure 1). For differential inputs there are

several termination options. If the input source is 50Ω

differential, then the input matching can be accomplished

byeithera67Ωshuntresistoracrosstheinputs(Figure 3),

or equivalent 33Ω shunt resistors on each of the inputs

to ground (Figure 2). If additional AC gain is desired, an

–OUT

LT6402-12

+OUT

–INA

49.9Ω

Z

= 50Ω

DIFFERENTIAL

IN

15

16

+INB

+INA

+

640212 F02

IF IN

Figure 2. Input Termination for Differential 50Ω Input Impedance

13

–INB

–INA

8

5

–

IF IN

8

5

–OUT

LT6402-12

+OUT

14

–OUT

LT6402-12

+OUT

–INA

0.1μF

Z

= 50Ω

DIFFERENTIAL

IN

100Ω

15

16

IF IN

+INB

+INA

15

16

+INB

+INA

640212 F01

+

640212 F03

IF IN

150Ω

Z

= 50Ω

IN

SINGLE-ENDED

Figure 3. Alternate Input Termination for Differential

50Ω Input Impedance

Figure 1. Input Termination for Single-Ended

50Ω Input Impedance

640212fa

11

LT6402-12

APPLICATIONS INFORMATION

between the two ﬁltered outputs. This resistor/capaci-

tor combination creates ﬁltered outputs that look like a

series 50Ω resistor with a 42pF capacitor shunting each

ﬁltered output to AC ground, giving a –3dB bandwidth of

75MHz.

prior to the ADC to limit input noise at the ADC, thereby

improving system signal to noise ratio. Both the unﬁltered

and ﬁltered outputs of the LT6402-12 can easily drive the

high impedance inputs of these differential ADCs. If the

ﬁltered outputs are used, then cutoff frequency and the

type of ﬁlter can be tailored for the speciﬁc application if

needed.

The ﬁlter cutoff frequency is easily modiﬁed with just a

fewexternalcomponents.Toincreasethecutofffrequency,

simplyadd2equalvalueresistors, onebetween+OUTand

+OUTFILTEREDandtheotherbetween–OUTand–OUTFIL-

TERED (Figure 6). These resistors are in parallel with the

internal 50Ω resistor, lowering the overall resistance and

increasingﬁlterbandwidth. Todoubletheﬁlterbandwidth,

for example, add two external 50Ω resistors to lower the

seriesresistanceto25Ω.The42pFofcapacitanceremains

unchanged, so ﬁlter bandwidth doubles.

Wideband Applications

(Using the +OUT and –OUT Pins)

In applications where the full bandwidth of the LT6402-12

is desired, the unﬁltered output pins (+OUT and –OUT)

should be used. They have a low output impedance;

therefore, gain is unaffected by output load. Capacitance

in excess of 5pF placed directly on the unﬁltered outputs

results in additional peaking and reduced performance.

When driving an ADC directly, a small series resistance

is recommended between the LT6402-12’s outputs and

the ADC inputs (Figure 4). This resistance helps eliminate

any resonances associated with bond wire inductances of

either the ADC inputs or the LT6402-12’s outputs. A value

between 10Ω and 25Ω gives excellent results.

To decrease ﬁlter bandwidth, add two external capacitors,

one from +OUTFILTERED to ground, and the other from

–OUTFILTERED to ground. A single differential capacitor

connected between +OUTFILTERED and –OUTFILTERED

LT6402-12

8

–OUT

V

EE

14pF

50Ω

7

6

–OUTFILTERED

+OUTFILTERED

10Ω TO 25Ω

8

FILTERED OUTPUT

(75MHz)

–OUT

LT6402-12

+OUT

ADC

10Ω TO 25Ω

V

EE

5

640212 F04

5

+OUT

640212 F05

Figure 5. LT6402-12 Internal Filter Topology –3dB BW ≈75MHz

Figure 4. Adding Small Series R at LT6402-12 Output

LT6402-12

8

–OUT

50Ω

Filtered Applications

V

EE

(Using the +OUTFILTERED and –OUTFILTERED Pins)

14pF

50Ω

Filtering at the output of the LT6402-12 is often desired

to provide either anti-aliasing or improved signal to noise

ratio. To simplify this ﬁltering, the LT6402-12 includes an

additional pair of differential outputs (+OUTFILTERED and

–OUTFILTERED) which incorporate an internal lowpass

ﬁlter network with a –3dB bandwidth of 75MHz (Figure 5).

These pins each have an output impedance of 50Ω. Inter-

7

6

–OUTFILTERED

FILTERED OUTPUT

(150MHz)

+OUTFILTERED

50Ω

V

EE

5

+OUT

640212 F06

nal capacitances are 14pF to V on each ﬁltered output,

Figure 6. LT6402-12 Internal Filter Topology Modiﬁed

for 2x Filter Bandwidth (2 External Resistors)

EE

plus an additional 14pF capacitor connected differentially

640212fa

12

LT6402-12

APPLICATIONS INFORMATION

can also be used, but since it is being driven differentially

it will appear at each ﬁltered output as a single-ended

capacitance of twice the value. To halve the ﬁlter band-

width, for example, two 42pF capacitors could be added

(one from each ﬁltered output to ground). Alternatively

one 21pF capacitor could be added between the ﬁltered

outputs, again halving the ﬁlter bandwidth. Combinations

of capacitors could be used as well; a three capacitor

solution of 14pF from each ﬁltered output to ground plus

a 14pF capacitor between the ﬁltered outputs would also

halve the ﬁlter bandwidth (Figure 7).

Output Common Mode Adjustment

TheLT6402-12’soutputcommonmodevoltageissetbythe

pin. It is a high-impedance input, capable of setting

V

OCM

the output common mode voltage anywhere in a range

from 1.1V to 3.6V. Bandwidth of the V pin is typically

OCM

200MHz, so for applications where the V

pin is tied to

OCM

a DC bias voltage, a 0.1μF capacitor at this pin is recom-

mended. For best distortion performance, the voltage at

the V

pin should be between 1.2V and 2.6V.

OCM

When interfacing with most ADCs, there is generally a

output pin that is at about half of the supply voltage

V

OCM

Bandpass ﬁltering is also easily implemented with just a

few external components. An additional 560pF and 62nH,

each added differentially between +OUTFILTERED and

–OUTFILTERED creates a bandpass ﬁlter with a 26MHz

center frequency, –3dB points of 23MHz and 30MHz, and

1.6dB of insertion loss (Figure 8).

of the ADC. For 5V ADCs such as the LTC17XX family, this

output pin should be connected directly (with the

V

OCM

addition of a 0.1μF capacitor) to the input V

pin of the

OCM

LT6402-12. For 3V ADCs such as the LTC22XX families,

the LT6402-12 will function properly using the 1.65V from

the ADC’s V reference pin, but improved Spurious Free

CM

Dynamic Range (SFDR) and distortion performance can

LT6402-12

8

–OUT

be achieved by level-shifting the LTC22XX’s V reference

CM

V

EE

voltage up to at least 1.8V. This can be accomplished as

14pF

50Ω

shown in Figure 9 by using a resistor divider between the

14pF

7

–OUTFILTERED

LTC22XX’s V output pin and V and then bypassing

CM

CC

FILTERED OUTPUT

(37.5MHz)

14pF

the LT6402-12’s V

pin with a 0.1μF capacitor. For a

OCM

commonmodevoltageabove1.9V,ACcouplingcapacitors

are recommended between the LT6402-12 and LTC22XX

ADCs because of the input voltage range constraints of

the ADC.

+OUTFILTERED

6

5

V

EE

+OUT

640212 F07

3V

Figure 7. LT6402-12 Internal Filter Topology Modiﬁed

for 1/2x Filter Bandwidth (3 External Capacitors)

11k

1.9V

0.1μF

4.02k

LT6402-12

8

7

2

–OUT

13

31 1.5V

–INB

–INA

V

EE

14

V

OCM

V

CM

10Ω

14pF

6

7

1

2

+

–

50Ω

+OUTFILTERED

LT6402-12

AIN

0.1μF

–OUTFILTERED

LTC22xx

–OUTFILTERED

15

16

+INB

+INA

FILTERED OUTPUT

IF IN

640212 F09

150Ω

+OUTFILTERED

+OUT

6

5

V

EE

Figure 9. Level Shifting 3V ADC V_CMVoltage for

Improved SFDR

640212 F08

Figure 8. LT6402-12 Output Filter Modiﬁed for Bandpass

Filtering (1 External Inductor, 1 External Capacitor)

640212fa

13

LT6402-12

APPLICATIONS INFORMATION

Large Output Voltage Swings

an additional input bias current totaling 2mA will ﬂow into

the –INA and –INB inputs.

The LT6402-12 has been designed to provide the 3.2V

P-

output swing needed by the LTC1748 family of 14-bit

P

Application (Demo) Boards

low-noise ADCs. This additional output swing improves

system SNR by up to 4dB.

TheDC954ADemoBoardhasbeencreatedforstand-alone

evaluation of the LT6402-12 with either single-ended or

differential input and output signals. As shown, it accepts

a single-ended input and produces a single-ended output

so that the LT6402-12 can be evaluated using standard

laboratory test equipment. For more information on this

Demo Board, please refer to the layout and schematic

diagrams found later in this data sheet.

Input Bias Voltage and Bias Current

The input pins of the LT6402-12 are internally biased to

the voltage applied to the V

pin. No external biasing

OCM

resistors are needed, even for AC-coupled operation. The

input bias current is determined by the voltage difference

between the input common mode voltage and the V

OCM

pin (which sets the output common mode voltage). For

There are also additional demo boards available that

combine the LT6402-12 with a variety of different Linear

Technology ADCs. Please contact the factory for more

information on these demo boards.

example, if the inputs are tied to 2.5V with the V pin

OCM

at 2.2V, then a total input bias current of 2mA will ﬂow

into the LT6402-12’s +INA and +INB pins. Furthermore,

TYPICAL APPLICATION

Top Silkscreen

640212fa

14

LT6402-12

PACKAGE DESCRIPTION

UD Package

16-Lead Plastic QFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1691)

0.70 ±0.05

3.50 ± 0.05

2.10 ± 0.05

1.45 ± 0.05

(4 SIDES)

PACKAGE OUTLINE

0.25 ±0.05

0.50 BSC

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

BOTTOM VIEW—EXPOSED PAD

PIN 1 NOTCH R = 0.20 TYP

OR 0.25 × 45° CHAMFER

R = 0.115

TYP

0.75 ± 0.05

3.00 ± 0.10

(4 SIDES)

15 16

PIN 1

TOP MARK

(NOTE 6)

0.40 ± 0.10

1

2

1.45 ± 0.10

(4-SIDES)

(UD16) QFN 0904

0.200 REF

0.25 ± 0.05

0.00 – 0.05

0.50 BSC

NOTE:

1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

640212fa

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

15

LT6402-12

TYPICAL APPLICATION

Demo Circuit DC954A Schematic (AC Test Circuit)

R18

0Ω

R17

0Ω

V

CC

V

CC

GND

V

CC

2

1

2

1

SW1

3

TP1

ENABLE

C17

1000pF

C18

0.01μF

R16

0Ω

2

1

2

R2

R4

R14

C11

[1]

12

11

10

9

C2

0.1μF

C4

0Ω

49.9Ω

0Ω

R6

R10

R12

0.1μF

V

ENABLE

V

EEC

CCB EEB

–OUT

0Ω

24.9Ω

75Ω

13

8

–INB

1

2

1

2

J1

–IN

R8

[1]

J4

–OUT

T1

T2

C21

0.1μF

14

15

16

7

6

5

1:1 Z-RATIO

4:1 Z-RATIO

5

4

1

3

–INA

+INB

+INA

–OUTFILTERED

+OUTFILTERED

+OUT

3

1

4

5

2

1

2

L1

[1]

C8

[1]

R15

[1]

R7

[1]

0dB

LT6402-12

+10.8dB

+6dB

1

2

MINI-

M/A-COM

ETC1-1T

0dB

J2

+IN

J5

+OUT

C1

0.1μF

C3

0.1μF

CIRCUITS

TCM 4-19

R9

24.9Ω

R11

75Ω

R5

0Ω

1

2

1

2

V

CCC

OCM

CCA

EEA

1

2

R1

[1]

R3

49.9Ω

R13

[1]

C16

[1]

C22

0.1μF

1

2

3

4

V

CC

1

2

1

2

1

2

1

2

1

C10

0.01μF

C9

1000pF

C12

1000pF

C13

0.01μF

V

CC

R19

14k

J3

V

OCM

2

1

C7

0.01μF

R20

11k

C5

0.1μF

J6

TEST IN

T3

T4

J7

1:4

4:1

TEST OUT

4

5

1

3

2

1

2

R22

C19, 0.1μF

C20, 0.1μF

2

R21

[1]

C6

[1]

0.1μF

1

2

1

2

MINI-

CIRCUITS

TCM 4-19

MINI-

CIRCUITS

TCM 4-19

4

1

2

640212 TA02

TP2

CC

V

CC

V

NOTES: UNLESS OTHERWISE SPECIFIED,

[1] DO NOT STUFF.

1

2

1

C14

4.7μF

C15

1μF

1

TP3

GND

RELATED PARTS

PART NUMBER DESCRIPTION

COMMENTS

A = 2V/V, NF = 12.3dB, OIP3 = 38dBm at 70MHz

LT1993-2

LT1993-4

LT1993-10

LT5514

800MHz Differential Amplifier/ADC Driver

900MHz Differential Ampliﬁer/ADC Driver

700MHz Differential Ampliﬁer/ADC Driver

Ultralow Distortion IF Ampliﬁer/ADC Driver

300MHz Differential Ampliﬁer/ADC Driver

V

A = 4V/V, NF = 14.5dB, OIP3 = 40dBm at 70MHz

V

A = 10V/V, NF = 12.7dB, OIP3 = 40dBm at 70MHz

V

Digitally Controlled Gain Output IP3 47dBm at 100MHz

A = 6dB, e = 3.8nV/√Hz at 20MHz, 150mW

LT6402-6

LT6402-20

LT6411

V

n

A = 20dB, e = 1.9nV/√Hz at 20MHz, 150mW

V

n

650MHz Differential ADC Driver/Dual Selectable Gain Ampliﬁer

3300V/μs Slew Rate, 16mA Current Consumption, Selectable Gain:

A = –1, +1, +2

V

LT6600-5

LT6600-10

LT6600-20

Very Low Noise Differential Ampliﬁer and 5MHz Lowpass Filter

Very Low Noise Differential Ampliﬁer and 10MHz Lowpass Filter

Very Low Noise Differential Ampliﬁer and 20MHz Lowpass Filter

82dB S/N with 3V Supply, SO-8 Package

76dB S/N with 3V Supply, SO-8 Package

640212fa

LT 1007 REV A • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

16

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LT6402IUD-12
厂家：	Linear
描述：	300MHz Low Distortion, Low Noise Differential Amplifi er/ ADC Driver (AV = 12dB) 300MHz的低失真，低噪声差分功率放大器ER / ADC驱动器（ AV = 12分贝）驱动器运算放大器放大器电路功率放大器
文件：	总16页 (文件大小：230K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT6402IUD-12 [Linear]

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