LT8415IDDB#PBF [Linear]
LT8415 - Ultralow Power Boost Converter with Dual Half-Bridge Switches; Package: DFN; Pins: 12; Temperature Range: -40°C to 85°C;
| 型号： | LT8415IDDB#PBF |
| 厂家： | 
Linear |
| 描述： | LT8415 - Ultralow Power Boost Converter with Dual Half-Bridge Switches; Package: DFN; Pins: 12; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总12页 (文件大小：177K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT8415
Ultralow Power Boost
Converter with Dual
Half-Bridge Switches
FEATURES
DESCRIPTION
The LT®8415 is an ultralow power boost converter with
two integrated complementary MOSFET half-bridges
(N- and P-channel), integrated power switch, Schottky
diode and output disconnect circuitry. The N-channel and
P-channelMOSFETsineachhalf-bridgearesynchronously
controlled by a single input pin, and never turn on at the
same time in typical applications.
n
High Voltage Switches Built in (Dual half-bridge)
Ultralow Quiescent Current
n
10.5μA in Active Mode
0μA in Shutdown Mode
n
Comparator Built into SHDN pin
n
Low Noise Control Scheme
n
Adjustable FB reference voltage
n
Wide Input Range: 2.5V to 16V
The boost regulator controls power delivery by varying
both the peak inductor current and switch off-time. This
control scheme results in low output voltage ripple as well
as high efficiency over a wide load range. The quiescent
current is a low 10.5μA, which is further reduced to 0μA
in shutdown. The internal disconnect circuitry allows the
output voltage to be blocked from the input during shut-
down. High value (12.4M/0.4M) resistors are integrated
onchipforoutputvoltagedetection,significantlyreducing
inputreferredquiescentcurrent.TheLT8415alsofeaturesa
comparatorbuiltintotheSHDNpin,overvoltageprotection
n
Wide Output Range: Up to 40V
n
Integrated Power NPN Switch (25mA Current Limit)
n
Integrated Schottky Diode
Integrated Output Disconnect
n
n
High Value (12.4M/0.4M) Feedback Resistor Integrated
Built in Soft Start (Optional Capacitor from V to GND)
Over Voltage Protection for CAP, V , OUT1 and
OUT2 Pins
12-Pin 3mm × 2mm DFN package
n
REF
n
OUT
n
APPLICATIONS
for the CAP, V , OUT1 and OUT2 pins, built in soft start
OUT
n
Sensor Power
and comes in a tiny 12-pin 3mm × 2mm DFN package.
n
RF Mems Relay Power
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Hot Swap
is a trademark of Linear Technology Corporation. All other trademarks are the property of their
respective owners. Protected by U.S. Patents including 5481178, 6580258, 6304066, 6127815,
6498466, 6611131.
n
Low Power Actuator Bias/Control
Liquid Lens Driver
n
TYPICAL APPLICATION
Drive External Capacitors to 34V/0V with the LT8415
Response Driving External Capacitors
V
IN
100ꢀH
2.5V to 16V
OUT2 VOLTAGE
20/DIV
2.2ꢀF
22nF
SW
CAP
IN2 VOLTAGE
2V/DIV
V
V
OUT
CC
V
OUT
= 34V
LT8415
0.1ꢀF*
OUT1 VOLTAGE
20/DIV
IN 1
IN 2
OUT 1
OUT 2
LOGIC
LEVEL
34V/0V
V
CHIP
ENABLE
IN1 VOLTAGE
2V/DIV
REF
SHDN
34V/0V
137K
8415 TA02
C
C
= 1nF
= 200pF
20ꢀs/DIV
OUT1
OUT2
GND
FBP
887K
0.1ꢀF**
*HIGHER VALUE CAPACITOR IS REQUIRED
WHEN THE V IS HIGHER THAN 8V
IN
8415 TA01
**THIS CAPACITOR IS OPTIONAL
8415f
1
LT8415
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
V
Voltage................................................–0.3V to 16V
CC
CAP, V
1
2
3
4
5
6
SHDN
12 FBP
Voltage......................................–0.3V to 40V
OUT
V
CC
11
10
9
V
REF
SW.............................................................–0.3V to 41V
IN1,IN2 ........................................................–0.3V to 6V
OUT1,OUT2................................................–0.3V to 40V
SHDN Voltage ............................................–0.3V to 16V
GND
SW
IN1
IN2
CAP
13
V
OUT
8
OUT1
OUT2
7
V
Voltage..............................................–0.3V to 2.5V
DDB PACKAGE
12-PIN (3mm s 2mm) PLASTIC DFN
REF
FBP Voltage...............................................–0.3V to 2.5V
Maximum Junction Temperature........................... 125°C
Operating Temperature Range (Note 2)..–40°C to 125°C
Storage Temperature Range...................–65°C to 150°C
T
= 125°C, θ = 76°C/W
JA
JMAX
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LT8415EDDB#PBF
LT8415IDDB#PBF
TAPE AND REEL
PART MARKING*
LFDC
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT8415EDDB#TRPBF
LT8415IDDB#TRPBF
–40°C to 125°C
–40°C to 125°C
12-Pin (3mm × 2mm) Plastic DFN
12-Pin (3mm × 2mm) Plastic DFN
LFDC
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 3.0V, VSHDN = VIN unless otherwise noted. (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
2.50
16
UNITS
V
Minimum Operating Voltage
Maximum Operating Voltage
Reference Voltage
2.20
V
l
1.220
1.235
10
1.255
V
V
V
V
Current Limit
(Note 3)
(Note 3)
ꢀA
ꢀS
%/V
ꢀA
ꢀA
ꢀA
REF
REF
REF
Discharge Time
Line Regulation
70
0.01
10.5
0
l
l
Quiescent Current
Not Switching
15.5
1
Quiescent Current in Shutdown
V = 0V
SHDN
Quiescent Current from V
and CAP
V = 16V
OUT
4
OUT
Minimum Switch Off Time
After Start-Up (Note 4)
During Start-Up (Note 4)
240
600
nS
mA
mV
ꢀA
l
Switch Current Limit
20
25
150
0
30
Switch V
I
= 10mA
= 5V
CESAT
SW
Switch Leakage Current
Schottky Forward Voltage
Schottky Reverse Leakage
V
1
SW
I
= 10mA
650
850
mV
DIODE
V
CAP
V
CAP
– V = 5
0
0
0.5
1
ꢀA
ꢀA
SW
– Vsw = 40
8415f
2
LT8415
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 3.0V, VSHDN = VIN unless otherwise noted. (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
19
MAX
UNITS
mA
PMOS Disconnect Current Limit
14
25
PMOS Disconnect V
- V
I = 1mA
OUT
50
mV
CAP
OUT
l
l
l
Internal Resistor Divider Ratio
FBP pin Bias Current
31.6
1.20
0.08
31.85
1.3
32.2
30
V
= 0.5V, Current Flows Out of Pin
nA
V
FBP
SHDN Minimum Input Voltage High
SHDN Input Voltage High hysteresis
SHDN Hysteresis Current
SHDN Rising
1.30
60
1.45
mV
ꢀA
V
(Note 3)
0.1
0.14
0.3
SHDN Input Voltage Low
SHDN Pin Bias Current
V
V
3V
16V
0
2
1
3
ꢀA
ꢀA
SHDN =
SHDN =
l
l
IN1,IN2 Minimum Input Voltage High
IN1,IN2 Input Voltage Low
OUT1,OUT2 Rise Time
1.1
V
V
0.3
V
OUT
V
OUT
V
OUT
V
OUT
= 34V, C
= 34V, C
= 34V, C
= 34V, C
= 200pF (Note 5)
= 200pF (Note 5)
= 200pF (Note 5)
= 200pF (Note 5)
2.5
3
ꢀs
LOAD
LOAD
LOAD
LOAD
OUT1,OUT2 Fall Time
ꢀs
OUT1,OUT2 Rise Delay
4
ꢀs
OUT1,OUT2 Fall Delay
2
ꢀs
Half-bridge PMOS Voltage Drop V
Half-bridge NMOS Voltage Drop V
– V
IN1,IN2 = 2V, 0.1mA Load From OUT1,OUT2
IN1,IN2 = 0V, 0.1mA Current Into OUT1,OUT2
70
85
mV
mV
OUT
OUT1,OUT2
OUT1,OUT2
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT8415 is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls.
Note 3: See applications section for more information.
Note 4: Start-Up mode occurs when V is less than V *64/3.
Note 5: See Timing Diagram. Rise times are measured from 4V to 30V and
fall times are measured from 30V to 4V. Delay times are measured from
the IN1,IN2 transition to when the OUT1,OUT2 voltage has risen to 4V or
decreased to 30V.
OUT
FBP
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
Switching Frequency
vs Load Current
Load Regulation
Vout vs FBP Voltage
1000
800
600
400
200
0
0.6
50
40
30
20
10
0
V
V
= 3.6V
V
V
= 3.6V
CC
CC
= 16V
= 16V
OUT
OUT
0.4
0.2
0
FIGURE 4 CIRCUIT
FIGURE 4 CIRCUIT
–0.2
–0.4
–0.6
0
1
2
3
0
1
2
3
0
0.5
1
1.5
2
LOAD CURRENT (mA)
LOAD CURRENT (mA)
FBP VOLTAGE (V)
8415 G01
8415 G02
8415 G03
8415f
3
LT8415
T = 25°C, unless otherwise noted.
A
TYPICAL PERFORMANCE CHARACTERISTICS
Quiescent Current –
Not Switching
Output Voltage vs Temperature
Quiescent Current vs Temperature
18
15
12
9
1
0.75
0.5
V
= 3.6V
CC
V
= 3.6V, V
= 16V
OUT
CC
LOAD = 0.5mA
FIGURE 4 CIRCUIT
15
12
9
0.25
0
6
–0.25
–0.5
–0.75
–1
6
3
0
3
0
0
4
8
12
16
–40
0
40
80
120
–40
0
40
80
120
V
VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
CC
8415 G05
8415 G06
8415 G04
Quiescent Current
Average Input Current in
Regulation with No Load
vs SHDN Voltage
SHDN Current vs SHDN Voltage
2.5
2
1000
100
10
12
9
V
= 3.6V
CC
V
= 3.6V
CC
1.5
1
6
0.5
0
3
V
= 3.6V
CC
–0.5
0
0
4
8
12
16
0
1
2
3
4
5
0
10
20
30
40
SHDN VOLTAGE (V)
SHDN VOLTAGE (V)
OUTPUT VOLTAGE (V)
8415 G09
8415 G07
8415 G08
Peak Inductor Current
vs Temperature
VREF Voltage vs Temperature
UVLO vs Temperature
40
36
32
28
24
20
1.235
1.234
1.233
1.232
1.231
1.23
2.6
2.4
V
V
= 3.6V
CC
= 16V
OUT
FIGURE 4 CIRCUIT
V
RISING
CC
2.2
2
V
FALLING
CC
1.8
1.6
V
= 3.6V
CC
1.4
–40
0
40
TEMPERATURE (°C)
80
120
–40
0
40
TEMPERATURE (°C)
80
120
–40
0
40
TEMPERATURE (°C)
80
120
8415 G10
8415 G11
8415 G12
8415f
4
LT8415
T = 25°C, unless otherwise noted.
A
TYPICAL PERFORMANCE CHARACTERISTICS
SW Saturation Voltage
vs Switch Current
SHDN Minimum Input Voltage
High vs Temperature
Line Regulation
300
250
200
150
100
50
0.3
0.25
0.2
1.5
1.4
1.3
1.2
1.1
1
V
= 16V
OUT
SHDN RISING
0.15
0.1
SHDN FALLING
0.05
0
0
0
5
10
15
20
25
0
4
8
12
16
–40
0
40
TEMPERATURE (°C)
80
120
SWITCH CURRENT (mA)
V
VOLTAGE (V)
CC
8415 G13
8415 G14
8415 G15
Start-Up Waveforms Without
Capacitor at VREF Pin
Output Disconnect PMOS current
vs CAP to VOUT Voltage Difference
Start-Up Waveforms With 0.1μF
Capacitor at VREF pin
25
20
15
10
5
SHDN
VOLTAGE
5V/DIV
SHDN
VOLTAGE
5V/DIV
V
= 16V
CAP
INDUCTOR
CURRENT
20mA/DIV
INDUCTOR
CURRENT
20mA/DIV
CAP
VOLTAGE
5V/DIV
CAP
VOLTAGE
5V/DIV
V
OUT
V
OUT
VOLTAGE
5V/DIV
VOLTAGE
5V/DIV
8415 G17
8415 G18
V
V
= 3.6V
OUT
200ꢀs/DIV
V
V
= 3.6V
OUT
2ms/DIV
CC
CC
= 16V
= 16V
0
0
4
CAP TO V
8
12
16
VOLTAGE DIFFERENCE (V)
OUT
8415 G16
IN1,IN2 Minimum Input Voltage
High vs Temperature
Half-Bridge Fall Time and Fall
Delay vs Temperature
Half-Bridge Rise Time and Rise
Delay vs Temperature
5
4
3
2
1
0
1
5
4
3
2
1
0
RISE DELAY
0.8
0.6
0.4
0.2
0
FALL TIME
RISE TIME
FALL DELAY
LOAD = 220pF
V
V
= 3.6V
= 34V
LOAD = 220pF
CC
OUT
V
= 3.6V, V
= 34V
V
= 3.6V, V
= 34V
CC
OUT
CC
OUT
FRONT PAGE APPLICATION
FRONT PAGE APPLICATION
FRONT PAGE APPLICATION
–40
0
40
80
120
–40
0
40
80
120
–40
0
40
80
120
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
8415 G21
8415 G19
8415 G20
8415f
5
LT8415
PIN FUNCTIONS
SHDN(Pin1):ShutdownPin.Thispinisusedtoenable/dis-
able the chip. Drive below 0.3V to disable the chip. Drive
above 1.4V to activate the chip. Do not float this pin.
V
(Pin 9): Drain of Output Disconnect PMOS. Place a
OUT
bypass capacitor from this pin to GND.
CAP (Pin 10): This is the Cathode of the Internal Schottky
Diode. Place a bypass capacitor from this pin to GND.
V
(Pin 2): Input Supply Pin. Must be locally bypassed
CC
to GND. See typical applications section.
V
REF
(Pin 11): Reference Pin. Soft start can be achieved
GND (Pin 3 and Pin 13): Ground. Tie directly to local
ground plane. Pin 13 is floating but must be grounded
for proper shielding.
by placing a capacitor from this pin to GND. This cap
will be discharged for 70ꢀs (typical) at the beginning
of start-up and then be charged to 1.235V with a 10μA
current source.
SW (Pin 4): Switch Pin. This is the collector of the internal
NPNpowerswitch.Minimizethemetaltraceareaconnected
to this pin to minimize EMI.
FBP(Pin 12): Positive Feedback Pin. This pin is the error
amplifier’s positive input terminal. To achieve the desired
output voltage, choose the FBP pin voltage (V ) accord-
FBP
IN1 (Pin 5): First Half-Bridge Control Input. Do not float
this pin.
ing to the following formula:
V
FBP
= V /31.85
OUT
IN2 (Pin 6): Second Half-Bridge Control Input. Do not
float this pin.
When resistor divider from the V is used to set the FBP
REF
voltage, choose the resistor divider ratio according to the
OUT2 (Pin 7): Second Half-Bridge Output. This pin is
following formula:
controlled in phase by the voltage on IN2. The output level
is either the voltage on V
or GND.
R1/R2 = (39.33 – V )/V
OUT OUT
OUT
OUT1(Pin8):FirstHalf-BridgeOutput.Thispiniscontrolled
Forprotectionpurposes,theoutputvoltagecannotexceed
in phase by the voltage on IN1. The output level is either
40V even if V is driven higher than V
.
FBP
REF
the voltage on V
or GND.
OUT
BLOCK DIAGRAM
V
V
SHDN
CAP
10
SW
4
OUT1 OUT2
CC
OUT
2
1
9
8
7
ENABLE
CHIP
V
OUT
MAX
10ꢀA
12.4M
400K
TOP GATE
CONTROL
1.235V
+
–
+
–
OUTPUT DISCONNECT
CONTROL
BOTTOM GATE
CONTROL
V
1.235V
REF
11
DISCHARGE
CONTROL
SWITCH
CONTROL
TIMING AND PEAK
CURRENT CONTROL
V
R
OUT
1
TOP GATE
CONTROL
–
+
+
FB
VC
FBP
+
12
BOTTOM GATE
CONTROL
1.235V
R
–
2
13
3
5
6
GND
GND IN1 IN2
8415 BD
8415f
6
LT8415
TIMING DIAGRAM
2V
IN1,IN2
VOLTAGE
0V
RISE
TIME
FALL
DELAY
34V
30V
OUT1,OUT2
VOLTAGE
4V
0V
RISE
FALL
TIME
DELAY
8415 TD
OPERATION
Switching Regulator
the circuit, special precautions are taken to ensure that
the inductor current remains under control.
The LT8415 utilizes a variable peak current, variable off-
time control scheme to provide high efficiency over a wide
output current range.
The LT8415 also has a PMOS output disconnect switch.
The PMOS switch is turned on when the part is enabled
via the SHDN pin. When the part is in shutdown, the
The operation of the part can be better understood by
referring to the Block Diagram. The part senses the
output voltage by monitoring the internal FB node, and
servoing the FB node voltage to be equal to the FBP
pin voltage. The chip integrates an accurate high value
PMOS switch turns off, allowing the V
node to go to
OUT
ground. This type of disconnect function is often required
in power supplies.
Half-Bridge
resistor divider (12.4MEG/0.4MEG) from the V
pin.
OUT
TheN-channelandP-channelMOSFETsineachhalf-bridge
are synchronously controlled by a single input pin, and
will never turn on at the same time in typical applications,
protecting against shoot-through current. The OUT1 and
OUT2 pins are the same polarity as the IN1 and IN2 pins
respectively. When the part is disabled, both N-channel
and P-channel MOSFETs turn off, and the OUT1 and OUT2
pins will become high impedance with a 20MΩ pull down
resistor connected to ground.
The output voltage is set by the FBP pin voltage, which
in turn is set by an external resistor divider from the V
pin. The FBP pin voltage can also be directly biased with
an external reference, allowing full control of the output
voltage during operation.
REF
The Switch Control block senses the output of the ampli-
fier and adjusts the switching frequency as well as other
parameters to achieve regulation. During the start-up of
8415f
7
LT8415
APPLICATIONS INFORMATION
Inductor Selection
capacitorplacedontheCAPnodeisrecommendedtofilter
the inductor current while a 0.1μF to 1μF capacitor placed
Several inductors that work well with the LT8415 are listed
inTable1. Thetablesarenotcomplete, andtherearemany
othermanufacturersanddevicesthatcanbeused.Consult
each manufacturer for more detailed information and for
their entire selection of related parts, as many different
sizes and shapes are available.
on the V
node will give excellent transient response
OUT
and stability. To make the V pin less sensitive to noise,
REF
putting a capacitor on the V pin is recommended, but
REF
not required. A 47nF to 220nF 0402 capacitor will be suf-
ficient. See also Soft-Start section for more information
aboutacapacitoracrossV .Table2showsalistofseveral
REF
Inductorswithavalueof47μHorhigherarerecommended
for most LT8415 designs. Inductors with low core losses
and small DCR (copper wire resistance) are good choices
for LT8415 applications. For full output power, the induc-
tor should have a saturation current rating higher than
the peak inductor current. The peak inductor current can
be calculated as:
capacitor manufacturers. Consult the manufacturers for
more detailed information and for their entire selection
of related parts.
Table 2. Recommended Ceramic Capacitor Manufacturers
MANUFACTURER
Taiyo Yuden
Murata
PHONE
WEBSITE
(408) 573-4150
(814) 237-1431
(843) 448-9411
(408)986-0424
(847) 803-6100
www.t-yuden.com
www.murata.com
www.avxcorp.com
www.kemet.com
www.tdk.com
AVX
V • 150 •10−
6
IN
Kemet
IPK = ILIMIT
+
mA
L
TDK
where the worst case I
is 30mA. L is the inductance
LIMIT
Setting Output Voltage
The output voltage is set by the FBP pin voltage, and V
value in Henrys and V is the input voltage to the boost
IN
circuit.
OUT
is equal to 31.85 • V
when the output is regulated,
Table 1. Recommended Inductors for LT8415
FBP
shown in Figure 1. Since the V
pin provides a good
L
DCR
SIZE
(mm)
REF
PART
(ꢀH) (ꢀH)
VENDOR
reference (~1.235V), the FBP voltage can be easily set by
LQH2MCN680K02 68
LQH32CN101K53 100
6.6
3.5
Murata
www.murata.com
2.0 × 1.6 × 0.9
3.2 × 2.5 × 2.0
a resistor divider from the V pin to ground. The series
REF
resistanceofthisresistordividershouldbekeptlargerthan
DO2010-683ML
DO2010-104ML
LPS3015-104ML
LPS3015-154ML
68
8.8
15.7
3.4
6.1
Coilcraft
www.coilcraft.com
2.0 × 2.0 × 1.0
2.0 × 2.0 × 1.0
3.0 × 3.0 × 1.4
3.0 × 3.0 × 1.4
200KΩ to prevent loading down the V pin. The FBP pin
REF
100
100
150
can also be biased directly by an external reference. For
over voltage protection, the output voltage is limited to
40V. Therefore, if V
is higher than 1.235V, the output
FBP
voltage will stay at 40V.
Capacitor Selection
50
The small size and low ESR of ceramic capacitors make
them suitable for most LT8415 applications. X5R and
X7R types are recommended because they retain their
capacitance over wider voltage and temperature ranges
than other types such as Y5V or Z5U. A 2.2μF or higher
input capacitor and a 0.1μF to 1μF output capacitor are
sufficient for most applications. Always use a capacitor
with a sufficient voltage rating. Many ceramic capacitors
rated at 0.1μF to 1μF have greatly reduced capacitance
when bias voltages are applied. Be sure to check actual
capacitanceatthedesiredoutputvoltage.Generallya0603
or 0805 size capacitor will be adequate. A 0.1μF to 1μF
40
30
20
10
0
0
0.5
1
1.5
2
FBP VOLTAGE (V)
8415 F01
Figure 1. FBP to VOUT Transfer Curve
8415f
8
LT8415
APPLICATIONS INFORMATION
Maximum Output Load Current
Inrush Current
ThemaximumoutputcurrentofaparticularLT8415circuit
is a function of several circuit variables. The following
method can be helpful in predicting the maximum load
current for a given circuit:
WhenV issteppedfromgroundtotheoperatingvoltage
CC
while the output capacitor is discharged, a high level of
inrushcurrentmayflowthroughtheinductorandSchottky
diode into the output capacitor. Conditions that increase
inrush current include a larger more abrupt voltage step
Step 1: Calculate the peak inductor current:
at V , a larger output capacitor tied to the CAP pin and
CC
an inductor with a low saturation current. While the chip is
designed to handle such events, the inrush current should
not be allowed to exceed 0.3A. For circuits that use output
capacitor values within the recommended range and have
input voltages of less than 6V, inrush current remains low,
posing no hazard to the device. In cases where there are
V • 150 • 10−
6
IN
IPK = ILIMIT
where I
+
mA
L
is 25mA. L is the inductance value in Henrys
and V is the input voltage to the boost circuit.
LIMIT
IN
Step 2: Calculate the inductor ripple current:
large steps at V (more than 6V) and/or a large capacitor
CC
is used at the CAP pin, inrush current should be measured
to ensure safe operation.
(VOUT + 1− V )• 200 • 10−
6
IN
L
IRIPPLE
=
mA
Soft-Start
where V
is the desired output voltage. If the inductor
OUT
TheLT8415containsasoft-startcircuittolimitpeakswitch
currents during start-up. High start-up current is inherent
in switching regulators in general since the feedback loop
ripple current is less than the peak current, then the circuit
will only operate in discontinuous conduction mode. The
inductor value should be increased so that I
< I .
RIPPLE
PK
is saturated due to V
being far from its final value. The
OUT
An application circuit can be designed to operate only in
discontinuous mode, but the output current capability
will be reduced.
regulator tries to charge the output capacitor as quickly
as possible, which results in large peak current.
WhentheFBPpinvoltageisgeneratedbyaresistordivider
Step 3: Calculate the average input current:
from the V
pin, the start-up current can be limited by
REF
IRIPPLE
connecting an external capacitor (typically 47nF to 220nF)
IIN(AVG) = IPK
−
mA
to the V pin. When the part is brought out of shutdown,
2
REF
thiscapacitorisfirstdischargedforabout70μs(providing
Step 4: Calculate the nominal output current:
IN(AVG) • V • 0.7
protection against pin glitches and slow ramping), then
an internal 10μA current source pulls the V pin slowly
REF
I
IN
IOUT(NOM)
=
mA
to 1.235V. Since the V
voltage is set by the FBP pin
voltage will also slowly increase to the
OUT
VOUT
Step 5: Derate output current:
= I • 0.8
voltage, the V
OUT
regulated voltage, which results in lower peak inductor
current. The voltage ramp rate on the pin can be set by
I
OUT
OUT(NOM)
the value of the V pin capacitor.
REF
For low output voltages the output current capability will
beincreased. Whenusingoutputdisconnect(loadcurrent
Output Disconnect
taken from V ), these higher currents will cause the
OUT
The LT8415 has an output disconnect PMOS that blocks
the load from the input during shutdown. The maximum
current through the PMOS is limited to 19mA by circuitry
inside the chip, helping the chip survive output shorts.
drop in the PMOS switch to be higher resulting in lower
output current capability than predicted by the preceding
equations.
8415f
9
LT8415
APPLICATIONS INFORMATION
If the application doesn’t require the output disconnect
Board Layout Considerations
function, the CAP and V
pin can be shorted, and higher
OUT
As with all switching regulators, careful attention must
be paid to the PCB layout and component placement. To
maximize efficiency, switch rise and fall times are made
as short as possible. To prevent electromagnetic interfer-
ence (EMI) problems, proper layout of the high frequency
switchingpathisessential.ThevoltagesignaloftheSWpin
hassharprisingandfallingedges.Minimizethelengthand
area of all traces connected to the SW pin and always use
a ground plane under the switching regulator to minimize
power converter efficiency can be achieved.
SHDN Pin Comparator and Hysteresis Current
An internal comparator compares the SHDN pin voltage
with an internal voltage reference (~1.3V) which gives a
preciseturn-onvoltagelevel.Theinternalhysteresisofthis
turn-onvoltageisabout60mV.Whenthechipisturnedon,
and the SHDN pin voltage is close to this turn-on voltage,
0.1μA current flows out of the SHDN pin. This current is
calledSHDNpinhysteresiscurrent, andwillgoawaywhen
the chip is off. By connecting the external resistors as in
Figure 2, a user-programmable enable voltage function
can be realized.
interplane coupling. In addition, the FBP pin and V pin
REF
are sensitive to noise. Minimizing the length and area of all
traces to these two pins is recommended. Recommended
component placement is shown in Figure 3.
V
SHDN
IN
The turn-on voltage for the configuration is:
1.30 • (1 + R1/R2)
SHDN
FBP
and the turn-off voltage is:
GND
V
V
CC
REF
–7
–7
(1.24 – R3 • 10 ) • (1 + R1/R2) – R1 • 10
CAP
GND
SW
IN1
IN2
where R1, R2 and R3 are resistance value in Ω.
V
OUT
OUT1
OUT2
ENABLE VOLTAGE
R1
R3
CONNECT TO
SHDN PIN
8410 F03
R2
IN2 IN1
OUT1 OUT2
VIAS TO GROUND PLANE REQUIRED
TO IMPROVE THERMAL PERFORMANCE
Figure 2. Programming Enable Voltage by Using External
Resistors
VIAS FOR CAP AND V
SECOND METAL LAYER, CAPACITOR GROUNDS MUST
BE RETURNED DIRECTLY TO IC GROUND
GROUND RETURN THROUGH
OUT
Figure 3. Recommended Board Layout
Half-Bridge Control Signals
The half-bridge is controlled by the IN1 and IN2 pins. The
IN1 and IN2 pins should be driven with a logic signal.
When the chip is enabled, the OUT1 and OUT2 voltages
are equal to V
IN1 and IN2 are driven higher than 1V,
OUT
and they are near GND when IN1 and IN2 are driven below
0.3V. Do not drive the IN1 or IN2 pins between 0.3V to
1V for more than 20ꢀs since this will leave OUT1 or OUT2
in an uncertain state and may also cause shoot-through
current.
8415f
10
LT8415
TYPICAL APPLICATIONS
Drive External Capacitors to 34V/0V with the LT8415
Response Driving External Capacitors
L1
100ꢀH
V
IN
2.5V to 16V
OUT2 VOLTAGE
20/DIV
C2
22nF
C1
2.2ꢀF
SW
CAP
V
V
CC OUT
LT8415
V
OUT
= 34V
IN2 VOLTAGE
2V/DIV
C3
0.1ꢀF*
IN 1
IN 2
OUT 1
OUT 2
LOGIC
34V/0V
LEVEL
OUT1 VOLTAGE
20/DIV
C
OUT1
V
REF
CHIP
ENABLE
SHDN
34V/0V
OUT2
R1
137K
C
IN1 VOLTAGE
2V/DIV
GND
FBP
R2
887K
C4
0.1ꢀF
8415 TA02
C
C
= 1nF
= 200pF
20ꢀs/DIV
OUT1
OUT2
C1: 2.2ꢀF, 16V, X5R, 0603
C2: 22nF, 100V, X5R, 0603
C3: 0.1ꢀF, 100V, X5R, 0603*
C4: 0.1ꢀF, 16V, X7R, 0402
8415 TA03
L1: COILCRAFT DO2010-104ML
* HIGHER CAPACITANCE VALUE IS
REQUIRED FOR C3 WHEN THE VIN IS
HIGHER THAT 8V
RESISTOR DIVIDER
FROM V
MAXIMUM OUTPUT CURRENT (mA)
REF
V
(V)
R1 (kΩ)/R2 (kΩ)
V
IN
= 2.8V
V
IN
= 3.6V
0.7
V
IN
= 5.0V
1.1
V
IN
= 12V
3.6
4.4
5.5
7.2
9.7
14
OUT
40
NA
0.5
0.7
0.8
1.0
1.4
1.6
3.3
8.0
35
30
25
20
15
10
5
110/887
237/768
365/634
487/511
619/383
750/255
866/127
0.9
1.4
1.0
1.5
1.4
2.1
1.9
2.9
2.4
4.0
4.6
7.0
NA
11
17
NA
PACKAGE DESCRIPTION
DDB Package
12-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1723 Rev Ø)
R = 0.115
TYP
7
0.64 0.05
(2 SIDES)
0.40 0.10
12
3.00 0.10
(2 SIDES)
R = 0.05
TYP
0.70 0.05
2.55 0.05
1.15 0.05
2.00 0.10
(2 SIDES)
PIN 1 BAR
TOP MARK
PIN 1
R = 0.20 OR
0.25 s 45°
CHAMFER
(SEE NOTE 6)
0.64 0.10
(2 SIDES)
PACKAGE
OUTLINE
6
1
(DDB12) DFN 0106 REV
Ø
0.23 0.05
0.25 0.05
0.75 0.05
0.200 REF
0.45 BSC
0.45 BSC
2.39 0.10
(2 SIDES)
2.39 0.05
(2 SIDES)
0 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
NOTE:
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
8415f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LT8415
TYPICAL APPLICATION
L1
100ꢀH
V
IN
2.5V to 16V
C2
0.1ꢀF
C1
2.2ꢀF
SW
CAP
V
V
OUT
CC
V
OUT
= 16V
C3
0.1ꢀF*
LT8415
IN 1
IN 2
OUT 1
OUT 2
LOGIC
LEVEL
CHIP
16V/0V
C
OUT1
V
REF
SHDN
ENABLE
16V/0V
604K
412K
C
OUT2
GND
FBP
C4
0.1ꢀF
C1: 2.2ꢀF, 16V, X5R, 0603
C2: 0.1ꢀF, 25V, X5R, 0603
C3: 0.1ꢀF, 25V, X5R, 0603*
C4: 0.1ꢀF, 16V, X7R, 0402
L1: MURATA LQH32CN101K53
8415 TA04
* HIGHER CAPACITANCE VALUE IS REQUIRED FOR C3 WHEN THE V IS HIGHER THAT 8V
IN
Figure 4. Drive External Capacitors to 16V/0V with the LT8415
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
: 2.6V to 16V, V
LT1930/LT1930A
1A (I ), 1.2MHz/2.2MHz, High Efficiency Step-Up DC/DC
V
= 34V, I = 4.2mA/5.5mA, I < 1ꢀA,
Q SD
SW
IN
OUT(MAX)
Converters
ThinSOT Package
LT1945 (Dual)
LT1946/LT1946A
LT3467/LT3467A
LT3464
Dual Output, Boost/Inverter, 350mA (I ), Constant Off-
V
: 1.2V to 15V, V
= 34V, I = 40ꢀA, I < 1ꢀA, 10-Lead
Q SD
SW
IN
OUT(MAX)
Time, High Efficiency Step-Up DC/DC Converter
MS Package
1.5A (I ), 1.2MHz/2.7MHz, High Efficiency Step-Up DC/DC
V
: 2.45V to 16V, V
= 34V, I = 3.2mA, I < 1ꢀA, 8-Lead
OUT(MAX) Q SD
SW
IN
Converters
MS Package
1.1A (I ), 1.3MHz/2.1MHz, High Efficiency Step-Up DC/DC
V
: 2.4V to 16V, V
= 40V, I = 1.2mA, I < 1ꢀA, ThinSOT
Q SD
SW
IN
OUT(MAX)
OUT(MAX)
OUT(MAX)
Converters with Soft-Start
Package
85mA (I ), High Efficiency Step-Up DC/DC Converter with
V
: 2.3V to 10V, V
= 34V, I = 25ꢀA, I < 1ꢀA, ThinSOT
Q SD
SW
IN
Integrated Schottky and PNP Disconnect
Package
LT3463/LT3463A
Dual Output, Boost/Inverter, 250mA (I ), Constant
V
: 2.3V to 15V, V
=
=
40V, I = 40ꢀA, I < 1ꢀA, DFN
Q SD
SW
IN
Off-Time, High Efficiency Step-Up DC/DC Converters with
Integrated Schottkys
Package
LT3471
Dual Output, Boost/Inverter, 1.3A (I ), High Efficiency
V
: 2.4V to 16V, V
40V, I = 2.5mA, I < 1ꢀA, DFN
Q SD
SW
IN
OUT(MAX)
OUT(MAX)
OUT(MAX)
OUT(MAX)
Boost-Inverting DC/DC Converter
Package
LT3473/LT3473A
LT3494/LT3494A
LT3580
1A (I ), 1.2MHz, High Efficiency Step-Up DC/DC Converter
V
: 2.2V to 16V, V
= 36V, I = 100ꢀA, I < 1ꢀA, DFN
Q SD
SW
IN
with integrated Schottky Diode and Output Disconnect
Package
180mA/350mA (I ), High Efficiency, Low Noise Step-Up
V
: 2.1V to 16V, V
= 40V, I = 65ꢀA, I < 1ꢀA, DFN
Q SD
SW
IN
DC/DC Converter with Output Disconnect
Package
2A, 40V, 2.5MHz Boost DC/DC Converter
V
: 2.5V to 32V, V
= 40V, I = 1mA, I <1μA, MS8E
Q SD
IN
3mm × 3mm DFN-8 Package
LT3495/LT3495B/
650mA/350mA (I ), High Efficiency, Low Noise Step-Up
V
: 2.3V to 16V, V
= 40V, I = 60ꢀA, I < 1ꢀA, DFN
Q SD
SW
IN
OUT(MAX)
LT3495-1/LT3495B-1 DC/DC Converter with Output Disconnect
Package
LT8410/LT8410-1
25mA/8mA (I ), High Efficiency, Low Noise Step-Up DC/DC
V
: 2.3V to 16V, V
= 40V, I = 8.5μA, I < 1μA, DFN
Q SD
SW
IN
OUT(MAX)
Converter with Output Disconnect
Package
8415f
LT 0409 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
© LINEAR TECHNOLOGY CORPORATION 2009
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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