LT8640 [Linear]
60V, 1.2A Synchronous Monolithic Buck Regulator with 6μA Quiescent Current;
| 型号： | LT8640 |
| 厂家： | 
Linear |
| 描述： | 60V, 1.2A Synchronous Monolithic Buck Regulator with 6μA Quiescent Current |
| 文件： | 总26页 (文件大小：2036K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT8619/LT8619-5
60V, 1.2A Synchronous Monolithic Buck
Regulator with 6µA Quiescent Current
FEATURES
DESCRIPTION
The LT®8619 is a compact, high efficiency, high speed
n
Wide Input Voltage Range: 3V to 60V
Fast Minimum Switch-On Time: 30ns
n
n
synchronous monolithic step-down switching regulator
that consumes only 6μA of quiescent current. The LT8619
can deliver 1.2A of continuous current. Top and bottom
power switches are included with all necessary circuitry
to minimize the need for external components. Low ripple
Burst Mode® operation enables high efficiency down to
very low output currents while keeping the output ripple
Ultralow Quiescent Current Burst Mode Operation:
n
6μA I Regulating 12V to 3.3V
Q
IN
OUT
n
10mV Output Ripple at No Load
P-P
n
n
Synchronizable/Programmable Fixed Frequency
Forced Continuous Mode Operation: 300kHz
to 2.2MHz
to 10mV . A SYNC pin allows forced continuous mode
High Efficiency Synchronous Operation:
P-P
n
operation synchronized to an external clock. Internal com
-
92% Efficiency at 0.5A, 5V
90% Efficiency at 0.5A, 3.3V
from 12V
OUT
IN
n
pensation with peak current mode topology allows the use
of small inductors and results in fast transient response
and good loop stability. The EN/UV pin has an accurate 1V
from 12V
IN
OUT
n
n
n
n
n
n
Low Dropout: 360mV at 0.5A
Low EMI
threshold and can be used to program V undervoltage
lockout or to shut down the LT8619, reducing the input
supply current to below 0.6μA. The PG flag signals when
Accurate 1V Enable Pin Threshold
IN
Internal Soft-Start and Compensation
Power Good Flag
Small Thermally Enhanced 16-Lead MSOP Package
and 10-Lead (3mm × 3mm) DFN Packages
V
is within 7.5% of the programmed output voltage.
OUT
The LT8619 is available in a small 16-lead MSOP and
10-lead 3mm × 3mm DFN packages with exposed pad
for low thermal resistance.
APPLICATIONS
All registered trademarks and trademarks are the property of their respective owners.
n
12V Automotive Systems
n
12V and 24V Commercial Vehicles
n
48V Electric and Hybrid Vehicles
Industrial Supplies
n
TYPICAL APPLICATION
5V, 1.2A Step-Down Converter
Efficiency at VOUT = 5V
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8619f
1
For more information www.linear.com/LT8619
LT8619/LT8619-5
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
V , EN/UV................................................................60V
Operating Junction Temperature (Note 3)
IN
BIAS..........................................................................30V
BST Pin Above SW Pin................................................4V
PG, SYNC, OUT. ..........................................................6V
FB ...............................................................................2V
LT8619E, LT8619E-5.......................... –40°C to 125°C
LT8619I, LT8619I-5............................ –40°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
PIN CONFIGURATION
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θ
= 40°C/W, θ = 10°C/W
JC
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
JA
θ
JA
= 43°C/W, θ = 10°C/W
JC
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
*FB FOR LT8619, OUT FOR LT8619-5
http://www.linear.com/product/LT8619#orderinfo
ORDER INFORMATION
LEAD FREE FINISH
LT8619EDD#PBF
LT8619IDD#PBF
TAPE AND REEL
PART MARKING*
LGNP
PACKAGE DESCRIPTION
10-Lead (3mm × 3mm) Plastic DFN
TEMPERATURE RANGE
–40°C to 125°C
LT8619EDD#TRPBF
LT8619IDD#TRPBF
LT8619EMSE#TRPBF
LT8619IMSE#TRPBF
LT8619EMSE-5#TRPBF
LT8619IMSE-5#TRPBF
LGNP
10-Lead (3mm × 3mm) Plastic DFN
16-Lead Plastic MSOP
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
LT8619EMSE#PBF
LT8619IMSE#PBF
LT8619EMSE-5#PBF
LT8619IMSE-5#PBF
8619
8619
16-Lead Plastic MSOP
86195
16-Lead Plastic MSOP
86195
16-Lead Plastic MSOP
Consult ADI Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
8619f
2
For more information www.linear.com/LT8619
LT8619/LT8619-5
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VEN/UV = 2V unless otherwise noted (Notes 2, 3)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Switching Loop
V
IN
V
IN
Minimum Input Voltage
3.0
V
Quiescent Current at No Load
V
V
= 12V, V
= 0V
EN/UV
0.6
0.6
1.0
3.0
µA
µA
IN
l
l
= 12V, V
= 3.3V, R = 66.5k, V
= 2V, V = 0V
SYNC
6
6
10
18
µA
µA
IN
OUT
T
EN/UV
V
V
V
LOAD
LOAD
= 12V, V
= 12V, V
= 12V, V
= 3.3V, R = 66.5k, V
= 2V, Floats SYNC
10
3
µA
IN
OUT
OUT
OUT
T
EN/UV
EN/UV
EN/UV
= 3.3V, R = 66.5k, V
= 2V, V
= 2V, V
= INTV
= 0V
mA
IN
T
SYNC
SYNC
CC
V
Current in Regulation
= 3.3V, R = 66.5k, V
T
IN
IN
I
I
= 100µA
= 1mA
l
l
38
320
65
400
µA
µA
BIAS Pin Current Consumption
Regulated Output Voltage
V
= 12V, V
= 3.3V, I
= 0.5A, f = 700kHz
OSC
2.2
mA
V
IN
BIAS
LOAD
LT8619-5, V = 12V, V
= INTV , No Load
4.975
4.925
5.0
5.0
5.025
5.075
IN
SYNC
CC
l
Feedback Voltage
LT8619, V = 12V, V
= INTV , No Load
0.796
0.788
0.8
0.8
0.804
0.812
V
V
IN
SYNC
CC
l
l
Feedback Voltage Line Regulation
Feedback Pin Input Current
Minimum On-Time
V
= 4V to 50V, V
= INTV
0.004
0.03
20
%/V
nA
ns
ns
A
IN
SYNC
CC
LT8619, V = 0.8V
FB
l
l
LT8619, I
= 0.5A, V
= INTV
30
150
1.75
1.8
60
LOAD
SYNC
CC
Minimum Off-Time
100
1.5
180
2.0
Top Switch Peak Current Limit
Bottom Switch Current Limit
Bottom Switch Reverse Current Limit
Soft-Start Duration
A
V
V
C
= INTV
0.55
0.2
A
SYNC
CC
= 12V, V
= 3.3V, No Load, C
= 22µF
ms
ms
µs
IN
OUT
OUT
EN/UV to PG High Delay
EN/UV to PG Low Delay
Oscillator and SYNC
= 1µF, V
= 3.3V, No Load, C = 22µF
OUT
0.66
10
INTVCC
OUT
l
l
l
l
Operating Frequency
R = 162k
260
630
1.9
0.3
300
700
2.0
340
770
2.1
kHz
kHz
T
R = 66.5k
T
R = 20k
T
MHz
MHz
Synchronization Frequency
SYNC Threshold
f
≥ f
OSC
2.2
SYNC
Frequency Synchronization
Burst Mode Operation
Floats SYNC Pin, Pulse-Skipping Mode
Forced Continuous Mode
1
V
V
V
B
0.35
1.6
0.6
1.2
2.0
0.95
2.4
SYNC Pin Current
Built-In Sourcing Current, V
= 0V
–0.2
3.0
µA
µA
SYNC
Built-In Sinking Current, V
= 3.3V
SYNC
8619f
3
For more information www.linear.com/LT8619
LT8619/LT8619-5
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VEN/UV = 2V unless otherwise noted (Notes 2, 3)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Switch, Logic and Power Good
Top Switch On-Resistance
Bottom Switch On-Resistance
EN/UV Power-On Threshold
EN/UV Power-On Hysteresis
EN/UV Shutdown Threshold
EN/UV Pin Current
I
I
= 0.1A
= 0.1A
0.45
0.22
1.0
Ω
Ω
LOAD
LOAD
l
l
EN/UV Rising
0.94
1.1
V
40
mV
V
EN/UV Falling
0.34
0.56
0.92
100
V
V
V
V
= 2V
–100
nA
%
%
%
EN/UV
Overvoltage Threshold
Rising Wrt. Regulated V
Rising Wrt. Regulated V
3.75
7.5
FB
FB
FB
FB
l
l
Positive Power Good Threshold
Negative Power Good Threshold
Positive Power Good Delay
5
10
FB
Falling Wrt. Regulated V
–5
–7.5
–10
FB
V
V
= 0.8V ↑ 0.9V to PG Low
= 0.9V ↓ 0.8V to PG High
60
35
µs
µs
FB
FB
Negative Power Good Delay
V
V
= 0.8V ↓ 0.7V to PG Low
= 0.7V ↑ 0.8V to PG High
60
35
µs
µs
FB
FB
PG Leakage
V
= 3.3V, Power Good
= 100µA
100
0.3
nA
V
PG
l
PG V
I
0.01
OL
PG
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All Voltages are referenced to ground unless otherwise
specified.
characterization, and correlation with statistical process controls. The
LT8619I is guaranteed over the full –40°C to 125°C operating junction
temperature range. High junction temperatures degrade operating
lifetimes. Operating lifetime is derated at junction temperatures greater
than 125°C.
Note 4: This IC includes overtemperature protection that is intended to
protect the device during overload conditions. Junction temperature will
exceed 150°C when overtemperature protection is active. Continuous
operation above the specified maximum operating junction temperature
will reduce lifetime.
Note 3: The LT8619 is tested under pulse load conditions such that
T ≈ T . The LT8619E is guaranteed to meet performance specifications
J
A
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
8619f
4
For more information www.linear.com/LT8619
LT8619/LT8619-5
TYPICAL PERFORMANCE CHARACTERISTICS
700kHz Efficiency at VOUT = 5V
700kHz Efficiency at VOUT = 3.3V
2MHz Efficiency at VOUT = 5V
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8619 ꢀꢁꢂ
8619 ꢀꢁ1
8619 ꢀꢁꢂ
2MHz Efficiency at VOUT = 3.3V
Efficiency at VOUT = 5V
Efficiency at VOUT = 3.3V
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ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁꢂ
ꢀ ꢁ 1ꢂꢃꢄꢅ ꢆꢄꢀꢇꢈꢉꢂꢉꢂꢊꢋꢈꢂ1
ꢀ ꢁ 1ꢂꢃꢄꢅ ꢆꢄꢀꢇꢈꢉꢂꢉꢂꢊꢋꢈꢂ1
ꢀꢁꢀꢀ1 ꢀꢁꢀ1 ꢀꢁ1
1
1ꢀ 1ꢀꢀ 1ꢀ 1ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ6
ꢀꢁ8
1ꢀꢁ
1ꢀꢁ
ꢀꢁꢀꢀ1 ꢀꢁꢀ1 ꢀꢁ1
1
1ꢀ 1ꢀꢀ 1ꢀ 1ꢀꢁ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢋꢂꢌ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢋꢂꢌ
8619 ꢀꢁꢂ
8619 ꢀꢁꢂ
8619 ꢀꢁ6
Efficiency vs VIN
No Load IVIN at 700kHz
No Load IVIN vs Temperature
1ꢀꢁ
1ꢀ
ꢀꢁ
1ꢀꢀ
ꢀ
ꢀꢁ
ꢀ ꢁꢂꢁꢃ
f
ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
f
ꢀ ꢁꢂꢂꢃꢄꢅ
9ꢀ ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢀ
ꢄ
1ꢀ
ꢁꢂꢃ
ꢀꢁꢂꢃꢄꢅ
ꢃꢆꢇꢀꢀꢇꢈꢉ
ꢊꢋꢌꢄ
ꢀ ꢁ 1ꢂꢃꢄ ꢅꢄꢀꢆꢇꢈꢂꢈꢂꢉꢊꢇꢂ1
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢈ ꢉꢊꢋꢌꢍꢎꢏꢉꢐ
ꢀꢁꢀꢂ
ꢀꢁ
ꢀꢁꢀꢂ
ꢀꢁꢀꢂ
1ꢀꢁ
9ꢀ
1ꢀꢀ
1ꢀ
6ꢀꢁ
ꢀꢁꢂꢃ ꢄꢅꢃꢆ
8ꢀ
8ꢀ
ꢀꢁ
ꢀꢁ
1ꢀꢁꢂ ꢃꢄꢂꢅ
6ꢀꢁ
ꢀꢁꢂꢃꢄꢅꢆꢇ
1ꢀꢁ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢈ ꢉꢊꢋꢌꢍꢎꢏꢉꢐ
1
1
f
ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁꢂ
ꢀꢁ ꢂꢁꢃꢄ
ꢀꢁꢂꢃꢄꢅꢆꢇ
ꢀꢁ1
ꢀꢁꢂ
1
1ꢀ
1ꢀꢀ
ꢀ
1ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
6ꢀ
ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ 1ꢀꢀ 1ꢀꢁ 1ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁ
ꢀꢁ
8619 ꢀꢁ8
8619 ꢀꢁꢂ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
8619 ꢀꢁ9
8619f
5
For more information www.linear.com/LT8619
LT8619/LT8619-5
TYPICAL PERFORMANCE CHARACTERISTICS
VOUT = 3.3V
Load Regulation
Line Regulation
1ꢀꢁꢁ
ꢀꢁꢂꢃ
ꢀꢁꢂꢀ
ꢀꢁꢂꢃ
ꢀ
ꢀꢁ1ꢀ
ꢀꢁꢀꢂ
ꢀ
ꢀꢁꢂ
ꢀꢁ1
ꢀ
ꢀ 1ꢁꢂ
ꢀ
ꢀ ꢁꢂꢃ ꢅ ꢆꢇ ꢈꢇꢉꢊ
ꢀ
ꢀ 1ꢁꢂ
ꢀꢁꢂ
ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁ
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ꢀꢁ
f
ꢀ ꢁꢂꢂꢃꢄꢅ
f
ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀ
ꢀ ꢁꢂꢁꢃ
ꢀꢁꢂ
ꢀꢁ ꢂꢁꢃꢄ
ꢀꢁ
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
f
ꢀꢁ
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢀ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃꢁ
ꢀꢁꢂꢃꢄ
ꢀ1ꢁꢂꢂ
ꢀꢁꢂꢁꢃ
ꢀꢁꢂ1ꢁ
ꢀꢁꢂ1
ꢀꢁꢂꢃ
ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ 1ꢀꢀ 1ꢀꢁ 1ꢀꢁ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
1
1ꢀ
1ꢀꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ6
ꢀꢁ8
1ꢀꢁ
1ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁ
8619 ꢀ1ꢁ
8619 ꢀ1ꢁ
8619 ꢀ11
Top FET Current Limit vs
Duty Cycle
Switch Resistance
EN/UV Threshold
ꢀꢁꢂ
1ꢀ9
1ꢀ8
1ꢀꢁ
1ꢀ6
1ꢀꢁ
1ꢀꢀꢀ
9ꢀꢀ
8ꢀꢀ
ꢀꢁꢁ
6ꢀꢀ
ꢀꢁꢁ
ꢀꢁꢁ
ꢀꢁꢁ
ꢀꢁꢁ
1ꢀꢀ
ꢀ
1ꢀꢁ
1ꢀꢁ
ꢀꢁ8
ꢀꢁ6
ꢀꢁꢂ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊ 1ꢋꢋꢌꢂ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢆꢁꢈ
ꢀꢁꢂꢃꢄꢅꢁꢆ ꢇꢈꢄꢃꢉꢈꢁꢊꢋ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢇꢈꢁꢉ
ꢀꢁꢂ ꢃꢄꢅꢀꢆꢇ
ꢀꢁꢂꢃꢄꢅꢆꢇ ꢃꢁꢈꢉꢀꢁꢅꢊꢄ
ꢀ
ꢀ 1ꢁꢂ
ꢀꢁꢂ
ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁ
ꢀ
ꢀ ꢁꢂꢁꢃ
ꢀꢁꢂꢂꢁꢃ ꢄꢅꢆꢂꢇꢈ
f
ꢀꢁ
ꢀ ꢁ 1ꢂꢃꢄ
ꢀꢁꢂꢃꢄꢅꢆꢅꢆꢇꢈꢄꢆ1
ꢀ
ꢀꢁ
ꢀꢁ
6ꢀ
8ꢀ
1ꢀꢀ
ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ 1ꢀꢀ 1ꢀꢁ 1ꢀꢁ
ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ 1ꢀꢀ 1ꢀꢁ 1ꢀꢁ
ꢀꢁꢂꢃ ꢄꢃꢄꢅꢆ ꢇꢈꢉ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
8619 ꢀ1ꢁ
8619 ꢀ1ꢁ
8619 ꢀ1ꢁ
fSW
Dropout
Dropout vs Temperature
ꢀ
ꢀ
1ꢀꢁ
ꢀꢁ8
ꢀꢁ6
ꢀꢁꢂ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂꢂ
1ꢀꢁꢂ
1ꢀꢁꢂ
1ꢀꢁꢂ
1ꢀꢁꢁ
ꢀꢁꢂꢃ
ꢀꢁꢂꢀ
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ꢀ
ꢀ
ꢀ
ꢀ 1ꢁꢂ
ꢀ
ꢀ ꢁꢂꢁꢃ
ꢀꢁꢂ
ꢀ ꢁꢂꢃꢄ
ꢀ ꢁ 1ꢂꢃꢄꢅ ꢆꢄꢀꢇꢈꢉꢂꢉꢂꢊꢋꢈꢂ1
ꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
= 3.3V, ∆V
ꢀ ꢁ1ꢂ
ꢀ ꢁꢂꢁ ꢄ ꢅꢆ ꢇꢆꢈꢉ
∆V
ꢀ ꢁ1ꢂ
ꢀꢁꢂ
ꢀꢁꢂ
f
ꢀ ꢁꢂꢂꢃꢄꢅ
f
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢀꢁ
ꢀ
ꢀ ꢁ ꢂꢃꢂꢄꢅꢆ ꢇꢅꢀꢈꢉꢊꢋꢊꢋꢌꢍꢉꢋ1
ꢎꢏꢐꢑꢒꢓ ꢑꢏꢔꢕꢇꢔꢖꢏꢖꢗ ꢘꢏꢓꢒ
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢌꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢁꢍꢄꢂꢎꢇꢈꢁꢆ
ꢎꢏꢁꢐꢄ ꢋꢎꢑ ꢒꢉꢆꢃꢇꢈꢁꢆ
ꢇꢄꢋꢍꢄꢂꢎꢇꢉꢂꢄ ꢋꢎꢓ
ꢍꢄꢂꢋꢎꢆꢄꢆꢇꢔꢓ
ꢅꢎꢋꢎꢕꢄ ꢇꢖꢄ
ꢅꢄꢐꢈꢃꢄꢗ
1ꢀꢁꢂ ꢃꢄꢂꢅ
ꢀ
1ꢀꢁꢂ ꢃꢄꢂꢅ
f
ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁ
1
ꢀ
f
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀ1
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂꢃ ꢄꢅꢃꢆ
ꢀꢁ ꢂꢁꢃꢄ
ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ 1ꢀꢀ 1ꢀꢁ 1ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ6
ꢀꢁ8
1ꢀꢁ
1ꢀꢁ
ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ 1ꢀꢀ 1ꢀꢁ 1ꢀꢁ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
8619 ꢀ18
8619 ꢀ16
8619 ꢀ1ꢁ
8619f
6
For more information www.linear.com/LT8619
LT8619/LT8619-5
TYPICAL PERFORMANCE CHARACTERISTICS
Power Good, Overvoltage
Threshold
Minimum On-Time
Minimum Off-Time
1ꢀꢁ
1ꢀꢀ
8ꢀ
6ꢀ
ꢀꢁ
ꢀꢁ
ꢀ
1ꢀꢁꢀ
18ꢀ
1ꢀꢁ
16ꢀ
1ꢀꢁ
1ꢀꢁ
ꢀ
ꢀꢁ
ꢀ ꢁꢂꢁꢃ
ꢀꢁꢂ
ꢀꢀꢁ ꢂ ꢀꢁꢂꢁꢃꢄ
ꢀꢁ
f
ꢀ ꢁꢂꢃꢄ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢀꢀꢁ ꢂ ꢀꢁꢂꢂꢃꢄꢅ
ꢀꢁ
ꢀꢁ ꢂꢁꢃꢄ
ꢀꢁ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂꢃ ꢄꢅꢃꢆ
ꢀꢁꢂꢃ ꢄꢅꢃꢆ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃ
ꢀ1ꢁꢂꢁ
ꢀꢁ ꢂꢁꢃꢄ
ꢀꢁꢂ ꢃ ꢀꢁꢂꢁꢃꢄ
ꢀꢁꢂꢃ ꢄꢅꢃꢆ
ꢀꢁ
ꢀꢁꢂ ꢃ ꢀꢁꢂꢂꢃꢄꢅ
ꢀꢁ
ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ 1ꢀꢀ 1ꢀꢁ 1ꢀꢁ
ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ 1ꢀꢀ 1ꢀꢁ 1ꢀꢁ
ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ 1ꢀꢀ 1ꢀꢁ 1ꢀꢁ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
8619 ꢀ19
8619 ꢀꢁ1
8619 ꢀꢁꢂ
Power Good Delay
VIN UVLO
IBIAS vs Load
1ꢀꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ
1ꢀ
1ꢀ
8
ꢀꢁꢂ
ꢀꢁ9
ꢀꢁ8
ꢀꢁꢂ
ꢀꢁ6
ꢀꢁꢂ
ꢀ
ꢀꢁ
ꢀ 1ꢁ6 ꢃ ꢄꢅ ꢆꢅꢇꢈ
ꢀ
ꢀ
ꢀ 1ꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
f
ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀ ꢁꢂꢁꢃ
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢀ
ꢀꢁ
ꢀꢁꢂꢁꢃꢄ
6
f
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀ
ꢀ
ꢀꢁ
ꢀꢁꢂꢂꢃꢄꢅ
ꢀ
f
ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁ
ꢀ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀ ꢁ
6ꢀ
8ꢀ
1ꢀꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ6
ꢀꢁ8
1ꢀꢁ
1ꢀꢁ
ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ 1ꢀꢀ 1ꢀꢁ 1ꢀꢁ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
ꢀ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁ
8619 ꢀꢁꢁ
8619 ꢀꢁꢂ
8619 ꢀꢁꢂ
IBIAS vs fSW
IBIAS at 700kHz vs Temperature
IBIAS at 2MHz vs Temperature
1ꢀ
8
ꢀꢁ
ꢀꢁ
16
1ꢀ
8
1ꢀ
8
ꢀ
ꢀ 1ꢁꢂ
ꢀꢁꢂ
ꢀ
ꢀ 1ꢁꢂ
1ꢀꢁꢂ ꢃꢄꢂꢅ
ꢀꢁ
ꢀ
ꢀ 1ꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀ ꢁꢂꢁꢃ
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢂ
ꢀ
ꢀ ꢁꢂꢁꢃ
1ꢀꢁꢂ ꢃꢄꢂꢅ
ꢀ ꢁ 1ꢂꢃꢄ
ꢀꢁꢂꢃ ꢄ ꢅ
ꢀꢁꢂꢃ ꢄ ꢅ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢌꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢁꢍꢄꢂꢎꢇꢈꢁꢆ
ꢎꢏꢁꢐꢄ ꢋꢎꢑ ꢒꢉꢆꢃꢇꢈꢁꢆ
ꢇꢄꢋꢍꢄꢂꢎꢇꢉꢂꢄ ꢋꢎꢓ
ꢍꢄꢂꢋꢎꢆꢄꢆꢇꢔꢓ
1ꢀ ꢁꢂꢀꢃ
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢌꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢁꢍꢄꢂꢎꢇꢈꢁꢆ
ꢎꢏꢁꢐꢄ ꢋꢎꢑ ꢒꢉꢆꢃꢇꢈꢁꢆ
ꢇꢄꢋꢍꢄꢂꢎꢇꢉꢂꢄ ꢋꢎꢓ
ꢍꢄꢂꢋꢎꢆꢄꢆꢇꢔꢓ
ꢅꢎꢋꢎꢕꢄ ꢇꢖꢄ
ꢅꢄꢐꢈꢃꢄꢗ
1ꢀ ꢁꢂꢀꢃ
6
6
1ꢀ ꢁꢂꢀꢃ
ꢅꢎꢋꢎꢕꢄ ꢇꢖꢄ
ꢅꢄꢐꢈꢃꢄꢗ
ꢀꢁ ꢂꢁꢃꢄ
ꢀ
ꢀ
ꢀꢁꢂꢃ ꢄꢅꢃꢆ
ꢀꢁꢂꢃ ꢄꢅꢃꢆ
ꢀꢁ ꢂꢁꢃꢄ
ꢀꢁ ꢂꢁꢃꢄ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁ6
1ꢀꢁ
1ꢀꢁ
ꢀꢁꢂꢃꢄ
1ꢀ8
ꢀꢁꢀ
ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ 1ꢀꢀ 1ꢀꢁ 1ꢀꢁ
ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ 1ꢀꢀ 1ꢀꢁ 1ꢀꢁ
f
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ
ꢀꢁ
8619 ꢀꢁꢂ
8619 ꢀꢁ6
8619 ꢀꢁꢂ
8619f
7
For more information www.linear.com/LT8619
LT8619/LT8619-5
TYPICAL PERFORMANCE CHARACTERISTICS
Forced Continuous Mode No Load
Switching Waveform
Forced Continuous Mode Switching
Waveform at Minimum On-time
I
L
V
(AC)
200mA/DIV
OUT
2mV/DIV
SW
20V/DIV
I
L
200mA/DIV
SW
(ZOOM IN)
10V/DIV
SW
10V/DIV
8619 G29
8619 G28
200ns/DIV
= 3.3V
TOP = 200ns/DIV, BOT = 5ns/DIV,
PERSISTENCE MODE
V
f
= 12V, V
OUT
= 2MHz, L = 3.3μH, C
IN
SW
= 22μF
V
= 53.7V, V
= 2MHz, L = 3.3μH, C
= 3.3V, 0.5A LOAD
OUT
OUT
IN
f
= 22μF
SW
OUT
Forced Continuous Mode Transient
Load Step from 10mA to 1A
Pulse-Skipping Mode Transient
Load Step from 10mA to 1A
V
V
OUT
OUT
200mV/DIV
200mV/DIV
I
LOAD
I
LOAD
1A/DIV
1A/DIV
SW
10V/DIV
SW
10V/DIV
8619 G31
8619 G30
20μs/DIV
= 3.3V
20μs/DIV
V
f
= 12V, V
OUT
OSC
V
f
= 12V, V
OSC
= 3.3V
OUT
IN
IN
= 2MHz, L = 3.3μH, C
= 22μF
= 2MHz, L = 3.3μH, C
= 22μF
OUT
OUT
Bust Mode Transient Load Step
from 10mA to 1A
Forced Continuous Mode
Frequency Synchronization
V
(AC)
OUT
20mV/DIV
V
OUT
SYNC
2V/DIV
200mV/DIV
SW
10V/DIV
I
LOAD
1A/DIV
V
(AC, ZOOM IN)
20mV/DIV
OUT
SYNC (ZOOM IN)
2V/DIV
SW (ZOOM IN)
10V/DIV
SW
10V/DIV
8619 G33
8619 G32
20μs/DIV
= 3.3V
TOP = 10μs/DIV, BOT = 200ns/DIV
V
f
f
= 12V, V
= 3.3V, NO LOAD
OUT
V
f
= 12V, V
OUT
OSC
IN
IN
= 700kHz, L = 10μH, C
= 22μF
SYNC
= 2MHz, L = 3.3μH, C
= 22μF
OSC
SW
OUT
OUT
(FREE RUNNING) = 700kHZ, f
= 1.2MHz
8619f
8
For more information www.linear.com/LT8619
LT8619/LT8619-5
TYPICAL PERFORMANCE CHARACTERISTICS
VOUT = 2.4V Start-Up Dropout
Performance
VOUT = 5V Start-Up Dropout
Performance
V
IN
1V/DIV
V
V
IN
IN
V
IN
V
OUT
1V/DIV
1V/DIV
V
V
OUT
OUT
V
OUT
1V/DIV
PG
PG
2V/DIV
2V/DIV
SW
5V/DIV
SW
5V/DIV
8619 G34
8619 G35
1s/DIV
1s/DIV
= 5V, 10Ω LOAD
V
f
= 2.4V, 10Ω LOAD
= 400kHz, L = 15μH, C
V
f
OUT
SW
OUT
SW
= 47μF
= 700kHz, L = 10μH, C
= 22μF
OUT
CC
OUT
CC
PG 100k PULL-UP BY INTV
FORCED CONTINUOUS MODE
PG 100k PULL-UP BY INTV
FORCED CONTINUOUS MODE
EN/UV Start-Up
EN/UV Shut Down
EN/UV
2V/DIV
EN/UV
2V/DIV
V
OUT
V
1V/DIV
OUT
1V/DIV
PG
2V/DIV
PG
2V/DIV
SW
SW
10V/DIV
10V/DIV
8619 G36
8619 G37
100μs/DIV
2μs/DIV
V
f
= 12V, V
= 3.3V, NO LOAD
OUT
V
f
= 12V, V
= 3.3V, NO LOAD
OUT
IN
IN
= 2MHz, L = 3.3μH, C
= 22μF
= 2MHz, L = 3.3μH, C
= 22μF
OSC
OUT
OSC
OUT
FORCED CONTINUOUS MODE
FORCED CONTINUOUS MODE
8619f
9
For more information www.linear.com/LT8619
LT8619/LT8619-5
PIN FUNCTIONS (DFN/MSOP)
NC (Pin 1, 3, 13, MSOP Only): No Connect. These pins
are not connected to the internal circuitry.
FB (Pin 6/Pin 9, 10, LT8619 Only): The LT8619 regulates
the FB pin to 0.8V. Connect the feedback resistor divider
tap to this pin. Also, connect a phase lead capacitor
VIN (Pin 1/Pin 2): The VIN pin supplies current to the
LT8619 internal circuitry and to the internal topside power
switch. Be sure to place the positive terminal of the input
between FB and V . Typically, this capacitor is between
OUT
4.7pF to 10pF. Do not apply an external voltage to this pin.
bypass capacitor as close as possible to the V pin, and
OUT (Pin 9, 10, LT8619-5 MSOP Only): Connect to the
IN
the negative capacitor terminal as close as possible to
regulator output V . The LT8619-5 regulates the OUT
OUT
the GND pin.
pin to 5V. This pin connects to the internal 10MΩ feed-
back divider that programs the fixed output voltage.
EN/UV (Pin 2/Pin 4): The LT8619 is shut down when this
pin is low and active when this pin is high. The EN/UV pin
power-on threshold is 1V. When forced below 0.56V, the
BIAS (Pin 7/Pin 11): The internal regulator will draw cur-
rent from BIAS instead of V when the BIAS pin is tied
IN
IC is put into a low current shutdown mode. Tie to V if
to a voltage higher than 3.1V. For switching regulator
IN
shutdown feature is not used. An external resistor divider
output voltages of 3.3V and above, this pin should be tied
from V can be used to program the V UVLO.
to V . If this pin is tied to a supply other than V , use
OUT OUT
IN
IN
a 1μF local bypass capacitor on this pin.
RT (Pin 3/Pin 5): A resistor is tied between RT and ground
to set the switching frequency. When synchronizing, the
INTV (Pin 8/Pin 12): Internal 3.3V Regulator Output.
CC
R resistor should be chosen to set the LT8619 switch-
The internal power drivers and control circuits are pow-
T
ing frequency equal to or below the synchronization fre-
ered from this voltage. INTV maximum output current
CC
quency. Do not apply external voltage to this pin.
is 20mA. INTVCC current will be supplied from BIAS if
V
> 3.1V, otherwise current will be drawn from V .
BIAS
IN
PG (Pin 4/Pin 6): Open-Drain Power Good Output. PG
remains low until the FB pin is within 7.5% of the final
regulation voltage. The PG pull-up resistor can be con-
Voltage on INTV will vary between 2.8V and 3.3V when
CC
V
is between 3.0V and 3.5V. Decouple this pin to GND
wBitIhASat least a 1μF low ESR ceramic capacitor. Do not load
nected to the INTV , V
or an external supply voltage
CC OUT
that is lower than 6V.
the INTV pin with external circuitry.
CC
BST (Pin 9/Pin 14): This pin is used to provide a drive
voltage, higher than the input voltage, to the topside
power switch. Place a 0.1μF boost capacitor as close as
possible to the IC.
SYNC (Pin 5/Pin 7): External Clock Synchronization Input.
Tie to a clock source for synchronization to an external
frequency. During clock synchronization, the controller
enters forced continuous mode. Ground the SYNC pin for
Burst Mode operation. Connect to INTV to enable forced
continuous mode operation. Floating tChCis pin will enable
pulse-skipping mode operation. During start-up, the con-
troller is forced to run in pulse-skipping mode. When in
pulse-skipping or forced continuous mode operation, the
IQ will be much higher compared to Burst Mode operation.
SW (Pin 10/Pin 15, 16): The SW pin is the output of the
internal power switches. Connect this pin to the inductor
and boost capacitor. This node should be kept small on
the PCB for good performance.
GND (Exposed Pad Pin 11/Pin 8, Exposed Pad Pin 17):
Ground. The exposed pad must be connected to the nega-
tive terminal of the input capacitor and soldered to the
PCB in order to lower the thermal resistance.
8619f
10
For more information www.linear.com/LT8619
LT8619/LT8619-5
BLOCK DIAGRAM
ꢈ
ꢅꢋ
ꢆ
ꢅꢋ
ꢈ
ꢅꢋ
ꢇꢗ
ꢃꢖꢑ
ꢙꢋꢏꢐꢈ
ꢁ
ꢇꢕ
ꢃꢖꢑ
ꢁ
ꢀ
1ꢈ
ꢀ
ꢙꢋꢚꢎꢂꢙ
ꢈ
ꢅꢋ
ꢅꢆꢞꢖ
ꢎꢅꢚꢉ
ꢗꢓꢗꢈ
ꢂꢌꢃ
ꢐꢈꢂꢃ
ꢉꢘꢋꢆ
ꢃꢉꢆ
ꢆꢂꢢ
ꢅꢋꢑꢈ
ꢒꢓꢗꢞꢟꢠꢀꢝꢓꢝꢞꢟꢠ
ꢆꢆ
ꢅꢋꢑꢈ
ꢆꢆ
ꢉꢂꢃꢖꢙ
ꢆꢃꢞꢖ
ꢇ
ꢡ
ꢉ
ꢆ
ꢇꢑ
ꢅꢋꢑꢈꢆꢆ
ꢎꢉꢑ
ꢎꢐꢇꢉꢑ
ꢌꢙꢑꢙꢆꢑ
ꢇ
ꢑ
ꢇ
ꢆ
ꢆ
ꢆ
ꢎ
ꢂ
ꢈ
ꢆ
ꢆ
ꢉꢊ
ꢈ
ꢃꢐꢑ
ꢃꢈ
ꢂꢃꢄꢅꢆ
ꢆ
ꢃꢐꢑ
ꢆ1
ꢇ1
ꢇꢝ
ꢙꢚꢀ ꢁ
ꢁ
ꢄꢋꢌ
ꢅ
ꢉꢉ
ꢒꢓ8ꢈ ꢈ
ꢋꢖꢄ
ꢇꢙꢍ
ꢍꢎꢏꢃꢐꢑ
ꢆ
ꢉꢉ
ꢀ
ꢁ
ꢈ
ꢃꢐꢑ
ꢛ ꢜꢈ
ꢖꢄ
ꢒꢓꢔꢕꢈ
ꢒꢓ86ꢈ
ꢖꢄ
ꢄꢂꢅꢑꢆꢟ
ꢍꢅꢂꢑꢙꢇ
ꢁ
ꢀ
ꢖꢖꢄ
ꢀ
ꢒꢓ8ꢗꢈ
ꢃꢈ
ꢃꢈ
ꢁ
8619 ꢎꢌ
8619f
11
For more information www.linear.com/LT8619
LT8619/LT8619-5
OPERATION
The LT8619 is a monolithic, constant frequency current
mode step-down DC/DC converter. An oscillator, with fre-
quency set using a resistor on the RT pin, turns on the
internal top power switch at the beginning of each clock
cycle. Current in the inductor then increases until the cur-
rent comparator trips and turns off the top power switch.
The peak inductor current at which the top switch turns off
is controlled by the voltage on the internal VC node. The
error amplifier servos the VC node by comparing the volt-
age on the FB pin with an internal 0.8V reference. When
the load current increases, it causes a reduction in the
feedback voltage relative to the reference leading the error
amplifier to raise the VC voltage until the average induc-
tor current matches the new load current. When the top
power switch turns off, the bottom power switch turns on
until the next clock cycle begins or inductor current falls
to zero (Burst Mode operation or pulse-skipping mode).
If overload conditions result in more than 1.8A flowing
through the bottom switch, the next clock cycle will be
delayed until the switch current returns to a safe level.
the input supply current. In a typical application, 6μA will
be consumed from the supply when regulating with no
load. Float the SYNC pin to enable pulse-skipping mode
operation. While in pulse-skipping mode, the oscillator
operates continuously and the bottom power switch turns
off when the inductor current falls to zero. During light
loads, switch pulses are skipped to regulate the output
and the quiescent current will be higher than Burst Mode
operation. Connecting the SYNC pin to INTV enables
CC
forced continuous mode operation. In forced continuous
mode, the inductor current is allowed to reverse and the
switcher operates at a fixed frequency. If a clock is applied
to the SYNC pin, the part operates in forced continuous
mode and synchronizes to the external clock frequency;
with the rising SW signal synchronized to the external
clock positive edge.
To improve efficiency across all loads, supply current
to internal circuitry can be sourced from the BIAS pin
when biased above 3.1V. Else, the internal circuitry will
draw current from V . The BIAS pin should be connected
IN
If the EN/UV pin is low, the LT8619 is shut down and
draws less than 0.6µA from the input. When the EN/UV
pin is above 1V, the switching regulator starts operation.
First, the internal LDO powers up, followed by the switch-
ing regulator 200μs soft-start ramp. During the soft-start
phase, the switcher operates in pulse-skipping mode and
gradually switches to forced continuous mode when VOUT
approaches the set point (if SYNC pin is forced high or
connected to an external clock). Typically, upon EN/UV
rising edge, it takes about 660μs for the switcher output
voltage to reach regulation and PG to be asserted.
to V
if the LT8619 output is programmed to 3.3V or
OUT
above.
An overvoltage comparator, OV, guards against transient
overshoots. If V is higher than 0.83V, the OV compara-
FB
tor trips, disables the top MOSFET and turns on the bot-
tom power switch until the next clock cycle begins or the
inductor reverse current reaches 0.55A. With high reverse
current, both top and bottom MOSFETs shut off till the
next cycle. Positive and negative power good compara-
tors pull the PG pin low if the FB voltage varies more than
7.5% (typical) from the set point.
To optimize efficiency at light loads, configure the LT8619
to operate in Burst Mode by grounding the SYNC pin.
At light load, in between bursts, all circuitry associated
with controlling the output switch is shut down, reducing
The oscillator reduces the LT8619’s operating frequency
when the voltage at the FB pin is low. This frequency
foldback helps to control the inductor current when the
output voltage is lower than the programmed value which
occurs during overcurrent conditions.
8619f
12
For more information www.linear.com/LT8619
LT8619/LT8619-5
APPLICATIONS INFORMATION
Achieving Ultralow Quiescent Current
1ꢀ
1ꢀꢀ
1ꢀ
ꢀ
ꢀ 1ꢁꢂ
ꢀꢁ
ꢀ
ꢀ ꢁꢂꢁꢃ
ꢀꢁꢂ
f
ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁꢂ
To enhance efficiency at light loads, the LT8619 enters into
Burst Mode operation, which keeps the output capacitor
charged to the desired output voltage while minimizing the
input quiescent current and output ripple voltage. In Burst
Mode operation the LT8619 delivers single small pulses of
current to the output capacitor followed by sleep periods
where the output power is supplied by the output capacitor.
While in sleep mode the LT8619 consumes less than 6μA.
ꢀ ꢁ 1ꢂꢃꢄ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢈ ꢉꢊꢋꢌꢍꢎꢏꢉꢐ
1
ꢀꢁ1
ꢀꢁꢀ1
ꢀꢁꢀꢀ1 ꢀꢁꢀ1
ꢀꢁ1
1
1ꢀ
1ꢀꢀ
1ꢀ
As the output load decreases, the frequency of single cur-
rent pulses decreases (see Figure 1) and the percentage
of time the LT8619 is in sleep mode increases, result-
ing in much higher light load efficiency than for typical
converters. For a typical application, when the output is
not loaded, by maximizing the time between pulses, the
regulator quiescent approaches 6µA. Therefore, to opti-
mize the quiescent current performance at light loads,
the current in the feedback resistor divider must be mini-
mized as it appears to the output as load current (See FB
Resistor Network section).
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢋꢂꢌ
8619 ꢀꢁ1
Figure 1. Burst Frequency vs Load Current
V
(AC)
10mV/DIV
OUT
I
L
200mA/DIV
SW
10V/DIV
V
OUT
(AC, ZOOM IN)
10mV/DIV
I (ZOOM IN)
L
200mA/DIV
SW (ZOOM IN)
10V/DIV
While in Burst Mode operation, the current limit of the
top switch is approximately 380mA resulting in output
voltage ripple shown in Figure 2. Increasing the output
capacitance will decrease the output ripple proportionally.
As load ramps upward from zero, the switching frequency
will increase but only up to the switching frequency
programmed by the resistor at the RT pin as shown in
Figure 1. The output load at which the LT8619 reaches
the programmed frequency varies based on input voltage,
output voltage, and inductor choice.
8619 F02
TOP = 20ms/DIV, BOT = 1μs/DIV
Figure 2. Burst Mode Operation Waveform with
VIN = 12V, VOUT = 3.3V at No Load, RT = 66.5k,
L = 10μH, COUT = 22μF
ꢀꢁꢁ
ꢀ
ꢀ ꢁꢂꢁꢃ
ꢀꢁꢂ
f
ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁꢂ
ꢀ ꢁ 1ꢂꢃꢄ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢁ
1ꢀꢁ
1ꢀꢀ
ꢀꢁ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢈ ꢉꢊꢋꢌꢍꢎꢏꢉꢐ
For some applications it is desirable for the LT8619 to
operate in pulse-skipping mode, offering two major dif-
ferences from Burst Mode operation. First, the minimum
inductor current clamp present in Burst Mode operation
is removed, providing a smaller packet of charge to the
output capacitor and reduce the output ripple voltage.
For a given load, the chip awake more often, resulting in
higher supply current compared to Burst Mode opera-
tion. Second is that full switching frequency is reached
at lower output load than in Burst Mode operation (see
Figure 3). To enable pulse-skipping mode, leave the SYNC
ꢀꢁꢂꢃꢄꢅꢃꢆꢇꢀꢀꢇꢈꢉ ꢊꢋꢌꢄ
ꢀ
ꢀ
1ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
6ꢀ
ꢀ
ꢀꢁ
8619 ꢀꢁꢂ
Figure 3. Minimum Load for Full Frequency Operation
vs VIN in Burst Mode Operation and Pulse-Skipping
Mode Setting
pin floating. Tying the SYNC pin to INTV node enables
CC
the programmed switching frequency at no load.
8619f
13
For more information www.linear.com/LT8619
LT8619/LT8619-5
APPLICATIONS INFORMATION
FB Resistor Network
Table 1 and Figure 4 show the typical RT value for a
desired oscillator frequency.
The output voltage is programmed with a resistor divider
between V
and the FB pin. Choose the resistor values
Table 1. Oscillator Frequency vs RT Value (1% Standard Value)
OUT
according to:
f
(MHz)
R (kΩ)
T
f
(MHz)
R (kΩ)
T
OSC
OSC
0.3
162
121
1.4
30.9
26.1
22.6
20.0
17.8
V
⎛
⎞
⎠
OUT
R1= R2
– 1
⎟
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.2
1.6
1.8
2.0
2.2
⎜
⎝
0.8V
95.3
78.7
66.5
57.6
51.1
45.3
36.5
Reference designators refer to the Block Diagram. 1%
resistors are recommended to maintain output voltage
accuracy.
If low input quiescent current and good light-load effi-
ciency are desired, use a large resistor value for the FB
resistor divider. The current flowing in the divider acts as
a load current, and will increase the no-load input current
to the converter, which is approximately:
ꢀꢁꢀ
1ꢀ8
1ꢀꢁ
1ꢀꢁ
ꢀꢁ6
ꢀꢁꢂ
⎛
⎜
⎞
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
V
V
1
OUT
R1+R2
OUT ⎟
I = 5.2µA +
Q
⎜
⎜
⎟
⎟
V
η
IN
⎝
⎠
where 5.2μA is the quiescent current of the LT8619 and
the second term is the current in the feedback divider
reflected to the input of the buck operating at its light load
efficiency, η. For a 3.3V application with R1 = 1M and
R2 = 316k, the feedback divider draws 2.5μA from V
.
OUT
ꢀ
ꢀꢁ ꢀꢁ 6ꢀ 8ꢀ 1ꢀꢀ 1ꢀꢁ 1ꢀꢁ 16ꢀ
(kΩ)
With V = 12V and η = 85%, this adds 0.8μA to the 5.2μA
ꢀ
ꢀ
IN
8619 ꢀꢁꢂ
quiescent current resulting in 6μA quiescent current from
Figure 4. Oscillator Frequency vs RT Value
the 12V supply. Note that this equation implies that the
no-load current is a function of V ; this is plotted in the
IN
Operating Frequency Selection and Trade-Offs
Typical Performance Characteristics section.
Selection of the operating frequency is a trade-off between
efficiency, component size, and input voltage range. The
advantage of high frequency operation is that smaller
inductor and capacitor values may be used. The disadvan-
tages are lower efficiency and a smaller input voltage range.
When using large FB resistors, a 4.7pF to 10pF phase
lead capacitor, C1, should be connected from V
to FB.
OUT
Setting the Switching Frequency
The LT8619 uses a constant frequency PWM architec-
ture that can be programmed to switch from 300kHz to
2.2MHz by using a resistor tied from the RT pin to ground.
For force continuous mode operation, the highest oscil-
lator frequency (f
) for a given application can be
OSC(MAX)
approximately given by the 1st order equation:
The R resistor required for a desired oscillator frequency
T
I
R
+ V
LOAD SW(BOT) OUT
can be roughly obtain using:
f
=
OSC(MAX)
t
V
–I
R +I R
(
)
IN
ON(MIN)
LOAD SW(TOP) LOAD SW(BOT)
50.07
R =
– 5
T
f
Where V is the input voltage, V
is the output volt-
OSC
IN
age, R
and R
are OthUeT internal switch on
SW(TOP)
SW(BOT)
where R is in kΩ and f
is the desired switching fre-
T
OSC
resistance (~0.45Ω, ~0.22Ω, respectively) and t
ON(MIN)
quency in MHz.
8619f
14
For more information www.linear.com/LT8619
LT8619/LT8619-5
APPLICATIONS INFORMATION
is the minimum top switch on-time at the loading condi-
tion as shown in Figure 5. Figure 6 shows the relation-
ship between the maximum input voltage vs the switching
For forced continuous mode, if there is a momentarily VIN
voltage surge higher than the voltage shown in Figure 6,
resulting in minimum on-time operation, an overvoltage
comparator guards against transient overshoots as well
as other more serious conditions that may overvoltage the
frequency. If a smaller R is selected, to ensure that the
T
regulator is switching at the higher frequency as illus-
trated in Figure 4, the maximum input supply voltage has
to be lowered; and it needs to be further reduced if the
load is decreased or removed.
output. When the V voltage rises by more than 3.75%
FB
above its nominal value, the top MOSFET is turned off
and the bottom MOSFET is turned on. At this moment,
the output voltage continues to increase until the inductor
current reverses. The actual peak output voltage will be
higher than 3.75%, depending on external components
value, loading condition and output voltage setting. The
bottom MOSFET remains on continuously until the induc-
tor current exceeds the bottom MOSFET reverse current
or overvoltage condition is cleared. With high reverse cur-
rent, both top and bottom MOSFETs shut off till the next
clock cycle.
8ꢀ
ꢀ
ꢀꢁ
ꢀ ꢁ ꢂꢃꢂꢄꢅ
ꢀ ꢁꢂꢁꢃ
ꢀꢁꢂ
f
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
6ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
1ꢀ
ꢀ
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
Low Supply Operation
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ6
ꢀꢁ8
1ꢀꢁ
1ꢀꢁ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
The LT8619 is designed to remain operational during
short line transients when the input voltage may briefly
8619 ꢀꢁꢂ
Figure 5. Minimum On-Time vs Load Current
dip below 3.0V. Below this voltage, the INTV voltage
CC
6ꢀ
might drop to a point that is not able to provide adequate
gate drive voltage to turn on the MOSFET. The LT8619 has
two circuits to detect this undervoltage condition. A UVLO
ꢀꢁꢂꢃ
ꢄꢅꢃꢆ
ꢀꢁ
comparator monitors the INTV voltage to ensure that it
ꢀꢁ
CC
ꢀꢁꢂꢃ ꢄꢅꢃꢆ
is above 2.8V during startup; once in regulation, the chip
ꢀꢁ
continues to operate as long as INTV stays above 2.65V.
CC
ꢀꢁ ꢂꢁꢃꢄ
If this UVLO comparator trips, the chip is shut down until
ꢀꢁ
INTV recovers. Another comparator monitors the V
CC
IN
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢀ ꢁꢂꢁꢃ
1ꢀ
supply voltage, add a resistor divider from V to EN/UV
ꢀ
ꢀꢁꢂ
ꢀ ꢁ 1ꢂꢃꢄ
IN
to turn off the regulator if V dips below the undesirable
ꢀ
IN
ꢀꢁꢂ ꢀꢁ6
1ꢀꢁ
1ꢀꢁ
ꢀꢁꢂꢃꢄ
1ꢀ8
ꢀꢁꢀ
voltage.
f
ꢀꢁ
8619 ꢀꢁ6
The LT8619 is capable of a maximum duty cycle of greater
Figure 6. Forced Continuous Mode Maximum Input
Voltage vs Switching Frequency
than 99%, and the V -to-V
dropout is limited by the
IN
OUT
RDS(ON) of the top switch. In deep dropout, the loop
attempt to turn on the top switch continuously. However,
the top switch gate drive is biased from the floating boot-
High Supply Operation
strap capacitor C , which normally recharges during each
For Burst Mode operation or pulse-skipping mode, VIN
voltage may go as high as the absolute maximum rating
of 60V regardless of the frequency setting; however, the
LT8619 will reduce the switching frequency as necessary
to regulate the output voltage.
B
off cycle; in dropout, this capacitor loses its refresh cycle
and charge depleted. A comparator detects the drop in
boot-strap capacitor voltage, forces the top switch off and
recharges the capacitor.
8619f
15
For more information www.linear.com/LT8619
LT8619/LT8619-5
APPLICATIONS INFORMATION
For low V applications that cannot allow deviation from
where I
is the maximum output load for a given
L(MAX)
IN
LOAD(MAX)
application and ∆I
the programmed oscillator frequency, use the following
is the inductor ripple current as
formula to set the switching frequency:
calculated in the following equation:
V
+ V
OUT
⎡
⎤
⎥
⎦
SW(BOT)
1
V
OUT
V
=
+ V
– V
IN(MIN)
ΔI
=
V
1–
SW(TOP) SW(BOT)
⎢
L(MAX)
OUT
1– t
• f
f
•L
V
OFF(MIN) OSC
⎢
⎣
IN(MAX) ⎥
OSC
where VIN(MIN) is the minimum input voltage without
skipped cycles, V is the output voltage, V and
SW(BOT)
As a quick example, an application requiring 1A output
current should use an inductor with an RMS rating of
OUT
SW(TOP)
V
are the internal switch drops (~0.54V, ~0.264V,
greater than 1A and an I
of greater than 1.5A. During
long duration overload SoArTshort-circuit conditions, the
inductor RMS rating requirement is greater to avoid over-
heating of the inductor. To push for high efficiency, select
an inductor with low series resistance (DCR), preferably
below 0.04Ω, and the core material should be intended
for high frequency application. However, achieving this
requires a large size inductor. An inductor with DCR
around 0.1Ω is generally a good compromise for both
efficiency and board area, at the expense of trimming 1%
to 2% from the efficiency number.
respectively at maximum load), fOSC is the oscillating fre-
quency (set by R ), and t is the minimum switch-
T
OFF(MIN)
ing off-time. Note that higher switching frequency will
increase the minimum input voltage below which cycles
will be dropped to achieve higher duty cycle.
Inductor Selection and Maximum Output Current
The LT8619 is designed to minimize solution size by
allowing the inductor to be chosen based on the output
load requirements of the application. During overload or
short-circuit conditions the LT8619 safely tolerates opera-
tion with a saturated inductor through the use of a high
speed peak-current mode architecture.
The LT8619 limits the peak switch current in order to pro-
tect the switches and the system from overload faults. The
top switch current limit (I ) is at least 1.5A. The induc-
tor value must then be sLuIfMficient to supply the desired
A good first choice for the inductor value is:
maximum output current (I
), which is a function
LOAD(MAX)
V
+ V
SW(BOT)
OUT
of the switch current limit (I ) and the ripple current:
L = 2
LIM
f
OSC
ΔI
L
I
= I
–
LIM
LOAD(MAX)
2
where fOSC is the switching frequency in MHz, VOUT is
the output voltage, V
is the bottom switch drop
SW(BOT)
Therefore, the maximum output current that the LT8619
will deliver depends on the switch current limit, the induc-
tor value, and the input and output voltages. The inductor
value may have to be increased if the inductor ripple cur-
rent does not allow sufficient maximum output current
(~0.264V) and L is the inductor value in μH.
To avoid overheating and poor efficiency, an inductor
must be chosen with an RMS current rating that is greater
than the maximum expected output load of the applica-
tion. In addition, the saturation current (typically labeled
(I
) given the switching frequency, and maximum
LOAD(MAX)
I
) rating of the inductor must be higher than the load
input voltage used in the desired application.
SAT
current plus one-half of inductor ripple current:
In order to achieve higher light load efficiency, more
energy must be delivered to the output during single small
pulses in Burst Mode operation such that the LT8619 can
ΔI
L(MAX)
I
>I
+
SAT LOAD(MAX)
2
8619f
16
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LT8619/LT8619-5
APPLICATIONS INFORMATION
stay in sleep mode longer between each pulse. This can
be achieved by using a larger value inductor, and should
be considered independent of switching frequency when
choosing an inductor. For example, while a lower inductor
value would typically be used for a high switching fre-
quency application, if high light load efficiency is desired,
a higher inductor value should be chosen.
If the input power source has high impedance, or there
is significant inductance due to long wires or cables, a
ceramic input capacitor combined with the trace or cable
inductance forms a high quality (underdamped) tank cir-
cuit. If the LT8619 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possibly
exceeding the LT8619’s voltage rating. This situation is
easily avoided (see Analog Devices Application Note 88),
by adding a lossy electrolytic capacitor in parallel with the
ceramic capacitor.
The optimum inductor for a given application may differ
from the one indicated by this design guide. A larger value
inductor provides a higher maximum load current and
reduces the output voltage ripple. For applications requir-
ing smaller load currents, the value of the inductor may
be lower and the LT8619 may operate with higher ripple
current. This allows you to use a physically smaller induc-
tor, or one with a lower DCR resulting in higher efficiency.
Be aware that low inductance may result in discontinuous
mode operation, which further reduces maximum load
current.
Output Capacitor and Output Ripple
The output capacitor has two essential functions. Along
with the inductor, it filters the square wave generated
by the LT8619 to produce the DC output. In this role it
determines the output ripple, thus low impedance at the
switching frequency is important. The second function
is to store energy in order to satisfy transient loads and
stabilize the LT8619’s control loop. The current slew rate
of a regulator is limited by the inductor and feedback loop.
When the amount of current required by the load changes,
the initial current deficit must be supplied by the output
capacitor until the feedback loop reacts and compensates
for the load changes. Ceramic capacitors have very low
equivalent series resistance (ESR) and provide the best
ripple performance. For good starting values, see the
Typical Applications section.
For details of maximum output current and discontinuous
operation, see Analog Devices’s Application Note 44.
Input Capacitor
Step-down regulators draw current from the input sup-
ply in pulses with very fast rise and fall times. The input
capacitor is required to reduce the resulting voltage rip-
ple at the LT8619 and to force this very high frequency
switching current into a tight local loop, minimizing EMI.
In continuous mode, the input capacitor RMS current is
given by:
Transient performance can be improved with a higher
value capacitor and the addition of a feedforward capaci-
tor placed between V
and FB. Increasing the output
OUT
capacitance will also decrease the output voltage ripple. A
lower value of output capacitor can be used to save space
and cost but transient performance will suffer and may
cause loop instability. See the Typical Applications in this
data sheet for suggested capacitor values.
V
V – V
IN
OUT
(
)
OUT
I
≈I
RMS(MAX) LOAD(MAX)
V
IN
This equation has a maximum RMS current at VIN
2V , where I = I /2.
=
OUT
RMS(MAX)
LOAD(MAX)
Bypass the input of the LT8619 circuit with a 2.2μF to
10μF ceramic capacitor of X7R or X5R type placed as
Ceramic Capacitors
When choosing a capacitor, special attention should be
given to the manufacturer’s data sheet in order to accu-
rately calculate the effective capacitance under the rel-
evant bias voltage and operating temperature conditions.
Ceramic dielectrics can offer near ideal performance as
close as possible to the V and GND pin. Y5V types have
IN
poor performance over temperature and applied voltage,
and should not be used. Note that larger input capacitance
is required when a lower switching frequency is used.
8619f
17
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LT8619/LT8619-5
APPLICATIONS INFORMATION
Ceramic capacitors can also cause problems due to their
piezoelectric nature. During Burst Mode operation, the
switching frequency depends on the load current, and at
very light loads the LT8619 can excite the ceramic capaci-
tor at frequencies that may generate audible noise. Since
the LT8619 operates at a lower inductor current during
Burst Mode operation, the noise is typically very quiet
to a casual ear. If this is unacceptable, consider using
a high performance tantalum or electrolytic capacitor at
the output instead. Low noise ceramic capacitors are also
available.
an output capacitor, i.e. high volumetric efficiency with
extremely low equivalent resistance. There is a downside
however; the high K dielectric material exhibits a substan-
tial temperature and voltage coefficient, meaning that its
capacitance varies depending on the operating tempera-
ture and applied voltage. X7R capacitors provide a range
intermediate capacitance values which varies only 15%
over the temperature range of –55°C to 125°C. The Y5V
capacitance can vary from 22% to –82% over the –30°C
to 85°C temperature range and should not be used for the
LT8619 application.
Ceramic capacitors are also susceptible to mechanical
stress which can result in significant loss of capacitance.
The most common sources of mechanical stress includes
bending or flexure of the PCB, contact pressure during in
circuit parameter testing, and direct contact by a solder-
ing iron tip. Consult the manufacturer’s application notes
for additional information regarding ceramic capacitor
handling.
Figure 7 shows the voltage coefficient of four different
ceramic 22μF capacitors, all of which are rated for 16V
operation. Note that with the exception of the X7R in the
1210 and 1812 package, the capacitors lose more than
30% of their capacitance when biased at more than half of
the rated voltage. Typically, as the package size increases,
the bias voltage coefficient decreases. If the voltage coef-
ficient of a big ceramic capacitor in a particular pack-
age size is not acceptable; multiple smaller capacitors
with less voltage coefficient can be placed in parallel as
an effective means of meeting the capacitance require-
ment. Not All Capacitors are Interchangeable. A wrong
capacitor selection can degrade the circuit performance
considerably.
Enable Pin
The LT8619 is in shutdown when the EN/UV pin is low
and active when the pin is high. The power-on threshold
of the EN comparator is 1.0V, with 40mV of hysteresis,
once EN/UV drops below this power-on threshold, the
MOSFETs are disabled, but the internal biasing circuit
stays alive. When forced below 0.56V, all the internal
blocks are disabled and the IC is put into a low current
ꢀꢁ
ꢀ
shutdown mode. The EN/UV pin can be tied to V if the
IN
ꢀꢁꢂ
shutdown feature is not used.
ꢀꢁꢂꢃ 1ꢄ1ꢅ
ꢀꢁꢂꢃ 1ꢄꢅ6
ꢀꢁꢂ
ꢀ6ꢁ
Adding a resistor divider from VIN to EN/UV programs the
LT8619 to regulate the output only when V is above a
IN
ꢀꢁꢂꢃ 181ꢄ
desired voltage (see the Block Diagram). Typically, this
threshold, VIN(EN/UV), is used in situations where the input
supply is current limited, or has a relatively high source
resistance. A switching regulator draws constant power
from the source, so source current increases as source
voltage drops. This looks like a negative resistance load
to the source and can cause the source to current limit
or latch low under low source voltage conditions. The
ꢀ8ꢁ
ꢀꢁꢂꢃ ꢄ8ꢄꢁ
ꢀ1ꢁꢁ
ꢀ
ꢀ
ꢀ
6
8
1ꢀ 1ꢀ 1ꢀ 16
ꢀꢁ ꢂꢃꢄꢅ ꢆꢇꢈꢉꢄꢊꢋ ꢌꢆꢍ
8619 ꢀꢁ9
ꢀꢁꢂꢂꢃꢄꢅꢆ1ꢀꢂꢂ6ꢇꢂꢃꢈ
ꢀꢁꢂꢃꢄꢅꢆꢇ1ꢀꢄꢄ6ꢈꢄꢉꢉ
ꢀꢁꢂ16ꢃꢄꢅ1ꢀꢂꢂ6ꢆ16ꢇ
ꢀꢁꢂ1ꢁꢃꢄꢅ1ꢀꢁꢁ6ꢆ1ꢁꢄ
Figure 7. Ceramic Capacitor Voltage Coefficient
V
threshold prevents the regulator from operating
IN(EN/UV)
at source voltages where the problems might occur. This
8619f
18
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LT8619/LT8619-5
APPLICATIONS INFORMATION
threshold can be adjusted by setting the values R3 and
R4 such that they satisfy the following equation:
external resistor. Otherwise, the internal open-drain tran-
sistor will pull the PG pin low. The PG pin is also actively
pulled low during several fault conditions: EN/UV pin is
below 1V, INTV drops below its UVLO threshold, V is
R3
R4
⎛
⎝
⎞
V
= 1+
•1V
CC
IN
⎜
⎟
⎠
IN(EN/UV)
too low, or thermal shutdown.
where the LT8619 will remain off until VIN is above
. Due to the comparator’s hysteresis, switching
Synchronization
V
IN(EN/UV)
Synchronizing the LT8619 oscillator to an external fre-
quency can be done by connecting a square wave (with
20% to 80% duty cycle) to the SYNC pin. The square wave
amplitude should have valleys that are below 0.4V and
peaks above 2V (up to 6V). During frequency synchroni-
zation, the part operates in forced continuous mode with
the SW rising edge synchronized to the SYNC positive
edge. The LT8619 may be synchronized over a 300kHz
will not stop until the input falls slightly below V
.
IN(EN/UV)
When in Burst Mode operation for light load currents,
the current through the V
resistor network can
easily be greater than theINs(uEpNp/UlyV)current consumed by
the LT8619. Therefore, the V
resistors should
IN(EN/UV)
be large enough to minimize their impact on efficiency
at low loads.
to 2.2MHz range. The R resistor must be chosen to set
T
INTV Regulator
CC
the LT8619 switching frequency equal or below the lowest
An internal low dropout (LDO) regulator produces the 3.3V
synchronization input. For example, if the synchroniza-
supply from V that powers the drivers and the internal
tion signal will be 500kHz and higher, the R should be
IN
T
bias circuitry. The INTV can supply enough current for
selected for 500kHz.
CC
the LT8619’s circuitry and must be bypassed to ground
with at least a 1μF ceramic capacitor. Good bypassing is
necessary to supply the high transient currents required
by the power MOSFET gate drivers. To improve efficiency
the internal LDO can draw current from the BIAS pin when
the BIAS pin is at 3.1V or higher. Typically the BIAS pin can
be tied to the output of the switching regulator, or can be
tied to an external supply which must also be at 3.3V or
Start-Up Inrush Current, Short-Circuit Protection
Upon start-up, the internal soft-start action regulates
the V
slew rate; the LT8619 provides the maximum
ratedOoUuTtput current to charge up the output capacitor
as quickly as possible. During start-up, if the output is
overloaded, the regulator continues to provide the maxi-
mum sourcing current to overcome the output load, but
at the same time, the bottom switch current is monitored
such that if the inductor current is beyond the safe levels,
switching of the top switch will be delay until such time
as the inductor current falls to safe levels.
above. If BIAS is connected to a supply other than V
,
be sure to bypass with a local ceramic capacitor. IfOtUhTe
BIAS pin is below 3.0V, the internal LDO will consume
current from V . Applications with high input voltage and
IN
high switching frequency where the internal LDO pulls
current from VIN will increase die temperature because
of the higher power dissipation across the LDO. Do not
Once the soft-start period has expired and the FB voltage
is higher than 0.74V, the LT8619 switching frequency will
be folded back if the external load pulls down the output.
At the same time, the bottom switch current will continue
to be monitored to limit the short-circuit current. Figure 8
shows the frequency foldback transfer curve and Figure 9
shows the short circuit waveform. During this overcurrent
condition, if the SYNC pin is connected to a clock source,
the LT8619 will get out from the synchronization mode.
connect an external load to the INTV pin.
CC
Output Power Good
When the LT8619’s output voltage is within the 7.5%
window of the regulation point, the open-drain PG pin
goes high impedance and is typically pulled high with an
8619f
19
For more information www.linear.com/LT8619
LT8619/LT8619-5
APPLICATIONS INFORMATION
ꢀꢁꢂ
ꢀ
ꢀ
= 20kΩ
ꢀ
ꢁꢂ
ꢀ
ꢁꢂ
ꢃꢄ8619
ꢅꢂꢆꢇꢀ
ꢈꢂꢉ
ꢀꢁꢂ
1ꢀꢁ
1ꢀꢁ
ꢀꢁꢂ
ꢀ
8619 ꢊ1ꢋ
Figure 10. Reverse VIN Protection
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board (PCB) layout. Figure 11
and Figure 12 show the recommended component place-
ment with trace, ground plane and via locations. Note that
ꢀ
ꢀꢁ1 ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁ6 ꢀꢁꢂ ꢀꢁ8
ꢀꢁꢂ
ꢀ
ꢀꢁ
8619 ꢀꢁ8
Figure 8. Frequency Foldback Transfer Function
large, switched currents flow in the LT8619’s V , SW,
IN
V
OUT
GND pins, and the input capacitor. The loop formed by
1V/DIV
these components should be as small as possible by plac
-
I
SHORT
10A/DIV
ing the capacitor adjacent to the V and GND pins. When
IN
using a physically large input capacitor, the resulting loop
may become too large in which case using a small case/
I
L
0.5A/DIV
value capacitor placed close to the V and GND pins plus
IN
SW
10V/DIV
a larger capacitor further away is preferred. These com-
ponents, along with the inductor and output capacitor,
should be placed on the same side of the circuit board,
and their connections should be made on that layer. Place
a local, unbroken ground plane under the application cir-
cuit on the layer closest to the surface layer. The SW and
BST nodes should be as small as possible. Finally, keep
the FB and RT nodes small so that the ground traces will
shield them from the SW and BST nodes. The exposed
pad on the bottom of the package must be soldered to
ground so that the pad is connected to ground electrically
and also acts as a heat sink thermally. To keep thermal
resistance low, extend the ground plane as much as pos-
sible, and add thermal vias under and near the LT8619 to
additional ground planes within the circuit board and on
the bottom side.
8619 F09
5μs/DIV
Figure 9. Short-Circuit Waveform with VIN = 12V,
VOUT = 3.3V, fOSC = 2MHz, L = 4.7μH, COUT = 22μF
Reversed Input Protection
Load protection may be necessary in systems where the
output will be held high when the input to the LT8619 is
absent. This may occur in battery charging applications or
in battery backup systems where a battery or some other
supply is diode ORed with the LT8619’s output. If the V
IN
pin is allowed to float and the EN/UV pin is held high (either
by a logic signal or because it is tied to VIN), then the
LT8619’s internal circuitry will pull its quiescent current
through its SW pin. This is acceptable if the system can tol-
erate several μA in this state. If the EN/UV pin is grounded
the SW pin current will drop to near 1µA. However, if the
High Temperature Output Current Considerations
V pin is grounded while the output is held high, regard-
IN
The maximum practical continuous load that the LT8619
can drive, while rated at 1.2A, actually depends upon both
the internal current limit (refer to the Typical Performance
Characteristics section) and the internal temperature
which depends on operating conditions, PCB layout and
airflow.
less of EN/UV, parasitic body diodes inside the LT8619
can pull current from the output through the SW pin and
the V pin. Figure 10 shows a connection of the V and
IN
IN
EN/UV pins that will allow the LT8619 to run only when
the input voltage is present and that protects against a
shorted or reversed input.
8619f
20
For more information www.linear.com/LT8619
LT8619/LT8619-5
APPLICATIONS INFORMATION
ꢄ
ꢎꢃꢈ
ꢉꢍ
ꢓ
ꢆꢁꢌ
ꢀꢁꢂꢃꢄ
ꢇꢈ
ꢐꢉꢈ
ꢄ
ꢏꢁ
ꢏꢁꢈꢄ
ꢐꢏꢑꢉ
ꢋꢋ
ꢅꢆ
ꢒꢐꢂꢎꢃꢈ
ꢄ
ꢎꢃꢈ
ꢇꢈ
ꢉꢊꢁꢋ
8619 ꢒ11
Figure 11. Recommended PCB Layout for LT8619 10-Pin DFN
ꢄ
ꢎꢃꢋ
ꢇꢍ
ꢓ
ꢆꢁꢌ
ꢐꢇꢋ
ꢀꢁꢂꢃꢄ
ꢅꢆ
ꢄ
ꢏꢁ
ꢏꢁꢋꢄ
ꢉꢉ
ꢐꢏꢑꢇ
ꢒꢐꢂꢎꢃꢋ
ꢄ
ꢎꢃꢋ
ꢇꢈꢁꢉ
ꢊꢋ
8619 ꢒ1ꢔ
Figure 12. Recommended PCB Layout for LT8619 16-Pin MSOP
8619f
21
For more information www.linear.com/LT8619
LT8619/LT8619-5
APPLICATIONS INFORMATION
For higher ambient temperatures, care should be taken in
the layout of the PCB to ensure good heat sinking of the
LT8619. The exposed pad on the bottom of the package
must be soldered to a ground plane. This ground should
be tied to large copper layers below with thermal vias;
these layers will spread heat dissipated by the LT8619.
Placing additional vias can reduce thermal resistance fur-
ther. Figure 13 shows the rise in case temperature vs load
current. Note that a higher ambient temperature will result
in bigger case temperature rise as shown in Figure 14.
Power dissipation within the LT8619 can be estimated
by calculating the total power loss from an efficiency
measurement and subtracting the inductor loss. The
die temperature is calculated by multiplying the LT8619
power dissipation by the thermal resistance from junction
to ambient.
Figure 15 shows the typical derating maximum output
current curve. As with any monolithic switching regu-
lator, the PCB layout, thermal resistance, air flow, other
heat sources in the vicinity affect how efficiently heat can
be removed from the die and radically change the die
junction temperature. The actual LT8619 switcher output
voltage and current sourcing capability might deviate from
the performance curve stated in this data sheet. When
pushing the LT8619 to its limit, verify its operation in the
actual environment. AT HIGH AMBIENT TEMPERATURE,
CONTINUOUS OPERATION ABOVE THE MAXIMUM
OPERATION JUNCTION TEMPERATURE MAY IMPAIR
DEVICE RELIABILITY OR PERMANENTLY DAMAGE THE
DEVICE.
ꢀꢁ
ꢀꢁ
ꢀ
ꢀ 1ꢁꢂ
ꢀ
ꢀ 1ꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀ ꢁꢂ
ꢀ
ꢀ ꢁ ꢃ 1ꢄꢅꢆ ꢇꢈꢆꢉ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
1ꢀ
1ꢀ
ꢀ
f
ꢀ ꢁꢂꢂꢃꢄꢅ
f
ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁ
ꢀ
ꢀꢁ
ꢀ
ꢀ ꢁꢂꢃꢄ
1ꢀ
1ꢀ
ꢀ
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢀꢁꢂꢃꢄꢂꢅꢁꢅꢆ ꢁꢇꢈꢉꢊꢃꢄꢁꢂ ꢊꢋꢁꢌꢈ
ꢀꢁꢂꢃꢀꢄꢀ ꢅꢄꢆꢇꢈꢃꢉꢆ ꢈꢊꢀꢋꢊꢌꢁꢈꢄꢌꢊ
ꢀꢁꢂ ꢃꢄꢅꢀꢁꢆꢄꢆꢇꢈꢂ ꢉꢁꢀꢁꢊꢄ ꢇꢋꢄ ꢉꢄꢌꢍꢎꢄ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ6
ꢀꢁ8
1ꢀꢁ
1ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
1ꢀꢀ
1ꢀꢁ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
8619 ꢀ1ꢁ
8619 ꢀ1ꢁ
Figure 13. Case Temperature Rise vs Load Current
Figure 14. Case Temperature Rise vs Ambient Temperature
1ꢀꢁ
1ꢀꢁ
1ꢀꢁ
ꢀꢁ8
ꢀꢁ6
ꢀꢁꢂ
f
ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁ
f
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀ
ꢀ 1ꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀ
ꢀ ꢁꢂꢁꢃ
ꢀꢁꢂ
ꢀ
≤ 125°C
ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ ꢋꢁꢅꢄ
ꢀꢁꢂꢃꢄꢅ
ꢀ
9ꢀ
9ꢀ 1ꢀꢀ 1ꢀꢁ 11ꢀ 11ꢀ 1ꢀꢁ 1ꢀꢁ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
8619 ꢀ1ꢁ
Figure 15. LT8619 Derating Maximum Output
Current with Junction Temperature Less Than 125°C
8619f
22
For more information www.linear.com/LT8619
LT8619/LT8619-5
TYPICAL APPLICATIONS
3.3V 400kHz Step-Down Converter
1.8V 2MHz Step-Down Converter
ꢎ
ꢓ
ꢔꢕ
ꢔꢏ
ꢒꢃꢒꢓ ꢁꢍ 1ꢂꢓ
ꢑꢒꢌ
ꢒꢓ
ꢎ
ꢔꢕ
ꢢꢎ ꢌꢏ 6ꢅꢎ
1ꢄꢎ
ꢅꢊ1ꢁꢋ
1ꢀꢁꢂ
ꢎ
ꢈꢊꢈꢎ
1ꢊꢉꢍ
ꢂꢃꢂꢄꢎ
ꢉꢊꢉꢁꢋ
ꢏꢐꢌ
1ꢈꢈꢉ
ꢆꢇ
ꢓ
ꢔꢏ
ꢔꢏꢁꢓ
ꢙꢙ
ꢛꢌ8619
ꢆꢇ
1ꢅꢅꢆ
ꢃꢄ
ꢖꢗꢁ
ꢏꢋꢋ ꢏꢕ
ꢤꢕꢥꢐꢎ
ꢂꢃꢂꢄꢅ
ꢓ
1ꢃ8ꢓ
1ꢃꢂꢑ
ꢈꢃ1ꢄꢎ
ꢀꢁ8619
ꢍꢕꢁ
ꢃꢄ
ꢗꢘ
ꢍꢎꢎ ꢍꢏ
ꢜꢏꢝꢕꢓ
ꢔꢕꢌꢎ
ꢑꢔꢍꢒ
ꢘꢘ
ꢖꢔꢑꢗ
ꢌꢃ6ꢐꢎ
1ꢃ8ꢊꢋ
1ꢃꢌꢋ
1ꢁꢋ
6ꢊ8ꢚꢋ
1ꢇ
ꢈ16ꢆ
ꢎꢖ
ꢞꢁ
ꢂꢂꢄꢎ
ꢙꢌ
ꢋꢑ
ꢉꢉꢁꢋ
ꢗꢛꢏꢙ
ꢇꢏꢚ
8619 ꢁꢑꢈꢒ
ꢂꢈꢉ
ꢒꢗꢕꢘ
ꢄꢕꢖ
8619 ꢌꢍꢅꢉ
1ꢉ1ꢆ
f
ꢟ ꢂꢋꢅꢣ
ꢍꢗꢙ
f
ꢜ ꢢꢅꢅꢆꢂꢣ
ꢏꢒꢘ
ꢀ ꢟ ꢓꢔꢗꢅꢑꢛ ꢔꢅꢀꢆꢠꢂꢈꢂꢈꢑꢖꢠꢈ1
ꢟ ꢁꢚꢡ ꢙꢒꢂꢂꢌꢢꢊꢞ1ꢙꢂꢂ6ꢡꢂꢌꢈ
ꢛ ꢜ ꢎꢔꢒꢂꢍꢗ ꢔꢂꢛꢃꢝꢈꢉꢈꢉꢘꢞꢝ11
ꢏꢐꢌ
ꢙ
ꢍꢕꢁ
ꢘ
ꢜ ꢌꢖꢟ ꢘꢈꢉꢉꢀꢠꢡꢙ1ꢘꢉꢉ6ꢟꢉꢀꢅ
5V 2MHz Step-Down Converter
ꢎ
ꢏꢐ
6ꢎ ꢁꢑ ꢒ6ꢎ
ꢓ6ꢊꢎ ꢁꢔꢍꢐꢕꢏꢖꢐꢁꢗ
ꢎ
ꢏꢐ
ꢙꢕꢁ
ꢕꢚ
ꢄꢅꢆꢇꢈ
ꢊꢅ1ꢇꢌ
ꢎ
ꢉꢅꢉꢇꢌ
ꢑꢘꢁ
ꢀꢁ8619ꢂꢃ
ꢃꢎ
1ꢅꢉꢍ
1ꢊꢊꢋ
ꢠꢛ
ꢑꢌꢌ ꢑꢐ
ꢖꢐꢟꢘꢎ
ꢠꢛ
ꢏꢐꢁꢎ
ꢔꢁ
ꢞꢞ
1ꢇꢌ
ꢙꢏꢍꢕ
ꢑꢘꢁ
ꢕꢝꢐꢞ
ꢛꢐꢜ
8619 ꢁꢍꢊꢄ
ꢉꢉꢇꢌ
ꢉꢊꢋ
f
ꢡ ꢉꢥꢈꢦ
ꢑꢕꢞ
ꢀ ꢡ ꢎꢏꢕꢈꢍꢝ ꢏꢈꢀꢠꢂꢉꢊꢉꢊꢙꢢꢂꢊ1
ꢡ ꢁꢜꢣ ꢞꢒꢉꢉꢃꢤꢆꢔ1ꢞꢉꢉ6ꢣꢉꢃꢊ
ꢞ
ꢑꢘꢁ
12V 700kHz Step-Down Converter
ꢔ
ꢕꢐ
1ꢊꢔ ꢁꢎ 6ꢇꢔ
1ꢃꢏ
ꢂꢉꢂꢃꢏ
1ꢇꢇꢈ
ꢔ
ꢕꢐ
ꢕꢐꢁꢔ
ꢚꢚ
ꢅꢆ
ꢅꢆ
ꢗꢘꢁ
ꢘꢙ
ꢇꢉ1ꢃꢏ
ꢂꢂꢃꢄ
ꢔ
ꢎꢖꢁ
ꢀꢁ8619
1ꢂꢔ
1ꢉꢂꢓ
ꢌꢇ1ꢈ
ꢂꢂꢒꢏ
ꢝꢐꢞꢖꢔ
ꢎꢏꢏ ꢎꢐ
ꢗꢕꢓꢘ
ꢇꢉ9ꢊ1ꢋ
66ꢉꢍꢈ
ꢟꢁ
ꢏꢗ
ꢘꢜꢐꢚ
ꢆꢐꢛ
8619 ꢁꢓꢇꢍ
1ꢇꢃꢏ
ꢑꢂ
66ꢉꢍꢈ
f
ꢠ ꢣꢇꢇꢈꢄꢥ
ꢎꢘꢚ
ꢀ ꢠ ꢔꢕꢘꢄꢓꢜ ꢕꢄꢀꢅꢡꢂꢇꢂꢇꢚꢢꢡ11
ꢠ ꢋꢖꢟꢓꢁꢓ ꢆꢟꢋꢊꢂꢝꢟꢣꢜꢓ1ꢇ6ꢤ
ꢚ
ꢎꢖꢁ
8619f
23
For more information www.linear.com/LT8619
LT8619/LT8619-5
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT8619#packaging for the most recent package drawings.
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
ꢂꢁꢥꢂ ±ꢂꢁꢂꢡ
ꢀꢁꢡꢡ ±ꢂꢁꢂꢡ
ꢛꢁ1ꢡ ±ꢂꢁꢂꢡ ꢃꢛ ꢅꢆꢇꢈꢅꢉ
1ꢁ6ꢡ ±ꢂꢁꢂꢡ
ꢖꢏꢕꢗꢏꢑꢈ
ꢋꢘꢌꢙꢆꢊꢈ
ꢂꢁꢛꢡ ±ꢂꢁꢂꢡ
ꢂꢁꢡꢂ
ꢒꢅꢕ
ꢛꢁꢀ8 ±ꢂꢁꢂꢡ
ꢃꢛ ꢅꢆꢇꢈꢅꢉ
RECOMMENDED ꢅꢋꢙꢇꢈꢎ ꢖꢏꢇ ꢖꢆꢌꢕꢞ ꢏꢊꢇ ꢇꢆꢓꢈꢊꢅꢆꢋꢊꢅ
ꢎ ꢦ ꢂꢁ1ꢛꢡ
ꢂꢁꢄꢂ ±ꢂꢁ1ꢂ
ꢌꢣꢖ
6
1ꢂ
ꢀꢁꢂꢂ ±ꢂꢁ1ꢂ
ꢃꢄ ꢅꢆꢇꢈꢅꢉ
1ꢁ6ꢡ ±ꢂꢁ1ꢂ
ꢃꢛ ꢅꢆꢇꢈꢅꢉ
ꢖꢆꢊ 1 ꢊꢋꢌꢕꢞ
ꢎ ꢦ ꢂꢁꢛꢂ ꢋꢎ
ꢖꢆꢊ 1
ꢌꢋꢖ ꢓꢏꢎꢗ
ꢃꢅꢈꢈ ꢊꢋꢌꢈ 6ꢉ
ꢂꢁꢀꢡ × ꢄꢡ°
ꢕꢞꢏꢓꢝꢈꢎ
ꢃꢇꢇꢉ ꢇꢝꢊ ꢎꢈꢜ ꢕ ꢂꢀ1ꢂ
ꢡ
1
ꢂꢁꢛꢡ ±ꢂꢁꢂꢡ
ꢂꢁꢡꢂ ꢒꢅꢕ
ꢂꢁꢥꢡ ±ꢂꢁꢂꢡ
ꢂꢁꢛꢂꢂ ꢎꢈꢝ
ꢛꢁꢀ8 ±ꢂꢁ1ꢂ
ꢃꢛ ꢅꢆꢇꢈꢅꢉ
ꢂꢁꢂꢂ ꢧ ꢂꢁꢂꢡ
ꢒꢋꢌꢌꢋꢓ ꢜꢆꢈꢐꢤꢈꢟꢖꢋꢅꢈꢇ ꢖꢏꢇ
ꢊꢋꢌꢈꢍ
1ꢁ ꢇꢎꢏꢐꢆꢊꢑ ꢌꢋ ꢒꢈ ꢓꢏꢇꢈ ꢏ ꢔꢈꢇꢈꢕ ꢖꢏꢕꢗꢏꢑꢈ ꢋꢘꢌꢙꢆꢊꢈ ꢓꢂꢚꢛꢛ9 ꢜꢏꢎꢆꢏꢌꢆꢋꢊ ꢋꢝ ꢃꢐꢈꢈꢇꢚꢛꢉꢁ
ꢕꢞꢈꢕꢗ ꢌꢞꢈ ꢙꢌꢕ ꢐꢈꢒꢅꢆꢌꢈ ꢇꢏꢌꢏ ꢅꢞꢈꢈꢌ ꢝꢋꢎ ꢕꢘꢎꢎꢈꢊꢌ ꢅꢌꢏꢌꢘꢅ ꢋꢝ ꢜꢏꢎꢆꢏꢌꢆꢋꢊ ꢏꢅꢅꢆꢑꢊꢓꢈꢊꢌ
ꢛꢁ ꢇꢎꢏꢐꢆꢊꢑ ꢊꢋꢌ ꢌꢋ ꢅꢕꢏꢙꢈ
ꢀꢁ ꢏꢙꢙ ꢇꢆꢓꢈꢊꢅꢆꢋꢊꢅ ꢏꢎꢈ ꢆꢊ ꢓꢆꢙꢙꢆꢓꢈꢌꢈꢎꢅ
ꢄꢁ ꢇꢆꢓꢈꢊꢅꢆꢋꢊꢅ ꢋꢝ ꢈꢟꢖꢋꢅꢈꢇ ꢖꢏꢇ ꢋꢊ ꢒꢋꢌꢌꢋꢓ ꢋꢝ ꢖꢏꢕꢗꢏꢑꢈ ꢇꢋ ꢊꢋꢌ ꢆꢊꢕꢙꢘꢇꢈ
ꢓꢋꢙꢇ ꢝꢙꢏꢅꢞꢁ ꢓꢋꢙꢇ ꢝꢙꢏꢅꢞꢠ ꢆꢝ ꢖꢎꢈꢅꢈꢊꢌꢠ ꢅꢞꢏꢙꢙ ꢊꢋꢌ ꢈꢟꢕꢈꢈꢇ ꢂꢁ1ꢡꢢꢢ ꢋꢊ ꢏꢊꢣ ꢅꢆꢇꢈ
ꢡꢁ ꢈꢟꢖꢋꢅꢈꢇ ꢖꢏꢇ ꢅꢞꢏꢙꢙ ꢒꢈ ꢅꢋꢙꢇꢈꢎ ꢖꢙꢏꢌꢈꢇ
6ꢁ ꢅꢞꢏꢇꢈꢇ ꢏꢎꢈꢏ ꢆꢅ ꢋꢊꢙꢣ ꢏ ꢎꢈꢝꢈꢎꢈꢊꢕꢈ ꢝꢋꢎ ꢖꢆꢊ 1 ꢙꢋꢕꢏꢌꢆꢋꢊ ꢋꢊ ꢌꢞꢈ
ꢌꢋꢖ ꢏꢊꢇ ꢒꢋꢌꢌꢋꢓ ꢋꢝ ꢖꢏꢕꢗꢏꢑꢈ
8619f
24
For more information www.linear.com/LT8619
LT8619/LT8619-5
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT8619#packaging for the most recent package drawings.
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev F)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
1
8
0.35
REF
5.10
(.201)
MIN
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
16
9
0.305 ±0.038
0.50
(.0197)
BSC
NO MEASUREMENT PURPOSE
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
(.0120 ±.0015)
TYP
0.280 ±0.076
(.011 ±.003)
RECOMMENDED SOLDER PAD LAYOUT
16151413121110
9
REF
DETAIL “A”
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0° – 6° TYP
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
1 2 3 4 5 6 7 8
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16) 0213 REV F
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
8619f
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
25
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
LT8619/LT8619-5
TYPICAL APPLICATION
Ultralow EMI 5V 2MHz Step-Down Converter
ꢋꢌ1
ꢌꢍꢎꢏ
ꢀ
ꢉꢊ
ꢄꢅꢆꢇꢈ
ꢓ
ꢉꢊ
ꢌꢘꢁ
ꢘꢛ
ꢓ
ꢉꢊ
6ꢓ ꢁꢔ ꢕ6ꢓ
ꢄꢅꢆꢇꢋ
ꢄꢅꢆꢇꢋ
ꢄꢅꢆꢇꢋ
ꢑꢅ1ꢇꢋ
ꢀꢁ8619ꢂꢃ
ꢖ6ꢑꢓ ꢁꢗꢎꢊꢘꢉꢍꢊꢁꢙ
ꢄꢅꢆꢇꢈ
ꢓ
ꢔꢚꢁ
ꢃꢓ
1ꢅꢐꢎ
1ꢑꢑꢒ
ꢜꢝ
ꢔꢋꢋ ꢔꢊ
ꢍꢊꢠꢚꢓ
ꢜꢝ
ꢉꢊꢁꢓ
ꢟꢟ
1ꢇꢋ
ꢐꢑꢒ
ꢌꢉꢎꢘ
ꢔꢚꢁ
ꢗꢁ
ꢘꢞꢊꢟ
ꢝꢊꢏ
ꢐꢐꢇꢋ
8619 ꢁꢎꢑ6
f
ꢡ ꢐꢣꢈꢦ
ꢋꢌ1 ꢡ ꢁꢏꢢ ꢣꢜꢤꢐꢑ1ꢐꢘꢐꢐ1ꢎ
ꢡ ꢥꢋꢀꢄꢑꢐꢑ
ꢔꢘꢟ
ꢀ
ꢉꢊ
ꢀ ꢡ ꢓꢉꢘꢈꢎꢞ ꢉꢈꢀꢜꢂꢐꢑꢐꢑꢌꢤꢂꢑ1
ꢡ ꢁꢏꢢ ꢟꢕꢐꢐꢃꢥꢆꢗ1ꢟꢐꢐ6ꢢꢐꢃꢑ
ꢟ
ꢔꢚꢁ
RELATED PARTS
PART
DESCRIPTION
COMMENTS
= 3V, V
LT8602
42V, Quad Output (2.5A + 1.5A + 1.5A + 1.5A) 95% Efficiency,
2.2MHz Synchronous Micropower Step-Down DC/DC
V
= 42V, V
= 0.8V, I = 2.5μA,
IN(MIN)
IN(MAX)
OUT(MIN)
Q
I
< 1μA, 6mm × 6mm QFN-40
SD
Converter with I = 25μA
Q
LT8609/LT8609A
LT8610
42V, 2A, 94% Efficiency, 2.2MHz Synchronous Micropower
V
= 3V, V
= 42V, V
IN(MAX)
= 0.8V, IQ = 2.5μA,
IN(MIN)
OUT(MIN)
Step-Down DC/DC Converter with I = 2.5μA
I
< 1μA, MSOP-10E
SD
Q
42V, 2.5A, 96% Efficiency, 2.2MHz Synchronous Micropower
V
= 3.4V, V
< 1μA, MSOP-16E
= 42V, V
= 42V, V
= 0.97V, I = 2.5μA,
Q
IN(MIN)
IN(MAX)
OUT(MIN)
Step- Down DC/DC Converter with I = 2.5μA
I
SD
Q
LT8610A/LT8610AB 42V, 3.5A, 96% Efficiency, 2.2MHz Synchronous Micropower
V
= 3.4V, V
< 1μA, MSOP-16E
= 0.97V, I = 2.5μA,
Q
IN(MIN)
IN(MAX)
OUT(MIN)
Step- Down DC/DC Converter with I = 2.5μA
I
SD
Q
LT8610AC
LT8611
42V, 3.5A, 96% Efficiency, 2.2MHz Synchronous Micropower
V
SD
= 3V, V
= 42V, V
= 0.8V, I = 2.5μA,
IN(MIN)
IN(MAX)
OUT(MIN) Q
Step- Down DC/DC Converter with I = 2.5μA
I
< 1μA, MSOP-16E
Q
42V, 2.5A, 96% Efficiency, 2.2MHz Synchronous Micropower
V
= 3.4V, V
< 1μA, 3mm × 5mm QFN-24
= 42V, V
= 0.97V, I = 2.5μA,
Q
IN(MIN)
IN(MAX)
OUT(MIN)
Step- Down DC/DC Converter with I = 2.5μA and Input/Output
I
SD
Q
Current Limit/Monitor
LT8612
42V, 6A, 96% Efficiency, 2.2MHz Synchronous Micropower
V
SD
= 3.4V, V
= 42V, V
= 0.97V, I = 3.0μA,
Q
IN(MIN)
IN(MAX)
OUT(MIN)
Step-Down DC/DC Converter with I = 2.5μA
I
< 1μA, 3mm × 6mm QFN-28
Q
LT8613
42V, 6A, 96% Efficiency, 2.2MHz Synchronous Micropower
Step- Down DC/DC Converter with Current Limiting
V
SD
= 3.4V, VIN(MAX) = 42V, V
= 0.97V, I = 3.0μA,
OUT(MIN) Q
IN(MIN)
I
< 1μA, 3mm × 6mm QFN-28
LT8614
42V, 4A, 96% Efficiency, 2.2MHz Synchronous Silent Switcher
V
SD
= 3.4V, V
= 42V, V = 0.97V, I = 2.5μA,
OUT(MIN) Q
IN(MIN)
IN(MAX)
Step- Down DC/DC Converter with I = 2.5μA
I
< 1μA, 3mm × 4mm QFN-18
Q
LT8616
42V, Dual 2.5A + 1.5A, 95% Efficiency, 2.2MHz Synchronous
V
SD
= 3.4V, VIN(MAX) = 42V, V
= 0.8V, I = 5μA,
IN(MIN)
OUT(MIN) Q
Micropower Step-Down DC/DC Converter with I = 5μA
I
< 1μA, TSSOP-28E, 3mm × 6mm QFN-28
Q
LT8620
65V, 2.5A, 94% Efficiency, 2.2MHz Synchronous Micropower
V
= 3.4V, V
= 65V, V
= 0.97V, I = 2.5μA,
IN(MIN)
IN(MAX)
OUT(MIN) Q
Step- Down DC/DC Converter with I = 2.5μA
ISD < 1μA, MSOP-16E, 3mm × 5mm QFN-24
V = 3.4V, V = 42V, V = 0.97V, I = 2.5μA,
IN(MIN)
Q
LT8640/LT8640-1
42V, 5A, 96% Efficiency, 3MHz Synchronous Micropower
IN(MAX)
OUT(MIN)
Q
Step-Down DC/DC Converter with I = 2.5μA
I
SD
< 1μA, 3mm × 4mm QFN-18
Q
8619f
LT 0118 • PRINTED IN USA
www.linear.com/LT8619
26
ANALOG DEVICES, INC. 2018
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