LTC1069-1CS8_技术文档

LTC1069-1

Low Power, 8th Order

Progressive Elliptic,

Lowpass Filter

EATURE

S

F

■

8th Order Elliptic Filter in SO-8 Package

Operates from Single 3.3V to ±5V Power Supplies

–20dB at 1.2f_CUTOFF

The cutoff frequency (f_CUTOFF) of the LTC1069-1 is equal

to the clock frequency divided by 100. The gain at f_CUTOFF

is –0.7dB and the typical passband ripple is ±0.15dB

up to 0.9f_CUTOFF. The stopband attenuation of the

LTC1069-1 features a progressive elliptic response

reaching 20dB attenuation at 1.2f_CUTOFF, 52dB attenua-

–52dB at 1.4f_CUTOFF

–70dB at 2f_CUTOFF

Wide Dynamic Range

110µV

Wideband Noise

tion at 1.4f_CUTOFFand 70dB attenuation at 2f_CUTOFF

.

RMS

3.8mA Supply Current with ±5V Supplies

2.5mA Supply Current with Single 5V Supply

2mA Supply Current with Single 3.3V Supply

With ±5V supplies, the LTC1069-1 cutoff frequency can

be clock-tuned up to 12kHz; with a single 5V supply, the

maximum cutoff frequency is 8kHz.

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The low power feature of the LTC1069-1 does not penal-

izethedevice’sdynamicrange.With±5Vsuppliesandan

input range of 0.3V_RMSto 2.5V_RMS, the signal-to-(noise

+ THD) ratio is ≥70dB. The wideband noise of the

LTC1069-1 is 110µV_RMS. Other filter responses with

lower power or higher speed can be obtained. Please

contact LTC marketing for details.

PPLICATI

A

S

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Telecommunication Filters

Antialiasing Filters

■

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DESCRIPTIO

The LTC^®1069-1 is a monolithic 8th order lowpass filter

featuringclock-tunablecutofffrequencyand2.5mApower

supply current with a single 5V supply. An additional

feature of the LTC1069-1 is operation with a single 3.3V

supply.

The LTC1069-1 is available in 8-pin PDIP and 8-pin SO

packages.

, LTC and LT are registered trademarks of Linear Technology Corporation.

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TYPICAL APPLICATI

Frequency Response

10

0

–10

–20

–30

–40

–50

–60

–70

Single 3.3V Supply 3kHz Elliptic Lowpass Filter

1

2

3

4

8

7

6

5

+

AGND

V

OUT

0.47µF

3.3V

0.1µF

+

–

V

LTC1069-1

NC

f

CLK

V

CLK

IN

300kHz

1069-1 TA01

–80

1.5

3

6

7.5

4.5

FREQUENCY (kHz)

1069-1 TA02

1

LTC1069-1

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PACKAGE RDER I FOR ATIO

ABSOLUTE AXI U RATI GS

Total Supply Voltage (V⁺to V^–) ............................. 12V

Maximum Voltage at

ORDER PART

NUMBER

TOP VIEW

Any Pin ............................ (V^–– 0.3V) ≤ V ≤ (V⁺+ 0.3V)

Operating Temperature Range

AGND

1

2

3

4

8

7

6

5

V

OUT

–

+

LTC1069-1CN8

LTC1069-1CS8

LTC1069-1IN8

LTC1069-1IS8

V

NC

LTC1069-1C ........................................... 0°C to 70°C

LTC1069-1I ....................................... –40°C to 85°C

Storage Temperature Range ................ –65°C to 150°C

Lead Temperature (Soldering, 10 sec)................. 300°C

CLK

V

IN

N8 PACKAGE

8-LEAD PDIP

S8 PACKAGE

8-LEAD PLASTIC SO

S8 PART NUMBER

T_JMAX= 110°C, θ_JA= 100°C/W (N8)

T_JMAX= 110°C, θ_JA= 150°C/W (S8)

10691

10691I

Consult factory for Military grade parts.

ELECTRICAL CHARACTERISTICS

f_CUTOFFis the filter’s cutoff frequency and is equal to f_CLK/100. The f_CLKsignal level is TTL or CMOS (clock rise or fall time ≤ 1µs),

V_S= 3.3V to ±5V, R_L= 10k, T_A= 25°C, unless otherwise noted. All AC gains are measured relative to the passband gain.

PARAMETER

Passband Gain (f ≤ 0.25f

CONDITIONS

V = ±5V,

MIN

TYP

MAX

UNITS

)

f = 500kHz

CLK

–0.30

–0.35

0.2

0.70

0.75

dB

IN

CUTOFF

S

f

= 1.25kHz,

V

= 1V

●

TEST

IN

RMS

V = 3.3V,

f

V

= 200kHz

–0.30

–0.35

0.2

–0.03

0.04

0.70

0.75

dB

S

CLK

f

= 0.5kHz,

= 0.5V

TEST

IN

RMS

Gain at 0.50f

Gain at 0.75f

Gain at 0.90f

Gain at 0.95f

V = ±5V,

f

V

= 500kHz

–0.10

–0.11

0.10

0.11

dB

CUTOFF

S

CLK

f

= 2.5kHz,

= 1V

TEST

IN

RMS

V = 3.3V,

f

V

= 200kHz

–0.10

–0.11

0.10

0.11

dB

S

CLK

f

= 1kHz,

= 0.5V

TEST

IN

RMS

V = ±5V,

f

V

= 500kHz

–0.20

–0.25

0.20

0.25

dB

S

CLK

f

= 3.75kHz,

= 1V

TEST

IN

RMS

V = 3.3V,

f

V

= 200kHz

–0.20

–0.25

0.04

0.20

0.25

dB

S

CLK

f

= 1.5kHz,

= 0.5V

TEST

IN

RMS

V = ±5V,

f

V

= 500kHz

= 1VRMS

–0.20

–0.25

–0.01

–0.05

–0.04

–0.70

–0.61

–27

0.20

0.25

dB

S

CLK

f

= 4.5kHz,

TEST

IN

V = 3.3V,

f

V

= 200kHz

–0.20

–0.25

0.20

0.25

dB

S

CLK

f

= 1.8kHz,

= 0.5V

TEST

IN

RMS

V = ±5V,

f

V

= 500kHz

–0.30

–0.35

0.30

0.35

dB

S

CLK

f

= 4.75kHz,

= 1V

TEST

IN

RMS

V = 3.3V,

f

V

= 200kHz

–0.30

–0.35

0.30

0.35

dB

S

CLK

f

= 1.9kHz,

= 0.5V

TEST

IN

RMS

Gain at f

V = ±5V,

f

V

= 500kHz

–1.25

–1.35

–0.25

–0.15

dB

CUTOFF

S

CLK

f

= 5.0kHz,

= 1V

TEST

IN

RMS

V = 3.3V,

f

V

= 200kHz

–1.25

–1.35

–0.25

–0.15

dB

S

CLK

f

= 2.0kHz,

= 0.5V

TEST

IN

RMS

Gain at 1.25f

V = ±5V,

f

V

= 500kHz

–30

–31

–25

–24

dB

CUTOFF

S

CLK

f

= 6.25kHz,

= 1V

TEST

IN

RMS

V = 3.3V,

f

= 200kHz

–30

–31

–27

–25

–24

dB

S

CLK

f

= 2.5kHz,

V = 0.5V

IN RMS

TEST

2

LTC1069-1

ELECTRICAL CHARACTERISTICS

f_CUTOFFis the filter’s cutoff frequency and is equal to f_CLK/100. The f_CLKsignal level is TTL or CMOS (clock rise or fall time ≤ 1µs),

V_S= 3.3V to ±5V, R_L= 10k, T_A= 25°C, unless otherwise noted. All AC gains are measured relative to the passband gain.

PARAMETER

Gain at 1.50f

CONDITIONS

V = ±5V,

MIN

TYP

MAX

UNITS

f = 500kHz

CLK

–58

–59

–53

–50

–49

dB

CUTOFF

S

f

= 7.5kHz,

V

IN

= 1V

●

TEST

RMS

V = 3.3V,

f

V

= 200kHz

–58

–59

–53

–50

–49

dB

S

CLK

f

= 3kHz,

= 0.5V

TEST

IN

RMS

Output DC Offset (Input at AGND)

Output Voltage Swing

V = ±5V,

f

= 500kHz

= 400kHz

= 200kHz

30

20

15

150

mV

S

CLK

V = 4.75V,

S

V = 3.3V,

S

100

V = ±5V

●

–3.25

–1.50

–0.70

±4.0

±1.7

±0.9

3.25

1.25

0.60

V

S

V = 4.75V

S

V = 3.3

S

V

Power Supply Current

V = ±5V

f

= 500kHz

= 400kHz

= 200kHz

●

3.8

2.5

2.0

5.5

4.5

3.5

mA

S

CLK

V = 4.75V

S

V = 3.3

S

V

Maximum Clock Frequency

V = ±5V

1.2

0.8

0.5

MHz

S

V = 4.75V

S

V = 3.3V

S

Input Frequency Range

Input Resistance

0

f

/2

MHz

kΩ

V

CLK

30

43

70

Operating Power Supply Voltage

±1.57

±5.5

The

● denotes specificatons which apply over the full operating

temperature range.

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TYPICAL PERFORMANCE CHARACTERISTICS

Transition Band Gain vs

Passband Gain vs Frequency

Frequency

Stopband Gain vs Frequency

1.0

0.8

10

0

–70

–72

–74

–76

–78

–80

–82

–84

–86

–88

–90

V

f

= ±5V

CLK

= 5kHz

V

f

C

V

= ±5V

S

V

= ±5V

S

= 500kHz

CLK

f

= 500kHz

CLK

C

f

= 5kHz

C

= 5kHz

0.6

–10

–20

–30

–40

–50

–60

–70

–80

–90

V

= 2V

IN

RMS

IN

RMS

V

= 2V

IN

RMS

0.4

0.2

0

–0.2

–0.4

–0.6

–0.8

–1.0

5

6

7

8

9

10

11

11 12 13 14 15 16 17 18 19 20 21

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

FREQUENCY (kHz)

1069-1 G02

1069-1 G03

1069-1 G01

3

LTC1069-1

TYPICAL PERFORMANCE CHARACTERISTICS

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Passband Gain vs Clock

Frequency, V_S= Single 3.3V

Passband Gain vs Clock

Frequency, V_S= Single 5V

Passband Gain vs Clock

Frequency, V_S= ±5V

2.0

1.5

2.0

1.5

2.0

1.5

V

= SINGLE 3.3V

= 0.5V

V

= ±5V

S

IN

V

= SINGLE 5V

= 1.2V

S

IN

S

IN

= 2V

RMS

1.0

f

= 1.5MHz

= 15kHz

1.0

f

= 750kHz

f

= 1MHz

CLK

C

f

= 750kHz

= 7.5kHz

CLK

C

CLK

C

f

= 7.5kHz

f = 10kHz

C

f

0.5

0

f

C

= 1MHz

f

= 500kHz

CLK

C

f

= 10kHz

f

= 5kHz

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

f

= 500kHz

C

CLK

f

= 500kHz

C

CLK

f

= 5kHz

f

= 5kHz

1.5

2.5 3.5 4.5 5.5

FREQUENCY (kHz)

7.5

3

5

7

9

11

15

0.5

6.5

1.5 2.5 3.5 4.5 5.5

7.5 8.5 9.5 10.5

1

13

0.5

6.5

FREQUENCY (kHz)

1069-1 G04

1069-1 G06

1069-1 G05

Phase and Group Delay vs

Frequency

Transient Response

Gain vs Supply Voltage

10

0

–90

f

V

= 500kHz

V

f

C

= SINGLE 5V

= 500kHz

CLK

IN

S

CLK

= 5kHz

= 0.5V

RMS

f

–10

–20

–30

–40

–50

–60

–70

–80

–90

PHASE

–180

–270

–360

–450

–540

–630

–720

0.6

0.5

0.4

0.3

0.2

0.1

0

GROUP DELAY

V

= 3.3V

S

0.2ms/DIV

V

= 5V

S

V

_S= ±5V

V

7

= ±5V

f

_CLK= 1MHz

S

f_IN= 500Hz

1

2

3

4

5

7

1

3

5

9

11 13 15 17 19 21

0

6

4V_P-PSQUARE WAVE

1069-1 G09

FREQUENCY (kHz)

1069-1 G07

1069-1 G08

Dynamic Range

THD + Noise vs V_IN(V_RMS

)

THD + Noise vs Frequency

–40

–45

–50

–55

–60

–65

–70

–75

–80

–85

–90

–40

–45

–50

–55

–60

–65

–70

–75

–80

–85

–90

–60

–62

–64

–66

–68

–70

–72

–74

–76

–78

–80

f

= 500kHz

f

= 500kHz

f

= 500kHz

CLK

IN

CLK

V = 300mV

IN

= 1kHz

RMS

V

=

V =

S

5V

±5V

V

IN

= 3.3V

S

V

= 3.3V

V

S

= ±5V

S

V

= 0.5V

RMS

V

= 3.3V

S

V

= 5V

S

V

= 5V

RMS

S

V

= 1V

IN

V

IN

= ±5V

S

V

= 2V

RMS

1.0

0.65 1.22

INPUT VOLTAGE (V

2.0

2.67

1

2

3

4

5

0.1

0.3

5.0

1

2

3

4

5

INPUT FREQUENCY (kHz)

)

RMS

1069-1 G12

1069-1 G10

1069-1 G11

4

LTC1069-1

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TYPICAL PERFORMANCE CHARACTERISTICS

Output Voltage Swing vs

Temperature

Supply Current vs Clock

Supply Current vs Supply Voltage

Frequency

5

4

3

2

1

0

5

4

f

= 10Hz

5.0

4.5

4.0

3.5

3.0

2.5

2.0

CLK

V

= ±5V

S

3

V

= ±2.5V

S

V

= ±5V

S

2

25°C

1

V

= ±1.57V

S

0

85°C

–40°C

V

S

V

= 5V

S

–1

–2

–3

–4

–5

V

= ±2.5V

S

V

= 3.3V

S

V

= ±5V

S

–40 –20

0

20

40

60

80

0.5

0.6 0.7 0.8 0.9 1.0 1.2

0.1

0.4

0

1

3

4

5

6

0.2 0.3

2

TOTAL SUPPLY VOLTAGE (±V)

CLOCK FREQUENCY (MHz)

AMBIENT TEMPERATURE (°C)

1069-1 G15

1069-1 G14

1069-1 G13

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PIN FUNCTIONS

V⁺, V^–(Pins 2, 7): Power Supply Pins. The V⁺(Pin 2) and

the V^–(Pin 7) should be bypassed with a 0.1µF capacitor

to an adequate analog ground. The filter’s power supplies

should be isolated from other digital or high voltage

analog supplies. A low noise linear supply is recom-

mended. Using switching power supplies will lower the

signal-to-noise ratio of the filter. Unlike previous mono-

lithic filters, the power supplies can be applied at any

order, that is, the positive supply can be applied before the

negative supply and vice versa. Figure 2 shows the con-

nection for dual supply operation.

AGND (Pin 1): Analog Ground. The quality of the analog

signal ground can affect the filter performance. For either

single or dual supply operation, an analog ground plane

surrounding the package is recommended. The analog

ground plane should be connected to any digital ground at

a single point. For dual supply operation Pin 1 should be

connected to the analog ground plane.

For single supply operation Pin 1 should be bypassed to the

analog ground plane with a 0.47µF or larger capacitor. An

internal resistive divider biases Pin 1 to 1/2 the total power

supply. Pin 1 should be buffered if used to bias other ICs.

Figure1showstheconnectionsforsinglesupplyoperation.

1

2

3

4

8

7

6

5

1

2

3

4

8

7

6

5

AGND

V

OUT

AGND

V

OUT

0.47µF

+

–

+

–

V

LTC1069-1

0.1µF

NC

V

CLK

V

IN

V

CLK

IN

ANALOG GROUND PLANE

STAR

SYSTEM

GROUND

DIGITAL

GROUND

PLANE

STAR

SYSTEM

GROUND

DIGITAL

GROUND

PLANE

1k

CLOCK

SOURCE

CLOCK

SOURCE

1069-1 F01

1069-1 F02

Figure 2. Connections for Dual Supply Operation

Figure 1. Connections for Single Supply Operation

5

LTC1069-1

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PIN FUNCTIONS

NC (Pins 3, 6): No Connection. Pins 3 and 6 are not

connected to any internal circuity; they should be prefer-

ably tied to ground.

fall is 1µs. The clocksignal should be routed from the right

side of the IC package to avoid coupling into any input or

output analog signal path. A 1k resistor between the clock

source and the clock input pin (5) will slow down the rise

and fall times of the clock to further reduce charge cou-

pling, Figure 1.

V_IN(Pin 4): Filter Input Pin. The filter input pin is internally

connected to the inverting input of an op amp through a

43k resistor.

Table 1. Clock Source High and Low Thresholds

CLK (Pin 5): Clock Input Pin. Any TTL or CMOS clock

source with a square wave output and 50% duty cycle

(±10%) is an adequate clock source for the device. The

power supply for the clock source should not necessarily

be the filter’s power supply. The analog ground of the filter

should be connected to clock’s ground at a single point

only. Table 1 shows the clock’s low and high level thresh-

old value for a dual or a single supply operation. A pulse

generator can be used as a clock source provided the high

level ON time is greater than 0.42µs (V_S= ±5V). Sine

waves less than 100kHz are not recommended for clock

signal because excessive slow clock rise or fall times

generate internal clock jitter. The maximum clock rise or

POWER SUPPLY

HIGH LEVEL

1.5V

LOW LEVEL

0.5V

Dual Supply = ±5V

Single Supply = 10V

Single Supply = 5V

Single Supply = 3.3V

6.5V

1.5V

1.2V

5.5V

0.5V

V_OUT(Pin 8): Filter Output Pin. Pin 8 is the output of the

filter and it can source or sink 1mA. Driving coaxial cables

or resistive loads less than 20k will degrade the total

harmonic distortion of the filter. When evaluating the

device’s dynamic range, a buffer is required to isolate the

filter’s output from coax cables and instruments.

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APPLICATIONS INFORMATION

Temperature Behavior

especially at ±5V supply, has a passband behavior which

is nearly temperature independent.

The power supply current of the LTC1069-1 has a positive

temperature coefficient. The GBW product of its internal

op amps is nearly constant and the speed of the device

doesnotdegradeathightemperatures. Figures3a, 3band

3c show the behavior of the maximum passband of the

device for various supplies and temperatures. The filter,

Clock Feedthrough

The clock feedthrough is defined as the RMS value of the

clock frequency and its harmonics that are present at the

filter’s output pin (8). The clock feedthrough is tested with

2.0

1.5

2.0

1.5

V

CLK

V

= ±5V

S

V

f

IN

= 3.3V

V

f

= 5V

S

1.5

1.0

f

= 1.5MHz

= 750kHz

= 1MHz

CLK

= 0.5V

RMS

CLK

= 1.2V

RMS

= 2V

RMS

IN

V

IN

T

= 25°C

A

1.0

T = 85°C

A

1.0

T

= 25°C

A

T

= 85°C

0.5

T

= 85°C

A

0.5

T

= –40°C

A

0

T

= 25°C

A

0

T

= –40°C

A

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

T

= –40°C

A

3

5

7

9

11

15

1

13

1.5

2.5 3.5 4.5 5.5

FREQUENCY (kHz)

7.5

0.5

6.5

1.5 2.5 3.5 4.5 5.5

7.5 8.5 9.5 10.5

6.5

0.5

FREQUENCY (kHz)

1069-1 F03c

1069-1 F03a

1069-1 F03b

Figure 3a

Figure 3b

Figure 3c

6

LTC1069-1

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APPLICATIONS INFORMATION

the input pin (4) shorted to the AGND pin and depends on

PC board layout and on the value of the power supplies.

With proper layout techniques the values of the clock

feedthrough are shown on Table 2.

supplyvoltage(seeTable3). Theclockfeedthroughspeci-

fications are not part of the wideband noise.

Table 3. Wideband Noise

V

WIDEBAND NOISE

S

3.3V

5V

±5V

100µV

108µV

112µV

Table 2. Clock Feedthrough

RMS

V

CLOCK FEEDTHROUGH

S

3.3V

5V

10µV

40µV

RMS

Aliasing

±5V

160µV

RMS

Aliasing is an inherent phenomenon of sampled data

systems and it occurs for input frequencies approaching

the sampling frequency. The internal sampling frequency

of the LTC1069-1 is 100 times its cutoff frequency. For

instance, if a 98kHz, 100mV_RMSsignal is applied at the

input of an LTC1069-1 operating with a 100kHz clock, a

2kHz, 28µV_RMSalias signal will appear at the filter output.

Table 4 shows details.

Any parasitic switching transients during the rise and fall

edges of the incoming clock are not part of the clock

feedthroughspecifications.Switchingtransientshavefre-

quency contents much higher than the applied clock; their

amplitude strongly depends on scope probing techniques

as well as grounding and power supply bypassing. The

clock feedthrough can be reduced, if bothersome, by

addingasingleRClowpassfilterattheoutputpin(8)ofthe

LTC1069-1.

Table 4. Aliasing (f_CLK= 100kHz)

INPUT FREQUENCY

(V = 1V

OUTPUT LEVEL

(Relative to Input)

(dB)

OUTPUT FREQUENCY

(Aliased Frequency)

(kHz)

)

RMS

IN

Wideband Noise

(kHz)

/f = 100:1, f = 1kHz

CUTOFF

f

The wideband noise of the filter is the total RMS value of

the device’s noise spectral density and determines the

operating signal-to-noise ratio. Most of the wideband

noise frequency contents lie within the filter passband.

The wideband noise cannot be reduced by adding post

filtering. Thetotalwidebandnoiseisnearlyindependentof

the clock frequency and depends slightly on the power

CLK

C

96 (or 104)

97 (or 103)

98 (or 102)

985. (or 101.5)

99 (or 101)

99.5 (or 100.5)

–90.0

–86.0

–71.0

–56.0

–1.1

4.0

3.0

2.0

1.5

1.0

0.5

–0.21

U

TYPICAL APPLICATIONS

Single 3.3V Supply Operation with Output Buffer

Single 5V Operation with Power Shutdown

3.3V

5V

SHUTDOWN

ON

CMOS LOGIC

0.1µF

1

2

3

4

8

7

6

5

AGND

V

OUT

1

2

3

4

8

AGND

V

OUT

+

–

0.47µF

0.1µF

V

7

6

5

1/2 LT1366

+

–

V

OUT

V

LTC1069-1

NC

0.1µF

LTC1069-1

NC

–

NC

f

≤

CLK

750kHz

5V

V

IN

V

CLK

IN

f

CLK

500kHz

3.3V

0V

1069-1 TA05

0V

V

CLK

IN

1069-1 TA04

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

7

LTC1069-1

U

TYPICAL APPLICATIONS

Dual Supply Operation

–45

–50

–55

–60

f

IN

= 1kHz

1

8

7

6

5

AGND

V

OUT

2

3

4

+

–

5V

0.1µF

V

–5V

–65

–70

–75

LTC1069-1

NC

0.1µF

NC

f

CLK

500kHz

5V

0V

V

CLK

IN

f

= 5kHz

C

–80

–85

0.1

1

3

INPUT VOLTAGE (V

)

RMS

1069-1 TA03

U

Dimensions in inches (millimeters) unless otherswise noted.

PACKAGE DESCRIPTION

N8 Package

8-Lead PDIP (Narrow 0.300)

(LTC DWG # 05-08-1510)

0.400*

(10.160)

MAX

0.130 ± 0.005

0.300 – 0.325

0.045 – 0.065

(3.302 ± 0.127)

(1.143 – 1.651)

(7.620 – 8.255)

8

1

7

6

5

0.065

(1.651)

TYP

0.255 ± 0.015*

(6.477 ± 0.381)

0.009 – 0.015

(0.229 – 0.381)

0.125

0.005

(0.127)

MIN

0.015

(0.380)

MIN

(3.175)

MIN

+0.025

–0.015

2

4

3

0.325

+0.635

8.255

(

)

–0.381

0.100 ± 0.010

(2.540 ± 0.254)

0.018 ± 0.003

(0.457 ± 0.076)

N8 0695

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)

S8 Package

8-Lead Plastic Small Outline (Narrow 0.150)

(LTC DWG # 05-08-1610)

0.189 – 0.197*

(4.801 – 5.004)

0.010 – 0.020

(0.254 – 0.508)

7

5

8

6

× 45°

0.053 – 0.069

(1.346 – 1.752)

0.004 – 0.010

(0.101 – 0.254)

0.008 – 0.010

(0.203 – 0.254)

0°– 8° TYP

0.150 – 0.157**

(3.810 – 3.988)

0.228 – 0.244

(5.791 – 6.197)

0.016 – 0.050

0.406 – 1.270

0.050

(1.270)

BSC

0.014 – 0.019

(0.355 – 0.483)

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**

DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

SO8 0695

1

2

3

4

RELATED PARTS

PART NUMBER

LTC1068

DESCRIPTON

COMMENTS

User-Configurable, SSOP Package

50:1 f /f Ratio, 8-Pin SO Package

Very Low Noise, High Accuracy, Quad Universal Filter Building Block

Single Supply, Very Low Power, Elliptic LPF

Low Power 8th Order Butterworth LPF

Low Power 8th Order Elliptic LPF

Low Power 8th Order Linear Phase LPF

LTC1069-6

LTC1164-5

LTC1164-6

LTC1164-7

CLK

C

100:1 and 50:1 f /f Ratio

CLK

C

100:1 and 50:1 f /f Ratio

CLK C

100:1 and 50:1 f /f Ratio

CLK

C

LT/GP 1196 7K • PRINTED IN USA

Linear Technology Corporation

●

1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900

8

●

FAX: (408) 434-0507 TELEX: 499-3977 www.linear-tech.com

LINEAR TECHNOLOGY CORPORATION 1996


型号：	LTC1069-1CS8
厂家：	Linear
描述：	Low Power, 8th Order Progressive Elliptic, Lowpass Filter 低功耗， 8阶渐进椭圆，低通滤波器有源滤波器过滤器光电二极管 LTE
文件：	总8页 (文件大小：242K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC1069-1CS8 [Linear]

相关型号：

LTC1069-1CS8#PBF

LTC1069-1CS8#TR

LTC1069-1CS8#TRPBF

LTC1069-1I

LTC1069-1IN8

LTC1069-1IN8#PBF

LTC1069-1IS8

LTC1069-1IS8#PBF

LTC1069-1IS8#TR

LTC1069-1IS8#TRPBF

LTC1069-6

LTC1069-6C