LTC1096L [Linear]
Low Voltage, Micropower Sampling 8-Bit Serial I/O A/D Converters; 低电压，微功耗采样8位串行I / OA / D转换器
| 型号： | LTC1096L |
| 厂家： | 
Linear |
| 描述： | Low Voltage, Micropower Sampling 8-Bit Serial I/O A/D Converters |
| 文件： | 总8页 (文件大小：214K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Final Electrical Specifications
LTC1096L/LTC1098L
Low Voltage, Micropower
Sampling 8-Bit Serial I/O
A/D Converters
December 1995
U
DESCRIPTIO
EATURE
S
F
The LTC®1096L/LTC1098L are 3V micropower, 8-bit suc-
cessive approximation sampling A/D converters. They
typically draw only 40µA of supply current when convert-
ing and automatically power down to a typical supply
currentof1nAbetweenconversions.Theyarepackagedin
8-pin SO packages and operate on a 3V supply. These 8-
bit, switched capacitor, successive approximation ADCs
include a sample-and-hold. The LTC1096L has a single
differential analog input. The LTC1098L offers a software
selectable 2-channel multiplexed input.
■
■
■
■
■
■
■
■
Specified at 2.65V Minimum Supply
Maximum Supply Current: 80µA
Auto Shutdown to 1nA
8-Pin SO Package
On-Chip Sample-and-Hold
Conversion Time: 32µs
Sample Rates: 16.5ksps
I/O Compatible with SPI, MICROWIRETM, etc.
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PPLICATI
S
A
■
■
■
■
■
On-chip serial ports allow efficient data transfer to a wide
rangeofmicroprocessorsandmicrocontrollersoverthree
wires.This,coupledwithmicropowerconsumption,makes
remote location possible and facilitates transmitting data
through isolation barriers.
Battery-Operated Systems
Remote Data Acquisition
Isolated Data Acquisition
Battery Monitoring
Temperature Measurement
Thecircuitscanbeusedinratiometricapplicationsorwith
an external reference. The high impedance analog inputs
and the ability to operate with reduced spans (to 1V full
scale) allow direct connection to sensors and transducers
in many applications, eliminating the need for gain stages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
MICROWIRE is a registered trademark of National Semiconductor Corporation.
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O
TYPICAL APPLICATI
10µW, SO-8 Package, 8-Bit A/D Converter
Samples at 200Hz and Runs Off a 3V Battery
Supply Current vs Sample Rate
1000
1µF
3V
100
MPU
1
2
3
4
8
CS/
SHDN
+IN
V
CC
SERIAL DATA LINK
(MICROWIRE AND
SPI COMPATIBLE)
7
6
5
10
1
ANALOG INPUT
0V TO 3V RANGE
CLK
LTC1096L
–IN
D
OUT
SERIAL DATA LINK
GND
V
REF
1096/8 TA01
0.1
1
10
100
SAMPLE FREQUENCY (kHz)
1096/8 TA02
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
1
LTC1096L/LTC1098L
W W W
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ABSOLUTE AXI U RATI GS
(Notes 1 and 2)
Operating Temperature
Supply Voltage (VCC) to GND................................... 12V
LTC1096LAC/LTC1098LAC .................... 0°C to 70°C
LTC1096LAI/LTC1098LAI .................. –40°C to 85°C
LTC1096LC/LTC1098LC......................... 0°C to 70°C
LTC1096LI/LTC1098LI ....................... –40°C to 85°C
Storage Temperature Range ................. –65°c to 150°C
Lead Temperature (Soldering, 10 sec.)................ 300°C
Voltage
Analog and Reference ................ –0.3V to VCC + 0.3V
Digital Inputs......................................... –0.3V to 12V
Digital Outputs ........................... –0.3V to VCC + 0.3V
Power Dissipation.............................................. 500mW
W
U
/O
PACKAGE RDER I FOR ATIO
(Note 3)
ORDER PART
NUMBER
ORDER PART
NUMBER
TOP VIEW
TOP VIEW
LTC1098LACS8
LTC1098LAIS8
LTC1098LCS8
LTC1098LIS8
LTC1096LACS8
CS/
SHDN
+IN
CS/
1
2
3
4
8
7
6
5
V
1
2
3
4
8
7
6
5
V
(V
CC
CC REF)
SHDN
LTC1096LAIS8
LTC1096LCS8
LTC1096LIS8
CLK
D
CH0
CH1
GND
CLK
D
–IN
OUT
OUT
V
D
IN
GND
REF
S8 PART MARKING
098LIA
S8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
S8 PACKAGE
8-LEAD PLASTIC SO
096LIA
1096LA
1096LI
1096L
TJMAX = 150°C, θJA = 175°C/W
T
JMAX = 150°C, θJA = 175°C/W
1098LA
1098LI
1098L
Consult factory for Military grade parts.
W W U
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RECO E DED OPERATI G CO DITIO S
SYMBOL
PARAMETER
CONDITIONS
MIN
2.65
25
TYP
MAX
4.0
UNITS
V
f
Supply Voltage
Clock Frequency
Total Cycle Time
V
CC
V
= 2.65V
250
kHz
CC
CLK
CYC
t
LTC1096L, f
LTC1098L, f
= 250kHz
= 250kHz
58
58
µs
µs
CLK
CLK
t
t
Hold Time, D After CLK↑
V
= 2.65V
450
ns
IN
CC
hDI
Setup Time CS↓ Before First CLK↑ (See Operating Sequence)
V
V
= 2.65V, LTC1096L
= 2.65V, LTC1098L
1
1
µs
µs
CC
CC
suCS
t
Wakeup Time CS↓ Before First CLK↓ After First CLK↑
(See Figure 1, LTC1096L Operating Sequence)
V
= 2.65V, LTC1096L
10
µs
WAKEUP
CC
Wakeup Time CS↓ Before MSBF Bit CLK↓
V
= 2.65V, LTC1098L
10
µs
CC
(See Figure 2, LTC1098L Operating Sequence)
t
t
t
t
t
Setup Time, D Stable Before CLK↑
V
V
V
V
= 2.65V
= 2.65V
= 2.65V
= 2.65V
1
µs
µs
µs
µs
suDI
IN
CC
CC
CC
CC
CLK High Time
1.6
1.6
2
WHCLK
WLCLK
WHCS
WLCS
CLK Low Time
CS High Time Between Data Transfer Cycles
CS Low Time During Data Transfer
LTC1096L, f
LTC1098L, f
= 250kHz
= 250kHz
56
56
µs
µs
CLK
CLK
2
LTC1096L/LTC1098L
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CO VERTER A D ULTIPLEXER CHARACTERISTICS
VCC = 2.65V, VREF = 2.5V, fCLK = 250kHz, unless otherwise noted.
LTC1096LA/LTC1098LA
LTC1096L/LTC1098L
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Bits
LSB
LSB
LSB
LSB
V
Resolution (No Missing Code)
Offset Error
●
●
●
●
●
8
8
(Note 4)
±0.5
±0.5
±0.5
±1
±1
±1
Linearity Error
Full Scale Error
±1
Total Unadjusted Error (Note 5)
Analog Input Range
REF Input Range (Note 6)
Analog Input Leakage Current
U
V
REF
= 2.5V
±1.5
–0.05V to V + 0.05V
(Note 6)
CC
2.65 ≤ V ≤ 4.0V
V
–0.05V to V + 0.05V
CC
CC
(Note 7)
●
±1
±1
µA
D
A
ELECTRICAL CHARACTERISTICS
DC
DIGITAL
VCC = 2.65V, VREF = 2.5V, fCLK = 250kHz, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
IH
V
IL
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
High Level Output Voltage
V
V
V
V
V
= 3.6V
●
●
●
●
1.9
CC
CC
IN
= 2.65V
0.45
2.5
V
I
I
= V
µA
µA
IH
IL
CC
= 0V
–2.5
IN
V
OH
= 2.65V, I = 10µA
●
●
2.4
2.1
2.64
2.50
V
V
CC
O
I = 360µA
O
V
Low Level Output Voltage
Hi-Z Output Leakage
Output Source Current
Output Sink Current
Reference Current
V
= 2.65V, I = 400µA
●
●
0.3
V
µA
OL
CC
O
I
I
I
I
CS =High
±3
OZ
V
V
= 0V
–10
15
mA
mA
SOURCE
SINK
OUT
OUT
= V
CC
CS = V
●
●
●
0.001 2.5
3.500 7.5
µA
µA
µA
REF
CC
t
t
≥ 200µs, f
≤ 50kHz
CLK
= 250kHz
CYC
CYC
= 58µs, f
35.00
50.0
CLK
I
Supply Current
CS = V
●
0.001
± 3
µA
CC
CC
LTC1096L,
t
t
≥ 200µs, f
≤ 50kHz
= 250kHz
●
●
40
120
80
180
µA
µA
CYC
CYC
CLK
= 58µs, f
CLK
LTC1098L,
t
t
≥ 200µs, f
≤ 50kHz
= 250kHz
●
●
44
155
88
230
µA
µA
CYC
CYC
CLK
= 58µs, f
CLK
3
LTC1096L/LTC1098L
AC CHARACTERISTICS
VCC = 2.65V, VREF = 2.5V, fCLK = 250kHz, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t
f
t
t
t
t
t
t
t
Analog Input Sample Time
Maximum Sampling Frequency
Conversion Time
See Operating Sequences
1.5
CLK Cycles
SMPL
●
16.5
kHz
SMPL(MAX)
See Operating Sequences
See Test Circuits
8
CLK Cycles
CONV
dDO
dis
en
Delay Time, CLK↓ to D
Data Valid
●
●
●
500
220
160
400
70
1000
800
ns
ns
ns
ns
ns
ns
OUT
Delay Time, CS↑ to D
Hi-Z
See Test Circuits
OUT
Delay Time, CLK↓ to D
Enable
See Test Circuits
480
OUT
Time Output Data Remains Valid After CLK↓
C
LOAD
= 100pF
hDO
f
D
D
Fall Time
See Test Circuits
See Test Circuits
●
●
250
200
OUT
OUT
Rise Time
50
r
C
IN
Input Capacitance
Analog Inputs On Channel
Off Channel
25
5
pF
pF
Digital Input
5
pF
The
●
denotes specifications which apply over the full operating
Note 6: Two on-chip diodes are tied to each reference and analog input
temperature range.
which will conduct for reference or analog input voltages one diode drop
below GND or one diode drop above V . This spec allows 50mV forward
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
CC
bias of either diode for 2.65V ≤ V ≤ 3.6V. This means that as long as the
CC
reference or analog input does not exceed the supply voltage by more than
50mV, the output code will be correct. To achieve an absolute 0V to 3V
input voltage range will therefore require a minimum supply voltage of
2.950V over initial tolerance, temperature variations and loading.
Note 2: All voltage values are with respect to GND.
Note 3: This device is specified at 2.65V. Consult factory for 5V specified
devices.
Note 4: Linearity error is specified between the actual end points of the
A/D transfer curve.
Note 7: Channel leakage current is measured after the channel selection.
Note 5: Total unadjusted error includes offset, full scale, linearity,
multiplexer and hold step errors.
U
U
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PI FU CTIO S
LTC1096L
DOUT (Pin 6): Digital Data Output. The A/D conversion
result is shifted out of this output.
CS/SHDN (Pin 1): Chip Select Input. A logic low on this
input enables the LTC1096L. A logic high on this input
disables the LTC1096L and disconnects the power to the
LTC1096L.
IN+ (Pin 2): Analog Input. This input must be free of noise
with respect to GND.
CLK(Pin7):ShiftClock.Thisclocksynchronizestheserial
data transfer.
VCC (Pin 8): Power Supply Voltage. This pin provides
power to the A/D converter. It must be free of noise and
ripple by bypassing directly to the analog ground plane.
IN– (Pin 3): Analog Input. This input must be free of noise
with respect to GND.
LTC1098L
CS/SHDN (Pin 1): Chip Select Input. A logic low on this
input enables the LTC1098L. A logic high on this input
disables the LTC1098L and disconnects the power to the
LTC1098L.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
VREF (Pin 5): Reference Input. The reference input defines
the span of the A/D converter and must be kept free of
noise with respect to GND.
CHO(Pin2):AnalogInput.Thisinputmustbefreeofnoise
with respect to GND.
4
LTC1096L/LTC1098L
U
U
U
PI FU CTIO S
CH1(Pin3):AnalogInput. Thisinputmustbefreeofnoise
with respect to GND.
DOUT (Pin 6): Digital Data Output. The A/D conversion
result is shifted out of this output.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
CLK(Pin7): ShiftClock. Thisclocksynchronizestheserial
data transfer.
DIN (Pin 5): Digital Data Input. The multiplexer address is
shifted into this pin.
VCC (VREF) (Pin 8): Power Supply Voltage. This pin pro-
vides power and defines the span of the A/D converter. It
must be free of noise and ripple by bypassing directly to
the analog ground plane
TEST CIRCUITS
Load Circuit for tdDO, tr and tf
Voltage Waveforms for DOUT Rise and Fall Times, tr, tf
1.4V
V
OH
3k
D
OUT
V
OL
D
TEST POINT
OUT
100pF
t
r
t
LTC1096/98 • TC02
f
LTC1096/98 • TC01
Load Circuit for tdis and ten
Voltage Waveforms for tdis
V
IH
CS
TEST POINT
D
OUT
90%
10%
V
t
WAVEFORM 2, t
WAVEFORM 1
(SEE NOTE 1)
CC dis
en
3k
D
OUT
t
dis
t
WAVEFORM 1
dis
100pF
D
OUT
WAVEFORM 2
(SEE NOTE 2)
LTC1096/98 • TC03
NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL.
NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL.
LTC1096/98 • TC04
Voltage Waveforms for DOUT Delay Time, tdDO
CLK
V
IL
t
dDO
V
V
OH
D
OUT
OL
LTC1096/98 • TC05
5
LTC1096L/LTC1098L
TEST CIRCUITS
Voltage Waveforms for ten
LTC1096L
CS
t
WAKEUP
1
CLK
B7
D
OUT
V
OL
t
en
LTC1096/98 • TC06
LTC1098L
CS
START
D
IN
1
2
3
4
5
CLK
B7
D
OUT
V
OL
t
en
LTC1096/98 • TC07
O U
S
W
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PPLICATI
A
I FOR ATIO
INPUT DATA WORD
Start Bit
The LTC1096L requires no DIN word. It is permanently
configured to have a single differential input. The conver-
sion result, in which the output on the DOUT line is
presented in MSB-first sequence followed by LSB se-
quence, provides easy interface to MSB- or LSB-first
serial ports.
The first “logical one” clocked into the DIN input after CS
goes low is the start bit. The start bit initiates the data
transfer. The LTC1098L will ignore all leading zeroes
which precede this logical one. After the start bit is
received, the remaining bits of the input word will be
clocked in. Further inputs on the DIN pin are then ignored
until the next CS cycle.
The LTC1098Llatches data into the DIN input on the rising
edge of the clock. The input data words are defined as
follows:
Multiplexer (MUX) Address
The bits of the input word following the START bit assign
the MUX configuration for the requested conversion. For
a given channel selection, the converter will measure the
voltage between the two channels indicated by the “+” and
“–” signs in the selected row of the following tables. In
SGL/ ODD/
DIFF SIGN
START
MSBF
MUX MSB-FIRST/
ADDRESS LSB-FIRST
LTC1096/9 • AI01
6
LTC1096L/LTC1098L
O U
W
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PPLICATI
A
S I FOR ATIO
single-ended mode, all input channels are measured with
not use wire wrapping techniques to breadboard and
evaluate the device. To achieve the optimum performance
use a printed circuit board. The GND pin (Pin 4) should be
tied directly to the ground plane with minimum lead
length.
respect to GND.
LTC1098L Channel Selection
MUX ADDRESS
SGL/DIFF ODD/SIGN
CHANNEL #
CH0 CH1 GND
1
0
+
–
–
Bypassing
1
0
0
1
0
1
+
–
+
+
–
For good performance, the LTC1096L/LTC1098L VCC and
V
REF pins must be free of noise and ripple. Any changes in
LTC1096/8 • AI02
theVCC andVREF voltagewithrespecttogroundduringthe
conversion cycle can induce errors or noise in the output
code. Bypass the VCC and VREF pins directly to the analog
ground plane with a minimum 0.1µF capacitor and with
leads as short as possible. The LTC1098L combines VCC
and VREF into one pin, VCC(VREF), which can be bypassed
by a 0.1µF capacitor.
MSB-First/LSB-First (MSBF)
The output data of the LTC1098L is programmed for
MSB-first or LSB-first sequence using the MSBF bit.
When the MSBF bit is a logical one, data will appear on
theD
lineinMSB-firstformat. Logicalzeroeswillbe
OUT
filled in indefinitely following the last data bit. When the
MSBF bit is a logical zero, LSB-first data will follow the
normal MSB-first data on the D
and 2).
Analog Inputs
line (see Figures 1
OUT
Because of the capacitive redistribution A/D conversion
techniques used, the analog inputs of the LTC1096L/
LTC1098L have capacitive switching input current spikes.
These current spikes settle quickly and do not cause a
problem. Butiflargesourceresistancesareusedorifslow
settling op amps drive the inputs, take care to ensure the
transients caused by the current spikes settle completely
before the conversion begins.
ANALOG CONSIDERATIONS
Grounding
The LTC1096L/LTC1098L should be used with an analog
ground plane and single point grounding techniques. Do
t
CYC
CS
POWER
DOWN
CLK
t
suCS
NULL
BIT
t
WAKEUP
Hi-Z
B0
B7
B5
B4 B3
B2 B1
B1
B2
B3
B5 B6
B7
B6
B4
D
Hi-Z
OUT
FILLED
WITH
ZEROES
t
CONV
LTC1096/98 F01
Figure 1. LTC1096L Operating Sequence
7
LTC1096L/LTC1098L
O U
W
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PPLICATI
A
S I FOR ATIO
MSB-FIRST DATA (MSBF = 0)
t
CYC
CS
POWER
DOWN
t
WAKEUP
CLK
t
suCS
ODD/
SIGN
START
D
IN
DON'T CARE
MSBF
NULL
SGL/
DIFF
Hi-Z
D
OUT
B7
B5
t
B4 B3
B2 B1
B0
B1
B2
B3
B5 B6
B7
B6
B4
BIT
Hi-Z
FILLED
WITH
ZEROES
t
SMPL
CONV
LTC1096/98 F02
Figure 2. LTC1098L Operating Sequence Example: Differential Inputs (CH+, CH–)
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
5
8
6
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
1
3
4
2
*
SO8 0695
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1096/LTC1098 8-Pin SO, Micropower 8-Bit ADC
LTC1196/LTC1198 8-Pin SO, 1Msps 8-Bit ADC
Low Power, Small Size, Low Cost
Low Power, Small Size, Low Cost
12-Bit ADC in SO-8
LTC1285/LTC1288 8-Pin SO, 3V Micropower 12-Bit ADC
LTC1289
Multiplexed 3V 12-Bit ADC
Multiplexed 3V 12-Bit ADC
8-Channel 12-Bit Serial I/O
LTC1584L
4-Channel 12-Bit Serial I/O, Micropower
LT/GP 1295 5K REV A • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1995
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
8
●
●
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
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SI9137LG
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SI9122E
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