LTC1154CS8#PBF [Linear]
LTC1154 - High-Side Micropower MOSFET Driver; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C;型号: | LTC1154CS8#PBF |
厂家: | Linear |
描述: | LTC1154 - High-Side Micropower MOSFET Driver; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C 驱动器 接口集成电路 光电二极管 |
文件: | 总16页 (文件大小:334K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC1154
High-Side Micropower
MOSFET Driver
U
DESCRIPTIO
EATURE
S
F
■
■
■
■
■
■
■
■
■
Fully Enhances N-Channel Power MOSFETs
8µA IQ Standby Current
TheLTC1154singlehigh-sidegatedriverallowsusinglow
cost N-channel FETs for high-side switching applications.
An internal charge pump boosts the gate drive voltage
above the positive rail, fully enhancing an N-channel MOS
switch with no external components. Micropower opera-
tion, with 8µA standby current and 85µA operating cur-
rent, allows use in virtually all systems with maximum
efficiency.
85µA IQ ON Current
No External Charge Pump Capacitors
4.5V to 18V Supply Range
Short-Circuit Protection
Thermal Shutdown via PTC Thermistor
Status Output Indicates Shutdown
Available in 8-Pin SOIC
Included on chip is programmable over-current sensing.
A time delay can be added to prevent false triggering on
high in-rush current loads. An active high shutdown input
is also provided and interfaces directly to a standard PTC
thermistor for thermal shutdown. An open-drain output is
provided to report switch status to the µP. An active low
enable input is provided to control multiple switches in
banks.
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PPLICATI
S
A
■
■
■
■
■
■
Laptop Computer Power Switching
SCSI Termination Power Switching
Cellular Telephone Power Management
Battery Charging and Management
High-Side Industrial and Automotive Switching
Stepper Motor and DC Motor Control
The LTC1154 is available in both 8-pin DIP and 8-pin SOIC
packages.
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TYPICAL APPLICATI
Ultra-Low Voltage Drop High-Side Switch
with Short-Circuit Protection
Standby Supply Current
50
5V
V
J
= 0V
IN
51k
45
40
35
30
25
20
15
10
5
0.036Ω*
0.1µF**
2.7A MAX
T
= 25°C
IN
V
S
200k**
µP
EN
DS
G
LTC1154
STATUS
IRLR024
GND
SD
5V
LOAD
LTC1154 • TA01
0
ALL COMPONENTS SHOWN ARE SURFACE MOUNT.
* IMS026 INTERNATIONAL MANUFACTURING SERVICE, INC. (401) 683-9700
** NOT REQUIRED IF LOAD IS RESISTIVE OR INDUCTIVE.
0
5
10
15
20
SUPPLY VOLTAGE (V)
LTC1153 • TA02
1
LTC1154
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ABSOLUTE AXI U RATI GS
Current (Any Pin).................................................. 50mA
Operating Temperature
LTC1154C .............................................. 0°C to 70°C
Storage Temperature Range ................. –65°c to 150°C
Lead Temperature (Soldering, 10 sec.)................ 300°C
Supply Voltage ........................................................ 22V
Input Voltage ..................... (VS + 0.3V) to (GND – 0.3V)
Enable Input Voltage.......... (VS + 0.3V) to (GND – 0.3V)
Gate Voltage ....................... (VS + 24V) to (GND – 0.3V)
Status Output Voltage.............................................. 15V
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PACKAGE RDER I FOR ATIO
ORDER PART
ORDER PART
TOP VIEW
TOP VIEW
NUMBER
NUMBER
IN
ENABLE
STATUS
GND
1
2
3
4
V
IN
ENABLE
STATUS
GND
1
2
3
4
8
7
6
5
V
S
8
7
6
5
S
DRAIN SENSE
GATE
DRAIN SENSE
GATE
LTC1154CS8
LTC1154CN8
SHUTDOWN
SHUTDOWN
N8 PACKAGE
8-LEAD PLASTIC DIP
S8 PACKAGE
8-LEAD PLASTIC SOIC
LTC1154 • PO01
LTC1154 • PO02
S8 PART MARKING
1154
TJMAX = 100°C, θJA = 130°C/W (N8)
TJMAX = 100°C, θJA = 150°C/W
ELECTRICAL CHARACTERISTICS VS = 4.5V to 18V, TA = 25°C, VEN = 0V, VSD = 0V unless otherwise noted.
LTC1154C
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
18.0
20
UNITS
V
V
S
Supply Voltage
●
4.5
I
I
I
Quiescent Current OFF
Quiescent Current ON
Quiescent Current ON
Input High Voltage
V = 5V, V = 0V
8
µA
µA
µA
V
Q
Q
Q
S
IN
V = 5V, V = 5V
85
120
400
S
IN
V = 12V, V = 5V
180
S
IN
V
INH
V
INL
●
●
●
2
Input Low Voltage
0.8
V
I
Input Current
0V < V < V
±1
µA
pF
V
IN
IN
S
C
V
V
Input Capacitance
5
IN
ENABLE Input High Voltage
ENABLE Input Low Voltage
ENABLE Input Current
Shutdown Input High Voltage
Shutdown Input Low Voltage
Shutdown Input Current
Drain Sense Threshold Voltage
●
●
●
●
●
●
3.5
2
2.6
1.0
ENH
ENL
0.6
V
I
0V < V < V
±1
µA
V
EN
IN
S
V
SDH
V
SDL
0.8
V
I
0V < V < V
±1
µA
SD
IN
S
V
SEN
80
75
100
100
120
125
mV
mV
●
●
I
Drain Sense Input Current
0V < V
< V
±0.1
µA
SEN
SEN
S
2
LTC1154
ELECTRICAL CHARACTERISTICS VS = 4.5V to 18V, TA = 25°C, VEN = 0V, VSD = 0V unless otherwise noted.
LTC1154C
TYP
SYMBOL
PARAMETER
CONDITIONS
V = 5V
MIN
MAX
UNITS
V
GATE
– V Gate Voltage Above Supply
●
●
●
6.0
7.5
15.0
7.0
8.3
18.0
9.0
15.0
25.0
V
V
V
S
S
V = 6V
S
V = 12V
S
V
Status Output Low Voltage
Status Output Leakage Current
Turn-ON Time
I
= 400µA
STAT
●
●
0.05
0.4
1
V
STAT
STAT
ON
I
t
V
= 12V
µA
STAT
V = 5V, C
Time for V
Time for V
= 1000pF
S
GATE
GATE
GATE
> V + 2V
30
100
110
450
300
1000
µs
µs
S
> V + 5V
S
V = 12V, C
= 1000pF
S
GATE
Time for V
Time for V
> V + 5V
20
50
80
160
200
500
µs
µs
GATE
GATE
S
> V + 10V
S
t
t
t
Turn-OFF Time
V = 5V, C
Time for V
= 1000pF
< 1V
OFF
SC
S
GATE
GATE
10
10
5
36
28
25
23
17
13
60
60
40
40
40
35
µs
µs
µs
µs
µs
µs
V = 12V, C
= 1000pF
S
GATE
Time for V
< 1V
GATE
Short-Circuit Turn-OFF Time
Shutdown Turn-OFF Time
V = 5V, C
= 1000pF
< 1V
S
GATE
Time for V
GATE
V = 12V, C
= 1000pF
S
GATE
Time for V
< 1V
5
GATE
V = 5V, C
Time for V
= 1000pF
< 1V
SD
S
GATE
GATE
V = 12V, C
= 1000pF
S
GATE
Time for V
< 1V
GATE
The
●
denotes specifications which apply over the operating temperature range.
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TYPICAL PERFOR A CE CHARACTERISTICS
Standby Supply Current
High-Side Gate Voltage
Supply Current ON
50
45
40
35
30
25
20
15
10
5
1000
900
800
700
600
500
400
300
200
100
0
24
22
20
18
16
14
12
10
8
T
A
= 25°C
V
A
= 0V
IN
T
= 25°C
6
0
0
0
5
10
15
20
0
5
10
15
20
0
5
10
15
20
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
LTC1154 • TPC01
LTC1154 • TPC02
LTC1154 • TPC03
3
LTC1154
TYPICAL PERFOR A CE CHARACTERISTICS
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Input Threshold Voltage
Low-Side Gate Voltage
Drain Sense Threshold Voltage
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
150
140
130
120
110
100
90
30
27
24
21
V
ON
18
15
V
OFF
12
9
80
70
6
3
0
60
50
0
5
10
15
20
10
SUPPLY VOLTAGE (V)
20
0
5
15
0
2
4
6
8
10
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
LTC1154 • TPC04
LTC1154 • TPC05
LTC1154 • TPC06
Turn-ON Time
Turn-OFF Time
Short-Circuit Turn-OFF Delay Time
1000
900
800
700
600
500
400
300
200
100
0
50
45
40
35
30
25
20
15
10
5
50
45
40
35
30
25
20
15
10
5
C
GATE
= 1000pF
C
= 1000pF
C
= 1000pF
GATE
GATE
TIME FOR V
< 1V
TIME FOR V
< 1V
GATE
GATE
V
SEN
= V – 1V
S
NO EXTERNAL DELAY
V
GS
= 5V
V
= 2V
GS
0
0
10
SUPPLY VOLTAGE (V)
20
0
5
10
SUPPLY VOLTAGE (V)
15
20
0
5
10
SUPPLY VOLTAGE (V)
15
20
0
5
15
LTC1153 • TPC07
LTC1154 • TPC08
LTC1154 • TPC09
Standby Supply Current
Input ON Threshold Voltage
Supply Current ON
50
45
40
35
30
25
20
15
10
5
1000
900
800
700
600
500
400
300
200
100
0
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.O
0.8
0.6
0.4
V
V
= 0V
= 0V
V
V
= 5V
= 0V
IN
EN
IN
EN
V
V
= 5V
S
S
= 18V
V
= 12V
= 5V
S
V
= 18V
S
V
S
V
= 5V
75 100 125
S
0
–50
0
25
50
–50
0
25
50
75
125
–50
0
25
50
75
125
–25
–25
100
–25
100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
LTC1154 • TPC10
LTC1154 • TPC11
LTC1154 • TPC12
4
LTC1154
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Shutdown Threshold Voltage
ENABLE Threshold Voltage
Gate Drive Current
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.O
0.8
0.6
0.4
1000
100
10
V
= 12V
T
A
= 25°C
S
V
= 18V
S
DISABLE
V
= 12V
S
V
V
= 5V
S
= 18V
S
V
= 5V
S
1
ENABLE
0.1
–50
–25
0
25
50
75 100 125
–50
0
25
50
75 100 125
–25
0
4
8
12
16
20
TEMPERATURE (°C)
TEMPERATURE (°C)
GATE VOLTAGE ABOVE SUPPLY (V)
LTC1154 • TPC15
LTC1154 • TPC14
LTC1154 • TPC13
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PI FU CTIO S
few hundred kΩ). Care should be taken to minimize any
loading of this pin by parasitic resistance to ground or
supply.
Input and Shutdown Pins
TheLTC1154inputpinisactivehighandactivatesallofthe
protection and charge pump circuitry when switched ON.
The shutdown pin is designed to immediately disable the
switch if a secondary fault condition (over temperature,
etc.) is detected. The LTC1154 logic and shutdown inputs
are high impedance CMOS gates with ESD protection
diodes to ground and supply and therefore should not be
forced beyond the power supply rails. The shutdown pin
should be connected to ground when not in use.
Supply Pin
The supply pin of the LTC1154 serves two vital purposes.
The first is obvious: it powers the input, gate drive, regu-
lation and protection circuitry. The second purpose is less
obvious: it provides a Kelvin connection to the top of the
drain sense resistor for the internal 100mV reference.
The LTC1154 is designed to be continuously powered so
that the gate of the MOSFET is actively driven at all times.
If it is necessary to remove power from the supply pin and
then re-apply it, the input pin (or enable pin) should be
cycled a few milliseconds after the power is re-applied to
reset the input latch and protection circuitry. Also, the
input and enable pins should be isolated with 10k resistors
to limit the current flowing through the ESD protection
diodes to the supply pin.
ENABLE Input Pin
The ENABLE input can be used to enable a number of
LTC1154 high-side switches in banks or to provide a
secondary means of control. It can also act as an inverting
input. The ENABLE input is a high impedance CMOS gate
with ESD clamp diodes to ground and supply and there-
fore should not be forced beyond the power supply rails.
This pin should be grounded when not in use.
The supply pin of the LTC1154 should never be forced
below ground as this may result in permanent damage to
the device. A 300Ω resistor should be inserted in series
with the ground pin if negative supply voltage transients
are anticipated.
Gate Drive Pin
The gate drive pin is either driven to ground when the
switch is turned OFF or driven above the supply rail when
the switch is turned ON. This pin is a relatively high
impedance when driven above the rail (the equivalent of a
5
LTC1154
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U
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PI FU CTIO S
Drain Sense Pin
sense pin to ensure that the drain sense circuitry does not
false-triggerduringstart-up. Thistimeconstantcanbeset
fromafewmicrosecondstomanyseconds.However,very
longdelaysmayputtheMOSFETinriskofbeingdestroyed
byashort-circuitcondition. (seeApplicationsInformation
Section).
The drain sense pin is compared against the supply pin
voltage.Ifthevoltageatthispinismorethan100mVbelow
thesupplypin,theinputlatchwillberesetandtheMOSFET
gatewillbequicklydischarged.Cycletheinput,orENABLE
input, to reset the short-circuit latch and turn the MOSFET
back on.
Status Pin
This pin is also a high impedance CMOS gate with ESD
protection and therefore should not be forced beyond the
power supply rails. To defeat the over current protection,
short the drain sense to supply.
The status pin is an open-drain output which is driven low
whenever a fault condition is detected. A 51k pull-up
resistor should be connected between this output and a
logic supply. The status pins of multiple LTC1154s can be
OR’d together if independent fault sensing is not required.
No connection is required to this pin when not in use.
Some loads, such as large supply capacitors, lamps, or
motors require high in-rush currents. An RC time delay
can be added between the sense resistor and the drain
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BLOCK DIAGRA
DRAIN
SENSE
ANALOG SECTION
V
S
SHUTDOWN
TTL-TO-CMOS
CONVERTER
10µs
DELAY
COMP
SHUTDOWN
GATE
LOW STANDBY
CURRENT
REGULATOR
100mV
REFERENCE
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
ANALOG DIGITAL
R
INPUT
LATCH
TTL-TO-CMOS
CONVERTER
VOLTAGE
REGULATORS
INPUT
OSCILLATOR
AND CHARGE
PUMP
FAST/SLOW
GATE CHARGE
LOGIC
ONE
SHOT
S
ENABLE
GND
FAULT DETECTION
AND STATUS
OUTPUT DRIVER
STATUS
LTC1154 • BD01
6
LTC1154
TRUTH TABLE
The Truth Table demonstrates how the LTC1154 receives
inputs and returns status information to the µP. The
ENABLE and input signal from the µP controls the switch
in its normal operating mode, where the rise and fall time
of the gate drive are controlled to limit EMI and RFI
emissions. The shutdown and over-current detection cir-
cuitry however, switch the gate off at a much higher rate
to limit the exposure of the MOSFET switch and the load to
dangerousconditions.Thestatuspinremainshighaslong
as the switch is operating normally, and is driven low only
when a fault condition is detected. Note that the shutdown
pin is edge-sensitive and latches the output off even if the
shutdown pin returns to a low state.
INPUTS
OUTPUTS
SD GATE STATUS
SWITCH
CONDITION
IN
X
EN
H
X
X
X
L
L
L
L
H
L
H
H
H
L
SWITCH OFF
SWITCH OFF
SWITCH ON
L
H
H
L
L
SWITCH LATCHED OFF
(OVER CURRENT)
H
L
L
L
SWITCH LATCHED OFF
(SHUTDOWN)
L = LOGIC LOW
H = LOGIC HIGH
X = IRRELEVANT
= EDGE TRIGGERED
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LTC1154 OPERATIO
The LTC1154 is a single micropower MOSFET driver with
built-inprotection,statusfeedbackandgatechargepump.
The LTC1154 consists of the following functional blocks:
pump logic is not coupled into the 100mV reference or the
analog comparator.
Gate Charge Pump
TTL and CMOS Compatible Inputs
Gate drive for the MOSFET switch is produced by an
adaptive charge pump circuit which generates a gate
voltage substantially higher than the power supply volt-
age. The charge pump capacitors are included on chip and
thereforenoexternalcomponentsarerequiredtogenerate
the gate drive.
The LTC1154 input and shutdown input have been de-
signed to accommodate a wide range of logic families.
Both input thresholds are set at about 1.3V with approxi-
mately 100mV of hysteresis.
A low standby current voltage regulator provides continu-
ous bias for the TTL-to-CMOS converter. The TTL-to-
CMOS converter output enables the rest of the circuitry. In
this way the power consumption is kept to a minimum in
the standby mode.
Drain Current Sense
The LTC1154 is configured to sense the current flowing
into the drain of the power MOSFET in a high-side applica-
tion. An internal 100mV reference is compared to the drop
across a sense resistor (typically 0.002Ω to 0.10Ω) in
series with the drain lead. If the drop across this resistor
exceeds the internal 100mV threshold, the input latch is
reset and the gate is quickly discharged via a large
N-channel transistor.
ENABLE Input
The ENABLE input is CMOS compatible and inhibits the
input signal whenever it is held logic high. This input
should be grounded when not in use.
Internal Voltage Regulation
Controlled Gate Rise and Fall Times
The output of the TTL-to-CMOS converter drives two
regulated supplies which power the low voltage CMOS
logicandanalogblocks.Theregulatoroutputsareisolated
from each other so that the noise generated by the charge
When the input is switched ON and OFF, the gate is
charged by the internal charge pump and discharged in a
controlled manner. The charge and discharge rates have
7
LTC1154
U
LTC1154 OPERATIO
been set to minimize RFI and EMI emissions in normal
operation. If a short-circuit or current overload condition
is encountered, the gate is discharged very quickly (typi-
cally a few microseconds) by a large N-channel transistor.
gate of the MOSFET is driven low by the protection
circuitry. The status circuitry is reset along with the input
latch when the input, or ENABLE input, is cycled.
Status Output Driver
Thestatuscircuitrycontinuouslymonitorsthefaultdetec-
tion logic. This open-drain output is driven low when the
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PPLICATI
A
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stored energy to ground. Many inductive loads have these
diodes included. If not, a diode of the proper current rating
should be connected across the load, as shown in Figure
2, to safely divert the stored energy.
MOSFET and Load Protection
The LTC1154 protects the power MOSFET switch by
removing drive from the gate as soon as an over-current
conditionisdetected. Resistiveandinductiveloadscanbe
protected with no external time delay in series with the
drain sense pin. Lamp loads, however, require that the
over-current protection by delayed long enough to start
the lamp but short enough to ensure the safety of the
MOSFET.
12V
+
100µF
IN
V
S
0.036Ω
EN
DS
G
LTC1154
STATUS
GND
IRFZ24
Resistive Loads
15V
Loadsthatareprimarilyresistiveshouldbeprotectedwith
asshortadelayaspossibletominimizetheamountoftime
that the MOSFET is subjected to an overload condition.
The drain sense circuitry has a built-in delay of approxi-
mately 10µs to eliminate false triggering by power supply
or load transient conditions. This delay is sufficient to
“mask” short load current transients and the starting of a
small capacitor (<1µF) in parallel with the load. The drain
sense pin can therefore be connected directly to the drain
current sense resistor as shown in Figure 1.
SD
R
LOAD
C
≤ 1µF
LOAD
12Ω
LTC1154 • F01
Figure 1. Protecting Resistive Loads
12V
+
100µF
IN
V
S
0.036Ω
Inductive Loads
EN
DS
G
Loads that are primarily inductive, such as relays, sole-
noids and stepper motor windings should be protected
with as short a delay as possible to minimize the amount
of time that the MOSFET is subjected to an overload
condition.Thebuilt-in10µsdelaywillensurethattheover-
current protection is not false-triggered by a supply or
load transient. No externaldelay components arerequired
as shown in Figure 2.
LTC1154
STATUS
IRFZ24
15V
GND
SD
12V, 1A
SOLENOID
1N5400
LTC1154 • F02
Large inductive loads (>0.1mH) may require diodes con-
nected directly across the inductor to safely divert the
Figure 2. Protecting Inductive Loads
8
LTC1154
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PPLICATI
A
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Capacitive Loads
Lamp Loads
Large capacitive loads, such as complex electrical sys-
tems with large bypass capacitors, should be powered
using the circuit shown in Figure 3. The gate drive to the
power MOSFET is passed through an RC delay network,
R1 and C1, which greatly reduces the turn-on ramp rate of
the switch. And since the MOSFET source voltage follows
the gate voltage, the load is powered smoothly and slowly
from ground. This dramatically reduces the start-up cur-
rent flowing into the supply capacitor(s) which, in turn,
reducessupplytransientsandallowsforsloweractivation
of sensitive electrical loads. (Diode, D1, provides a direct
path for the LTC1154 protection circuitry to quickly dis-
charge the gate in the event of an over-current condition).
The in-rush current created by a lamp during turn-on can
be 10 to 20 times greater than the rated operating current.
The circuit shown in Figure 4 shifts the current limit
threshold up by a factor of 11:1 (to 30A) for 100ms when
the bulb is first turned on. The current limit then drops
down to 2.7A after the in-rush current has subsided.
12V
+
470µF
10k
0.036Ω
IN
V
S
100k
EN
DS
G
VN2222LL
0.1µF
LTC1154
STATUS
GND
1M
SD
MTP3055EL
12V
+
9.1V
470µF
IN
V
S
0.036Ω
C
R
12V/1A
BULB
D
D
0.01µF
100k
EN
DS
G
D1
1N4148
LTC1154
LTC1154 • F04
STATUS
GND
R
100k
R
2
Figure 4. Lamp Driver with Delayed Protection
1
100k
MTP3055E
OUT
SD
C
1
Selecting RD and CD
0.33µF
15V
Figure 5 is a graph of normalized over-current shutdown
time versus normalized MOSFET current. This graph is
used to select the two delay components, RD and CD,
which make up a simple RC delay between the drain sense
resistor and the drain sense input.
+
C
LOAD
100µF
LTC1154 • F03
Figure 3. Powering Large Capacitive Loads
The RC network, RD and CD, in series with the drain sense
input should be set to trip based on the expected charac-
teristics of the load after start-up. With this circuit, it is
possible to power a large capacitive load and still react
quickly to an over-current condition. The ramp rate at the
output of the switch as it lifts off ground is approximately:
10
1
dV/dt = (VGATE – VTH)/(R1 × C1)
0.1
0.01
Andthereforethecurrentflowingintothecapacitorduring
start-up is approximately:
1
10
100
ISTART-UP = CLOAD × dV/dt
MOSFET CURRENT (1 = SET CURRENT)
LTC1154 • F05
Using the values shown in Figure 3, the start-up current is
less than 100mA and does not false-trigger the drain
sense circuitry which is set at 2.7A with a 1ms delay.
Figure 5. Over-Current Shutdown Time vs MOSFET Current
9
LTC1154
PPLICATI
The Y axis of the graph is normalized to one RC time
constant. The X axis is normalized to the current. (The set
current is defined as the current required to develop
100mV across the drain sense resistor).
O U
W
U
A
S I FOR ATIO
12V
5V
+
10µF
120k
10k
10k
10k
IN
V
S
0.05Ω
5V
µP OR
CONTROL
LOGIC
EN
DS
G
Note that the shutdown time is shorter for increasing
levels of MOSFET current. This ensures that the total
energy dissipated by the MOSFET is always within the
bounds established by the manufacturer for safe opera-
tion. (See MOSFET data sheet for further information).
LTC1154
STATUS
GND
MTP12N06
15V
SD
LOAD
10k
300Ω
Using a Speed-Up Diode
LTC1154 • F07
To reduce the amount of time that the power MOSFET is in
a short-circuit condition, “bypass” the delay resistor with
a small signal diode as shown in Figure 6. The diode will
engage when the drop across the drain sense resistor
exceeds about 0.7V, providing a direct path to the sense
pin and dramatically reducing the amount of time the
Figure 7. Reverse Battery Protection
Since the LTC1154 draws very little current while in
normal operation, the drop across the ground resistor is
minimal. The 5V µP (or control logic) is protected by the
10k resistors in series with the input and status pins.
Current Limited Power Supplies
12V
+
100µF
The LTC1154 requires at least 3.5V at the supply pin to
ensure proper operation. It is therefore necessary that the
supply to the LTC1154 be held higher than 3.5V at all
times,evenwhentheoutputoftheswitchisshortcircuited
toground.Theoutputvoltageofacurrentlimitedregulator
may drop very quickly during short circuit and pull the
supply pin of the LTC1154 below 3.5V before the shut-
down circuitry has had time to respond and remove drive
from the gate of the power MOSFET. A supply filter should
1N4148
IN
V
S
0.036Ω
0.01µF
100k
EN
DS
G
LTC1154
STATUS
IRF530
15V
GND
SD
LOAD
LTC1154 • F06
5V/2A
REGULATOR
Figure 6. Using a Speed-Up Diode
>7V
+
+
*20Ω
10µF
0.1Ω
100µF
+
1N4148
100k
MOSFET is in an overload condition. The drain sense
resistor value is selected to limit the maximum DC current
to 2.8A. The diode conducts when the drain current
exceeds 20A and reduces the turn-off time to 15µs.
47µF*
IN
V
S
0.1µF
EN
DS
G
LTC1154
IRLR024
STATUS
Reverse Battery Protection
SHORT
CIRCUIT
GND
SD
The LTC1154 can be protected against reverse battery
conditions by connecting a resistor in series with the
ground lead as shown in Figure 7. The resistor limits the
supply current to less than 50mA with –12V applied.
LTC1154 • F08
*SUPPLY FILTER COMPONENTS
Figure 8. Supply Filter for Current Limited Supplies
10
LTC1154
O U
W
U
PPLICATI
A
S I FOR ATIO
be added as shown in Figure 8 which holds the supply pin
of the LTC1154 high long enough for the over-current
shutdown circuitry to respond and fully discharge the
gate.
largeoutputcapacitorsonmanyswitchingregulatorsmay
be able to hold the supply pin of the LTC1154 above 3.5V
sufficiently long that this extra filtering is not required.
Because the LTC1154 is micropower in both the standby
and ON state, the voltage drop across the supply filter is
less than 2mV, and does not significantly alter the accu-
racy of the 100mV drain sense threshold voltage.
Five volt linear regulators with small output capacitors are
the most difficult to protect as they can “switch” from a
voltage mode to a current limited mode very quickly. The
U
O
TYPICAL APPLICATI S
High-Side Driver with Over-Voltage Shutdown
High-Side Driver with Thermal Shutdown
6V
4.75V TO 5.25V
5V
5V
+
+
100µF
10µF
IN
V
S
IN
V
S
100Ω
µP OR
CONTROL
LOGIC
µP OR
CONTROL
LOGIC
EN
DS
G
EN
DS
G
LTC1154
LTC1154
5.6V
STATUS†
IRLZ24
STATUS†
IRLD024
30k
GND
SD
GND
SD
6V
LOAD
PTC
THERMISTOR
(100°C)*
5V
LOAD
*RL3006-50-100-25-PT0 KEYSTONE
SWITCH IS SHUTDOWN WHEN V > 5.7V
S
LTC1154 • TA03
LTC1154 • TA05
†A 51k pullup resistor should be connected between Status Output and 5V Logic Supply.
High-Side Driver with Under-Voltage Shutdown
24V to 28V High-Side Switch with Thermal Shutdown
5V
24V TO 28V
+
+
10k
3k
100µF
100µF
1N4148*
+
+
1µF**
5V
5V
18V
10µF
2N2907
IN
V
IN
V
S
S
µP OR
CONTROL
LOGIC
µP OR
CONTROL
LOGIC
EN
DS
G
EN
DS
G
LTC1154
LTC1154
STATUS†
IRLZ24
MTP12N06
STATUS†
200k
GND
SD
GND
SD
PTC
THERMISTOR
(100°C)*
6V
LOAD
24V TO 28V
LOAD
10k
*OPTIONAL IF SUPPLY VOLTAGE LESS THAN 6V.
*KEYSTONE RL2006-100-100-30-PT.
MOUNT ON MOSFET OR LOAD HEAT SINK
**CAPACITOR CHARGED TO SUPPLY VOLTAGE.
SHUTDOWN OCCURS WHEN SUPPLY VOLTAGE
DROPS BY 0.6V.
LTC1154 • TA06
LTC1154 • TA04
11
LTC1154
U
O
TYPICAL APPLICATI S
High-Side Relay Driver with Over-Current
Protection and Status Feedback
24V to 28V Switch with Bootstrapped Supply
24V TO 28V
12V
+
+
100k
100µF
100µF
2Ω
0.02Ω
+
5V
5V
18V
10µF
10k
6.2k
IN
V
IN
V
S
S
0.01µF
1N4148
µP OR
CONTROL
LOGIC
µP OR
CONTROL
LOGIC
1N4148
EN
DS
G
EN
DS
G
MTD3055E
15V
LTC1154
LTC1154
STATUS†
MTP15N06E
STATUS†
TO 12V
LOAD
200k
GND
SD
GND
SD
PTC
THERMISTOR
(100°C)*
1N4001
24V TO 28V
LOAD
*KEYSTONE RL2006-100-100-30-PT.
COIL CURRENT LIMITED TO 350mA.
CONTACT CURRENT LIMITED TO 5A.
MOUNT ON MOSFET OR LOAD HEAT SINK.
LTC1154 • TA07
LTC1154 • TA08
I
= 60µA, I
= 1mA.
Q(OFF)
Q(ON)
†A 51k pullup resistor should be connected between Status Output and 5V Logic Supply.
“4-Cell-to-5V” Extremely Low Voltage Drop Regulator with
Over-Current Shutdown, Status Feedback, Ramped Turn-ON
and 8µA Standby Current
4-CELL
BATTERY
PACK
+
100µF
0.036Ω
5V
IN
V
S
µP OR
CONTROL
LOGIC
IRLR024
1N4148
100k 100k
0.22µF
EN
DS
G
200pF
10k
LTC1154
STATUS†
1
8
3
4
5V/2A
LT1431
7
GND
SD
+
470µF
ESR < 0.5Ω
6
5
LTC1154 • TA09
12
LTC1154
U
O
TYPICAL APPLICATI S
Bank Controlled High-Side Switches with “Global” Thermal
and Over-Voltage Shutdown
12V
IN
V
S
+
100Ω
470µF
EN
DS
G
LTC1154
STATUS
IRLR024
IRLR024
IRLR024
IRLR024
15V
15V
15V
15V
GND
SD
OUTPUT 1
OUTPUT 2
OUTPUT 3
IN
V
S
5V
EN
DS
G
LTC1154
51k
STATUS
GND
SD
µP OR
CONTROL
LOGIC
IN
V
S
EN
DS
G
LTC1154
STATUS
GND
SD
IN
V
S
120k
EN
DS
G
LTC1154
STATUS
GND
SD
OUTPUT 4
PTC
THERMISTOR
(100°C)*
15V
*KEYSTONE RL2006-100-100-30-PT.
MOUNT ON COMMON HEAT SINK.
LTC1154 • TA10
13
LTC1154
TYPICAL APPLICATI S
U
O
12V Step-Up Regulator with Ultra-Low Standby Current,
Over-Current Protection and Status Feedback
1N5820
50µH
0.02Ω
IRLZ24
12V/1A
5V
+
+
20Ω
470µF
330µF
5
+
10.72k
1%
+
10k
1N4148
V
47µF
IN
150µF
4
2
V
SW
ON/OFF
STATUS
IN
V
S
LT1070
0.22µF
FB
1N4148
100k 100k
V
GND
C
1
51k
EN
DS
G
3
1.24k
1%
LTC1154
STATUS
GND
1k
0.1µF
SD
1µF
LTC1154 • TA11
12V Step-Up Regulator with 1A Over-Current Protection,
Switch Status Feedback and Ramped Output
1N5820
50µH
5V
+
+
150µF
330µF
0.1Ω
5
1N4148
10k
V
IN
10.72k
1%
4
2
V
SW
ON/OFF
IN
V
S
LT1070
0.1µF
FB
1N4148
V
C
1
GND
51k
EN
DS
G
1.24k
1%
3
LTC1154
100k 100k
STATUS
STATUS
GND
IRF530
1k
1µF
12V
SD
12V/1A
+
0.22µF
47µF
LTC1154 • TA12
14
LTC1154
U
O
TYPICAL APPLICATI S
Auto-Reset High-Side Switch with Over-Current
and Over-Current Temperature Shutdown
12V
+
100µF
R
T
1M
1M**
0.036Ω
ON/OFF
IN
V
S
EN
DS
G
LTC1154
+
C
T
STATUS
GND
MTP12N06
100µF**
18V
VN2222LL
200k
PTC
SD
12V
LOAD
THERMISTOR
(100°C)*
*KEYSTONE RL2006-100-100-30-PT.
**AUTO-RESET PERIOD ≈ 800ms WITH COMPONENTS SHOWN
LTC1154 • TA13
SCSI Termination Power Switch with 1A Over-Current Shutdown,
Auto-Reset and Load Soft-Start
1N5817
0.1Ω
MTD3055EL
4.25V/1A
5V
+
+
100µF
10µF
1M
1M
20Ω
10k
1N4148
+
ON/OFF
IN
V
S
47µF
0.1µF
1N4148
100k 100k
EN
DS
G
LTC1154
+
STATUS
1µF
VN2222LL
0.22µF
GND
SD
LTC1154 • TA14
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
15
LTC1154
U
PACKAGE DESCRIPTIO
N8 Package
8-Lead Plastic Lead
0.400
(10.160)
MAX
0.130 ± 0.005
(3.302 ± 0.127)
0.300 – 0.320
(7.620 – 8.128)
0.045 – 0.065
(1.143 – 1.651)
8
1
7
6
5
4
0.065
(1.651)
TYP
0.250 ± 0.010
(6.350 ± 0.254)
0.009 – 0.015
(0.229 – 0.381)
0.125
(3.175)
MIN
0.020
(0.508)
MIN
+0.025
–0.015
0.045 ± 0.015
(1.143 ± 0.381)
0.325
2
3
+0.635
8.255
(
)
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
S8 Package
8-Lead Plastic SOIC
0.189 – 0.197
0.010 – 0.020
(0.254 – 0.508)
(4.801 – 5.004)
× 45°
0.053 – 0.069
(1.346 – 1.752)
7
5
8
6
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0.016 – 0.050
0.406 – 1.270
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
0.228 – 0.244
(5.791 – 6.197)
0.150 – 0.157
(3.810 – 3.988)
0°– 8°
TYP
1
3
4
2
LT/GP 1192 10K REV 0
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
16
●
●
LINEAR TECHNOLOGY CORPORATION 1992
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
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