LTC1261LCS8-4#TRPBF_技术文档

LTC1261L

Switched Capacitor

Regulated Voltage Inverter

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DESCRIPTIO

FEATURES

The LTC^®1261L is a switched-capacitor voltage inverter

designed to provide a regulated negative voltage from a

single positive supply. The LTC1261L operates from a

single 2.7V to 5.25V supply and provides an adjustable

output voltage from –1.23V to –5V. The LTC1261L-4/

LTC1261L-4.5 needs a single 4.5V to 5.25V supply and

provides a fixed output voltage of –4V to –4.5V respec-

tively. Three external capacitors are required: a 0.1µF

flying capacitor and an input and output bypass capaci-

tors. An optional compensation capacitor at ADJ (COMP)

can be used to reduce the output voltage ripple.

■

Regulated Negative Voltage from a

Single Positive Supply

■

REG Pin Indicates Output is in Regulation

■

Adjustable or Fixed Output Voltages

Output Regulation: ±3.5%

Supply Current: 650µA Typ

■

Shutdown Mode Drops Supply Current to 5µA

■

Up to 20mA Output Current

■

Requires Only Three or Four External Capacitors

■

Available in MS8 and SO-8 Packages

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Each version of the LTC1261L will supply up to 20mA

outputcurrentwithguaranteedoutputregulationof±3.5%.

The LTC1261L includes an open-drain REG output that

pulls low when the output is within 5% of the set value.

Quiescent current is typically 650µA when operating and

5µA in shutdown.

APPLICATIO S

■

GaAs FET Bias Generators

■

Negative Supply Generators

■

Battery-Powered Systems

Single Supply Applications

■

The LTC1261L is available in 8-pin MSOP and SO pack-

ages.

, LTC and LT are registered trademarks of Linear Technology Corporation.

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TYPICAL APPLICATION

Waveforms for –4V Generator with Power Valid

–4V Generator with Power Valid

0V

OUT

5V

1

2

3

4

8

7

6

5

5V

V

SHDN

REG

–4V

CC

10k

+

5V

SHDN

0V

C1

POWER VALID

C1

1µF

C2

0.1µF

LTC1261L-4

V

= –4V

–

OUT

C1

OUT

AT 10mA

C4

3.3µF

5V

POWER VALID

0V

+

GND

COMP

C3*

100pF

1261L TA01

*OPTIONAL

1261L TAO2

0.1ms/DIV

1

LTC1261L

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ABSOLUTE AXI U RATI GS

(Note 1)

Supply Voltage (Note 2) ........................................ 5.5V

Output Voltage (Note 3)........................... 0.3V to –5.3V

Total Voltage, V_CCto V_OUT(Note 2) ..................... 10.8V

SHDN Pin .................................. –0.3V to (V_CC+ 0.3V)

REG Pin ..................................................... –0.3V to 6V

ADJ Pin........................... (V_OUT– 0.3V) to (V_CC+ 0.3V)

Output Short-Circuit Duration......................... Indefinite

Commercial Temperature Range ................ 0°C to 70°C

Extended Commercial Operating

Temperature Range (Note 4) ................. –40°C to 85°C

Storage Temperature Range ................ –65°C to 150°C

Lead Temperature (Soldering, 10 sec)................. 300°C

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PACKAGE RDER I FOR ATIO

ORDER PART

NUMBER

ORDER PART

NUMBER

TOP VIEW

LTC1261LCMS8

LTC1261LCS8

V

1

2

3

4

8

7

6

5

SHDN

CC

+

V

C1

1

2

3

4

8 SHDN

7 REG

6 OUT

CC

+

LTC1261LCMS8-4

LTC1261LCS8-4

C1

REG

–

LTC1261LCMS8-4.5

LTC1261LCS8-4.5

OUT

5 ADJ (COMP)

GND

ADJ (COMP)

MS8 PACKAGE

8-LEAD PLASTIC MSOP

MS8 PART MARKING

S8 PART MARKING

S8 PACKAGE

8-LEAD PLASTIC SO

T_JMAX= 150°C, θ_JA= 135°C/W

T_JMAX= 150°C, θ_JA= 200°C/W

LTFM

LTFN

LTFP

1261L

1261L4

261L45

Consult factory for Industrial or Military grade parts or additional fixed voltage parts.

The ● denotes the specifications which apply over the full operating

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at T_A= 25°C, C1 = 0.1µF, C_OUT= 3.3µF unless otherwise noted. (Notes 2, 4)

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Supply Voltage

(LTC1261LCMS8/LTC1261LCS8)

(LTC1261LCMS8-4/LTC1261LCS8-4)

CC

●

2.7

4.35

4.75

5.25

V

(Note 5)

(LTC1261LCMS8-4.5/LTC1261LCS8-4.5) (Note 5)

V

Reference Voltage

1.23

V

REF

I

f

Supply Current

V

= 5.25V, No Load, SHDN Floating

●

650

5

1500

20

µA

CC

= 5.25V, No Load, V

= V

SHDN

CC

Internal Oscillator Frequency

REG Output Low Voltage

REG Sink Current

V

= 5V, V = –4V

OUT

650

0.1

kHz

V

OSC

CC

V

I

= 1mA, V = 5V, V = –4V

OUT

●

0.8

OL

REG

CC

I

V

= 0.8V, V = 3.3V

●

4

5

8

12

mA

REG

CC

= 0.8V, V = 5V

CC

I

Adjust Pin Current

V

= 1.23V

●

±0.01

±1

µA

V

ADJ

V

SHDN Input High Voltage

SHDN Input Low Voltage

SHDN Input Current

Turn-On Time

= 5V

2

IH

IL

CC

0.8

25

V

I

t

= V

CC

2.5

µA

IN

ON

SHDN

V

= 5V, I

= 10mA, –1.5V ≤V ≤ –4V (LTC1261L)

OUT

●

250

1500

µs

CC

OUT

= 5mA, V

= 10mA, V

= –4.5V (LTC1261L)

OUT

= –4V (LTC1261L-4)

OUT

= 5mA, V

= –4.5V (LTC1261L-4.5)

OUT

2

LTC1261L

The ● denotes the specifications which apply over the full operating

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at T_A= 25°C, C1 = 0.1µF, C_OUT= 3.3µF unless otherwise noted. (Notes 2, 4)

SYMBOL PARAMETER

CONDITIONS

2.70V ≤ V ≤ 5.25V, 0mA ≤ I

MIN

TYP

MAX

UNITS

V

Output Regulation (LTC1261L)

≤ 10mA

≤ 20mA

●

–1.552

–1.5

–1.448

V

OUT

CC

OUT

3.25V ≤ V ≤ 5.25V, 0mA ≤ I

CC

2.70V ≤ V ≤ 5.25V, 0mA ≤ I

≤ 5mA

≤ 10mA

≤ 20mA

●

–2.070

–2.0

–1.930

V

CC

OUT

2.95V ≤ V ≤ 5.25V, 0mA ≤ I

CC

3.50V ≤ V ≤ 5.25V, 0mA ≤ I

CC

2.95V ≤ V ≤ 5.25V, 0mA ≤ I

≤ 5mA

≤ 10mA

≤ 20mA

●

–2.587

–2.5

–2.413

V

CC

OUT

3.30V ≤ V ≤ 5.25V, 0mA ≤ I

CC

3.85V ≤ V ≤ 5.25V, 0mA ≤ I

CC

3.40V ≤ V ≤ 5.25V, 0mA ≤ I

≤ 5mA

≤ 10mA

≤ 20mA

●

–3.105

–3.0

–2.895

V

CC

OUT

3.70V ≤ V ≤ 5.25V, 0mA ≤ I

CC

4.25V ≤ V ≤ 5.25V, 0mA ≤ I

CC

3.85V ≤ V ≤ 5.25V, 0mA ≤ I

≤ 5mA

≤ 10mA

≤ 20mA

●

–3.622

–3.5

–3.378

V

CC

OUT

4.10V ≤ V ≤ 5.25V, 0mA ≤ I

CC

4.60V ≤ V ≤ 5.25V, 0mA ≤ I

CC

Output Regulation

(LTC1261L/LTC1261L-4)

4.35V ≤ V ≤ 5.25V, 0mA ≤ I

≤ 5mA

≤ 10mA

≤ 20mA

●

–4.140

–4.0

–3.860

V

CC

OUT

4.60V ≤ V ≤ 5.25V, 0mA ≤ I

CC

5.10V ≤ V ≤ 5.25V, 0mA ≤ I

CC

Output Regulation

(LTC1261L/LTC1261L-4.5)

4.75V ≤ V ≤ 5.25V, 0mA ≤ I

≤ 5mA

≤ 10mA

●

–4.657

–4.5

–4.343

V

CC

OUT

5.05V ≤ V ≤ 5.25V, 0mA ≤ I

CC

I

Output Short-Circuit Current

V

= 0V, V = 5.25V

●

100

220

mA

SC

OUT

CC

Note 4: The LTC1261L is guaranteed to meet specified performance from

0°C to 70°C and is designed, characterized and expected to meet these

extended commercial temperature limits, but is not tested at –40°C and

85°C. Guaranteed I grade parts are available, consult factory.

Note 1: The Absolute Maximum Ratings are those values beyond which

the life of a device may be impaired.

Note 2: All currents into device pins are positive; all currents out of device

pins are negative. All voltages are referenced to ground unless otherwise

specified.

Note 5: The LTC1261L-4 and LTC1261L-4.5 will operate with less than the

minimum V specified in the electrical characteristics table, but they are

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Note 3: The output should never be set to exceed V – 10.8V.

CC

not guaranteed to meet the ±3.5% V

specification.

OUT

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(See Test Circuits)

TYPICAL PERFORMANCE CHARACTERISTICS

Output Voltage vs Output Current

Output Voltage vs Supply Voltage

–3.0

–3.1

–3.2

–3.3

–3.4

–3.5

–3.6

–3.7

–3.8

–3.9

–4.0

–4.1

–4.2

–1.90

–1.95

–2.00

–2.05

–2.10

0

–0.25

–0.50

–0.75

–1.00

–1.25

–1.50

–1.75

–2.00

T

= 25°C

OUT

T

= 25°C

OUT

V

= –2V

OUT

A

V

= –4V

V

= –2V

V

= 4.5V

CC

V

= 2.7V

T

= 25°C

CC

A

T

= –40°C

A

T

= 85°C

A

= 5V

CC

V

= 3V

25

CC

–2.25

2.5

3.0

3.5

4.0

4.5

5.0

0

10

15

20

25

30

5

0

5

10

15

20

30

OUTPUT CURRENT (mA)

SUPPLY VOLTAGE (V)

OUTPUT CURRENT (mA)

1261L G03

1261L G02

1261L G01

3

LTC1261L

TYPICAL PERFORMANCE CHARACTERISTICS ^{(See Test Circuits)}

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Minimum Required V_CC

vs V_OUTand I_OUT

Maximum Output Current

vs Supply Voltage

Output Voltage vs Supply Voltage

5.6

5.2

4.8

4.4

4.0

3.6

3.2

2.8

2.4

2.0

80

70

60

50

40

30

20

10

0

–3.85

–3.90

–3.95

–4.00

–4.05

–4.10

–4.15

T

= 25°C

V

= –4V

A

OUT

V

= –2V

OUT

T

A

= 25°C

I

= 20mA

T

A

= –40°C

OUT

T

A

= 85°C

I

= 5mA

–3

I

= 10mA

–1

OUT

V

= –3V

V

= –4V

OUT

5.0 5.1

3.9 4.2

4.5 4.6 4.7 4.8 4.9

5.2 5.3

2.7 3.0 3.3 3.6

4.5 4.8 5.1 5.4

–5

–4

0

–2

SUPPLY VOLTAGE (V)

OUTPUT VOLTAGE (V)

1261L G04

1261L G06

1261L G05

Reference Voltage

vs Temperature

Supply Current vs Supply Voltage

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

3.0

2.5

2.0

1.5

1.0

0.5

0

1.25

1.24

1.23

1.22

V

I

= –2V

= 0

V

I

= –4.5V

= 0

V

= 5V

OUT

CC

ADJ = 0V

T

= 25°C

A

T

A

= 85°C

T

= 85°C

A

T

A

= 25°C

T

A

= –40°C

T

A

= –40°C

1.21

4.5 4.6 4.7 4.8 4.9 5.0 5.1

SUPPLY VOLTAGE (V)

5.2

–55 –35 –15

5

25 45 65 85 105 125

2.5

3.0

3.5

4.0

4.5

5.0

5.3

TEMPERATURE (°C)

SUPPLY VOLTAGE (V)

1261L G07

1261L G08

1261L G09

Output Short-Circuit Current

vs Temperature

Oscillator Frequency

vs Temperature

Start-Up Time vs Supply Voltage

725

700

675

650

625

600

575

550

525

160

140

120

100

80

0.7

0.6

T

I

= 25°C

OUT

T

V

= 25°C

A

= 10mA

= –4V

OUT

= 5V

CC

V

= 5.25V

= 5V

CC

0.5

V

= –4V

OUT

0.4

0.3

0.2

0.1

V

CC

60

V

OUT

= –2V

V

= 3V

40

V

= 2.7V

CC

20

0

20 35

–40 –25 –10

5

20 35 50 65 80 95

–40 –25 –10

5

50 65 80 95

2.5

3.5

4.5

3.0

4.0

5.0

TEMPERATURE (°C)

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

1261L G10

1261L G12

1261L G11

4

LTC1261L

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PIN FUNCTIONS

alsobeusedasanoptionalfeedbackcompensationpinto

reduce output ripple on both the adjustable and fixed

output voltage parts. See the Applications Information

section for more information on compensation and out-

put ripple.

V_CC(Pin1):PowerSupply. Thisrequiresaninputvoltage

between 2.7V and 5.25V. V_CCmust be bypassed to

ground with at least a 1µF capacitor placed in close

proximity to the chip. See the Applications Information

section for details.

C1⁺(Pin 2): C1 Positive Input. Connect a 0.1µF capacitor

OUT (Pin 6): Negative Voltage Output. This pin must be

bypassed to ground with a 1µF or larger capacitor. The

value of the output capacitor and its ESR have a strong

effect on output ripple. See the Applications Information

section for more details.

between C1⁺and C1^–.

C1^–(Pin3):C1NegativeInput.Connecta0.1µFcapacitor

from C1⁺to C1^–.

GND (Pin 4): Ground. Connect to a low impedance

ground. A ground plane will help to minimize regulation

errors.

REG (Pin 7): This is an open-drain output that pulls low

when the output voltage is within 5% of the set value. It

will sink 5mA to ground with a 5V supply. The external

circuitry must provide a pull-up or REG will not swing

high. The voltage at REG may exceed V_CCand can be

pulled up to 6V above ground without damage.

ADJ (COMP for fixed versions) (Pin 5): Output Adjust/

Compensation Pin. For adjustable parts this pin is used

to set the output voltage. The output voltage is divided

downwithanexternalresistordividerandfedbacktothis

pin to set the regulated output voltage. Typically the

resistor string should draw ≥10µA from the output to

minimize errors due to the bias current at the adjust pin.

Fixed output voltage parts have the internal resistor

string connected to this pin inside the package. The pin

can be used to trim the output voltage if desired. It can

SHDN (Pin 8): Shutdown. When this pin is at ground the

LTC1261L operates normally. An internal 5µA pull-down

keeps SHDN low if it is left floating. When SHDN is pulled

high, the LTC1261L enters shutdown mode. In shut-

down, the charge pump is disabled, the output collapses

to 0V and the quiescent current drops to 5µA typically.

TEST CIRCUITS

Adjustable Output

Fixed Output

1

2

3

4

8

7

6

5

1

2

3

4

8

7

6

5

V

SHDN

REG

V

SHDN

REG

CC

5V

CC

+

10µF

C1

LTC1261L

0.1µF

LTC1261L-X

0.1µF

–

V

OUT

V

OUT

= –4V (LTC1261L-4)

= –4.5V (LTC1261L-4.5)

OUT

V

OUT

C1

OUT

3.3µF

+

GND

ADJ

+

GND

COMP

1261L TCO1

1261L TCO2

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LTC1261L

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APPLICATIONS INFORMATION

The LTC1261L uses an inverting charge pump to generate

a regulated negative output voltage that is either equal to

or less than the supply voltage. The LTC1261L needs only

three external capacitors and is available in the MSOP and

SO-8 packages

closed. S2 connects C1⁺to ground, C1^–is connected to

the output by S4. The charge in C1 is transferred to C_OUT

setting it to a negative voltage.

,

The output voltage is monitored by COMP1 which com-

pares a divided replica of the output at ADJ (COMP for

fixed output voltage parts) to the internal reference. At the

beginning of a cycle the clock is low, forcing the output of

the AND gate low and charging the flying capacitor. The

next rising clock edge sets the RS latch, setting the charge

pump to transfer charge from the flying capacitor to the

output capacitor. As long as the output is below the set

point, COMP1 stays low, the latch stays set and the charge

pump runs at the full 50% duty cycle of the clock gated

through the AND gate. As the output approaches the set

voltage, COMP1 will trip whenever the divided signal

exceeds the internal 1.23V reference relative to OUT. This

resets the RS latch and truncates the clock pulses, reduc-

ing the amount of charge transferred to the output capaci-

torandregulatingtheoutputvoltage. Iftheoutputexceeds

the set point, COMP1 stays high, inhibiting the RS latch

and disabling the charge pump.

THEORY OF OPERATION

AblockdiagramoftheLTC1261LisshowninFigure1. The

heart of the LTC1261L is the charge pump core shown in

the dashed box. It generates a negative output voltage by

first charging the flying capacitor (C1) between V_CCand

ground. It then connects the top of the flying capacitor to

ground, forcing the bottom of the flying capacitor to a

negative voltage. The charge on the flying capacitor is

transferred to the output bypass capacitor, leaving it

charged to the negative output voltage. This process is

driven by the internal 650kHz clock.

Figure 1 shows the charge pump configuration. With the

clock low, C1 is charged to V_CCby S1 and S3. At the next

rising clock edge, S1 and S3 are open and S2 and S4

V

CC

CLK

650kHz

S1

OUT

C

OUT

+

R2

R1

C1

S

C1

S4

Q

–

S2

C1

R

INTERNALLY

CONNECTED FOR

FIXED OUTPUT

VOLTAGE PARTS

S3

ADJ (COMP)

REG

+

COMP1

+

–

COMP2

60mV

1.17V

V

REF

= 1.23V

1261L F01

V

OUT

Figure 1. Block Diagram

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LTC1261L

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APPLICATIONS INFORMATION

COMP2 also monitors the divided signal at ADJ but it is

connected to a 1.17V reference, 5% below the main

reference voltage. When the divided output exceeds this

lower reference voltage indicating that the output is within

5% of the set value, COMP2 goes high turning on the REG

output transistor. This is an open drain N-channel device

capable of sinking 4mA with a 3.3V V_CCand 5mA with a 5V

V_CC. When in the “off” state (divided output is more than

5% below V_REF) the drain can be pulled above V_CCwithout

damage up to a maximum of 6V above ground. Note that

the REG output only indicates if the magnitude of the

output is below the magnitude of the set point by 5% (i.e.,

V_OUT> –4.75Vfora–5Vsetpoint). Ifthemagnitudeofthe

outputisforcedhigher thanthemagnitudeofthesetpoint

( i.e., to –5.25V when the output is set for –5V) the REG

output will stay low.

of the charge pump and stopping the charge transfer.

Because the RC time constant of the capacitors and the

switches is quite short, the ADJ pin must have a wide AC

bandwidth to be able to respond to the output in time.

External parasitic capacitance at the ADJ pin can reduce

the bandwidth to the point where the comparator cannot

respond by the time the clock pulse finishes. When this

happens the comparator will allow a few complete pulses

through, then overcorrect and disable the charge pump

until the output drops below the set point. Under these

conditions the output will remain in regulation but the

output ripple will increase as the comparator “hunts” for

the correct value.

To prevent this from happening, an external capacitor can

be connected from ADJ (or COMP for fixed output voltage

parts)togroundtocompensateforexternalparasiticsand

increase the regulation loop bandwidth (Figure 2). This

sounds counterintuitive until we remember that the inter-

nalreferenceisgeneratedwithrespecttoOUT,notground.

The feedback loop actually sees ground as its “output,”

thus the compensation capacitor should be connected

across the “top” of the resistor divider, from ADJ (or

COMP) to ground. By the same token, avoid adding

capacitance between ADJ (or COMP) and V_OUT. This will

slow down the feedback loop and increase output ripple.

A 100pF capacitor from ADJ or COMP to ground will

compensate the loop properly under most conditions for

fixed voltage versions of the LTC1261L. For the adjustable

LTC1261L, the capacitor value will be dependent upon the

values of the external resistors in the divider network.

OUTPUT RIPPLE

OutputrippleintheLTC1261Lispresent fromtwosources;

voltage droop at the output capacitor between clocks and

frequency response of the regulation loop. Voltage droop

is easy to calculate. With a typical clock frequency of

650kHz, the charge on the output capacitor is refreshed

once every 1.54µs. With a 15mA load and a 3.3µF output

capacitor, the output will droop by:

1.54µs

3.3µF

∆t

OUT

I

= 15mA

= 7mV

LOAD

)

C

)

This can be a significant ripple component when the

output is heavily loaded, especially if the output capacitor

is small. If absolute minimum output ripple is required, a

10µF or greater output capacitor should be used.

TO CHARGE

PUMP

RESISTORS ARE

INTERNAL FOR FIXED

OUTPUT VOLTAGE PARTS

Regulation loop frequency response is the other major

contributor to output ripple. The LTC1261L regulates the

output voltage by limiting the amount of charge trans-

ferred to the output capacitor on a cycle-by-cycle basis.

The output voltage is sensed at the ADJ pin (COMP for

fixed output voltage versions) through an internal or

external resistor divider from the OUT pin to ground. As

the flying capacitor is first connected to the output, the

output voltage begins to change quite rapidly. As soon as

it exceeds the set point COMP1 trips, switching the state

COMP1

C

R1

100pF

ADJ/COMP

+

–

REF

R2

1.23V

V

OUT

1261L F02

Figure 2. Regulator Loop Compensation

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LTC1261L

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APPLICATIONS INFORMATION

capacitortypeforboththeinputbypasscapacitorandthe

flying capacitor.

OUTPUT FILTERING

If extremely low output ripple (<5mV) is required, addi-

tional output filtering is required. Because the LTC1261L

uses a high 650kHz switching frequency, fairly low value

RC or LC networks can be used at the output to effectively

filter the output ripple. A 10Ω series output resistor and a

3.3µFcapacitorwillcutoutputrippletobelow3mV(Figure

3). Further reductions can be obtained with larger filter

capacitors or by using an LC output filter.

In applications where the maximum load current is well-

definedandoutputrippleiscriticalorinputpeakcurrents

need to be minimized, the flying capacitor value can be

tailored to the application. Reducing the value of the

flying capacitor reduces the amount of charge trans-

ferredwitheachclockcycle. Thislimitsmaximumoutput

current, but also cuts the size of the voltage step at the

output with each clock cycle. The smaller capacitor

draws smaller pulses of current out of V_CCas well,

limiting peak currents and reducing the demands on the

input supply. Table 1 shows recommended values of

flying capacitor vs maximum load capacity.

5V

1µF

V

CC

10Ω

2

3

6

5

+

V

= – 4V

C1

OUT

0.1µF

LTC1261L-4

–

Table 1. Typical Max Load (mA) vs Flying Capacitor Value at

T_A= 25°C, V_OUT= –4V

3.3µF

+

C1

COMP

FLYING

CAPACITOR

VALUE (µF)

GND

4

100pF

MAX LOAD (mA)

= 5V

V

CC

1261L F03

0.1

20

Figure 3. Output Filter Cuts Ripple Below 3mV

0.047

0.033

0.022

0.01

15

10

5

CAPACITOR SELECTION

Capacitor Sizing

1

The output capacitor performs two functions: it provides

output current to the load during half of the charge pump

cycle and its value helps to set the output ripple voltage.

For applications that are insensitive to output ripple, the

output bypass capacitor can be as small as 1µF. Larger

output capacitors will reduce output ripple further at the

expense of turn-on time.

The performance of the LTC1261L is affected by the

capacitors to which it connects. The LTC1261L requires

bypass capacitors to ground for both the V_CCand OUT

pins. The input capacitor provides most of LTC1261L’s

supply current while it is charging the flying capacitors.

This capacitor should be mounted as close to the package

as possible and its value should be at least ten times larger

than the flying capacitor. Ceramic capacitors generally

provide adequate performance. Avoid using a tantalum

capacitor as the input bypass unless there is at least a

0.1µF ceramic capacitor in parallel with it. The charge

pump capacitor is somewhat less critical since its peak

current is limited by the switches inside the LTC1261L.

Most applications should use a 0.1µF as the flying

capacitorvalue. Conveniently, ceramiccapacitorsarethe

mostcommontypeof0.1µFcapacitorandtheyworkwell

here. Usually the easiest solution is to use the same

Capacitor ESR

Output capacitor Equivalent Series Resistance (ESR) is

another factor to consider. Excessive ESR in the output

capacitor can fool the regulation loop into keeping the

outputartificiallylowbyprematurelyterminatingthecharg-

ing cycle. As the charge pump switches to recharge the

output a brief surge of current flows from the flying

capacitors to the output capacitor. This current surge can

be as high as 100mA under full load conditions. A typical

8

LTC1261L

U

W U U

APPLICATIONS INFORMATION

3.3µF tantalum capacitor has 1Ω or 2Ω of ESR; 100mA ×

2Ω= 200mV. If the output is within 200mV of the set point

this additional 200mV surge will trip the feedback com-

parator and terminate the charging cycle. The pulse dissi-

pates quickly and the comparator returns to the correct

state, but the RS latch will not allow the charge pump to

responduntilthenextclockedge.Thispreventsthecharge

pump from going into very high frequency oscillation

under such conditions but it also creates an output error

as the feedback loop regulates based on the top of the

spike, not the average value of the output (Figure 4). The

resulting output voltage behaves as if a resistor of value

approaches half of a clock period (the time the capacitors

have to share charge at full duty cycle) the output current

capability of the LTC1261L starts to diminish. For a 0.1µF

flying capacitor, this gives a maximum total series resis-

tance of:

t

1

2

1

2

1

CLK

=

/0.1µF = 7.7Ω

)

C

)

650kHz

FLY

Most of this resistance is already provided by the internal

switches in the LTC1261L. More than 1Ω or 2Ω of ESR on

the flying capacitors will start to affect the regulation at

maximum load.

C

_ESR×(I_PK/I_AVE)Ωwasplacedinserieswiththeoutput.To

avoid this nasty sequence of events, connect a 0.1µF

ceramic capacitor in parallel with the larger output capaci-

tor. The ceramic capacitor will “eat” the high frequency

spike, preventing it from fooling the feedback loop, while

thelargerbutslowertantalumoraluminumoutputcapaci-

tor supplies output current to the load between charge

cycles.

RESISTOR SELECTION

Resistor selection is easy with the fixed output voltage

versions of the LTC1261L—no resistors are needed!

Selectingtherightresistorsfortheadjustablepartsisonly

a little more difficult. A resistor divider should be used to

divide the signal at the output to give 1.23V at the ADJ pin

with respect to V_OUT(Figure 5). The LTC1261L uses a

positive reference with respect to V_OUT, not a negative

reference with respect to ground (Figure 1 shows the

reference connection). Be sure to keep this in mind when

connecting the resistors! If the initial output is not what

you expected, try swapping the two resistors.

CLOCK

V

SET

OUT

AVERAGE

LOW ESR

V

OUT

OUTPUT CAP

COMP1

OUTPUT

The LTC1261L can be internally configured for other

fixed output voltages. Contact the Linear Technology

Marketing department for details.

V

SET

OUT

AVERAGE

HIGH ESR

OUTPUT CAP

V

COMP1

OUTPUT

1261L F04

4

GND

R1

R2

LTC1261L

ADJ

5

6

Figure 4. Output Ripple with Low and High ESR Capacitors

R1 + R2

R2

Note that ESR in the flying capacitor will not cause the

same condition; in fact, it may actually improve the situa-

tion by cutting the peak current and lowering the ampli-

tude of the spike. However, more flying capacitor ESR is

not necessarily better. As soon as the RC time constant

V

OUT

= –1.23V

OUT

(

)

1261L F05

Figure 5. External Resistor Connections

9

LTC1261L

TYPICAL APPLICATIONS N

U

5V Input, –4V Output GaAs FET Bias Generator

P-CHANNEL

POWER SWITCH

V

BAT

SHUTDOWN

10k

1

2

8

7

6

5

5V

V

SHDN

REG

CC

+

C1

1µF

0.1µF

LTC1261L-4

3

4

–4V BIAS

–

C2

OUT

GaAs

TRANSMITTER

3.3µF

GND

COMP

+

100pF

1261 TA03

1mV Ripple, 5V Input, –4V Output GaAs FET Bias Generator

P-CHANNEL

POWER SWITCH

V

BAT

SHUTDOWN

10k

1

2

8

7

6

5

5V

V

SHDN

REG

CC

+

C1

1µF

0.1µF

LTC1261L-4

100µH

3

4

–4V BIAS

–

C2

OUT

GaAs

TRANSMITTER

10µF

GND

COMP

+

100pF

1261 TA04

5V Input, –0.5V Output GaAs FET Bias Generator

P-CHANNEL

POWER SWITCH

V

BAT

SHUTDOWN

5V

43.2k

10k

1%

1

2

3

4

8

7

6

5

V

SHDN

REG

CC

+

C1

LTC1261L

1µF

0.1µF

–0.5V BIAS

–

C2

OUT

GaAs

TRANSMITTER

12.4k

1%

GND

ADJ

3.3µF

+

100pF

1261 TA05

10

LTC1261L

U

Dimensions in inches (millimeters) unless otherwise noted.

PACKAGE DESCRIPTION

MS8 Package

8-Lead Plastic MSOP

(LTC DWG # 05-08-1660)

0.118 ± 0.004*

(3.00 ± 0.102)

8

7

6

5

0.118 ± 0.004**

(3.00 ± 0.102)

0.192 ± 0.004

(4.88 ± 0.10)

1

2

3

4

0.040 ± 0.006

(1.02 ± 0.15)

0.034 ± 0.004

(0.86 ± 0.102)

0.007

(0.18)

0° – 6° TYP

SEATING

PLANE

0.012

(0.30)

REF

0.021 ± 0.006

(0.53 ± 0.015)

0.006 ± 0.004

(0.15 ± 0.102)

MSOP (MS8) 1197

0.0256

(0.65)

TYP

* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,

PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

S8 Package

8-Lead Plastic Small Outline (Narrow 0.150)

(LTC DWG # 05-08-1610)

0.189 – 0.197*

(4.801 – 5.004)

7

5

8

6

0.150 – 0.157**

(3.810 – 3.988)

0.228 – 0.244

(5.791 – 6.197)

1

0.053 – 0.069

3

4

2

0.010 – 0.020

(0.254 – 0.508)

× 45°

(1.346 – 1.752)

0.004 – 0.010

(0.101 – 0.254)

0.008 – 0.010

(0.203 – 0.254)

0°– 8° TYP

0.016 – 0.050

0.406 – 1.270

0.050

(1.270)

TYP

0.014 – 0.019

(0.355 – 0.483)

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

SO8 0996

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

11

LTC1261L

U

TYPICAL APPLICATIONS N

Low Output Voltage Generator

Minimum Parts Count –4.5V Generator

5V

1µF

1

100pF

R

S

1

2

3

4

8

7

6

5

V

CC

5V

V

SHDN

REG

CC

+

5

6

ADJ

2

3

+

C1

LTC1261L-4.5

C1

1µF

0.1µF

LTC1261L

–

124k

V

= – 4.5V

–

OUT

C1

AT 5mA

3.3µF

V

OUT

= V – 9.92µA (R + 124k)

CC S

OUT

GND

COMP

+

= –0.5V (R = 432k)

GND

4

S

3.3µF

1N5817

+

1261L TA07

= –1V (R = 487k)

S

1261L TA06

RELATED PARTS

PART NUMBER

LT1121

DESCRIPTION

Micropower Low Dropout Regulator with Shutdown

COMMENTS

0.4V Dropout Voltage at 150mA, Low Noise,

Switched Capacitor Regulated Voltage Inverter

Clock Synchronized Switched Capacitor Regulated Voltage Inverter GaAs FET Bias

Fixed 1.8V or 2V Output from 2.4V to 6V Input,

LTC1429

LTC1503-1.8/LTC1503-2 High Efficiency Inductorless Step-Down DC/DC Converter

I

= 100mA

OUT

LTC1514/LTC1515

LTC1516

Step-Up/Step-Down Switched Capacitors DC/DC Converters

Micropower, Regulated 5V Charge Pump DC/DC Converter

Low Noise Switched Capacitor Regulated Voltage Inverter

Sim Power Supply and Level Translator

V

2V to 10V, V

is Fixed or Adjustable, I up to 50mA

OUT

IN

OUT

I

= 20mA (V ≥2V), I

= 50mA (V ≥3V)

OUT IN

OUT

IN

LTC1517-5

LTC1522 Without Shutdown and Packaged in SOT-23

I = 10mA (V ≥2.7V), I = 20mA (V ≥3V)

OUT

LTC1522

IN

OUT

IN

LTC1550L/LTC1551L

LTC1555/LTC1556

GaAs FET Bias with Linear Regulator, <1mV Ripple, MSOP

Step-Up/Step-Down Sim Power Supply

and Level Translators

LT1611

1.4MHz Inverting Mode Switching Regulator

–5V at 150mA from a 5V Input, 5-lead SOT-23

–5V at 200mA from 5V Input in MSOP

LT1614

Inverting 600kHz Switching Regulator with Low-Battery Detector

Micropower Inverting DC/DC Converters

LT1617/LT1617-1

–15V at 12mA from 2.5V Input, 5-lead SOT-23

LTC1682/LTC1682-3.3/ Low Noise Doubler Charge Pumps

LTC1682-5

Output Noise = 60µV , 2.5V to 5.5V Output

RMS

LTC1754-5

Micropower, Regulated 5V Charge Pump with Shutdown in SOT-23 I = 13µA, I

= 50mA (V ≥ 3V), I

= 25mA

CC

OUT

IN

OUT

(V ≥ 2.7V)

IN

1261lf LT/TP 0200 4K • PRINTED IN USA

LINEAR TECHNOLOGY CORPORATION 1999

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

12

●

(408)432-1900 FAX:(408)434-0507 www.linear-tech.com


型号：	LTC1261LCS8-4#TRPBF
厂家：	Linear
描述：	LTC1261L - Switched Capacitor Regulated Voltage Inverter; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C 开关光电二极管
文件：	总12页 (文件大小：185K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC1261LCS8-4#TRPBF [Linear]

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