LTC1344I [Linear]
Software-Selectable Cable Terminator; 软件可选的电缆端接型号: | LTC1344I |
厂家: | Linear |
描述: | Software-Selectable Cable Terminator |
文件: | 总12页 (文件大小:256K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC1344
Software-Selectable
Cable Terminator
U
FEATURES
DESCRIPTIO
The LTC®1344 features six software-selectable
multiprotocol cable terminators. Each terminator can be
configured as an RS422 (V.11) 100Ω minimum differen-
tial load, V.35 T-network load or an open circuit for use
with RS232 (V.28) or RS423 (V.10) transceivers that
provide their own termination. When combined with the
LTC1343,theLTC1344formsacompletesoftware-select-
able multiprotocol serial port. A data bus latch feature
allows sharing of the select lines between multiple inter-
face ports.
■
Software-Selectable Cable Termination for:
RS232 (V.28)
RS423 (V.10)
RS422 (V.11)
RS485
RS449
EIA530
EIA530-A
V.35
V.36
X.21
The LTC1344 is available in a 24-lead SSOP.
■
Outputs Won’t LUoad the Line with Power Off
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
■
Data Networking
■
CSU and DSU
■
Data Routers
U
TYPICAL APPLICATION
CTS
DSR
DCD
DTR
RTS
RL
TM
R4
RXD
R3
RXC
R2
TXC
SCTE
D3
TXD
D2
LL
Daisy-Chained Control Outputs
LTC1343
LTC1343
D4
D1
D2
D4
D3
D1
R3
R2
R1
R4
R1
LTC1344
13
5
22
6
10
8
23 20 19
4
21
1
7
25 16
3
9
17 12 15
11 24 14
2
18
DB-25 CONNECTOR
1344 TA01
1
LTC1344
W
U
W W
U W
/O
TOP VIEW
PACKAGE RDER I FOR ATIO
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Positive Supply Voltage (VCC)................................... 7V
Negative Supply Voltage (VEE) ........................... –13.2V
Input Voltage (Logic Inputs) .... VEE – 0.3V to VCC + 0.3V
Input Voltage (Load Inputs).................................. ±18V
Operating Temperature Range
LTC1344C ............................................... 0°C to 70°C
LTC1344I........................................... –40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
1
2
M1
24
23
22
21
20
19
18
17
16
15
14
13
M0
M2
V
EE
3
DCE/DTE
LATCH
R6B
R1C
R1B
R1A
R2A
R2B
R2C
R3A
R3B
R3C
GND
LTC1344CG
LTC1344IG
4
5
6
R6A
7
R5A
8
R5B
9
R4A
10
11
12
R4B
V
CC
GND
G PACKAGE
24-LEAD PLASTIC SSOP
TJMAX = 150°C, θJA = 100°C/W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°.
VCC = 5V ±5%, VEE = –5V ±5%, TA = TMIN to TMAX (Notes 2, 3) unless otherwise noted.
SYMBOL PARAMETER
Supplies
CONDITIONS
MIN
TYP
MAX
UNITS
I
Supply Current
All Digital Pins = GND or V
●
200
700
µA
CC
CC
Terminator Pins
R
V.35
Differential Mode Impedance
Common Mode Impedance
All Loads (Figure 1), –2V ≤ V ≤ 2V (Commercial)
●
●
90
135
103
153
110
165
Ω
Ω
CM
All Loads (Figure 2), –2V ≤ V ≤ 2V (Commercial)
CM
All Loads (Figure 1), –2V ≤ V ≤ 2V (Industrial)
●
●
90
130
104
153
125
170
Ω
Ω
CM
All Loads (Figure 2), –2V ≤ V ≤ 2V (Industrial)
CM
R
Differential Mode Impedance
All Loads (Figure 1), –7V ≤ V ≤ 7V (Commercial)
100
100
104
104
Ω
Ω
V.11
CM
All Loads (Figure 1), V = 0V (Commercial)
●
●
●
110
125
±50
CM
All Loads (Figure 1), V = 0V (Industrial)
95
104
Ω
CM
I
High Impedance Leakage Current
All Loads, –7V ≤ V ≤ 7V (Commercial)
±1
µA
LEAK
CM
Logic Inputs
V
V
Input High Voltage
Input Low Voltage
Input Current
All Logic Input Pins
All Logic Input Pins
All Logic Input Pins
●
●
●
2
V
V
IH
IL
0.8
I
±10
µA
IN
Note 3: All typicals are given at V = 5V, V = –5V, T = 25°C.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
CC
EE
A
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are reference to ground unless otherwise
specified.
2
LTC1344
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
V.11 or V.35 Differential Mode
Impedance vs Supply Voltage
(VCC)
V.11 or V.35 Differential Mode
V.11 or V.35 Differential Mode
Impedance vs Common Mode
Impedance vs Temperature
Voltage
105
104
103
120
115
108
106
104
102
100
V
= –7V
= –2V
CM
V
CM
V
110
105
100
= 0V
CM
V
= 7V
CM
–40 –20
0
20
40
60
80 100
4.6
4.8
5.0
5.2
5.4
–8 –6 –4 –2
0
2
4
6
8
V
VOLTAGE (V)
TEMPERATURE (°C)
COMMON MODE VOLTAGE (V)
CC
1344 G03
1344 G01
1344 G02
V.11 or V.35 Differential Mode
Impedance vs Negative Supply
Voltage (VEE)
V.35 Common Mode Impedance
vs Temperature
V.35 Common Mode Impedance
vs Common Mode Voltage
105
104
103
165
160
158
156
154
152
150
V
= –2V
CM
155
150
145
V
= 0V
60
CM
V
= 2V
CM
20
–20
0
40
80 100
–2
0
2
–5.4
–5.2
V
–5.0
–4.8
–4.6
–40
–1
1
VOLTAGE (V)
TEMPERATURE (°C)
COMMON MODE VOLTAGE (V)
EE
1344 G04
1344 G05
1344 G06
V.35 Common Mode Inpedance
vs Negative Supply Voltage (VEE)
V.35 Common Mode Impedance
Supply Current vs Temperature
vs Supply Voltage (VCC
)
154
153
152
151
150
153
152
151
310
290
270
250
230
210
190
170
150
4.6
4.8
5.0
5.2
5.4
–5.4
–5.2
V
–5.0
–4.8
–4.6
–50
–20
10
40
70
100
V
VOLTAGE (V)
VOLTAGE (V)
CC
TEMPERATURE (°C)
EE
1344 G07
1344 G08
1344 G09
3
LTC1344
U
U
U
PIN FUNCTIONS
M0 (Pin 1): TTL Level Mode Select Input. The data on M0
R4B (Pin 15): Load 4 Node B.
R4A (Pin 16): Load 4 Node A.
R5B (Pin 17): Load 5 Node B.
R5A (Pin 18): Load 5 Node A.
R6A (Pin 19): Load 6 Node A.
R6B (Pin 20): Load 6 Node B.
is latched when LATCH is high.
VEE (Pin 2): Negative Supply Voltage Input. Can connect
directly to the LTC1343 VEE pin.
R1C (Pin 3): Load 1 Center Tap.
R1B (Pin 4): Load 1 Node B.
R1A (Pin 5): Load 1 Node A.
LATCH(Pin21):TTLLevelLogicSignalLatchInput.When
it is low the input buffers on M0, M1, M2 and DCE/DTE are
transparent. When it is high the logic pins are latched into
their respective input buffers. The data latch allows the
select lines to be shared between multiple I/O ports.
R2A (Pin 6): Load 2 Node A.
R2B (Pin 7): Load 2 Node B.
R2C (Pin 8): Load 2 Center Tap.
R3A (Pin 9): Load 3 Node A.
DCE/DTE (Pin 22): TTL Level Mode Select Input. The DCE
mode is selected when it is high and DTE mode when low.
The data on DCE/DTE is latched when LATCH is high.
R2B (Pin 10): Load 2 Node B.
R3C (Pin 11): Load 3 Center Tap.
GND (Pin 12): Ground Connection for Load 1 to Load 3.
GND (Pin 13): Ground Connection for Load 4 to Load 6.
VCC (Pin 14): Positive Supply Input. 4.75V ≤ VCC ≤ 5.25V.
M2 (Pin 23): TTL Level Mode Select Input 1. The data on
M2 is latched when LATCH is high.
M1 (Pin 24): TTL Level Mode Select Input 2. The data on
M1 is latched when LATCH is high.
TEST CIRCUITS
A
R1
R1
51.5Ω
51.5Ω
C
C
S1
ON
S2
OFF
S1
ON
S2
R3
ON
R3
124Ω
Ω
124Ω
A, B
R2
51.5Ω
R2
51.5Ω
Ω
B
±7V OR ±2V
V
±2V
V
1344 F01
1344 F02
Figure 1. Differential V.11 or V.35 Impedance Measurement
Figure 2. V.35 Common Mode Impedance Measurement
4
LTC1344
W
U
ODE SELECTIO
LTC1344
MODE NAME
DCE/DTE
M2
M1
M0
R1
R2
R3
R4
R5
R6
V.10/RS423
RS530A
X
0
0
0
Z
Z
Z
Z
Z
Z
0
1
0
0
0
0
1
1
Z
Z
Z
Z
Z
Z
V.11
Z
V.11
V.11
V.11
V.11
Reserved
X.21
0
1
0
0
1
1
0
0
Z
V.11
Z
V.11
Z
V.11
V.11
Z
V.11
Z
V.11
Z
0
1
0
0
1
1
1
1
Z
Z
Z
Z
Z
Z
V.11
Z
V.11
V.11
V.11
V.11
V.35
0
1
1
1
0
0
0
0
V.35
V.35
V.35
V.35
Z
V.35
V.35
Z
V.35
V.35
V.35
V.35
RS530/RS449/V.36
0
1
1
1
0
0
1
1
Z
Z
Z
Z
Z
Z
V.11
Z
V.11
V.11
V.11
V.11
V.28/RS232
No Cable
X
X
1
1
1
1
0
1
Z
Z
Z
Z
Z
Z
V.11
V.11
V.11
V.11
V.11
V.11
X = don’t care, 0 = logic low, 1 = logic high
A
A
B
A
R1
R1
51.5Ω
R1
51.5Ω
51.5Ω
C
C
C
S1
ON
S2
OFF
S1
ON
S1
OFF
S2
OFF
R3
124Ω
S2
ON
R3
124Ω
R3
124Ω
R2
51.5Ω
R2
51.5Ω
R2
51.5Ω
1344 F03
B
B
V.11 Mode
V.35 Mode
Figure 3. LTC1344 Modes
Hi-Z Mode
5
LTC1344
U
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APPLICATIONS INFORMATION
BALANCED
INTERCONNECTING
CABLE
Multiprotocol Cable Termination
GENERATOR
LOAD
CABLE
One of the most difficult problems facing the designer of
a multiprotocol serial interface is how to allow the trans-
mitters and receivers for different electrical standards to
share connector pins. In some cases the transmitters and
receivers for each interface standard can be simply tied
together and the appropriate circuitry enabled. But the
biggest problem still remains: how to switch the various
cable terminations required by the different standards.
TERMINATION RECEIVER
A
C
A'
B
'
'
1344 F04
C
Figure 4. Typical V.10 Interface
A
Traditional implementations have included switching re-
sistors with expensive relays or requiring the user to
change termination modules every time the interface
standard has changed. Custom cables have been used
withtheterminationinthecableheadorseparatetermina-
tions are built on the board, and a custom cable routes the
signals to the appropriate termination. Switching the
terminationsusingFETsisdifficultbecausetheFETsmust
remain off even though the signal voltage is beyond the
supply voltage for the FET drivers or the power is off.
V.10
RECEIVER
LTC1344
51.5Ω
S1
OFF
S2
OFF
Z
Z
124Ω
51.5Ω
B
C
I
Z
3.25mA
–10V
–3V
TheLTC1344solvesthecableterminationswitchingprob-
lem via software control. The LTC1344 provides termina-
tion for the V.10 (RS423), V.11 (RS422), V.28 (RS232)
and V.35 electrical protocols.
Z
V
10V
Z
3V
–3.25mA
1344 F05
Figure 5. V.10 Interface Using the LTC1344
V.10 (RS423) Termination
V.11 (RS422) Termination
A typical V.10 unbalanced interface is shown in Figure 4.
A V.10 single-ended generator output A with ground C is
A typical V.11 balanced interface is shown in Figure 6. A
V.11 differential generator with outputs A and B with
ground C is connected to a differential receiver with
connected to a differential receiver with inputs A
nected to A and input B connected to the signal return
ground C. The receiver’s ground C is separate from the
' con-
'
'
groundC',inputsA'connectedtoA,B'connectedtoB.The
signal return. Usually no cable termination is required for
V.10 interfaces but the receiver inputs must be compliant
with the impedance curve shown in Figure 5.
V.11 interface requires a different termination at the re-
ceiverendthathasaminimumvalueof100Ω.Thereceiver
inputs must also be compliant with the impedance curve
shown in Figure 7.
In V.10 mode, both switches S1 and S2 are turned off so
the only cable termination is the input impedance of the
V.10 receiver.
In V.11 mode, switch S1 is turned on and S2 is turned off
so the cable is terminated with a 103Ω impedance.
6
LTC1344
U
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APPLICATIONS INFORMATION
BALANCED
INTERCONNECTING
BALANCED
INTERCONNECTING
CABLE
GENERATOR
CABLE
LOAD
CABLE
GENERATOR
LOAD
CABLE
TERMINATION RECEIVER
TERMINATION RECEIVER
A
A'
100Ω
MIN
A
C
A'
C'
B
C
B
C
'
'
1344 F08
1344 F06
Figure 8. Typical V.28 Interface
Figure 6. Typical V.11 Interface
A
A
V.11
RECEIVER
V.28
RECEIVER
LTC1344
LTC1344
51.5Ω
51.5Ω
S1
ON
S2
OFF
S1
OFF
S2
OFF
Z
Z
124Ω
124Ω
5k
51.5Ω
51.5Ω
B
C
B
C
1344 F09
I
Z
Figure 9. V.28 Interface Using the LTC1344
3.25mA
–10V
–3V
Z
V
Z
3V
10V
V.35 Termination
–3.25mA
1344 F07
A typical V.35 balanced interface is shown in Figure 10. A
V.35 differential generator with outputs A and B with
ground C is connected to a differential receiver with
Figure 7. V.11 Interface Using the LTC1344
groundC',inputsA'connectedtoA,B'connectedtoB.The
V.28 (RS232) Termination
V.35 interface requires a T-network termination at the
receiver end and the generator end. In V.35 mode both
switches S1 and S2 in the LTC1344 are turned on as
shown in Figure 11.
A typical V.28 unbalanced interface is shown in Figure 8.
A V.28 single-ended generator output A with ground C is
connected to a single-ended receiver with inputs A
nected to A, ground C connected via the signal return
ground to C. The V.28 standard requires a 5k terminating
resistor to ground which is included in almost all compli-
ant receivers as shown in Figure 9. Because the termina-
tion is included in the receiver, both switches S1 and S2 in
the LTC1344 are turned off.
' con-
'
The differential impedance measured at the connector
must be 100Ω ±10Ω and the impedance between shorted
terminals A'and B'to ground C'must be 150Ω ±15Ω. The
input impedance of the V.35 receiver is connected in
parallel with the T-network inside the LTC1344, which can
cause the overall impedance to fail the specification on the
7
LTC1344
U
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APPLICATIONS INFORMATION
A
BALANCED
INTERCONNECTING
GENERATOR
CABLE
LOAD
LTC1344
51.5Ω
V.35
DRIVER
CABLE
TERMINATION RECEIVER
S1
ON
S2
ON
124Ω
A
A'
50Ω
50Ω
51.5Ω
125Ω
125Ω
B
50Ω
50Ω
C1
100pF
B
C
B
'
C
1344 F12
1344 F10
C
'
Figure 12. V.35 Driver Using the LTC1344
Figure 10. Typical V.35 Interface
A
and B to ground C must be 150Ω ±15Ω. For the generator
termination, switches S1 and S2 are both on and the top
side of the center resistor is brought out to a pin so it can
bebypassedwithanexternalcapacitortoreducecommon
mode noise as shown in Figure 12.
V.35
RECEIVER
LTC1344
51.5Ω
S1
ON
Z
Z
S2
ON
124Ω
51.5Ω
Any mismatch in the driver rise and fall times or skew in
the driver propagation delays will force current through
the center termination resistor to ground causing a high
frequency common mode spike on the A and B terminals.
ThecommonmodespikecancauseEMIproblemsthatare
reduced by capacitor C1 which shunts much of the com-
mon mode energy to ground rather than down the cable.
B
C
I
Z
1mA
–7V
–3V
Z
V
Z
3V
12V
–0.8mA
1344 F11
The LATCH Pin
Figure 11. V.35 Receiver Using the LTC1344
The LATCH pin (21) allows the select lines (M0, M1, M2
and DCE/DTE) to be shared with multiple LTC1344s, each
with its own LATCH signal. When the LATCH pin is held
low the select line input buffers are transparent. When the
LATCH pin is pulled high, the select line input buffers latch
the state of the Select pins so that changes on the select
lines are ignored until LATCH is pulled low again. If the
latch feature is not used, the LATCH pin should be tied to
ground.
low side. However, all of Linear Technology’s V.35 receiv-
ers meet the RS485 input impedance specification as
shown in Figure 11, which insures compliance with the
V.35 specification when used with the LTC1344.
The generator differential impedance must be 50Ω to
150Ω and the impedance between shorted terminals A
8
LTC1344
U
TYPICAL APPLICATIONS N
Figure 13 shows a typical application for the LTC1344
using the LTC1343 mixed mode transceiver chip to gener-
ate the clock and data signals for a serial interface. The
LTC1344 VEE supply is generated from the LTC1343
charge pump and the select lines M0, M1, M2, DCE and
LATCH are shared by both chips. Each driver output and
receiver input is connected to one of the LTC1344 termi-
nation ports. Each electrical protocol can then be chosen
using the digital select lines.
100pF
100pF
100pF
8
3
11
12
13
1
M0
M0
24
23
M1
M2
M1
M2
LTC1344
22
21
DCE/DTE
LATCH
DCE/DTE
LATCH
V
V
CC
EE
5
4
7
10 16 15 18 17 19 20
14
2
6
9
5V
C2
C1
1µF
+
3.3µF
3
8
42
LTC1343
M0
M1
M2
DCE/DTE
LATCH
17
18
19
21
22
DTE
DCE
38
+
–
+
–
TXD
RXD
6
7
9
37
36
TXD
RXD
+
–
+
SCTE
TXC
35
34
–
+
SCTE
NC
TXC
RXC
33
32
–
NC
RXC
NC
+
RXC
13
14
15
31
30
–
RXC
TXC
NC
SCTE
+
+
29
28
–
+
–
TXC
RXD
SCTE
TXD
+
27
–
–
RXD
TXD
1344 F13
Figure 13. Typical Application Using the LTC1344
9
LTC1344
TYPICAL APPLICATIONS N
U
Controller Selectable Multiprotocol DTE Port with DB-25 Connector
C6
C7
C8
100pF 100pF 100pF
13
12
3
8
11
LTC1344
V
CC
5V
14
2
V
V
CC
21
1
2
44
LATCH
C2
C3
1µF
43
42
1µF
C1
1µF
4
3
8
CHARGE
PUMP
EE
C4
+
DB-25 CONNECTOR
3.3µF
DCE/
DTE M2 M1 M0
41
C5
1µF
LTC1343
D1
5
4
6
7
9
10 16 15 18 17 19 20 22 23 24 1
DTE
LL A
DCE
TM A
5
39
18
DTE_LL/DCE_TM
DTE_TXD/DCE_RXD
DTE_SCT/DEC_RXC
38
37
36
35
34
33
2
14
24
11
TXD A
TXD B
SCTE A
SCTE B
RXD A
RXD B
RXC A
RXC B
6
7
9
D2
D3
D4
10
12
13
32
31
30
29
28
27
15
12
17
9
3
16
TXC A
TXC B
RXC A
RXC B
RXD A
RXD B
TXC A
TXC B
SCTE A
SCTE B
TXD A
TXD B
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
DTE_RXD/DCE_TXD
DTE_TM/DCE_LL
R1
R2
R3
R4
14
15
16
20
22
11
25
25
26
21
19
18
17
TM A
LL A
DCE
CTRL
M2
M1
M0
LATCH
INVERT
423 SET
R1
100k
40
23
GND
LB
24
V
7
1
EC
CC
SGND
SHIELD
1
2
44
C10
1µF
C11
1µF
43
42
C9
1µF
4
3
8
CHARGE
PUMP
C13
+
3.3µF
V
CC
41
C12
1µF
LTC1343
D1
5
21
39
DTE_RL/DCE_RL
RL A
RL A
4
19
20
23
38
37
36
RTS A
RTS B
DTR A
DTR B
CTS A
CTS B
DSR A
DSR B
6
7
9
D2
D3
D4
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
35
34
33
10
12
13
32
31
30
29
8
10
6
DCD A
DCD B
DSR A
DSR B
DCD A
DCD B
DTR A
DTR B
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
R1
R2
R3
R4
14
15
22
28
27
5
13
CTS A
CTS B
RTS A
RTS B
16
20
22
11
25
26
21
19
18
17
DCE
M2
M1
M0
V
CTRL
CC
1344 TA02
LATCH
INVERT
423 SET
LATCH
R2
100k
40
23
GND
LB
24
LB
EC
DCE/DTE
M2
M1
M0
10
LTC1344
U
TYPICAL APPLICATIONS N
Cable Selectable Multiprotocol DTE Port with DB-25 Connector
C6
C7
C8
100pF 100pF 100pF
13
12
3
8
11
LTC1344
V
CC
5V
14
2
V
V
CC
21
1
2
44
LATCH
C2
C3
1µF
43
42
1µF
C1
1µF
4
3
8
CHARGE
PUMP
EE
C4
+
DB-25 CONNECTOR
3.3µF
DCE/
DTE M2 M1 M0
41
C5
1µF
LTC1343
D1
5
4
6
7
9
10 16 15 18 17 19 20 22 23 24 1
5
39
V
CC
DTE
DCE
38
37
36
35
34
33
2
14
24
11
TXD A
TXD B
SCTE A
SCTE B
RXD A
RXD B
RXC A
RXC B
6
7
9
D2
D3
D4
DTE_TXD/DCE_RXD
DTE_SCTE/DEC_RXC
10
12
13
32
31
30
29
28
27
15
12
17
9
3
16
TXC A
TXC B
RXC A
RXC B
RXD A
RXD B
TXC A
TXC B
SCTE A
SCTE B
TXD A
TXD B
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
DTE_RXD/DCE_TXD
R1
R2
R3
R4
14
15
16
20
22
11
25
26
21
19
18
17
DCE
CTRL
7
1
SGND
V
CC
M2
M1
M0
LATCH
INVERT
423 SET
SHIELD
R1
100k
40
23
GND
LB
24
44
EC
V
CC
V
V
V
CC
1
2
CC
CC
C10
1µF
C11
43
42
R3
10k
R4
10k
R5
10k
1µF
C9
4
3
8
25
CHARGE
PUMP
1µF
DCE/DTE
M1
C13
+
21
18
3.3µF
V
CC
41
C12
1µF
M0
LTC1343
D1
5
39
4
19
20
23
38
37
36
RTS A
RTS B
DTR A
DTR B
CTS A
CTS B
DSR A
DSR B
6
7
9
D2
D3
D4
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
35
34
33
10
12
13
32
31
30
29
8
10
6
DCD A
DCD B
DSR A
DSR B
DCD A
DCD B
DTR A
DTR B
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/ DCE_RTS
R1
R2
R3
R4
14
15
22
28
27
5
13
CTS A
CTS B
RTS A
RTS B
16
20
22
11
25
26
21
19
18
17
DCE
M2
M1
M0
V
CC
CTRL
1344 TA03
V
CC
LATCH
INVERT
423 SET
R2
100k
CABLE WIRING FOR MODE SELECTION
CABLE WIRING FOR DTE/DCE
SELECTION
40
23
GND
LB
MODE
V.35
EIA-530, RS449,
V.36, X.21
RS232
PIN 18
PIN 7
NC
PIN 21
PIN 7
PIN 7
24
MODE
DTE
DCE
PIN 25
PIN 7
NC
LB
EC
PIN 7
NC
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LTC1344
U
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
G Package
24-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
8.07 – 8.33*
(0.318 – 0.328)
24 23 22 21 20 19 18 17 16 15 14
13
7.65 – 7.90
(0.301 – 0.311)
5
7
8
1
2
3
4
6
9 10 11 12
5.20 – 5.38**
(0.205 – 0.212)
1.73 – 1.99
(0.068 – 0.078)
0° – 8°
0.65
(0.0256)
BSC
0.13 – 0.22
0.55 – 0.95
(0.005 – 0.009)
(0.022 – 0.037)
0.05 – 0.21
(0.002 – 0.008)
0.25 – 0.38
(0.010 – 0.015)
NOTE: DIMENSIONS ARE IN MILLIMETERS
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.152mm (0.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE
G24 SSOP 1098
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1334
Single Supply RS232/RS485 Transceiver
Multiprotocol Serial Transceiver
Single Supply V.35 Transceiver
Dual Supply V.35 Transceiver
2 RS485 Dr/Rx or 4 RS232 Dr/Rx Pairs
Software Selectable Mulitprotocol Interface
3 Dr/3 Rx for Data and CLK Signals
3 Dr/3 Rx for Data and CLK Signals
Allows Separate RS449 Mode
LTC1343
LTC1345
LTC1346A
LTC1344A
LTC1543
Multiprotocol Cable Terminator, Pin Compatible to LTC1344
Multiprotocol Serial Transceiver
3 Dr/3 Rx for Data and CLK Signals
4 Dr/4 Rx for Control Signals and LL
5 Dr/5 Rx for Control Signals, LL, RL amd TM
LTC1544
Multiprotocol Serial Transceiver
LTC1545
Multiprotocol Serial Transceiver
1344fa LT/TP 0300 2K REV A • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1996
12 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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