LTC1345INW#PBF [Linear]

IC LINE TRANSCEIVER, PDIP28, 0.600 INCH, PLASTIC, DIP-28, Line Driver or Receiver;
LTC1345INW#PBF
型号: LTC1345INW#PBF
厂家: Linear    Linear
描述:

IC LINE TRANSCEIVER, PDIP28, 0.600 INCH, PLASTIC, DIP-28, Line Driver or Receiver

驱动 光电二极管 接口集成电路 驱动器
文件: 总12页 (文件大小:212K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
LTC1345  
Single Supply  
V.35 Transceiver  
U
FEATURES  
DESCRIPTIO  
The LTC®1345 is a single chip transceiver that provides the  
differential clock and data signals for a V.35 interface from  
a single 5V supply. Combined with an external resistor  
termination network and an LT®1134A RS232 transceiver  
for the control signals, the LTC1345 forms a complete low  
power DTE or DCE V.35 interface port operating from a  
single 5V supply.  
Single Chip Provides All V.35 Differential Clock  
and Data Signals  
Operates From Single 5V Supply  
Software Selectable DTE or DCE Configuration  
Transmitters and Receivers Will Withstand  
Repeated ±10kV ESD Pulses  
Shutdown Mode Reduces ICC to 1µA Typ  
10MBaud Transmission Rate  
The LTC1345 features three current output differential  
transmitters, three differential receivers, and a charge  
pump. The transceiver can be configured for DTE or DCE  
operation or shut down using two Select pins. In the  
Shutdown mode, the supply current is reduced to 1µA.  
Transmitter Maintains High Impedance When  
Disabled, Shut Down, or with Power Off  
Meets CCITT V.35 Specification  
Transmitters are Short-Circuit Protected  
U
The transceiver operates up to 10Mbaud. All transmitters  
feature short-circuit protection and a Receiver Output  
Enable pin allows the receiver outputs to be forced into a  
high impedance state. Both transmitter outputs and re-  
ceiver inputs feature ±10kV ESD protection. The charge  
pump features a regulated VEE output using three external  
1µF capacitors.  
APPLICATIO S  
Modems  
Telecommunications  
Data Routers  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
U
TYPICAL APPLICATIO  
Clock and Data Signals for V.35 Interface  
1µF  
1µF  
1µF  
1µF  
DTE  
DCE  
V
CC1  
5V  
V
CC2  
5V  
4
2
1
28  
28  
1
2
4
3
27  
27  
3
BI  
BI  
LTC1345  
DX  
LTC1345  
RX  
1µF  
1µF  
1µF  
1µF  
627T500/1250  
627T500/1250  
TXD (103)  
26  
1
12  
18  
6
7
12  
13  
6
T
T
T
T
T
T
T
T
T
T
25  
24  
11  
10  
17  
16  
2
3
SCTE (113)  
TXC (114)  
RXC (115)  
RXD (104)  
DX  
RX  
DX  
DX  
DX  
23  
20  
9
1
15  
26  
4
14  
11  
12  
13  
RX  
RX  
RX  
19  
18  
2
3
25  
24  
13  
12  
7
8
17  
16  
4
5
23  
22  
11  
10  
50Ω  
50Ω  
125Ω  
=
T
15  
5
6
7
21  
5
9
7
BI TECHNOLOGIES  
627T500/1250 (SOIC) OR  
899TR50/125 (DIP)  
GND (102)  
8
8
9
10 14  
9
10  
14  
LTC1345 • TA01  
V
V
CC2  
CC1  
1
LTC1345  
W W  
U W  
U W  
U
ABSOLUTE AXI U RATI GS  
PACKAGE/ORDER I FOR ATIO  
(Note 1)  
TOP VIEW  
ORDER PART  
Supply Voltage, VCC .................................................. 6V  
Input Voltage  
Transmitters ........................... 0.3V to (VCC + 0.3V)  
Receivers............................................... 18V to 18V  
S1, S2, OE ............................... 0.3V to (VCC + 0.3V)  
Output Voltage  
Transmitters .......................................... 18V to 18V  
Receivers................................ 0.3V to (VCC + 0.3V)  
VEE........................................................ 10V to 0.3V  
Short-Circuit Duration  
Transmitter Output ..................................... Indefinite  
Receiver Output.......................................... Indefinite  
VEE................................................................. 30 sec  
Operating Temperature Range  
+
+
NUMBER  
C2  
C1  
V
1
2
3
4
5
6
7
8
9
28 C2  
27  
V
EE  
LTC1345CNW  
LTC1345CSW  
LTC1345INW  
LTC1345ISW  
26 Y1  
25 Z1  
24 Y2  
23 Z2  
22 Y3  
21 Z3  
20 B3  
19 A3  
18 B2  
17 A2  
16 B1  
15 A1  
CC  
C1  
GND  
T1  
T2  
T3  
S1  
S2 10  
R3 11  
R2 12  
R1 13  
OE 14  
Commercial ............................................ 0°C to 70°C  
Industrial ........................................... 40°C to 85°C  
Storage Temperature Range ................ 65°C to 150°C  
Lead Temperature (Soldering, 10 sec)................. 300°C  
NW PACKAGE  
28-LEAD PDIP  
SW PACKAGE  
28-LEAD PLASTIC SO  
THREE V.35 TRANSMITTERS AND THREE RECEIVERS  
JMAX = 125°C, θJA = 56°C/W (NW)  
JMAX = 125°C, θJA = 65°C/W (SW)  
T
T
Consult factory for Military grade parts.  
DC ELECTRICAL CHARACTERISTICS  
The denotes specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V ±5% (Notes 2, 3), unless otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
Figure 1, 4V V 4V  
MIN  
0.44  
0.6  
12.6  
9.4  
TYP  
0.55  
0
MAX  
0.66  
0.6  
UNITS  
V
V
V
Transmitter Differential Output Voltage  
Transmitter Common-Mode Output Voltage  
Transmitter Output High Current  
Transmitter Output Low Current  
Transmitter Output Leakage Current  
Transmitter Output Impedance  
Differential Receiver Input Threshold Voltage  
Receiver Input Hysterisis  
OD  
OC  
OS  
Figure 1, V = 0V  
V
OS  
I
I
I
V
V
= 0V  
= 0V  
11  
11  
9.4  
12.6  
±100  
mA  
mA  
µA  
kΩ  
mV  
mV  
mA  
kΩ  
V
OH  
Y, Z  
Y, Z  
OL  
OZ  
S1 = S2 = 0V, 5V V 5V  
±1  
Y, Z  
R
O
2V V 2V  
100  
25  
Y, Z  
V
7V (V + V )/2 7V  
200  
0.4  
TH  
A
B
V  
TH  
7V (V + V )/2 7V  
50  
A
B
I
Receiver Input Current (A, B)  
Receiver Input Impedance  
7V V  
7V V  
7V  
IN  
A, B  
A, B  
R
IN  
7V  
17.5  
3
30  
4.5  
0.2  
V
V
Receiver Output High Voltage  
Receiver Output Low Voltage  
Receiver Output Short-Circuit Current  
Receiver Three-State Output Current  
Logic Input High Voltage  
I = 4mA, V  
= 0.2V  
OH  
OL  
O
B, A  
B, A  
I = 4mA, V  
O
= 0.2V  
0.4  
85  
V
I
I
0V V V  
CC  
7
2
mA  
µA  
V
OSR  
OZR  
O
S1 = S2 = 0V, 0V V V  
±10  
O
CC  
V
V
T, S1, S2, OE  
T, S1, S2, OE  
T, S1, S2, OE  
IH  
IL  
Logic Input Low Voltage  
0.8  
V
I
I
Logic Input Current  
±10  
µA  
IN  
CC  
V
Supply Current  
Figure 1, V = 0, S1 = S2 = HIGH  
118  
19  
1
170  
30  
100  
mA  
mA  
µA  
CC  
OS  
No Load, S1 = S2 = HIGH  
Shutdown, S1 = S2 = 0V  
V
V
Voltage  
No Load, S1 = S2 = HIGH  
5.5  
V
EE  
EE  
2
LTC1345  
AC ELECTRICAL CHARACTERISTICS  
The denotes specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V ±5% (Notes 2, 3), unless otherwise specified.  
SYMBOL  
t , t  
PARAMETER  
CONDITIONS  
Figures 1 and 3, V = 0V  
MIN  
TYP  
7
MAX  
UNITS  
ns  
Transmitter Rise or Fall Time  
Transmitter Input to Output  
Transmitter Input to Output  
Transmitter Output to Output  
Receiver Input to Output  
Receiver Input to Output  
40  
70  
70  
R
F
OS  
t
t
t
t
t
t
t
t
t
t
f
Figures 1 and 3, V = 0V  
25  
25  
0
ns  
PLH  
OS  
Figures 1 and 3, V = 0V  
ns  
PHL  
SKEW  
PLH  
PHL  
SKEW  
ZL  
OS  
Figures 1 and 3, V = 0V  
ns  
OS  
Figures 1 and 4, V = 0V  
49  
52  
3
100  
100  
ns  
OS  
Figures 1 and 4, V = 0V  
ns  
OS  
Differential Receiver Skew, t  
– t  
PHL  
Figures 1 and 4, V = 0V  
ns  
PLH  
OS  
Receiver Enable to Output LOW  
Receiver Enable to Output HIGH  
Receiver Disable From LOW  
Receiver Disable From HIGH  
Figures 2 and 5, C = 15pF, S1 Closed  
40  
35  
30  
35  
200  
15  
70  
70  
70  
70  
ns  
L
Figures 2 and 5, C = 15pF, S2 Closed  
ns  
ZH  
L
Figures 2 and 5, C = 15pF, S1 Closed  
ns  
LZ  
L
Figures 2 and 5, C = 15pF, S2 Closed  
ns  
HZ  
L
Charge Pump Oscillator Frequency  
Maximum Data Rate (Note 4)  
kHz  
Mbaud  
OSC  
BR  
MAX  
10  
Note 1: The absolute maximum ratings are those values beyond which the  
safety of the device cannot be guaranteed.  
Note 3: All typicals are given for V = 5V, C1 = C2 = C3 = 1µF ceramic  
CC  
capacitors and T = 25°C.  
A
Note 2: All currents into device pins are termed positive; all currents out of  
device pins are termed negative. All voltages are referenced to device  
ground unless otherwise specified.  
Note 4: Maximum data rate is specified for NRZ data encoding scheme.  
The maximum data rate may be different for other data encoding schemes.  
Data rate is guaranteed by correlation and is not tested.  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
Transmitter Output Current  
vs Output Voltage  
Transmitter Output Skew  
vs Temperature  
Transmitter Output Current  
vs Temperature  
13  
12  
20  
15  
13  
12  
11  
10  
9
V
CC  
= 5V  
V
CC  
= 5V  
T
= 25°C  
CC  
A
V
= 5V  
11  
10  
9
10  
5
0
–25  
0
50  
75 100 125  
0
0.5  
–25  
0
50  
75 100 125  
–50  
25  
–2.0 –1.5 –1.0 –0.5  
1.0 1.5 2.0  
–50  
25  
TEMPERATURE (˚C)  
OUTPUT VOLTAGE (V)  
TEMPERATURE (˚C)  
LTC1345 • TPC01  
LTC1345 • TPC02  
LTC1345 • TPC03  
3
LTC1345  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
Receiver tPLH – tPHL  
vs Temperature  
Supply Current vs Temperature  
VEE Voltage vs Temperature  
20  
15  
140  
120  
30  
25  
–4.5  
–5.0  
V
CC  
= 5V  
V
= 5V  
V
CC  
= 5V  
CC  
LOADED  
NO LOAD  
10  
5
100  
80  
20  
15  
10  
–5.5  
–6.0  
–6.5  
0
60  
–25  
0
50  
75 100 125  
–25  
0
50  
75 100 125  
–25  
0
50  
75 100 125  
–50  
25  
–50  
25  
–50  
25  
TEMPERATURE (˚C)  
TEMPERATURE (˚C)  
TEMPERATURE (˚C)  
LTC1345 • TPC04  
LTC1345 • TPC05  
LTC1345 • TPC06  
Transmitter Output Waveforms  
Receiver Output Waveforms  
INPUT  
5V/DIV  
INPUT  
0.2/DIV  
OUTPUT  
0.2V/DIV  
OUTPUT  
5V/DIV  
LTC1345 • TPC07  
LTC1345 • TPC08  
U
U
U
PI FU CTIO S  
C2+ (Pin 1): Capacitor C2 Positive Terminal.  
C1+ (Pin 2): Capacitor C1 Positive Terminal.  
VCC (Pin 3): Positive Supply, 4.75 VCC 5.25V.  
C1(Pin 4): Capacitor C1 Negative Terminal.  
R3 (Pin 11): Receiver 3 Output.  
R2 (Pin 12): Receiver 2 Output.  
R1 (Pin 13): Receiver 1 Output.  
OE (Pin 14): Receiver Output Enable.  
GND (Pin 5): Ground. The positive terminal of C3 is  
A1 (Pin 15): Receiver 1 Inverting Input.  
B1 (Pin 16): Receiver 1 Noninverting Input.  
A2 (Pin 17): Receiver 2 Inverting Input.  
B2 (Pin 18): Receiver 2 Noninverting Input.  
A3 (Pin 19): Receiver 3 Inverting Input.  
B3 (Pin 20): Receiver 3 Noninverting Input.  
Z3 (Pin 21): Transmitter 3 Inverting Output.  
connected to ground.  
T1 (Pin 6): Transmitter 1 Input.  
T2 (Pin 7): Transmitter 2 Input.  
T3 (Pin 8): Transmitter 3 Input.  
S1 (Pin 9): Select Input 1.  
S2 (Pin 10): Select Input 2.  
4
LTC1345  
U
U
U
PI FU CTIO S  
Y3 (Pin 22): Transmitter 3 Noninverting Output.  
Z2 (Pin 23): Transmitter 2 Inverting Output.  
Y2 (Pin 24): Transmitter 2 Noninverting Output  
Z1 (Pin 25): Transmitter 1 Inverting Output.  
Y1 (Pin 26): Transmitter 1 Noninverting Output.  
VEE (Pin27):ChargePumpOutput.Connectedtonegative  
terminal of capacitor C3.  
C2(Pin 28): Capacitor C2 Negative Terminal.  
U
U
FU CTIO TABLES  
Receiver  
Transmitter and Receiver Configuration  
INPUTS  
CONFIGURATION S1 S2 OE  
OUTPUTS  
R1 AND R2  
S1  
0
S2  
0
TX#  
RX#  
REMARKS  
B – A  
0.2V  
0.2V  
0.2V  
0.2V  
X
R3  
1
Shutdown  
DTE or All ON  
DTE or All ON  
DCE  
X
X
1
1
X
0
1
1
0
0
X
0
0
0
0
0
1
X
1
0
1
0
Z
Z
1
0
1, 2, 3  
1, 2  
1, 2  
DCE Mode, RX3 Shut Down  
DTE Mode, TX3 Shut Down  
All Active  
0
0
1
1, 2, 3  
1, 2, 3  
Z
1
1
1, 2, 3  
DCE  
Z
Disabled  
Shutdown  
Z
Transmitter  
X
Z
INPUTS  
CONFIGURATION S1 S2  
OUTPUTS  
T
0
1
0
1
X
Y1 AND Y2 Z1 AND Z2 Y3 Z3  
DTE  
0
0
1
1
0
1
1
X
X
0
0
1
0
1
Z
1
0
1
0
Z
Z
Z
0
1
Z
Z
Z
1
0
Z
DTE  
DCE or All ON  
DCE or All ON  
Shutdown  
TEST CIRCUITS  
V
CC  
Y
S1  
50Ω  
50Ω  
50Ω  
1k  
V
OS  
RECEIVER  
OUTPUT  
Y
125Ω  
T
B
A
125Ω  
R
V
OD  
Z
S2  
C
L
OE  
15pF  
50Ω  
V
= (V + V )/2  
Y Z  
OC  
LTC1345 • F02  
LTC1345 • F01  
Z
Figure 1. V.35 Transmitter/Receiver Test Circuit  
Figure 2. Receiver Output Enable/Disable Timing Test Load  
5
LTC1345  
U
W
W
SWITCHI G TI E WAVEFOR S  
3V  
f = 1MHz: t 10ns: t 10ns  
r
f
1.5V  
1.5V  
T
0V  
t
t
PHL  
PLH  
V
O
90%  
90%  
V
= V(Y) – V(Z)  
DIFF  
Y – Z  
–V  
50%  
10%  
50%  
10%  
O
1/2 V  
O
t
t
f
r
Z
V
O
Y
t
t
SKEW  
LTC1345 • F03  
SKEW  
Figure 3. V.35 Transmitter Propagation Delays  
V
ID  
f = 1MHz: t 10ns: t 10ns  
INPUT  
r
f
0V  
t
0V  
t
B – A  
–V  
ID  
PLH  
PHL  
V
OH  
OUTPUT  
R
1.5V  
1.5V  
V
OL  
LTC1345 • F04  
Figure 4. V.35 Receiver Propagation Delays  
3V  
1.5V  
1.5V  
OE  
R
f = 1MHz: t 10ns: t 10ns  
r
f
0V  
5V  
t
t
LZ  
ZL  
1.5V  
1.5V  
OUTPUT NORMALLY LOW  
OUTPUT NORMALLY HIGH  
0.5V  
V
OL  
t
t
ZH  
HZ  
V
OH  
0.5V  
R
0V  
LTC1345 • F05  
Figure 5. Receiver Enable and Disable Times  
6
LTC1345  
W U U  
APPLICATIO S I FOR ATIO  
Review of CCITT Recommendation V.35  
Electrical Specifications  
U
Cable Termination  
Each end of the cable connected to an LTC1345 must be  
terminated by either one of two electrically equivalent  
external Y or resistor networks for proper operation. The  
Y-termination has two series connected 50resistors and  
a 125resistor connected between ground and the center  
tap of the two 50resistors as shown in Figure 6A.  
V.35 is a CCITT recommendation for synchronous data  
transmission via modems. Appendix 2 of the recommen-  
dation describes the electrical specifications which are  
summarized below:  
1. The interface cable is balanced twisted-pair with 80to  
120impedance.  
50Ω  
2.Thetransmitter’ssourceimpedanceisbetween50and  
150.  
125Ω  
50Ω  
3. The transmitter’s resistance between shorted terminals  
and ground is 150Ω ±15.  
A
4. When terminated by a 100resistive load, the terminal-  
to-terminal voltage should be 0.55V ±20%.  
300Ω  
120Ω  
5. The transmitter’s rise time should be less than 1% of the  
signal pulse or 40ns, whichever is greater.  
300Ω  
LTC1345 • F06  
B
6. The common-mode voltage at the transmitter output  
should not exceed 0.6V.  
Figure 6. Y and Termination Networks  
The alternative -termination has a 120resistor across  
the twisted wires and two 300resistors between each  
wire and ground as shown in Figure 6B. Standard 1/8W,  
5%surfacemountresistorscanbeusedforthetermination  
network. To maintain the proper differential output swing,  
the resistor tolerance must be 5% or less. A termination  
network that combines all the resistors into an SO-14  
package is available from:  
7. The receiver impedance is 100Ω ±10.  
8. The receiver impedance to ground is 150Ω ±15.  
9. The transmitter or receiver should not be damaged by  
connection to earth ground, short-circuiting, or cross  
connection to other lines.  
10. No data errors should occur with ±2V common-mode  
change at either the transmitter or receiver, or ±4V ground  
potential difference between transmitter and receiver.  
BI Technologies (Formerly Beckman Industrial)  
Resistor Networks  
4200 Bonita Place  
Fullerton, CA 92635  
Phone: (714) 447-2357  
FAX: (714) 447-2500  
Part #: BI Technologies 627T500/1250 (SOIC)  
899TR50/125 (DIP)  
7
LTC1345  
W U U  
U
APPLICATIO S I FOR ATIO  
may be forced into a high impedance state by pulling the  
output enable (OE) pin high. For normal operation OE  
should be pulled low.  
Theory of Operation  
The transmitter output consists of complementary  
switched-current sources as shown in Figure 7.  
A charge pump generates the regulated negative supply  
voltage (VEE) with three 1µF capacitors. Commutating  
capacitors C1 and C2 form a voltage doubler and inverter  
while C3 acts as a reservoir capacitor. To insure proper  
operation, the capacitors must have an ESR less than 1.  
Monolithic ceramic or solid tantalum capacitors are good  
choices. Under light loads, regulation at about 5.2V is  
provided by a pulse-skipping scheme. Under heavy loads  
thechargepumpisoncontinuously.Asmallrippleofabout  
500mV will be present on VEE.  
CHIP  
V
BOUNDARY  
CC  
11mA  
Y
Z
50Ω  
50Ω  
125Ω  
T
Two Select pins, S1 and S2, configure the chip for DTE,  
DCE, all transmitters and receivers on, or Shutdown. In  
Shutdown mode, ICC drops to 1µA. The outputs of the  
transmitters and receivers are in high impedance states,  
the charge pump stops and VEE is clamped to ground.  
11mA  
V
EE  
LTC1345 • F07  
Figure 7. Simplified Transmitter Schematic  
ESD Protection  
With a logic zero at the transmitter input, the inverting  
output Z sources 11mA and the noninverting output Y  
sinks 11mA. The differential transmitter output voltage is  
then set by the termination resistors. With two differential  
50resistors at each end of the cable, the voltage is set to  
(50Ω × 11mA) = 0.55V. With a logic 1 at the transmitter  
input, output Z sinks 11mA and Y sources 11mA. The  
common-mode voltage of Y and Z is 0V when both current  
sources are matched and there is no ground potential  
difference between the cable terminations. The transmitter  
current sources have a common-mode range of ±2V,  
which allows for a ground difference between cable termi-  
nations of ±4V.  
LTC1345 transmitter outputs and receiver inputs have on-  
chip protection from multiple ±10kV ESD transients. ESD  
testing is done using the Human Body ESD Model. ESD  
testingmustbedonewithanACgroundontheVCC andVEE  
supply pins. The low ESR supply decoupling and VEE  
reservoir capacitors provide this AC ground during normal  
operation.  
Complete V.35 Port  
Figure 8 shows the schematic of a complete surface  
mounted, single 5V DTE and DCE V.35 port using only  
three ICs and eight capacitors per port. The LTC1345 is  
used to transmit the clock and data signals, and the  
LT1134A to transmit the control signals. If test signals  
140, 141, and 142 are not used, the transmitter inputs  
should be tied to VCC.  
Each receiver input has a 30k resistance to ground and  
requiresexternalterminationtomeettheV.35inputimped-  
ance specification. The receivers have an input hysteresis  
of 50mV to improve noise immunity. The receiver output  
8
LTC1345  
U
W U U  
APPLICATIONS INFORMATION  
50Ω  
50Ω  
1µF  
1µF  
1µF  
1µF  
DTE  
DCE  
125Ω  
=
T
V
V
CC2  
5V  
CC1  
5V  
4
2
1
28  
28  
1
2
4
3
27  
26  
27  
3
BI  
BI  
627T500/  
1250  
627T500/  
1250  
1µF  
1µF  
LTC1345  
DX  
LTC1345  
RX  
1µF  
1µF  
TXD (103)  
(SOIC)  
(SOIC)  
1
P
P
12  
18  
6
7
12  
13  
6
T
T
T
T
T
T
T
T
T
T
25  
24  
11  
10  
17  
16  
2
3
S
U
S
U
SCTE (113)  
TXC (114)  
RXC (115)  
RXD (104)  
DX  
RX  
DX  
DX  
DX  
23  
20  
9
1
15  
26  
4
W
W
AA  
AA  
14  
11  
12  
13  
RX  
RX  
RX  
19  
18  
2
3
25  
24  
13  
12  
Y
X
Y
X
7
8
V
T
V
T
17  
16  
4
5
23  
22  
11  
10  
15  
5
6
7
21  
5
9
7
R
R
GND (102)  
B
A
B
A
8
8
9
10 14  
9
10 14  
CABLE SHIELD  
V
V
CC2  
CC1  
0.2µF  
0.2µF  
0.2µF  
0.2µF  
4
3
22 23  
4
3
22 23  
1
24  
1
24  
LT1134A  
LT1134A  
0.1µF  
0.1µF  
0.1µF  
0.1µF  
2
DTR (108)  
RTS (105)  
DSR (107)  
CTS (106)  
DCD (109)  
H
C
H
C
21  
5
6
8
20  
18  
21  
19  
17  
15  
16  
14  
DX  
DX  
RX  
RX  
RX  
RX  
DX  
DX  
RX  
RX  
DX  
DX  
DX  
DX  
RX  
RX  
19  
20  
18  
16  
14  
17  
15  
7
E
E
6
5
D
F
D
F
8
7
10  
12  
9
9
TM (142)  
RDL (140)  
LLB (141)  
NN  
N
L
NN  
N
L
11  
10  
12  
11  
13  
13  
ISO 2593  
34-PIN DTE/DCE  
ISO 2593  
34-PIN DTE/DCE  
LTC1345 • TA08  
INTERFACE CONNECTOR INTERFACE CONNECTOR  
Figure 8. Complete Single 5V V.35 Interface  
9
LTC1345  
U
W U U  
APPLICATIONS INFORMATION  
RS422/RS485 Applications  
5
0
RECEIVER  
OUTPUT  
5V/DIV  
The receivers on the LTC1345 are ideal for RS422 and  
RS485 applications. Using the test circuit in Figure 9, the  
LTC1345 receivers are able to successfully reconstruct  
the data stream with the common-mode voltage meeting  
RS422 and RS485 requirements (12V to 7V).  
0V  
–5V  
RECEIVER  
A
B
Figures 10 and 11 show that the LTC1345 receivers are  
verycapableofreconstructingdataatratesupto10Mbaud.  
INPUT  
–10V  
5V/DIV  
V
V
CC2  
5V  
CC1  
LTC1345 • F10  
5V  
Figure 10. 7V Common Mode  
A
BX  
TTL  
OUT  
LTC485  
100Ω  
100LTC1345  
B
AX  
RECEIVER  
B
GND  
GND  
15V  
10V  
5V  
INPUT  
A
+
TTL  
IN  
5V/DIV  
12V TO 7V  
COMMON-MODE VOLTAGE  
LTC1345 • F09  
Figure 9 RS422/RS485 Receiver Interface  
0V  
5
0
RECEIVER  
OUTPUT  
5V/DIV  
LTC1345 • F11  
Figure 11. 12V Common Mode  
10  
LTC1345  
U
PACKAGE DESCRIPTION  
Dimensions in inches (millimeters) unless otherwise noted.  
NW Package  
28-Lead PDIP (Wide 0.600)  
(LTC DWG # 05-08-1520)  
1.455*  
(36.957)  
MAX  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
0.505 – 0.560*  
(12.827 – 14.224)  
1
2
3
5
7
9
4
6
8
10  
11  
12  
13  
14  
0.600 – 0.625  
(15.240 – 15.875)  
0.045 – 0.065  
(1.143 – 1.651)  
0.150 ± 0.005  
(3.810 ± 0.127)  
0.015  
(0.381)  
MIN  
0.070  
(1.778)  
TYP  
0.009 – 0.015  
(0.229 – 0.381)  
+0.035  
0.625  
0.035 – 0.080  
(0.889 – 2.032)  
–0.015  
0.125  
(3.175)  
MIN  
0.018 ± 0.003  
(0.457 ± 0.076)  
+0.889  
15.87  
(
)
–0.381  
0.100  
(2.54)  
BSC  
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.  
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)  
N28 1098  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-  
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.  
11  
LTC1345  
U
PACKAGE DESCRIPTION  
Dimensions in inches (millimeters) unless otherwise noted.  
SW Package  
28-Lead Plastic Small Outline (Wide 0.300)  
(LTC DWG # 05-08-1620)  
0.697 – 0.712*  
(17.70 – 18.08)  
28 27 26 25 24 23 22 21 20 19 18  
16 15  
17  
0.394 – 0.419  
(10.007 – 10.643)  
NOTE 1  
0.291 – 0.299**  
(7.391 – 7.595)  
2
3
5
7
8
9
10 11 12 13 14  
1
4
6
0.037 – 0.045  
(0.940 – 1.143)  
0.093 – 0.104  
(2.362 – 2.642)  
0.010 – 0.029  
(0.254 – 0.737)  
× 45°  
0° – 8° TYP  
0.050  
(1.270)  
BSC  
0.004 – 0.012  
(0.102 – 0.305)  
0.009 – 0.013  
NOTE 1  
(0.229 – 0.330)  
0.014 – 0.019  
(0.356 – 0.482)  
TYP  
0.016 – 0.050  
(0.406 – 1.270)  
NOTE:  
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.  
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS  
S28 (WIDE) 1098  
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE  
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE  
RELATED PARTS  
PART NUMBER  
LTC1334  
DESCRIPTION  
COMMENTS  
Single 5V RS232/RS485 Multiprotocol Transceiver  
Software-Selectable Multiprotocol Transceiver  
Two RS485 Driver/Receiver or Four RS232 Driver/Receiver Pairs  
4-Driver/4-Receiver for Data and Clock Signals  
LTC1343  
LTC1344/LTC1344A Software-Selectable Cable Terminator  
Perfect for Terminating the LTC1543 (Not Needed with LTC1546)  
3-Driver/3-Receiver for Data and Clock Signals  
LTC1346  
LTC1387  
LTC1543  
Dual Supply V.35 Transceiver  
RS232/RS485 Multiprotocol Transceiver  
Software-Selectable Multiprotocol Transceiver  
One RS485 Driver/Receiver or Two RS232 Driver/Receiver Pairs  
Terminated with LTC1344A for Data and Clock Signals, Companion to  
LTC1544 or LTC1545 for Control Signals  
LTC1544  
LTC1545  
Software-Selectable Multiprotocol Transceiver  
Software-Selectable Multiprotocol Transceiver  
Companion to LTC1546 or LTC1543 for Control Signals Including LL  
5-Driver/5-Receiver Companion to LTC1546 or LTC1543  
for Control Signals Including LL, TM and RL  
LTC1546  
Multiprotocol Transceiver with Termination  
Combines LTC1543 and LTC1344A Functions for Data and Clock Signals  
1345fa LT/TP 0400 2K REV A • PRINTED IN USA  
LinearTechnology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
12  
LINEAR TECHNOLOGY CORPORATION 1995  
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com  

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