LTC1390CN [Linear]

8-Channel Analog Multiplexer with Serial Interface; 8通道模拟多路复用器，串行接口


型号：	LTC1390CN
厂家：	Linear
描述：	8-Channel Analog Multiplexer with Serial Interface 8通道模拟多路复用器，串行接口复用器开关复用器或开关信号电路光电二极管
文件：	总8页 (文件大小：227K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC1390

8-Channel

Analog Multiplexer

with Serial Interface

DESCRIPTIO

EATURE

3-Wire Serial Digital Interface

Data Retransmission Allows Series Connection

with Serial A/D Converters

Single 3V to ±5V Supply Operation

Analog Inputs May Extend to Supply Rails

Low Charge Injection

Low R_ON: 75Ω Max

Low Leakage: ±5nA Max

Guaranteed Break-Before-Make

TTL/CMOS Compatible for All Digital Inputs

Cascadable to Allow Additional Channels

Can Be Used as a Demultiplexer

The LTC^®1390 is a high performance CMOS 8-to-1 analog

multiplexer. It features a 3-wire digital interface with a

bidirectional data retransmission feature, allowing it to be

wired in series with a serial A/D converter while using only

oneserialport.TheinterfacealsoallowsseveralLTC1390s

to be wired in series or parallel, increasing the number of

MUX channels available using only a single digital port. All

the above features are also valid when LTC1390 operates

as a demultiplexer such as with a D/A converter.

■

The LTC1390 features a typical R_ONof 45Ω, typical switch

leakage of 50pA, and guaranteed break-before-make op-

eration. Charge injection is ±10pC maximum. All digital

inputs are TTL and CMOS compatible when operated from

single or dual supplies. The inputs can withstand 100mA

fault currents.

O U

PPLICATI

■

Data Acquisition Systems

Communication Systems

Signal Multiplexing/Demultiplexing

The LTC1390 is available in 16-pin PDIP and narrow SO

packages.

, LTC and LT are registered trademarks of Linear Technology Corporation.

TYPICAL APPLICATI

CC EE

ON-Resistance vs

Analog Input Voltage

OPTIONAL A/D

INPUT FILTER

250

200

150

= 25°C

+IN

–IN

CLK

–

LTC1390

LTC1096

–

= 3V

= 0V

OUT

DATA 2

DATA 1

ANALOG

INPUTS

GND

REF

100

CLK

= 5V

GND

–

= –5V

47k

3-WIRE

SERIAL

INTERFACE

DATA

CLK

LTC1390 • TA01

–5 –4 –3 –2 –1

TO MUX AND ADC

ANALOG INPUT VOLTAGE, V (V)

LTC1390 • TA02

LTC1390

W W W

ABSOLUTE AXI U RATI GS

PACKAGE RDER I FOR ATIO

(Note 1)

Total Supply Voltage (V⁺to V^–).............................. 15V

Input Voltage

TOP VIEW

ORDER PART

NUMBER

Analog Inputs ........................ V^–– 0.3V to V⁺+ 0.3V

Digital Inputs ........................................ –0.3V to 15V

Digital Outputs............................ –0.3V to V⁺+ 0.3V

Power Dissipation............................................. 500mW

Operating Temperature Range ..................... 0°C to 70°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec)................. 300°C

–

LTC1390CN

LTC1390CS

DATA 2

DATA 1

CLK

GND

N PACKAGE

16-LEAD PDIP

S PACKAGE

16-LEAD PLASTIC SO

T_JMAX= 150°C, θ_JA= 70°C/ W (N)

_JMAX= 150°C, θ_JA= 100°C/ W (S)

Consult factory for Industrial and Military grade parts.

ELECTRICAL CHARACTERISTICS

V⁺= 5V, V^–= –5V, GND = 0V, T_A= operating temperature unless otherwise noted.

SYMBOL PARAMETER

Switch

CONDITIONS

MIN

TYP

MAX

UNITS

Analog Signal Range

On Resistance

(Note 2)

●

–5

ANALOG

V = ±3.5V, I = 1mA

S D

25°C

120

Ω

MIN

MAX

∆R vs V

0.5

∆R vs Temperature

%/°C

Off Input Leakage

Off Output Leakage

On Channel Leakage

V = 4V, V = –4V; V = –4V, V = 4V

Channel Off

0.05

±5

±50

S(OFF)

D(OFF)

D(ON)

●

V = 4V, V = –4V; V = –4V, V = 4V

0.05

±5

±50

Channel Off

V = V = ±4V

±5

±50

Channel On

Input

High Level Input Voltage

Low Level Input Voltage

Low or High Level Current

High Level Output Voltage

V = 5.25V

●

2.4

INH

INL

V = 4.75V

0.8

, I

= 5V, V = 0V

±1

µA

INL INH

V = 4.75V, I = 10µA

4.74

4.50

V = 4.75V, I = 360µA

●

Low Level Output Voltage

V = 4.75V, I = 0.5mA

0.16

0.8

LTC1390

ELECTRICAL CHARACTERISTICS

V⁺= 5V, V^–= –5V, GND = 0V, T_A= operating temperature unless otherwise noted.

SYMBOL PARAMETER

Dynamic

CONDITIONS

MIN

TYP

MAX

UNITS

Clock Frequency

MHz

CLK

Enable Turn-On Time

Enable Turn-Off Time

Break-Before-Make Interval

Off Isolation

V = 2.5V, R = 1k, C = 35pF

260

100

155

400

200

V = 2.5V, R = 1k, C = 35pF

OFF

OPEN

OIRR

V = 2V , R = 1k, f = 100kHz

P-P

Charge Injection

R = 0, C = 1000pF, V = 1V (Note 2)

±2

±10

INJ

Source Off Capacitance

Drain Off Capacitance

S(OFF)

D(OFF)

Supply

Positive Supply Current

Negative Supply Current

All Logic Inputs Tied Together, V = 0V or V = 5V

●

µA

–

All Logic Inputs Tied Together, V = 0V or V = 5V

IN IN

V⁺= 3V, V^–= GND = 0V, T_A= operating temperature unless otherwise noted.

SYMBOL PARAMETER

Switch

CONDITIONS

MIN

TYP

MAX

UNITS

Analog Signal Range

On Resistance

(Note 2)

●

ANALOG

V = 1.2V, I = 1mA

S D

25°C

255

300

Ω

MIN

200

MAX

∆R vs V

0.5

∆R vs Temperature

%/°C

Off Input Leakage

Off Output Leakage

On Channel Leakage

V = 2.5V, V = 0.5V; V = 0.5V, V = 2.5V (Note 3)

Channel Off

±0.05

±5

±50

S(OFF)

D(OFF)

D(ON)

●

V = 2.5V, V = 0.5V; V = 0.5V, V = 2.5V (Note 3)

±0.05

±5

±50

Channel Off

V = V = 0.5V, V = V = 2.5V (Note 3)

±5

±50

Channel On

Input

High Level Input Voltage

Low Level Input Voltage

Low or High Level Current

High Level Output Voltage

V = 3.3V

●

2.4

INH

INL

V = 2.7V

0.8

, I

= 3V, V = 0V

±1

µA

INL INH

V = 2.7V, I = 20µA

2.68

2.27

V = 2.7V, I = 400µA

●

Low Level Output Voltage

V = 2.7V, I = 20µA

0.01

0.15

V = 2.7V, I = 300µA

0.8

LTC1390

ELECTRICAL CHARACTERISTICS

V⁺= 3V, V^–= GND = 0V, T_A= operating temperature unless otherwise noted.

SYMBOL PARAMETER

Dynamic

CONDITIONS

MIN

TYP

MAX

UNITS

Clock Frequency

MHz

CLK

Enable Turn-On Time

Enable Turn-Off Time

Break-Before-Make Interval

Off Isolation

V = 1.5V, R = 1k, C = 35pF (Note 4)

490

190

290

700

300

V = 1.5V, R = 1k, C = 35pF (Note 4)

OFF

(Note 4)

125

OPEN

OIRR

V = 2V , R = 1k, f = 100kHz

P-P

Charge Injection

R = 0, C = 1000pF, V = 1V (Note 2)

±1

±5

INJ

Source Off Capacitance

Drain Off Capacitance

S(OFF)

D(OFF)

Supply

Positive Supply Current

All Logic Inputs Tied Together, V = 0V or V = 3V

●

0.2

µA

The

●

denotes specifications which apply over the full operating

Note 3: Leakage current with a single 3V supply is guaranteed by

correlation with the leakage current of the ±5V supply.

temperature range.

Note 1: Absolute maximum ratings are those beyond which the safety of

the device may be impaired.

Note 4: Timing specifications with a single 3V supply is guaranteed by

correlation with the timing specifications of the ±5V supply.

Note 2: Guaranteed by design.

TYPICAL PERFORMANCE CHARACTERISTICS

Driver Output Low Voltage

vs Output Current

Driver Output High Voltage

vs Output Current

ON-Resistance vs Temperature

300

250

200

150

–1

–2

–3

–4

–5

–6

–7

= 25°C

= 5V

= 25°C

= 5V

–

= –5V

DATA 2

–

= 3V

= 0V

= 1.2V

DATA 1

100

–

= 5V

= –5V

DATA 2

= 0V

TEMPERATURE (˚C)

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

OUTPUT VOLTAGE (V)

4.0

OUTPUT VOLTAGE (V)

5.0

2.0

2.5

3.0

3.5

4.5

LTC1390 • G01

LTC1390 • G02

LTC1390 • G03

LTC1390

PIN FUNCTIONS

analog signal transmission and allows data transfer from

Data 2 to Data 1.

S0 to S7 (Pins 1 to 8): Analog Multiplexer Inputs/Analog

Demultiplexer Outputs.

Data 1 (Pin 12): Bidirectional Digital Input/Output (TTL/

CMOS Compatible). Input for the channel selection bits.

GND (Pin 9): Digital Ground. Connect to system ground.

CLK(Pin10):SystemClock(TTL/CMOSCompatible). The

clock synchronizes the channel selection bits and the

serial data transfer from Data 1 to Data 2.

Data 2 (Pin 13): Bidirectional Digital Input/Output (TTL/

CMOS Compatible).

V^–(Pin 14): Negative Supply.

CS (Pin 11):Chip Select Input (TTL/CMOS Compatible). A

logic high on this input enables LTC1390 to read in the

channel selection bits and allow data transfer from Data 1

to Data 2. A logic low enables the desired channel for

D (Pin 15): Analog Multiplexer Output/Analog

Demultiplexer Input.

V⁺(Pin 16): Positive Supply.

U U

APPLICATIO S I FOR ATIO

Multiplexer Operation

When CS is high, the input data on the Data 1 pin is latched

into the 4-bit shift register on each rising clock edge. The

input data consists of an “EN” bit and a string of three bits

for channel selection. If “EN” bit is logic high as illustrated

in the first input data sequence, it enables the selected

channel. To ensure correct operation, the CS must be

pulled low before the next rising clock edge.

Figure 1 shows the block diagram of the components

within the LTC1390 required for MUX operation. The

LTC1390 uses Data 1 to select its 8 channels and a chip

selectinputCStoswitchontheselectedchannelasshown

in Figure 2.

CLK

DATA 1

Once the CS is pulled low, all channels are simultaneously

switched off to ensure a break-before-make interval. After

adelayoft_ON, theselectedchannelisswitchedonallowing

signal transmission. The selected channel remains on

CONTROL

LOGIC

4-BIT SHIFT

ANALOG

INPUT

MUX

BLOCK

ANALOG

OUTPUT

until the next falling edge of CS, and after a delay of t_OFF

it terminates the analog signal transmission and subse-

quently allows the selection of the next channel. If “EN” bit

is logic low, as illustrated in the second data sequence, it

disables all channels and there will be no analog signal

LTC1390 • F01

Figure 1: Simplified Block Diagram of the MUX Operation

CLK

EN = LOW

EN = HIGH

DATA 1

ANY

ANALOG

INPUTS

LTC1390 • F02

OFF

Figure 2: Multiplexer Operation

LTC1390

APPLICATIO S I FOR ATIO

U U

transmission. Table 1 shows the various bit combinations

selection or to Data 2 via Buffer 1 for data transfer. Data

appears at Data 2 after the fourth rising edge of the clock.

When CS is low, Buffer 2 is enabled and Buffer 1 is

disabled,thusdigitalinputdataisdirectlytransferredfrom

Data 2 to Data 1 without any clock delay.

for channel selection.

Table 1. Logic Table for Channel Selection

CHANNEL STATUS

All Off

Multiplexer Expansion

Several LTC1390s can be daisy-chained to expand the

number of multiplexer inputs. No additional interface

ports are required for the expansion. Figure 5 shows two

LTC1390s connected at their analog outputs to form a 16-

to-1 multiplexer at the input to an LTC1286 A/D converter.

Digital Data Transfer Operation

The block diagram of Figure 3 shows the components

contained within the LTC1390 required for digital data

transfer. Digital data transfer operation can be performed

from Data 1 to Data 2 and vice versa as shown in Figure 4.

When CS is high, Buffer 1 is enabled and Buffer 2 is

disabled. The digital input data is fed into the 4-bit shift

REF

+IN

CLK

LTC1286

–

LTC1390

–IN

OUT

DATA 2

DATA 1

ANALOG

INPUTS

GND

CLK

GND

CLK

4-BIT SHIFT

MUX

SWITCHES

47k

–

LTC1390

DATA 2

BUFFER 1

DATA 2

DATA 1

ANALOG

INPUTS

DATA

CLK

DATA 1

BUFFER 2

GND

LTC1390 • F05

LTC1390 • F03

Figure 5. Daisy-Chaining Two LTC1390s for Expansion

Figure 3. Simplified Block Diagram of the Digital Data

Transfer Operation

To ensure that only one channel is switched on at any one

time,twosetsofchannelselectionbitsareneededforData

as shown in Figure 6. The first data sequence is used to

switch off one MUX and the second data sequence is used

to select one channel from the other MUX, or vice versa.

In other words, if bit “ENA” is high and bit “ENB” is low,

one channel of MUX A is switched on and all channels of

MUX B are switched off. If bit “ENA” is low and bit “ENB”

is high, all channels of MUX A are switched off and one

channel of MUX B is switched on.

CLK

Hi-Z

DATA 1

DATA 2

DATA OUT

DATA IN

DATA OUT

LTC1390 • F04

Figure 4. Digital Data Transfer Operation

LTC1390

U U

APPLICATIO S I FOR ATIO

CLK

NULL

BIT

Hi-Z

ENA A2

ENB B2

D11 D10

DATA

SMPL

CONV

DIGITAL INPUT FROM LTC1390

DIGITAL OUTPUT FROM LTC1286

LTC1390 • F06

Figure 6. Timing Diagram for Figure 5

Daisy-Chaining Five LTC1390s

TYPICAL APPLICATIONS N

BYPASS CAPACITOR FROM V TO GND AND

–

TO GND REQUIRED FOR EACH LTC1390

CC EE

REF

+IN

CLK

LTC1286

47k

–

–IN

OUT

LTC1390

GND

DATA 2

DATA 1

ANALOG

INPUTS

CLK

GND

CC EE

–

LTC1390

–

DATA 2

DATA 1

LTC1390

ANALOG

INPUTS

DATA 2

DATA 1

ANALOG

INPUTS

CLK

GND

CLK

GND

–

LTC1390

–

DATA 2

DATA 1

LTC1390

ANALOG

INPUTS

DATA 2

DATA 1

ANALOG

INPUTS

DATA*

CLK

GND

CLK

GND

REQUIRES FIVE 4-BIT CHANNEL

SELECTION DATA BYTES

LTC1390 • TA03

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of circuits as described herein will not infringe on existing patent rights.

LTC1390

TYPICAL APPLICATIONS N

Interfacing LTC1390 with LTC1257 for Demultiplex Operation

OPTIONAL D/A

OUTPUT FILTER

–

LTC1390

CLK

LTC1257

47k

DATA 2

DATA 1

ANALOG

OUTPUTS

OUT

LOAD

REF

OUT

GND

CLK

GND

DATA

CLK

LTC1390 • F03

PACKAGE DESCRIPTION

Dimensions in inches (millimeters) unless otherwise noted.

N Package

16-Lead Plastic DIP

0.770*

(19.558)

MAX

0.300 – 0.325

0.130 ± 0.005

0.045 – 0.065

(7.620 – 8.255)

(3.302 ± 0.127)

(1.143 – 1.651)

0.015

(0.381)

MIN

0.255 ± 0.015*

(6.477 ± 0.381)

0.065

(1.651)

TYP

0.009 – 0.015

(0.229 – 0.381)

0.125

+0.025

–0.015

0.325

(3.175)

MIN

0.045 ± 0.015

(1.143 ± 0.381)

0.018 ± 0.003

(0.457 ± 0.076)

+0.635

8.255

(

)

–0.381

0.100 ± 0.010

(2.540 ± 0.254)

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm).

S Package

16-Lead Plastic SOIC

0.386 – 0.394*

(9.804 – 10.008)

0.010 – 0.020

× 45°

0.053 – 0.069

(1.346 – 1.752)

0.004 – 0.010

(0.101 – 0.254)

(0.254 – 0.508)

0.008 – 0.010

(0.203 – 0.254)

0° – 8° TYP

0.150 – 0.157*

(3.810 – 3.988)

0.228 – 0.244

(5.791 – 6.197)

0.050

(1.270)

TYP

0.014 – 0.019

(0.355 – 0.483)

0.016 – 0.050

0.406 – 1.270

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm).

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

LTC201A/LTC202/LTC203

LTC221/LTC222

Micropower, Low Charge Injection, Quad CMOS Analog Switches

Each Channel is Independently Controlled

Parallel Controlled with Data Latches

Micropower, Low Charge Injection, Quad CMOS Analog Switches

with Data Latches

LTC128x/LTC129x

Serial A/Ds with Integral MUXs

LT/GP 0695 10K • PRINTED IN THE USA

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7487

●

(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977

LINEAR TECHNOLOGY CORPORATION 1995

LTC1390CN [Linear]

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