LTC1707CS8 [Linear]
High Efficiency Monolithic Synchronous Step-Down Switching Regulator; 高效率单片同步降压型开关稳压器
| 型号： | LTC1707CS8 |
| 厂家： | 
Linear |
| 描述： | High Efficiency Monolithic Synchronous Step-Down Switching Regulator |
| 文件： | 总16页 (文件大小：217K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Final Electrical Specifications
LTC1707
High Efficiency Monolithic
Synchronous Step-Down
Switching Regulator
December 1999
U
FEATURES
DESCRIPTIO
The LTC®1707 is a high efficiency monolithic current
modesynchronousbuckregulatorusingafixedfrequency
architecture. The operating supply range is from 8.5V
down to 2.85V, making it suitable for both single and dual
lithium-ion battery-powered applications. Burst Mode op-
eration provides high efficiency at low load currents.
100% duty cycle provides low dropout operation, extend-
ing operating time in battery-powered systems.
■
600mA Output Current (VIN ≥ 4V)
■
High Efficiency: Up to 96%
■
Constant Frequency: 350kHz Synchronizable
to 550kHz
■
■
2.85V to 8.5V VIN Range
0.8V Feedback Reference Allows Low Voltage
Outputs: 0.8V ≤ VOUT ≤ VIN
■
■
■
No Schottky Diode Required
1.19V ±1% Reference Output Pin
Selectable Burst ModeTM Operation/Pulse
Skipping Mode
The switching frequency is internally set at 350kHz,
allowing the use of small surface mount inductors. For
noise sensitive applications it can be externally synchro-
nized up to 550kHz. Burst Mode operation is inhibited
during synchronization or when the SYNC/MODE pin is
pulled low preventing low frequency ripple from interfer-
ing with audio circuitry. Soft-start is provided by an
external capacitor.
■
■
■
Low Dropout Operation: 100% Duty Cycle
Precision 2.7V Undervoltage Lockout
Current Mode Control for Excellent Line and
Load Transient Response
■
■
■
Low Quiescent Current: 200µA
Shutdown Mode Draws Only 15µA Supply Current
Available in 8-Lead SO Package
U
The internal synchronous MOSFET switch increases effi-
ciency and eliminates the need for an external Schottky
diode, saving components and board space. Low output
voltages down to 0.8V are easily achieved due to the 0.8V
internal reference. The LTC1707 comes in an 8-lead SO
package.
APPLICATIO S
■
Cellular Telephones
■
Portable Instruments
■
Wireless Modems
■
RF Communications
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
■
Distributed Power Systems
■
Single and Dual Cell Lithium
U
100
TYPICAL APPLICATIO
V
OUT
= 3.3V
V
= 3.6V
IN
95
90
85
80
75
70
V
= 6V
IN
15µH
V
*
IN
6
2
7
1
5
8
3
V
3.3V
OUT
3V TO
8.5V
V
SW
IN
V
IN
= 8.4V
+
+
100µF
6.3V
22µF
16V
249k
RUN
LTC1707
SYNC/MODE
V
REF
V
FB
80.6k
I
TH
GND
4
47pF
1
10
100
1000
*V
FOLLOWS V FOR
OUT IN
3V < VIN < 3.3V
OUTPUT CURRENT (mA)
1707 F01a
1707 F01b
Figure 1a. High Efficiency Low Dropout Step-Down Converter
Figure 1b. Efficiency vs Output Load Current
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
1
LTC1707
W W
U W
U W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
Input Supply Voltage ................................ –0.3V to 10V
ITH Voltage ................................................. –0.3V to 5V
RUN/SS, VFB Voltages ............................... –0.3V to VIN
SYNC/MODE Voltage ................................. –0.3V to VIN
P-Channel Switch Source Current (DC) .............. 800mA
N-Channel Switch Sink Current (DC) .................. 800mA
Peak SW Sink and Source Current ......................... 1.5A
Operating Ambient Temperature Range
Commercial ............................................ 0°C to 70°C
Industrial ........................................... –40°C to 85°C
Junction Temperature (Note 2)............................. 125°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
TOP VIEW
I
1
2
3
4
8
7
6
5
V
REF
TH
LTC1707CS8
LTC1707IS8
RUN/SS
SYNC/MODE
V
V
FB
IN
GND
SW
S8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 110°C/ W
1707
1707I
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
(Note 3)
MIN
TYP
6
MAX
60
UNITS
nA
I
Feedback Current
VFB
V
Regulated Feedback Voltage
Output Overvoltage Lockout
Reference Voltage Line Regulation
Output Voltage Load Regulation
(Note 3)
●
0.78
20
0.80
60
0.82
110
V
FB
∆V
∆V
∆V
= V
– V
FB
mV
%/V
OVL
FB
OVL
OVL
V
= 3V to 8.5V (Note 3)
0.002 0.01
IN
V
I
I
Sinking 2µA (Note 3)
Sourcing 2µA (Note 3)
0.5
–0.5
0.8
–0.8
%
%
LOADREG
TH
TH
I
Input DC Bias Current
Pulse Skipping Mode
Burst Mode Operation
Shutdown
(Note 4)
S
V
V
V
V
= 8.5V, V
= 3.3V, V = 0V
SYNC/MODE
300
200
11
µA
µA
µA
µA
IN
ITH
RUN/SS
RUN/SS
OUT
= 0V, V = 8.5V, V = Open
320
35
IN
SYNC/MODE
= 0V, 3V < V < 8.5V
IN
Shutdown
= 0V, V < 3V
6
IN
V
Run/SS Threshold
V
V
V
Ramping Positive
= 0V
0.4
1.2
0.5
315
0.7
2.25
1.5
1.0
3.3
2.5
385
V
µA
µA
RUN/SS
RUN/SS
SYNC/MODE
OSC
RUN/SS
I
I
f
Soft-Start Current Source
SYNC/MODE Pull-Up Current
Oscillator Frequency
RUN/SS
= 0V
SYNC/MODE
V
V
= 0.7V
= 0V
350
35
kHz
kHz
FB
FB
V
Undervoltage Lockout
V
V
Ramping Down from 3V (0°C to 70°C)
Ramping Up from 0V (0°C to 70°C)
2.55
2.60
2.70
2.80
2.85
3.00
V
V
UVLO
IN
IN
V
V
Ramping Down from 3V (–40°C to 85°C)
Ramping Up from 0V (–40°C to 85°C)
2.45
2.50
2.70
2.80
2.85
3.00
V
V
IN
IN
R
R
R
R
of P-Channel FET
of N-Channel FET
I
SW
I
SW
= –100mA
= –100mA
0.5
0.6
0.7
0.8
Ω
Ω
PFET
NFET
DS(ON)
DS(ON)
I
I
Peak Inductor Current
SW Leakage
V
V
= 4V, I = 1.4V, Duty Cycle < 40%
0.70 0.915 1.10
±10 ±1000
A
PK
LSW
IN
TH
= 0V
nA
mV
mV
RUN/SS
V
Reference Output Voltage
Reference Output Load Regulation
I
= 0µA
REF
●
●
1.178 1.19 1.202
REF
∆V
0V ≤ I
≤ 100µA
REF
2.3
15
REF
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 3: The LTC1707 is tested in a feedback loop that servos V to the
FB
balance point for the error amplifier (V = 0.8V).
ITH
Note 2: T is calculated from the ambient temperature T and power
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
J
A
dissipation P according to the following formula:
D
T = T + (P • 110°C/W)
J
A
D
2
LTC1707
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs Load Current
Efficiency vs Load Current
Efficiency vs Input Voltage
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
100
95
90
85
80
75
V
= 2.8V
IN
Burst Mode
OPERATION
I
= 100mA
LOAD
V
= 3.6V
IN
I
= 300mA
LOAD
PULSE SKIPPING
MODE
I
= 10mA
LOAD
V
V
= 7.2V
IN
= 2.5V
OUT
L = 15µH
V
= 3.6V
V
= 2.5V
IN
OUT
V
= 2.5V
L = 15µH
Burst Mode OPERATION
OUT
L = 15µH
Burst Mode OPERATION
1
10
100
1000
1
10
100
1000
0
2
4
6
8
10
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
INPUT VOLTAGE (V)
1707 G02
1707 G03
1707 G01
Undervoltage Lockout Threshold
vs Temperature
DC Supply Current
vs Input Voltage
Supply Current in Shutdown
vs Input Voltage
3.00
350
300
250
200
150
100
50
22
20
18
16
14
12
10
8
V
= 0V
RUN/SS
2.95
2.90
2.85
2.80
2.75
2.70
2.65
2.60
2.55
2.50
T = 85°C
J
PULSE SKIPPING
V
IN
MODE
T = 25°C
J
RAMPING UP
Burst Mode
OPERATION
V
T = –40°C
J
IN
RAMPING DOWN
T = 25°C
J
OUT
V
= 1.8V
6
LOAD CURRENT = 0A
2.5 3.5 4.5 5.5
INPUT VOLTAGE (V)
0
4
–50 –25
0
25
50
125
6.5
7.5
8.5
2.5
3.5
4.5
5.5
6.5
7.5
8.5
75 100
TEMPERATURE (°C)
INPUT VOLTAGE (V)
1707 G04
1707 G05
1707 G06
Reference Voltage
vs Temperature
Oscillator Frequency
vs Temperature
Oscillator Frequency
vs Input Voltage
1.200
1.195
1.190
1.185
1.180
390
380
370
360
350
340
330
320
310
390
380
370
360
350
340
330
320
310
V
IN
= 5V
V
IN
= 5V
300
300
–50 –25
0
25
50
125
75 100
–50 –25
0
25
50
125
2.5
3.5
4.5
5.5
8.5
75 100
6.5
7.5
TEMPERATURE (°C)
TEMPERATURE (°C)
INPUT VOLTAGE (V)
1707 G07
1707 G08
1627 G09
3
LTC1707
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Maximum Output Current vs
Input Voltage
Switch Leakage Current
vs Temperature
Switch Resistance
vs Temperature
1000
800
600
400
200
0
1800
1600
1400
1200
1000
800
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
V
= 8.4V
V
= 5V
IN
IN
V
= 1.8V
OUT
SYNCHRONOUS
SWITCH
V
OUT
= 1.5V
MAIN
SWITCH
V
= 5V
OUT
SYNCHRONOUS
SWITCH
V
= 3.3V
= 2.5V
OUT
600
V
OUT
400
V
= 2.9V
OUT
MAIN
SWITCH
T
= 85°C
200
J
L = 15µH
0
0
2.5
3.5
4.5
5.5
8.5
–50 –25
0
25
50
125
6.5
7.5
75 100
–50 –25
0
25
50
125
75 100
INPUT VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
1707 G10
1707 G11
1707 G12
Switch Resistance
vs Input Voltage
Load Step Transient Response
Burst Mode Operation
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
VIN = 5V
ITH
SW
0.5V/DIV
5V/DIV
SYNCHRONOUS SWITCH
VOUT
20mV/DIV
AC COUPLED
VOUT
50mV/DIV
AC COUPLED
MAIN SWITCH
ILOAD
500mA/DIV
ILOAD
200mA/DIV
FIGURE 1A
VIN = 5V
FIGURE 1A
ILOAD = 50mA
1707 G14
1707 G15
25µs/DIV
10µs/DIV
0
2.5
3.5
4.5
5.5
8.5
6.5
7.5
INPUT VOLTAGE (V)
1707 G13
4
LTC1707
U
U
U
PI FU CTIO S
ITH (Pin 1): Error Amplifier Compensation Point. The
current comparator threshold increases with this control
voltage. Nominal voltage range for this pin is 0V to 1.2V.
VIN (Pin 6): Main Supply Pin. Must be closely decoupled
to GND, Pin 4.
SYNC/MODE (Pin 7): This pin performs two functions:
1) synchronize with an external clock and 2) select be-
tween two modes of low load current operation. To
synchronize with an external clock, apply a TTL/CMOS
compatible clock with a frequency between 385kHz and
550kHz. To select Burst Mode operation, float the pin or
tie it to VIN. Grounding Pin 7 forces pulse skipping mode
operation.
RUN/SS (Pin 2): Combination of Soft-Start and Run
Control Inputs. A capacitor to ground at this pin sets the
ramptimetofullcurrentoutput. Thetimeisapproximately
0.5s/µF. Forcing this pin below 0.4V shuts down the
LTC1707.
VFB (Pin 3): Feedback Pin. Receives the feedback voltage
from an external resistive divider across the output.
VREF (Pin 8): The Output of a 1.19V ±1% Precision
Reference. May be loaded up to 100µA and is stable with
up to 2000pF load capacitance.
GND (Pin 4): Ground Pin.
SW (Pin 5): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchro-
nous power MOSFET switches.
U
U
W
FU CTIO AL DIAGRA
BURST
DEFEAT
X
Y = “0” ONLY WHEN X IS A CONSTANT “1”
V
IN
V
IN
Y
V
IN
1.5µA
SLOPE
COMP
SYNC/MODE
7
OSC
0.4V
–
+
0.6V
V
FB
6
V
IN
3
–
+
FREQ
SHIFT
EN
–
+
V
IN
SLEEP
6Ω
V
REF
8
–
+
I
COMP
+
0.8V
0.12V
EA
–
BURST
1.19V
REF
2.25µA
I
TH
1
V
IN
S
R
Q
SWITCHING
LOGIC
RUN/SOFT
START
Q
RUN/SS
2
AND
BLANKING
CIRCUIT
UVLO
TRIP = 2.7V
ANTI-
SHOOT-THRU
+
OVDET
–
0.86V
+
SW
5
4
SHUTDOWN
I
RCMP
–
GND
1707 BD
5
LTC1707
U
OPERATIO
(Refer to Functional Diagram)
Main Control Loop
When the converter is in Burst Mode operation, the peak
current of the inductor is set to approximately 200mA,
even though the voltage at the ITH pin indicates a lower
value. The voltage at the ITH pin drops when the inductor’s
average current is greater than the load requirement. As
theITH voltagedropsbelow0.12V, theBURSTcomparator
trips, causing the internal sleep line to go high and forcing
off both internal power MOSFETs.
The LTC1707 uses a constant frequency, current mode
step-down architecture. Both the main (P-channel
MOSFET)andsynchronous(N-channelMOSFET)switches
are internal. During normal operation, the internal top
powerMOSFETisturnedoneachcyclewhentheoscillator
sets the RS latch, and turned off when the current com-
parator, ICOMP, resets the RS latch. The peak inductor
current at which ICOMP resets the RS latch is controlled by
the voltage on the ITH pin, which is the output of error
amplifier EA. The VFB pin, described in the Pin Functions
section, allows EA to receive an output feedback voltage
from an external resistive divider. When the load current
increases, it causes a slight decrease in the feedback
voltage relative to the 0.8V reference, which, in turn,
causes the ITH voltage to increase until the average induc-
tor current matches the new load current. While the top
MOSFET is off, the bottom MOSFET is turned on until
eithertheinductorcurrentstartstoreverseasindicatedby
thecurrentreversalcomparatorIRCMP, orthebeginningof
the next cycle.
In sleep mode, both power MOSFETs are held off and the
internal circuitry is partially turned off, reducing the quies-
cent current to 200µA. The load current is now being
supplied from the output capacitor. When the output
voltage drops, causing ITH to rise above 0.22V, the top
MOSFET is again turned on and this process repeats.
Short-Circuit Protection
Whentheoutputisshortedtoground, thefrequencyofthe
oscillator is reduced to about 35kHz, 1/10 the nominal
frequency. This frequency foldback ensures that the
inductor current has more time to decay, thereby prevent-
ing runaway. The oscillator’s frequency will progressively
increase to 350kHz (or the synchronized frequency) when
The main control loop is shut down by pulling the RUN/SS
pin low. Releasing RUN/SS allows an internal 2.25µA
current source to charge soft-start capacitor CSS. When
CSS reaches0.7V,themaincontrolloopisenabledwiththe
V
FB rises above 0.3V.
Frequency Synchronization
ITH voltage clamped at approximately 5% of its maximum
The LTC1707 can be synchronized with an external
TTL/CMOScompatibleclocksignalwithanamplitudeofat
least 2VP-P. The frequency range of this signal must be
from385kHzto550kHz.Donotattempttosynchronizethe
LTC1707 below 385kHz as this may cause abnormal
operation and an undesired frequency spectrum. The top
MOSFET turn-on follows the rising edge of the external
source.
value. As CSS continues to charge, ITH is gradually
released, allowing normal operation to resume.
Comparator OVDET guards against transient overshoots
>7.5% by turning the main switch off and keeping it off
until the fault is removed.
Burst Mode Operation
When the LTC1707 is synchronized to an external source,
the LTC1707 operates in PWM pulse skipping mode. In
this mode, when the output load is very low, current
comparatorICOMP remainstrippedformorethanonecycle
andforcesthemainswitchtostayoffforthesamenumber
of cycles. Increasing the output load slightly allows con-
stant frequency PWM operation to resume. This mode
exhibits low output ripple as well as low audio noise and
reduced RF interference while providing reasonable low
current efficiency.
The LTC1707 is capable of Burst Mode operation in which
the internal power MOSFETs operate intermittently based
on load demand. To enable Burst Mode operation, simply
allow the SYNC/MODE pin to float or connect it to a logic
high. To disable Burst Mode operation and enable pulse
skipping mode, connect the SYNC/MODE pin to GND. In
this mode, efficiency is lower at light loads, but becomes
comparabletoBurstModeoperationwhentheoutputload
exceeds 30mA.
6
LTC1707
U
OPERATIO
Frequency synchronization is inhibited when the feedback
voltage VFB is below 0.6V. This prevents the external clock
from interfering with the frequency foldback for short-
circuit protection.
switch is on continuously. Hence, the I2R loss is due
mainly to the RDS(ON) of the P-channel MOSFET. See
Efficiency Considerations in the Applications Information
section.
Below VIN = 4V, the output current must be derated as
shown in Figures 2a and 2b. For applications that require
500mA below VIN = 4V, select the LTC1627.
Dropout Operation
When the input supply voltage decreases toward the out-
put voltage, the duty cycle increases toward the maximum
on-time. Further reduction of the supply voltage forces the
main switch to remain on for more than one cycle until it
reaches 100% duty cycle. The output voltage will then be
determined by the input voltage minus the voltage drop
across the P-channel MOSFET and the inductor.
1200
1000
800
600
400
200
0
V
= 1.8V
OUT
V
= 1.5V
OUT
V
= 5V
OUT
V
OUT
= 3.3V
InBurstModeoperationorpulseskippingmodeoperation
with the output lightly loaded, the LTC1707 transitions
through continuous mode as it enters dropout.
V
= 2.5V
OUT
V
= 2.9V
T
= 25°C
L = 15µH
EXT SYNC AT 400kHz
OUT
J
2.5
3.5
4.5
5.5 8.5
6.5
7.5
Undervoltage Lockout
INPUT VOLTAGE (V)
1707 F02b
AprecisionundervoltagelockoutshutsdowntheLTC1707
when VIN drops below 2.7V, making it ideal for single
lithium-ion battery applications. In lockout, the LTC1707
draws only several microamperes, which is low enough to
preventdeepdischargeandpossibledamagetothelithium-
ion battery nearing its end of charge. A 100mV hysteresis
ensures reliable operation with noisy input supplies.
Figure 2b. Maximum Output Current
vs Input Voltage (Synchronized)
Slope Compensation and Inductor Peak Current
Slope compensation provides stability by preventing sub-
harmonicoscillations.Itworksbyinternallyaddingaramp
to the inductor current signal at duty cycles in excess of
40%. As a result, the maximum inductor peak current is
lowerforVOUT/VIN >0.4thanwhenVOUT/VIN <0.4.Seethe
inductor peak current as a function of duty cycle graph in
Figure 3. The worst-case peak current reduction occurs
Low Supply Operation
TheLTC1707isdesignedtooperatedowntoa2.85Vinput
voltage. At this voltage the converter is most likely to be
running at high duty cycles or in dropout where the main
1200
1000
1000
V
= 1.8V
OUT
= 1.5V
V
WITHOUT
OUT
900
EXTERNAL
800
600
400
200
0
CLOCK SYNC
V
= 5V
OUT
800
WORST-CASE
EXTERNAL
CLOCK SYNC
V
= 3.3V
OUT
700
600
500
V
= 2.5V
OUT
V
= 2.9V
OUT
T
= 25°C
J
L = 15µH
V
= 4V
IN
2.5
3.5
4.5
5.5
8.5
6.5
7.5
INPUT VOLTAGE (V)
0
10 20 30 40 50
70 80 90 100
60
1707 F02a
DUTY CYCLE (%)
1707 F03
Figure 2a. Maximum Output Current
vs Input Voltage (Unsynchronized)
Figure 3. Maximum Inductor Peak Current vs Duty Cycle
7
LTC1707
W U U
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APPLICATIO S I FOR ATIO
forcing the use of more expensive ferrite, molypermalloy,
orKoolMµ® cores. Actualcorelossisindependentofcore
size for a fixed inductor value, but it is very dependent on
inductance selected. As inductance increases, core losses
go down. Unfortunately, increased inductance requires
more turns of wire and therefore copper losses will
increase.
withtheoscillatorsynchronizedatitsminimumfrequency,
i.e., to a clock just above the oscillator free-running
frequency. The actual reduction in average current is less
than for peak current.
ThebasicLTC1707applicationcircuitisshowninFigure 1a.
External component selection is driven by the load re-
quirement and begins with the selection of L followed by
CIN and COUT.
Ferritedesignshaveverylowcorelossesandarepreferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Inductor Value Calculation
The inductor selection will depend on the operating fre-
quency of the LTC1707. The internal preset frequency is
350kHz, but can be externally synchronized up to 550kHz.
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. However, oper-
ating at a higher frequency generally results in lower
efficiencybecauseofincreasedinternalgatechargelosses.
Kool Mµ (from Magnetics, Inc.) is a very good, low loss
corematerialfortoroidswitha“soft”saturationcharacter-
istic. Molypermalloy is slightly more efficient at high
(>200kHz) switching frequencies but quite a bit more
expensive. Toroids are very space efficient, especially
when you can use several layers of wire, while inductors
wound on bobbins are generally easier to surface mount.
New designs for surface mount are available from
Coiltronics, Coilcraft and Sumida.
Theinductorvaluehasadirecteffectonripplecurrent.The
ripple current ∆IL decreases with higher inductance or
frequency and increases with higher VIN or VOUT
.
1
V
OUT
∆I =
V
1−
L
OUT
(1)
V
f L
( )( )
IN
CIN and COUT Selection
Accepting larger values of ∆IL allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ∆IL = 0.4(IMAX).
Incontinuousmode,thesourcecurrentofthetopMOSFET
is a square wave of duty cycle VOUT/VIN. To prevent large
voltage transients, a low ESR input capacitor sized for the
maximum RMS current must be used. The maximum
RMS capacitor current is given by:
The inductor value also has an effect on Burst Mode
operation. The transition to low current operation begins
when the inductor current peaks fall to approximately
200mA. Lower inductor values (higher ∆IL) will cause this
to occur at lower load currents, which can cause a dip in
efficiency in the upper range of low current operation. In
Burst Mode operation, lower inductance values will cause
the burst frequency to increase.
1/2
]
V
V − V
OUT
(
)
OUT IN
[
C required I
I
IN
RMS MAX
V
IN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is com-
monlyusedfordesignbecauseevensignificantdeviations
donotoffermuchrelief.Notethatcapacitormanufacturer’s
ripplecurrentratingsareoftenbasedon2000hoursoflife.
This makes it advisable to further derate the capacitor, or
choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
Inductor Core Selection
Once the value for L is known, the type of inductor must be
selected. High efficiency converters generally cannot
affordthecorelossfoundinlowcostpowderedironcores,
Kool Mµ is a registered trademark of Magnetics, Inc.
8
LTC1707
W U U
U
APPLICATIO S I FOR ATIO
size or height requirements in the design. Always consult the
manufacturer if there is any question.
and T495 series, Nichicon PL series and Sprague 593D
and 595D series. Consult the manufacturer for other
specific recommendations.
TheselectionofCOUT isdrivenbytherequiredeffectiveseries
resistance (ESR). Typically, once the ESR requirement is
satisfied, the capacitance is adequate for filtering. The output
ripple ∆VOUT is determined by:
Output Voltage Programming
The output voltage is set by a resistive divider according
to the following formula:
1
∆V
∆I ESR +
L
OUT
R2
R1
4fC
V
= 0.8V 1+
OUT
OUT
(2)
where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ∆IL increases
with input voltage. For the LTC1707, the general rule for
proper operation is:
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 4.
Run/Soft-Start Function
The RUN/SS pin is a dual purpose pin that provides the
soft-startfunctionandameanstoshutdowntheLTC1707.
Soft-start reduces surge currents from VIN by gradually
increasing the internal current limit. Power supply
sequencing can also be accomplished using this pin.
COUT required ESR < 0.25Ω
Manufacturers such as Nichicon, United Chemicon and
Sanyoshouldbeconsideredforhighperformancethrough-
hole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest ESR/size
ratio of any aluminum electrolytic at a somewhat higher
price. Once the ESR requirement for COUT has been met,
the RMS current rating generally far exceeds the
IRIPPLE(P-P) requirement. Remember ESR is typically a
direct function of the volume of the capacitor.
Aninternal2.25µAcurrentsourcechargesupanexternal
capacitor CSS. When the voltage on RUN/SS reaches
0.7V the LTC1707 begins operating. As the voltage on
RUN/SS continues to ramp from 0.7V to 1.8V, the inter-
nal current limit is also ramped at a proportional linear
rate. Thecurrentlimitbeginsat25mA(atVRUN/SS≤0.7V)
and ends at the Figure 3 value (VRUN/SS ≈ 1.8V). The
outputcurrentthusrampsupslowly,chargingtheoutput
capacitor. If RUN/SS has been pulled all the way to
ground, there will be a delay before the current starts
increasing and is given by:
In surface mount applications multiple capacitors may
have to be paralleled to meet the ESR or RMS current
handling requirements of the application. Aluminum
electrolytic and dry tantalum capacitors are both avail-
able in surface mount configurations. In the case of
tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice
is the AVX TPS series of surface mount tantalum, avail-
able in case heights ranging from 2mm to 4mm. Other
capacitor types include Sanyo POSCAP, KEMET T510
0.7C
SS
t
=
DELAY
2.25µA
Pulling the RUN/SS pin below 0.4V puts the LTC1707 into
alowquiescentcurrentshutdown(IQ <15µA).Thispincan
be driven directly from logic as shown in Figure 5. Diode
0.8V ≤ V
≤ 8.5V
OUT
R2
3.3V OR 5V
RUN/SS
RUN/SS
V
FB
D1
LTC1707
GND
R1
C
C
SS
SS
1707 F05
1707 F04
Figure 4. Setting the LTC1707 Output Voltage
Figure 5. RUN/SS Pin Interfacing
9
LTC1707
W U U
U
APPLICATIO S I FOR ATIO
both top and bottom MOSFET RDS(ON) and the duty
cycle (DC) as follows:
D1 in Figure 5 reduces the start delay but allows CSS to
ramp up slowly providing the soft-start function. This
diode can be deleted if soft-start is not needed.
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
Efficiency Considerations
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteris-
tics curves. Thus, to obtain I2R losses, simply add RSW
to RL and multiply by the square of the average output
current.
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
oftenusefultoanalyzeindividuallossestodeterminewhat
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Other losses including CIN and COUT ESR dissipative losses,
MOSFET switching losses and inductor core and copper
losses generally account for less than 2% total additional
loss.
Efficiency = 100% – (L1 + L2 + L3 + ...)
whereL1, L2, etc. aretheindividuallossesasapercentage
of input power.
1
V
OUT
V
OUT
V
OUT
= 1.5V
= 3.3V
= 5V
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC1707 circuits: VIN quiescent current and I2R
losses. The VIN quiescent current loss dominates the
efficiency loss at very low load currents whereas the I2R
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence as illustrated in Figure 6.
0.1
0.01
V
IN
= 6V
0.001
1
10
100
1000
LOAD CURRENT (mA)
1. TheVIN quiescentcurrentisduetotwocomponents:the
DC bias current as given in the electrical characteristics
and the internal main switch and synchronous switch
gate charge currents. The gate charge current results
fromswitchingthegatecapacitanceoftheinternalpower
MOSFET switches. Each time the gate is switched from
high to low or from low to high, a packet of charge dQ
moves from VIN to ground. The resulting dQ/dt is the
currentoutofVINthatistypicallylargerthantheDCbias
current.Incontinuousmode,IGATECHG =f(QT+QB)where
QT and QB are the gate charges of the internal top and
bottomswitches.BoththeDCbiasandgatechargelosses
areproportionaltoVIN andthustheireffectswillbemore
pronounced at higher supply voltages.
2. I2R losses are calculated from the resistances of the
internal switches RSW and external inductor RL. In
continuous mode the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into SW pin from L is a function of
1707 F06
Figure 6. Power Lost vs Load Current
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (∆ILOAD • ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or dis-
chargeCOUT, whichgeneratesafeedbackerrorsignal. The
regulator loop then acts to return VOUT to its steady-state
value. During this recovery time, VOUT can be monitored
for overshoot or ringing that would indicate a stability
problem. The internal compensation provides adequate
compensation for most applications. But if additional
compensation is required, the ITH pin can be used for
external compensation as shown in Figure 7 (the 47pF
capacitor, CC2, is typically needed for noise decoupling).
10
LTC1707
W U U
APPLICATIO S I FOR ATIO
U
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
dischargedbypasscapacitorsareeffectivelyputinparallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 • CLOAD).
Thus, a 10µF capacitor charging to 3.3V would require a
250µs rise time, limiting the charging current to about
130mA.
1. Are the signal and power grounds segregated? The
LTC1707 signal ground consists of the resistive
divider, the optional compensation network (RC and
CC1), CSS, CREF and CC2. The power ground consists of
the (–) plate of CIN, the (–) plate of COUT and Pin 4 of the
LTC1707. The power ground traces should be kept
short, direct and wide. The signal ground and power
ground should converge to a common node in a star-
ground configuration.
2. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be con-
nectedbetweenthe(+)plateofCOUT andsignalground.
PC Board Layout Checklist
3. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1707. These items are also illustrated graphically in
the layout diagram of Figure 7. Check the following in your
layout:
4. KeeptheswitchingnodeSWawayfromsensitivesmall-
signal nodes.
C
REF
C
C2
R
C
C
1
2
3
4
C1
8
OPTIONAL
I
TH
V
REF
C
SS
7
RUN/SS
SYNC/MODE
LTC1707
6
5
V
V
FB
IN
+
L1
GND
SW
+
+
C
IN
R2
+
V
IN
C
OUT
V
R1
OUT
–
–
1707 F07
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 7. LTC1707 Layout Diagram
11
LTC1707
W U U
U
APPLICATIO S I FOR ATIO
Design Example
A 22µH inductor works well for this application. For best
efficiency choose a 1A inductor with less than 0.25Ω
series resistance.
As a design example, assume the LTC1707 is used in a
singlelithium-ionbattery-poweredcellularphoneapplica-
tion. The VIN will be operating from a maximum of 4.2V
down to about 2.85V. The load current requirement is a
maximum of 0.3A but most of the time it will be in standby
mode, requiring only 2mA. Efficiency at both low and high
load currents is important. Output voltage is 2.5V. With
this information we can calculate L using equation (1),
CIN will require an RMS current rating of at least 0.15A at
temperature and COUT will require an ESR of less than
0.25Ω. In most applications, the requirements for these
capacitors are fairly similar.
Forthefeedbackresistors,chooseR1=80.6k.R2canthen
be calculated from equation (2) to be:
1
V
OUT
VOUT
0.8
L =
V
1 −
OUT
(3)
R2 =
−1 R1= 171k; use 169k
V
f ∆I
( )(
IN
)
L
Substituting VOUT = 2.5V, VIN = 4.2V, ∆IL = 120mA and
f = 350kHz in equation (3) gives:
Figure 8 shows the complete circuit along with its effi-
ciency curve.
2.5V
2.5V
4.2V
L =
1 −
= 24.1µH
350kHz 120mA
(
)(
)
C
ITH
47pF
1
2
3
4
8
I
V
REF
TH
100
7
6
5
RUN/SS SYNC/MODE
LTC1707
V
V
= 3.6V
IN
C
V
IN
SS
90
80
70
60
50
V
0.1µF
2.85V TO
4.5V
FB
IN
V
= 4.2V
IN
22µH*
V
2.5V
0.3A
OUT
GND
SW
R2
169k
1%
†
††
IN
+
+
C
C
OUT
100µF
22µF
6.3V
16V
R1
80.6k
1%
V
= 2.5V
OUT
L = 15µH
1707 F08a
Burst Mode OPERATION
* SUMIDA CD54-220
AVX TPSC107M006R0150
AVX TPSC226M016R0375
†
††
1
10
100
1000
OUTPUT CURRENT (mA)
1707 F08b
Figure 8. Single Lithium-Ion to 2.5V/0.3A Regulator from Design Example
12
LTC1707
U
TYPICAL APPLICATIO S
5V Input to 3.3V/0.6A Regulator
C
ITH
47pF
* SUMIDA CD54-150
1
2
3
4
8
7
6
5
I
** AVX TPSC107M006R0150
V
TH
REF
*** TAIYO YUDEN LMK325BJ106K-T
RUN/SS
SYNC/MODE
LTC1707
C
SS
0.1µF
V
V
IN
V
= 5V
FB
IN
15µH*
V
3.3V
0.6A
OUT
GND
SW
R2
C
***
IN
249k
1%
10µF
CERAMIC
+
C
**
100µF
OUT
R1
80.6k
1%
6.3V
1707 TA01
Double Lithium-Ion Battery to 5V/0.5A Low Dropout Regulator
C
ITH
47pF
* SUMIDA CD54-330
1
2
3
4
8
7
6
5
**
I
AVX TPSD107M010R0100
AVX TPSC226M016R0375
V
TH
REF
***
RUN/SS
SYNC/MODE
LTC1707
C
SS
0.1µF
V
V
V
≤ 8.4V
FB
IN
IN
33µH*
V
OUT
GND
SW
5V
R2
C
***
+
IN
0.5A
422k
1%
22µF
+
C
**
100µF
OUT
16V
R1
80.6k
1%
10V
1707 TA02
13
LTC1707
U
TYPICAL APPLICATIO S
3.3V Input to 2.5V/0.4A Regulator
C
ITH
47pF
1
2
3
4
8
I
V
TH
REF
7
RUN/SS
SYNC/MODE
LTC1707
C
SS
0.1µF
6
5
V
V
IN
V
IN
= 3.3V
FB
10µH*
R2
V
2.5V
0.4A
OUT
GND
SW
169k
1%
†
C
**
+
C
IN
OUT
10µF
100µF
CERAMIC
R1
80.6k
1%
6.3V
1707 TA03
* SUMIDA CD54-100
** TAIYO YUDEN LMK325BJ106K-T
†
AVX TPSC107M006R0150
Double Lithium-Ion to 2.5V/0.5A Regulator
C
ITH
47pF
* SUMIDA CD54-250
8
1
2
3
4
I
** AVX TPSC107M006R0150
*** AVX TPSC226M016R0375
V
TH
REF
7
6
5
RUN/SS
SYNC/MODE
LTC1707
C
SS
0.1µF
V
V
IN
V
≤ 8.4V
FB
IN
25µH*
V
2.5V
0.5A
OUT
GND
SW
R2
169k
1%
C
***
22µF
+
IN
+
C
**
OUT
16V
100µF
R1
6.3V
80.6k
1%
1707 TA05
14
LTC1707
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
5
8
6
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
3
4
2
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
SO8 1298
15
LTC1707
U
TYPICAL APPLICATIO
Single Lithium-Ion to 1.8V/0.3A Regulator
C
ITH
47pF
* SUMIDA CD54-150
8
1
2
3
4
I
** AVX TPSC107M006R0150
V
TH
REF
*** TAIYO YUDEN LMK325BJ106K-T
7
6
5
RUN/SS
SYNC/MODE
LTC1707
C
SS
V
V
V
≤ 4.2V
0.1µF
FB
IN
IN
15µH*
V
1.8V
0.3A
OUT
GND
SW
R2
C
***
IN
10µF
CERAMIC
100k
1%
+
C
**
100µF
OUT
R1
6.3V
80.6k
1%
1707 TA04
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16-Pin SO and SSOP
1707i LT/TP 1299 4K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
LINEAR TECHNOLOGY CORPORATION 1999
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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