LTC2636CDE-H8#TRPBF_技术文档

LTC2636

Octal 12-/10-/8-Bit SPI V

OUT

DACs with10ppm/°C Reference

FEATURES

DESCRIPTION

The LTC^®2636 is a family of octal 12-, 10-, and 8-bit

voltage-output DACs with an integrated, high-accuracy,

low-drift 10ppm/°C reference in 14-lead DFN and 16-lead

MSOP packages. It has a rail-to-rail output buffer and is

guaranteed monotonic. The LTC2636-L has a full-scale

output of 2.5V, and operates from a single 2.7V to 5.5V

supply. The LTC2636-H has a full-scale output of 4.096V,

and operates from a 4.5V to 5.5V supply. Each DAC can

alsooperatewithanexternalreference,whichsetstheDAC

full-scale output to the external reference voltage.

n

Integrated Precision Reference

2.5V Full-Scale 10ppm/°C (LTC2636-L)

4.096V Full-Scale 10ppm/°C (LTC2636-H)

n

Maximum INL Error: 2.5LSB (LTC2636-12)

n

Low Noise: 0.75mV 0.1Hz to 200KHz

P-P

n

Guaranteed Monotonic Over –40°C to 125°C

Temperature Range

n

Selectable Internal or External Reference

2.7V to 5.5V Supply Range (LTC2636-L)

Ultralow Crosstalk Between DACs (<2.4nV•s)

Low Power: 0.9mA at 3V (LTC2636-L)

Power-On-Reset to Zero-Scale/Mid-Scale

Double-Buffered Data Latches

TheseDACscommunicateviaanSPI/MICROWIRE™-com-

patible3-wireserialinterfacewhichoperatesatclockrates

up to 50MHz. Hardware clear (CLR) and asynchronous

DAC update (LDAC) pins are available in the MSOP pack-

age. The LTC2636 incorporates a power-on reset circuit.

Options are available for reset to zero-scale or reset to

mid-scaleininternalreferencemode,orresettomid-scale

in external reference mode after power-up.

Tiny 14-Lead 4mm × 3mm DFN and 16-Lead MSOP

Packages

APPLICATIONS

n

Mobile Communications

n

Process Control and Industrial Automation

n

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

SPI/MICROWIRE is a trademark of Linear Technology Corporation. All other trademarks are the

property of their respective owners. Protected by U.S. Patents including 5396245, 5859606,

6891433, 6937178, 7414561.

Automatic Test Equipment

n

Portable Equipment

n

Automotive

n

Optical Networking

BLOCK DIAGRAM

SWITCH

REF

INTERNAL REFERENCE

V

REF

GND

V

CC

12-Bit Integral Nonlinearity

(LTC2636-LZ12)

V

DAC A

DAC B

DAC C

DAC H

DAC G

DAC F

DAC E

OUTA

OUTH

2

1

V

= 3V

CC

INTERNAL REF.

V

REF

V

OUTB

OUTC

V

OUTG

V

0

V

OUTF

V

OUTE

–1

–2

V

REF

DAC D

OUTD

0

1024

2048

3072

4095

CODE

2636 TA01

CS/LD

SDI

CONTROL LOGIC

DECODE

SCK

(CLR)

(LDAC)

32-BIT SHIFT REGISTER

POWER-ON RESET

2636 BD

( ) MSOP PACKAGE ONLY

2636f

1

LTC2636

(Notes 1, 2)

ABSOLUTE MAXIMUM RATINGS

Maximum Junction Temperature........................... 150°C

Storage Temperature Range...................–65°C to 150°C

Lead Temperature (Soldering, 10 sec)

Supply Voltage (V ) ................................... –0.3V to 6V

CC

CS/LD, SCK, SDI, LDAC, CLR....................... –0.3V to 6V

V

A–V

H ..................–0.3V to Min(V + 0.3V, 6V)

OUT

OUT CC

MS16-Lead Package......................................... 300°C

REF ....................................–0.3V to Min(V + 0.3V, 6V)

CC

Operating Temperature Range

LTC2636C ................................................ 0°C to 70°C

LTC2636I..............................................–40°C to 85°C

LTC2636H (Note 3) ............................–40°C to 125°C

PIN CONFIGURATION

TOP VIEW

V

1

2

3

4

5

6

7

14 GND

TOP VIEW

CC

A

V

13

12

11

10

9

V

H

G

F

1

2

3

4

5

6

7

8

V

16 GND

OUT

CC

A

OUT

V

15

14

13

12

V

H

G

F

OUT

B

C

D

B

C

D

E

OUT

V

E

LDAC

CS/LD

SCK

11 REF

CS/LD

REF

SDI

10 CLR

9

SDI

SCK

8

MS PACKAGE

16-LEAD (4mm × 5mm) PLASTIC MSOP

DE PACKAGE

14-LEAD (4mm × 3mm) PLASTIC DFN

= 150°C, θ = 37°C/W

T

JMAX

= 150°C, θ = 110°C/W

JA

T

JMAX

JA

EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB

2636f

2

LTC2636

ORDER INFORMATION

LTC2636

C

DE –L

Z

12

#TR

PBF

LEAD FREE DESIGNATOR

TAPE AND REEL

TR = 2500-Piece Tape and Reel

RESOLUTION

12 = 12-Bit

10 = 10-Bit

8 = 8-Bit

POWER-ON RESET

MI = Reset to Mid-Scale in Internal Reference Mode

MX = Reset to Mid-Scale in External Reference Mode

Z = Reset to Zero-Scale in Internal Reference Mode

FULL-SCALE VOLTAGE, INTERNAL REFERENCE MODE

L = 2.5V

H = 4.096V

PACKAGE TYPE

DE = 14-Lead DFN

MS = 16-Lead MSOP

TEMPERATURE GRADE

C = Commercial Temperature Range (0°C to 70°C)

I = Industrial Temperature Range (–40°C to 85°C)

H = Automotive Temperature Range (–40°C to 125°C)

PRODUCT PART NUMBER

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

2636f

3

LTC2636

PRODUCT SELECTION GUIDE

POWER-ON

REFERENCE

MODE

PART MARKING*

V

WITH INTERNAL

POWER-ON

MAXIMUM

INL

FS

DFN

MSOP

PART NUMBER

LTC2636-LMI12

LTC2636-LMI10

LTC2636-LMI8

LTC2636-LMX12

LTC2636-LMX10

LTC2636-LMX8

LTC2636-LZ12

LTC2636-LZ10

LTC2636-LZ8

REFERENCE

RESET TO CODE

RESOLUTION

12-Bit

10-Bit

8-Bit

V

CC

LMI12

LMI10

6LMI8

6LMI12 2.5V•(4095/4096)

6LMI10 2.5V•(1023/1024)

36LMI8 2.5V•(255/256)

Mid-Scale

Zero-Scale

Mid-Scale

Zero-Scale

Internal

External

Internal

External

Internal

2.7V-5.5V

4.5V-5.5V

2.5LSB

1LSB

0.5LSB

2.5LSB

1LSB

LMX12 6LMX12 2.5V•(4095/4096)

LMX10 6LMX10 2.5V•(1023/1024)

6LMX8 36LMX8 2.5V•(255/256)

12-Bit

10-Bit

8-Bit

0.5LSB

2.5LSB

1LSB

6LZ12

6LZ10

36LZ8

36LZ12 2.5V•(4095/4096)

36LZ10 2.5V•(1023/1024)

636LZ8 2.5V•(255/256)

12-Bit

10-Bit

8-Bit

0.5LSB

2.5LSB

1LSB

LTC2636-HMI12

LTC2636-HMI10

LTC2636-HMI8

LTC2636-HMX12

LTC2636-HMX10

LTC2636-HMX8

LTC2636-HZ12

LTC2636-HZ10

LTC2636-HZ8

HMI12 6HMI12 4.096V•(4095/4096)

HMI10 6HMI10 4.096V•(1023/1024)

6HMI8 36HMI8 4.096V•(255/256)

HMX12 6HMX12 4.096V•(4095/4096)

HMX10 6HMX10 4.096V•(1023/1024)

6HMX8 36HMX8 4.096V•(255/256)

12-Bit

10-Bit

8-Bit

0.5LSB

2.5LSB

1LSB

12-Bit

10-Bit

8-Bit

0.5LSB

2.5LSB

1LSB

6HZ12

6HZ10

36HZ8

36HZ12 4.096V•(4095/4096)

36HZ10 4.096V•(1023/1024)

636HZ8 4.096V•(255/256)

12-Bit

10-Bit

8-Bit

0.5LSB

*Above options are available in a 14-lead DFN package (LTC2636-DE) or 16-lead MSOP package (LTC2636-MS).

2636f

4

LTC2636

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_CC= 2.7V to 5.5V, V_OUTunloaded unless otherwise speciﬁed.

LTC2636-LMI12/-LMI10/-LMI8/-LMX12/-LMX10/-LMX8/-LZ12/-LZ10/-LZ8 (V_FS= 2.5V)

LTC2636-8

LTC2636-10

LTC2636-12

SYMBOL PARAMETER

DC Performance

Resolution

CONDITIONS

MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS

l

8

10

12

Bits

Monotonicity

V

CC

V

CC

V

CC

V

CC

V

CC

V

CC

= 3V, Internal Reference (Note 4)

= 3V, Internal Reference, Code = 0

= 3V, Internal Reference (Note 5)

=3V, Internal Reference

DNL

INL

Differential Nonlinearity

0.5

5

0.5

1

2.5

5

LSB

mV

Integral Nonlinearity

Zero-Scale Error

Offset Error

0.05

0.5

10

0.2

0.5

10

1

0.5

10

ZSE

5

V

5

mV

OS

V

Temperature

OS

μV/°C

OSTC

Coefﬁcient

l

GE

Gain Error

V

= 3V, Internal Reference

0.2

0.8

0.2

0.8

0.2

0.8

%FSR

CC

Gain Temperature

Coefﬁcient

= 3V, Internal Reference (Note 10)

TC

CC

C-Grade

I-Grade

H-Grade

10

ppm/°C

Load Regulation

Internal Reference, Mid-Scale,

= 3V 10%,

V

l

0.009 0.016

0.035 0.064

0.14 0.256 LSB/mA

CC

–5mA ≤ I

≤ 5mA

OUT

V

= 5V 10%, (Note 11)

CC

–10mA ≤ I

≤ 10mA

OUT

R

DC Output Impedance

Internal Reference, Mid-Scale,

= 3V 10%,

OUT

V

l

0.09 0.156

Ω

CC

–5mA ≤ I

≤ 5mA

OUT

V

= 5V 10%, (Note 11)

CC

–10mA ≤ I

≤ 10mA

OUT

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

DAC Output Span

External Reference

Internal Reference

0 to V

V

OUT

REF

0 to 2.5

PSR

Power Supply Rejection

V

= 3V 10% or 5V 10%

–80

dB

CC

I

Short Circuit Output Current (Note 6)

= V = 5.5V

SC

FS

CC

l

Sinking

Sourcing

Zero-Scale; V

shorted to V

27

–28

48

–48

mA

OUT

CC

l

Full-Scale; V

shorted to GND

OUT

Power Supply

l

V

Positive Supply Voltage

Supply Current (Note 7)

For Speciﬁed Performance

2.7

5.5

V

CC

l

I

CC

V

CC

V

CC

V

CC

V

CC

= 3V, V =2.5V, External Reference

0.8

0.9

1

1.1

1.3

1.5

mA

REF

= 3V, Internal Reference

= 5V, V =2.5V, External Reference

REF

= 5V, Internal Reference

l

I

SD

Supply Current in Power-Down Mode

(Note 7)

V

= 5V, C-Grade, I-Grade

= 5V, H-Grade

0.5

1.8

5

μA

CC

2636f

5

LTC2636

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_CC= 2.7V to 5.5V, V_OUTunloaded unless otherwise speciﬁed.

LTC2636-LMI12/-LMI10/-LMI8/-LMX12/-LMX10/-LMX8/-LZ12/-LZ10/-LZ8 (V_FS= 2.5V)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Reference Input

l

V

Input Voltage Range

Resistance

1

V

kΩ

pF

REF

CC

120

160

12

200

Capacitance

l

I

Reference Current, Power-Down Mode

DAC Powered Down

0.005

0.1

μA

REF

Reference Output

Output Voltage

1.24

1.25

10

1.26

V

ppm/°C

kΩ

Reference Temperature Coefﬁcient

Output Impedance

0.5

10

Capacitive Load Driving

Short Circuit Current

μF

V

CC

= 5.5V; REF Shorted to GND

2.5

mA

Digital I/O

V

Digital Input High Voltage

Digital Input Low Voltage

V

= 3.6V to 5.5V

= 2.7V to 3.6V

l

2.4

2.0

V

IH

CC

V

IL

V

CC

V

CC

= 4.5V to 5.5V

= 2.7V to 4.5V

l

0.8

0.6

V

l

I

Digital Input Leakage

V

= GND to V

CC

1

μA

pF

LK

IN

C

Digital Input Capacitance

(Note 8)

2.5

IN

AC Performance

t

S

Settling Time

V

= 3V (Note 9)

CC

0.39% ( 1LSB at 8 Bits)

0.098% ( 1LSB at 10 Bits)

0.024% ( 1LSB at 12 Bits)

3.4

4.0

4.4

μs

Voltage Output Slew Rate

Capacitive Load Driving

Glitch Impulse

1.0

500

2.1

V/μs

pF

At Mid-Scale Transition

nV•s

kHz

DAC-to-DAC Crosstalk

Multiplying Bandwidth

Output Voltage Noise Density

1 DAC held at FS, 1 DAC Switch 0-FS

External Reference

2.1

320

e

n

At f = 1kHz, External Reference

At f = 10kHz, External Reference

At f = 1kHz, Internal Reference

At f = 10kHz, Internal Reference

180

160

200

180

nV/√Hz

Output Voltage Noise

0.1Hz to 10Hz, External Reference

0.1Hz to 10Hz, Internal Reference

0.1Hz to 200kHz, External Reference

0.1Hz to 200kHz, Internal Reference

35

40

680

730

μV

P-P

C

= 0.1μF

REF

2636f

6

LTC2636

TIMING CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating temperature

range, otherwise speciﬁcations are at T_A= 25°C. V_CC= 2.7V to 5.5V, V_OUTunloaded unless otherwise speciﬁed.

LTC2636-LMI12/-LMI10/-LMI8/-LMX12/-LMX10/-LMX8/-LZ12/-LZ10/-LZ8 (V_FS= 2.5V)

SYMBOL

PARAMETER

CONDITIONS

MIN

4

TYP

MAX

UNITS

ns

l

t1

t2

t3

t4

t5

t6

t7

t8

t9

t10

SDI Valid to SCK Setup

SDI Valid to SCK Hold

SCK High Time

4

ns

9

ns

SCK Low Time

9

ns

CS/LD Pulse Width

10

7

ns

LSB SCK High to CS/LD High

CS/LD Low to SCK High

CLR Pulse Width

ns

7

ns

20

15

7

ns

LDAC Pulse Width

ns

CS/LD High to SCK Positive Edge

SCK Frequency

ns

50% Duty Cycle

50

MHz

ns

t11

CS/LD High to LDAC High or Low Transition

200

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_CC= 4.5V to 5.5V, V_OUTunloaded unless otherwise speciﬁed.

LTC2636-HMI12/-HMI10/-HMI8/-HMX12/-HMX10/-HMX8/-HZ12/-HZ10/-HZ8 (V_FS= 4.096V)

LTC2636-8

LTC2636-10

LTC2636-12

SYMBOL PARAMETER

DC Performance

Resolution

CONDITIONS

MIN TYP MAX MIN TYP MAX MIN TYP MAX

UNITS

l

8

10

12

Bits

LSB

Monotonicity

V

= 5V, Internal Reference (Note 4)

CC

DNL

Differential

Nonlinearity

0.5

1

l

INL

Integral Nonlinearity

Zero-Scale Error

Offset Error

V

= 5V, Internal Reference (Note 4)

= 5V, Internal Reference, Code = 0

= 5V, Internal Reference (Note 5)

= 5V, Internal Reference

0.05

0.5

10

0.5

5

0.2

0.5

10

1

5

1

0.5

10

2.5

5

LSB

mV

CC

ZSE

V

5

mV

OS

V

Temperature

OS

μV/°C

OSTC

Coefﬁcient

l

GE

Gain Error

V

= 5V, Internal Reference

0.2

0.8

0.2

0.8

0.2

0.8

%FSR

CC

Gain Temperature

Coefﬁcient

= 5V, Internal Reference (Note 10)

TC

C-Grade

I-Grade

H-Grade

10

ppm/°C

Load

V

= 5V 10%, (Note 11)

l

0.006 0.01

0.022 0.04

0.09 0.16 LSB/mA

CC

Regulation

Internal Reference, Mid-Scale,

–10mA ≤ I

≤ 10mA

OUT

R

OUT

DC Output

Impedance

V

= 5V 10%, (Note 11)

CC

0.09 0.156

Ω

Internal Reference, Mid-Scale,

–10mA ≤ I ≤ 10mA

OUT

2636f

7

LTC2636

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_CC= 4.5V to 5.5V, V_OUTunloaded unless otherwise speciﬁed.

LTC2636-HMI12/-HMI10/-HMI8/-HMX12/-HMX10/-HMX8/-HZ12/-HZ10/-HZ8 (V_FS= 4.096V)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

0 to V

MAX

UNITS

V

DAC Output Span

External Reference

Internal Reference

V

OUT

REF

0 to 4.096

PSR

Power Supply Rejection

V

= 5V 10%

–80

dB

CC

I

SC

Short Circuit Output Current (Note 6)

= V = 5.5V

FS

CC

l

Sinking

Sourcing

Zero-Scale; V

Shorted to V

27

–28

48

–48

mA

OUT

CC

Full-Scale; V

Shorted to GND

Power Supply

l

V

Positive Supply Voltage

Supply Current (Note 7)

For Speciﬁed Performance

4.5

5.5

V

CC

l

I

CC

V

CC

V

CC

= 5V, V = 4.096V, External Reference

1.0

1.1

1.3

1.5

mA

REF

= 5V, Internal Reference

l

I

Supply Current in Power-Down Mode

(Note 7)

V

= 5V, C-Grade, I-Grade

= 5V, H-Grade

0.5

1.8

5

μA

SD

CC

Reference Input

l

V

REF

Input Voltage Range

Resistance

1

V

kΩ

pF

CC

120

160

12

200

Capacitance

l

I

Reference Current, Power-Down Mode

DAC Powered Down

0.005

0.1

μA

REF

Reference Output

Output Voltage

2.032

2.048

10

2.064

V

ppm/°C

kΩ

Reference Temperature Coefﬁcient

Output Impedance

0.5

10

Capacitive Load Driving

Short Circuit Current

μF

V

= 5.5V; REF Shorted to GND

4

mA

CC

Digital I/O

l

V

Digital Input High Voltage

Digital Input Low Voltage

Digital Input Leakage

2.4

V

IH

IL

0.8

1

I

= GND to V

μA

pF

LK

IN

CC

C

Digital Input Capacitance

(Note 8)

2.5

IN

AC Performance

t

S

Settling Time

V

= 5V (Note 9)

CC

0.39% ( 1LSB at 8 Bits)

0.098% ( 1LSB at 10 Bits)

0.024% ( 1LSB at 12 Bits)

3.8

4.3

4.8

μs

Voltage Output Slew Rate

Capacitive Load Driving

Glitch Impulse

1.0

500

3.0

2.4

320

V/μs

pF

At Mid-Scale Transition

nV•s

kHz

DAC-to-DAC Crosstalk

Multiplying Bandwidth

1 DAC held at FS, 1 DAC Switch 0-FS

External Reference

2636f

8

LTC2636

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_CC= 4.5V to 5.5V, V_OUTunloaded unless otherwise speciﬁed.

LTC2636-HMI12/-HMI10/-HMI8/-HMX12/-HMX10/-HMX8/-HZ12/-HZ10/-HZ8 (V_FS= 4.096V)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

e

n

Output Voltage Noise Density

At f = 1kHz, External Reference

At f = 10kHz, External Reference

At f = 1kHz, Internal Reference

At f = 10kHz, Internal Reference

180

160

250

230

nV/√Hz

Output Voltage Noise

0.1Hz to 10Hz, External Reference

0.1Hz to 10Hz, Internal Reference

0.1Hz to 200kHz, External Reference

0.1Hz to 200kHz, Internal Reference

35

50

680

750

μV

P-P

μV

P-P

μV

P-P

μV

P-P

C

= 0.1μF

REF

TIMING CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating temperature

range, otherwise speciﬁcations are at T_A= 25°C. V_CC= 4.5V to 5.5V, V_OUTunloaded unless otherwise speciﬁed.

LTC2636-HMI12/-HMI10/-HMI8/-HMX12/-HMX10/-HMX8/-HZ12/-HZ10/-HZ8 (V_FS= 4.096V)

SYMBOL

PARAMETER

CONDITIONS

MIN

4

TYP

MAX

UNITS

ns

l

t1

t2

t3

t4

t5

t6

t7

t8

t9

t10

SDI Valid to SCK Setup

SDI Valid to SCK Hold

SCK High Time

4

ns

9

ns

SCK Low Time

9

ns

CS/LD Pulse Width

10

7

ns

LSB SCK High to CS/LD High

CS/LD Low to SCK High

CLR Pulse Width

ns

7

ns

20

15

7

ns

LDAC Pulse Width

ns

CS/LD High to SCK Positive Edge

SCK Frequency

ns

50% Duty Cycle

50

MHz

ns

t11

CS/LD High to LDAC High or Low Transition

200

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All voltages are with respect to GND.

Note 3: High temperatures degrade operating lifetimes. Operating lifetime

Note 5: Inferred from measurement at code 16 (LTC2636-12), code 4

(LTC2636-10) or code 1 (LTC2636-8), and at full-scale.

Note 6: This IC includes current limiting that is intended to protect the

device during momentary overload conditions. Junction temperature can

exceed the rated maximum during current limiting. Continuous operation

above the speciﬁed maximum operating junction temperature may impair

device reliability.

is derated at temperatures greater than 105°C.

Note 4: Linearity and monotonicity are deﬁned from code k to code 2 –1,

N

Note 7: Digital inputs at 0V or V

.

CC

L

N

where N is the resolution and k is given by k = 0.016•(2 / V ), rounded

Note 8: Guaranteed by design and not production tested.

L

FS

to the nearest whole code. For V = 2.5V and N = 12, k = 26 and linearity

FS

L

Note 9: Internal Reference mode. DAC is stepped 1/4 scale to 3/4 scale

and 3/4 scale to 1/4 scale. Load is 2kΩ in parallel with 100pF to GND.

Note 10: Temperature coefﬁcient is calculated by dividing the maximum

is deﬁned from code 26 to code 4,095. For V = 4.096V and N = 12, k =

FS

L

16 and linearity is deﬁned from code 16 to code 4,095.

change in output voltage by the speciﬁed temperature range.

Note 11: Thermal resistance of MSOP package limits I

to

OUT

–5mA ≤ I

≤ 5mA for H-grade MSOP parts and V = 5V 10%.

OUT

CC

2636f

9

LTC2636

TYPICAL PERFORMANCE CHARACTERISTICS

T_A= 25°C, unless otherwise noted. LTC2636-L12 (Internal Reference, V_FS= 2.5V)

Integral Nonlinearity (INL)

Differential Nonlinearity (DNL)

1.0

0.5

1.0

0.5

V

= 3V

V

= 3V

CC

0

–0.5

–1.0

–0.5

–1.0

0

1024

2048

3072

4095

0

1024

2048

3072

4095

CODE

2636 G01

2636 G02

Reference Output Voltage

vs Temperature

INL vs Temperature

DNL vs Temperature

1.0

0.5

1.0

1.260

V

= 3V

V

= 3V

V

= 3V

CC

INL (POS)

INL (NEG)

0.5

0

1.255

1.250

1.245

1.240

DNL (POS)

0

DNL (NEG)

–0.5

–1.0

–50 –25

0

25 50 75 100 125 150

–50 –25

0

25 50 75 100 125 150

–50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

2636 G03

2636 G04

2636 G05

Settling to 1LSB Rising

Settling to 1LSB Falling

3/4 SCALE TO

1/4 SCALE STEP

CS/LD

5V/DIV

V

= 3V, V = 2.5V

CC FS

R = 2k, C = 100pF

L L

V

OUT

AVERAGE OF 256 EVENTS

1LSB/DIV

3.6μs

4.4μs

V

1/4 SCALE TO

OUT

CS/LD

5V/DIV

1LSB/DIV

3/4 SCALE STEP

V

= 3V, V = 2.5V

CC

L

FS

R

= 2k, C = 100pF

L

AVERAGE OF 256 EVENTS

2μs/DIV

2636 G07

2636 G06

2636f

10

LTC2636

TYPICAL PERFORMANCE CHARACTERISTICS

T_A= 25°C, unless otherwise noted. LTC2636-H12 (Internal Reference, V_FS= 4.096V)

Integral Nonlinearity (INL) Differential Nonlinearity (DNL)

1.0

0.5

1.0

0.5

V

= 5V

V

= 5V

CC

0

–0.5

–1.0

–0.5

–1.0

0

1024

2048

3072

4095

0

1024

2048

3072

4095

CODE

2636 G08

2636 G09

Reference Output Voltage

vs Temperature

INL vs Temperature

DNL vs Temperature

2.068

1.0

0.5

1.0

V

= 5V

V

= 5V

V

= 5V

CC

INL (POS)

2.058

2.048

2.038

2.028

0.5

0

DNL (POS)

DNL (NEG)

0

INL (NEG)

–0.5

–1.0

–50 –25

0

25 50 75 100 125 150

–50 –25

0

25 50 75 100 125 150

–50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

2636 G12

2636 G10

2636 G11

Settling to 1LSB Rising

Settling to 1LSB Falling

1/4 SCALE TO

3/4 SCALE STEP

V

= 5V, V = 4.095V

L

CS/LD

CC

FS

R

= 2k, C = 100pF

L

5V/DIV

V

OUT

AVERAGE OF 256 EVENTS

1LSB/DIV

4.0μs

4.8μs

V

OUT

1/4 SCALE TO

1LSB/DIV

3/4 SCALE STEP

CS/LD

5V/DIV

V

= 5V, V = 4.095V

CC

R

FS

= 2k, C = 100pF

L

AVERAGE OF 256 EVENTS

2μs/DIV

2636 G13

2636 G14

2636f

11

LTC2636

TYPICAL PERFORMANCE CHARACTERISTICS ^T_A^{= 25°C, unless otherwise noted.}

LTC2636-10

Integral Nonlinearity (INL)

Differential Nonlinearity (DNL)

1.0

0.5

1.0

0.5

V

CC

V

FS

= 3V

= 2.5V

V

CC

V

FS

= 3V

= 2.5V

INTERNAL REF.

0

–0.5

–1.0

–0.5

–1.0

0

256

512

768

1023

0

256

512

768

1023

CODE

2636 G15

2636 G16

LTC2636-8

Integral Nonlinearity (INL)

Differential Nonlinearity (DNL)

0.50

0.25

0

0.50

0.25

0

V

CC

V

FS

= 3V

= 2.5V

V

CC

V

FS

= 3V

= 2.5V

INTERNAL REF.

–0.25

–0.50

–0.25

–0.50

0

64

128

192

255

0

64

128

192

255

CODE

2636 G17

2636 G18

LTC2636

Load Regulation

Current Limiting

Offset Error vs Temperature

10

8

0.20

3

2

V

CC

V

CC

V

CC

= 5V (LTC2636-H)

= 5V (LTC2636-L)

= 3V (LTC2636-L)

V

CC

V

CC

V

CC

= 5V (LTC2636-H)

= 5V (LTC2636-L)

= 3V (LTC2636-L)

0.15

0.10

0.05

0

6

4

1

2

0

–2

–4

–6

–8

–10

–0.05

–0.01

–0.15

–0.20

–1

–2

–3

INTERNAL REF.

CODE = MIDSCALE

–30

–20

–10

0

10

20

30

–30

–20

–10

0

10

20

30

–50 –25

0

25 50 75 100 125 150

I

(mA)

I

(mA)

OUT

TEMPERATURE (°C)

OUT

2636 G19

2636 G20

2636 G21

2636f

12

LTC2636

TYPICAL PERFORMANCE CHARACTERISTICS ^T_A^{= 25°C, unless otherwise noted.}

LTC2636

Large-Signal Response

Mid-Scale Glitch Impulse

Power-On Reset Glitch

LTC2636-L

CS/LD

5V/DIV

V

CC

2V/DIV

V

OUT

LTC2636-H12, V = 5V

CC

3.0nV•s TYP

0.5V/DIV

ZERO-SCALE

V

OUT

5mV/DIV

OUT

5mV/DIV

LTC2636-L12, V = 3V

CC

2.1nV•s TYP

V

= V = 5V

CC

FS

1/4 SCALE to 3/4 SCALE

2μs/DIV

200μs/DIV

2636 G22

2636 G23

2636 G24

Headroom at Rails

vs Output Current

Exiting Power-Down to Mid-Scale

Power-On Reset to Mid-Scale

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

LTC2636-H

V

= 5V

5V SOURCING

CC

INTERNAL REF.

V

CC

2V/DIV

CS/LD

3V (LTC2636-L) SOURCING

LTC2636-H

2V/DIV

DACs A-G IN

POWER-DOWN MODE

V

OUT

V

OUT

0.5V/DIV

5V SINKING

3V (LTC2636-L) SINKING

LTC2636-L

200μs/DIV

5μs/DIV

0

1

2

3

4

5

6

7

8

9

10

2636 G27

2636 G26

I

(mA)

OUT

2636 G25

Supply Current vs Logic Voltage

Hardware CLR

Hardware CLR to Mid-Scale

1.5

1.4

1.2

1.0

0.8

0.6

V

= 5V

REF

CODE = FULL-SCALE

SWEEP SCK, SDI, CS/LD

BETWEEN 0V AND V

V

= 5V

REF

CODE = FULL-SCALE

CC

= 4.096V

CC

V

OUT

1V/DIV

V

OUT

1V/DIV

V

= 5V

CC

V

= 3V

CC

CLR

5V/DIV

CLR

5V/DIV

(LTC2636-L)

1μs/DIV

0

1

2

3

4

5

2636 G29

2636 G30

LOGIC VOLTAGE (V)

2636 G28

2636f

13

LTC2636

TYPICAL PERFORMANCE CHARACTERISTICS ^T_A^{= 25°C, unless otherwise noted.}

LTC2636

Multiplying Bandwidth

Noise Voltage vs Frequency

2

0

500

400

300

200

100

0

V

= 5V

CC

CODE = MID-SCALE

INTERNAL REF.

–2

–4

–6

–8

LTC2636-H

–10

–12

–14

–16

–18

LTC2636-L

V

= 5V

REF(DC)

REF(AC)

CODE = FULL-SCALE

CC

= 2V

= 0.2V

P-P

1k

10k

100k

1M

100

1k

10k

FREQUENCY (Hz)

100k

1M

FREQUENCY (Hz)

2636 G31

2636 G32

Gain Error vs Reference Input

0.1Hz to 10Hz Voltage Noise

1.0

0.8

V

= 5V, V = 2.5V

FS

V

= 5.5V

CC

CODE = MIDSCALE

INTERNAL REF.

GAIN ERROR OF 8 CHANNELS

0.6

0.4

0.2

10μV/DIV

0

–0.2

–0.4

–0.6

–0.8

–1.0

1s/DIV

1

1.5

2

2.5

3

3.5

4

4.5

5

5.5

2636 G34

REFERENCE VOLTAGE (V)

2636 G33

DAC to DAC Crosstalk (Dynamic)

Gain Error vs Temperature

1.0

0.5

CS/LD

5V/DIV

1 DAC

SWITCH 0-FS

2V/DIV

0

V

OUT

–0.5

1mV/DIV

LTC2636-H12, V = 5V

CC

2.4nV•s TYP

C

REF

= 0.1μF

–1.0

2μs/DIV

–50 –25

0

25 50 75 100 125 150

2636 G35

TEMPERATURE (°C)

2636 G36

2636f

14

LTC2636

PIN FUNCTIONS ^(DFN/MSOP)

V

(Pin 1/1): Supply Voltage Input. 2.7V ≤ V ≤ 5.5V

GND (Pin 14/16): Ground.

CC

(LTC2636-L) or 4.5V ≤ V ≤ 5.5V (LTC2636-H). Bypass

CC

LDAC (Pin 6, MSOP only): Asynchronous DAC Update

Pin. If CS/LD is high, a falling edge on LDAC immediately

updates the DAC registers with the contents of the input

registers (similar to a software update). If CS/LD is low

when LDAC goes low, the DAC registers are updated after

CS/LD returns high. A low on the LDAC pin powers up

the DACs. A software power down command is ignored if

LDAC is low. If the LDAC functionality is not being used,

the LDAC pin should be tied high.

to GND with a 0.1μF capacitor.

V

A to V

H (Pins 2-5, 10-13/2-5, 12-15): DAC

OUT

Analog Voltage Outputs.

CS/LD (Pin 6/7): Serial Interface Chip Select/Load Input.

When CS/LD is low, SCK is enabled for shifting data on

SDI into the register. When CS/LD is taken high, SCK

is disabled and the speciﬁed command (see Table 1) is

executed.

CLR (Pin 10, MSOP only): Asynchronous Clear Input.

A logic low at this level-triggered input clears all regis-

ters and causes the DAC voltage output to reset to Zero

(LTC2636-Z) or Mid-scale (LTC2636-MI/-MX). CMOS and

TTL compatible.

SCK (Pin 7/8): Serial Interface Clock Input. CMOS and

TTL compatible.

SDI (Pin 8/9): Serial Interface Data Input. Data on SDI is

clockedintotheDAContherisingedgeofSCK.TheLTC2636

accepts input word lengths of either 24 or 32 bits.

Exposed Pad (Pin 15, DFN Only): Ground. Must be sol-

dered to PCB Ground.

REF (Pin 9/11): Reference Voltage Input or Output. When

External Reference mode is selected, REF is an input

(1V ≤ V

≤ V ) where the voltage supplied sets the

REF

CC

full-scale DAC output voltage. When Internal Reference

is selected, the 10ppm/°C 1.25V (LTC2636-L) or 2.048V

(LTC2636-H) internal reference (half full-scale) is avail-

able at REF. This output may be bypassed to GND with

up to 10μF, and must be buffered when driving external

DC load current.

2636f

15

LTC2636

BLOCK DIAGRAM

SWITCH

REF

INTERNAL REFERENCE

V

REF

GND

V

CC

V

DAC A

DAC B

DAC C

DAC H

DAC G

DAC F

DAC E

OUTA

OUTH

V

REF

V

OUTB

OUTC

V

OUTG

V

REF

V

OUTF

OUTE

V

REF

DAC D

OUTD

CS/LD

SDI

CONTROL LOGIC

DECODE

SCK

(CLR)

(LDAC)

32-BIT SHIFT REGISTER

POWER-ON RESET

2636 BD

( ) MSOP PACKAGE ONLY

TIMING DIAGRAMS

t

1

t

2

t

4

6

3

SCK

SDI

1

2

3

23

24

t

10

t

7

5

CS/LD

t

9

11

LDAC

2636 F01a

Figure 1a

CS/LD

t

11

LDAC

2636 F01b

Figure 1b

2636f

16

LTC2636

OPERATION

The LTC2636 is a family of octal voltage output DACs

in 14-lead DFN and 16-lead MSOP packages. Each DAC

can operate rail-to-rail using an external reference, or

with its full-scale voltage set by an integrated reference.

Eighteen combinations of accuracy (12-, 10-, and 8-bit),

power-on reset value (zero-scale, mid-scale in internal

referencemode, ormid-scaleinexternalreferencemode),

and full-scale voltage (2.5V or 4.096V) are available. The

LTC2636 is controlled using a 3-wire SPI/MICROWIRE

compatible interface.

Transfer Function

The digital-to-analog transfer function is

k

⎛

⎝

⎞

⎠

V_{OUT(IDEAL) ⎜}

=

V

_n⎟ ^REF

2

where k is the decimal equivalent of the binary DAC input

code,nistheresolution,andV iseither2.5V(LTC2636-

REF

LMI/-LMX/-LZ)or4.096V(LTC2636-HMI/-HMX/-HZ)when

in Internal Reference mode, and the voltage at REF when

in External Reference mode.

Power-On Reset

Table 1. Command Codes

COMMAND*

The LTC2636-HZ/-LZ clear the output to zero-scale when

power is ﬁrst applied, making system initialization con-

sistent and repeatable.

C3 C2 C1 C0

0

1

0

1

0

1

0

1

0

1

0

1

0

1

Write to Input Register n

Update (Power-Up) DAC Register n

Write to Input Register n, Update (Power-Up) All

Write to and Update (Power-Up) DAC Register n

Power-Down DAC n

For some applications, downstream circuits are active

during DAC power-up, and may be sensitive to nonzero

outputs from the DAC during this time. The LTC2636

contains circuitry to reduce the power-on glitch: the

analog output typically rises less than 5mV above zero-

scale during power on. In general, the glitch amplitude

decreases as the power supply ramp time is increased.

See “Power-On Reset Glitch” in the Typical Performance

Characteristics section.

Power-Down Chip (All DAC’s and Reference)

Select Internal Reference (Power-Up Reference)

Select External Reference (Power-Down Internal

Reference)

1

No Operation

*Command codes not shown are reserved and should not be used.

The LTC2636-HMI/-HMX/-LMI/-LMX provide an alterna-

tive reset, setting the output to mid-scale when power is

ﬁrst applied. The LTC2636-LMI and LTC2636-HMI power

up in internal reference mode, with the output set to a

mid-scale voltage of 1.25V and 2.048V respectively. The

LTC2636-LMX and LTC2636-HMX power-up in external

reference mode, with the output set to mid-scale of the

external reference. Default reference mode selection is

described in the Reference Modes section.

Table 2. Address Codes

ADDRESS (n)*

A3 A2 A1 A0

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

DAC A

DAC B

DAC C

DAC D

DAC E

DAC F

DAC G

DAC H

All DACs

Power Supply Sequencing

The voltage at REF (Pin 9-DFN, Pin 11-MSOP) must be

kept within the range –0.3V ≤ V

≤ V + 0.3V (see

REF

CC

Absolute Maximum Ratings). Particular care should be

* Address codes not shown are reserved and should not be used.

taken to observe these limits during power supply turn-

on and turn-off sequences, when the voltage at V is in

CC

transition.

2636f

17

LTC2636

OPERATION

INPUT WORD (LTC2636-12)

COMMAND

ADDRESS

DATA (12 BITS + 4 DON'T-CARE BITS)

C3 C2 C1 C0 A3 A2 A1 A0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

X

MSB

LSB

INPUT WORD (LTC2636-10)

COMMAND

ADDRESS

DATA (10 BITS + 6 DON'T-CARE BITS)

C3 C2 C1 C0 A3 A2 A1 A0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

MSB LSB

X

INPUT WORD (LTC2636-8)

COMMAND

ADDRESS

DATA (8 BITS + 8 DON'T-CARE BITS)

C3 C2 C1 C0 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0

MSB LSB

X

2636 F02

Figure 2. Command and Data Input Format

Serial Interface

DAC if it had been in power-down mode. The data path

and registers are shown in the Block Diagram.

TheCS/LDinputisleveltriggered. Whenthisinputistaken

low, it acts as a chip-select signal, enabling the SDI and

SCK buffers and the input shift register. Data (SDI input)

is transferred into the LTC2636 on the next 24 rising SCK

edges. The 4-bit command, C3-C0, is loaded ﬁrst; then

the 4-bit DAC address, A3-A0; and ﬁnally the 16-bit data

word. The data word comprises the 12-, 10- or 8-bit

input code, ordered MSB-to-LSB, followed by 4, 6 or

8 don’t-care bits (LTC2636-12, -10 and -8 respectively;

see Figure 2). Data can only be transferred to the device

when the CS/LD signal is low, beginning on the ﬁrst rising

edge of SCK. SCK may be high or low at the falling edge

of CS/LD. The rising edge of CS/LD ends the data transfer

and causes the device to execute the command speciﬁed

in the 24-bit input sequence. The complete sequence is

shown in Figure 3a.

While the minimum input sequence is 24 bits, it may

optionally be extended to 32 bits to accommodate micro-

processors that have a minimum word width of 16 bits

(2 bytes). To use the 32-bit width, 8 don’t-care bits

must be transferred to the device ﬁrst, followed by the

24-bit sequence described. Figure 3b shows the 32-bit

sequence.

The 16-bit data word is ignored for all commands that do

not include a Write operation.

Reference Modes

For applications where an accurate external reference is

either not available, or not desirable due to limited space,

the LTC2636 has a user-selectable, integrated reference.

The integrated reference voltage is internally ampliﬁed

by 2x to provide the full-scale DAC output voltage range.

The LTC2636-LMI/-LMX/-LZ provides a full-scale DAC

output of 2.5V. The LTC2636-HMI/-HMX/-HZ provides a

full-scale DAC output of 4.096V. The internal reference

can be useful in applications where the supply voltage is

poorlyregulated. InternalReferencemodecanbeselected

by using command 0110b, and is the power-on default for

LTC2636-HZ/-LZ, as well as for LTC2636-HMI/-LMI.

The command (C3-C0) and address (A3-A0) assignments

are shown in Tables 1 and 2. The ﬁrst four commands in

Table 1 consist of write and update operations. A Write

operation loads a 16-bit data word from the 24-bit shift

register into the input register of the selected DAC, n. An

Update operation copies the data word from the input

register to the DAC register. Once copied into the DAC

register, the data word becomes the active 12-, 10-, or

8-bit input code, and is converted to an analog voltage at

the DAC output. Write to and Update combines the ﬁrst

two commands. The Update operation also powers up the

The10ppm/°C,1.25V(LTC2636-LMI/-LMX/-LZ)or2.048V

(LTC2636-HMI/-HMX/-HZ) internal reference is available

2636f

18

LTC2636

OPERATION

2636f

19

LTC2636

OPERATION

up as its voltage output is updated. When a DAC which

is in a powered-down state is powered up and updated,

normal settling is delayed. If less than eight DACs are in

a powered-down state prior to the update command, the

power-up delay time is 10μs. However, if all eight DACs

and the integrated reference are powered down, then the

main bias generation circuit block has been automatically

shut down in addition to the DAC ampliﬁers and reference

buffers. In this case, the power up delay time is 12μs.

The power-up of the integrated reference depends on

the command that powered it down. If the reference is

powered down using the Select External Reference Com-

mand (0111b), then it can only be powered back up using

Select Internal Reference Command (0110b). However, if

the reference was powered down using Power Down Chip

Command (0101b), then in addition to Select Internal

Reference Command (0110b), any command (in software

or using the LDAC pin) that powers up the DACs will also

power up the integrated reference.

at the REF pin. Adding bypass capacitance to the REF pin

will improve noise performance; and up to 10μF can be

drivenwithoutoscillation.TheREFoutputmustbebuffered

when driving an external DC load current.

Alternatively, the DAC can operate in External Reference

modeusingcommand0111b.Inthismode,aninputvoltage

supplied externally to the REF pin provides the reference

(1V ≤ V ≤ V ) and the supply current is reduced. The

REF

CC

external reference voltage supplied sets the full-scale DAC

output voltage. External Reference mode is the power-on

default for LTC2636-HMX/-LMX.

The reference mode of LTC2636-HZ/-LZ/-HMI/-LMI

(Internal Reference power-on default), can be changed

by software command after power-up. The same is true

for LTC2636-HMX/-LMX (External Reference power-on

default).

Power-Down Mode

Forpower-constrainedapplications,power-downmodecan

be used to reduce the supply current whenever less than

eight DAC outputs are needed. When in power-down, the

buffer ampliﬁers, bias circuits, and integrated reference

circuitsaredisabled,anddrawessentiallyzerocurrent.The

DAC outputs are put into a high-impedance state, and the

output pins are passively pulled to ground through indi-

vidual 200kΩ resistors. Input- and DAC-register contents

are not disturbed during power-down.

Voltage Outputs

The LTC2636’s integrated rail-to-rail ampliﬁers have guar-

anteed load regulation when sourcing or sinking up to

10mA at 5V, and 5mA at 3V.

Load regulation is a measure of the ampliﬁer’s ability to

maintain the rated voltage accuracy over a wide range of

load current. The measured change in output voltage per

change in forced load current is expressed in LSB/mA.

Any DAC channel or combination of channels can be put

into power-down mode by using command 0100b in

combination with the appropriate DAC address, (n). The

supplycurrentisreducedapproximately10%foreachDAC

powered down. The integrated reference is automatically

powered down when external reference is selected using

command 0111b. In addition, all the DAC channels and

the integrated reference together can be put into power-

down mode using Power Down Chip command 0101b.

When the integrated reference and all DAC channels are

in power-down mode, the REF pin becomes high imped-

ance (typically > 1GΩ). For all power-down commands

the 16-bit data word is ignored.

DC output impedance is equivalent to load regulation, and

may be derived from it by simply calculating a change in

units from LSB/mA to ohms. The ampliﬁer’s DC output

impedance is 0.1Ω when driving a load well away from

the rails.

When drawing a load current from either rail, the output

voltage headroom with respect to that rail is limited by

the 50Ω typical channel resistance of the output devices

(e.g., when sinking 1mA, the minimum output voltage is

50Ω • 1mA, or 50mV). See the graph “Headroom at Rails

vs. Output Current” in the Typical Performance Charac-

teristics section.

The ampliﬁer is stable driving capacitive loads of up to

500pF.

Normal operation resumes after executing any command

that includes a DAC update, (as shown in Table 1) or using

theasynchronousLDACpin. TheselectedDACispowered

2636f

20

LTC2636

OPERATION

POSITIVE

FSE

V

= V

CC

REF

V

= V

CC

REF

OUTPUT

VOLTAGE

OUTPUT

VOLTAGE

INPUT CODE

2636 F04

(c)

OUTPUT

VOLTAGE

0V

0

2,048

4,095

INPUT CODE

(a)

0V

NEGATIVE

OFFSET

INPUT CODE

(b)

Figure 4. Effects of Rail-to-Rail Operation On a DAC Transfer Curve (Shown for 12 Bits).

(a) Overall Transfer Function

(b) Effect of Negative Offset for Codes Near Zero

(c) Effect of Positive Full-Scale Error for Codes Near Full-Scale

Rail-to-Rail Output Considerations

the LTC2636 GND pin to the ground plane should be as

low as possible. Resistance here will add directly to the

effective DC output impedance of the device (typically

0.1Ω). Note that the LTC2636 is no more susceptible to

this effect than any other parts of this type; on the con-

trary, it allows layout-based performance improvements

to shine rather than limiting attainable performance with

excessive internal resistance.

In any rail-to-rail voltage output device, the output is lim-

ited to voltages within the supply range.

SincetheanalogoutputoftheDACcannotgobelowground,

it may limit for the lowest codes as shown in Figure 4b.

Similarly, limiting can occur near full-scale when the REF

pin is tied to V . If V = V and the DAC full-scale error

CC

REF

CC

(FSE) is positive, the output for the highest codes limits

Another technique for minimizing errors is to use a sepa-

rate power ground return trace on another board layer.

The trace should run between the point where the power

supply is connected to the board and the DAC ground pin.

Thus the DAC ground pin becomes the common point for

analog ground, digital ground, and power ground. When

the LTC2636 is sinking large currents, this current ﬂows

out the ground pin and directly to the power ground trace

without affecting the analog ground plane voltage.

at V , as shown in Figure 4c. No full-scale limiting can

CC

occur if V is less than V –FSE.

REF

CC

Offset and linearity are deﬁned and tested over the region

of the DAC transfer function where no output limiting can

occur.

Board Layout

ThePCboardshouldhaveseparateareasfortheanalogand

digital sections of the circuit. A single, solid ground plane

should be used, with analog and digital signals carefully

routed over separate areas of the plane. This keeps digital

signals away from sensitive analog signals and minimizes

the interaction between digital ground currents and the

analog section of the ground plane. The resistance from

It is sometimes necessary to interrupt the ground plane

to conﬁne digital ground currents to the digital portion of

the plane. When doing this, make the gap in the plane only

as long as it needs to be to serve its purpose and ensure

that no traces cross over the gap.

2636f

21

LTC2636

PACKAGE DESCRIPTION

DE Package

14-Lead (4mm × 3mm) Plastic DFN

(Reference LTC DWG # 05-08-1708 Rev B)

0.70 0.05

3.30 0.05

1.70 0.05

3.60 0.05

2.20 0.05

PACKAGE

OUTLINE

0.25 0.05

0.50 BSC

3.00 REF

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

R = 0.115

TYP

0.40 0.10

4.00 0.10

(2 SIDES)

8

14

R = 0.05

TYP

3.30 0.10

3.00 0.10

(2 SIDES)

1.70 0.10

PIN 1 NOTCH

R = 0.20 OR

PIN 1

TOP MARK

(SEE NOTE 6)

0.35 × 45°

CHAMFER

(DE14) DFN 0806 REV B

7

1

0.25 0.05

0.50 BSC

0.75 0.05

0.200 REF

3.00 REF

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

NOTE:

1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC

PACKAGE OUTLINE MO-229

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

2636f

22

LTC2636

PACKAGE DESCRIPTION

MS Package

16-Lead (4mm × 5mm) Plastic MSOP

(Reference LTC DWG # 05-08-1669 Rev Ø)

0.889 ± 0.127

(.035 ± .005)

5.23

(.206)

MIN

3.20 – 3.45

(.126 – .136)

4.039 ± 0.102

(.159 ± .004)

(NOTE 3)

0.50

(.0197)

BSC

0.305 ± 0.038

(.0120 ± .0015)

TYP

0.280 ± 0.076

(.011 ± .003)

REF

16151413121110

9

RECOMMENDED SOLDER PAD LAYOUT

3.00 ± 0.102

(.118 ± .004)

(NOTE 4)

DETAIL “A”

0.254

4.90 ± 0.152

(.193 ± .006)

(.010)

0° – 6° TYP

GAUGE PLANE

0.53 ± 0.152

(.021 ± .006)

1 2 3 4 5 6 7 8

0.86

(.034)

REF

1.10

(.043)

MAX

DETAIL “A”

0.18

(.007)

SEATING

PLANE

0.17 – 0.27

(.007 – .011)

TYP

0.1016 ± 0.0508

(.004 ± .002)

0.50

(.0197)

BSC

MSOP (MS16) 1107 REV Ø

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

2636f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

23

LTC2636

TYPICAL APPLICATION

LTC2636 DACs Adjust LTC2755-16 Offsets, Ampliﬁed with LT1991 PGA to 5V

5V

15

V

DD

LTC2755-16

15V

R

0.1μF

R

5V

61

64

FBA 60

OFSA

IN1

0.1μF

I

59 ²–

0.1μF

OUT1A

OUT2A

5

6

2k

1k

8

+

–

R

63

COM1

15V

1

7

DAC A

1/2 LT1469

+

OUTA

1/2 LT1469

3

2

0.1μF

4

9

1

4

8

9

10

7

M9

M3

M1

REF

V

CC

V

CC

0.1μF

R

0.1μF

62

VOSA

REFA

LTC2636DE-LMI12

58

6

–15V

LT1991

REF

V

= 5V

OUT

2

3

4

5

13

1

2

3

–

+

P1

P3

P9

DAC A

DAC H

DAC G

DAC F

DAC E

V

EE

OUTD

5

DAC D

4

12

11

0.1μF

DAC B

DAC C

DAC D

30k

–15V

30k

–15V

–

+

30k

–15V

–

+

OUTC

DAC C

OUTB

DAC B

10

14

30k

–15V

19

6

7

8

GND

CS/LD

SCK

SDI

SERIAL

BUS

GND

2636 TA02

RELATED PARTS

PART NUMBER

LTC1660/LTC1665

LTC1664

DESCRIPTION

COMMENTS

Octal 10/8-Bit V

DACs in 16-Pin Narrow SSOP

V

CC

V

CC

= 2.7V to 5.5V, Micropower, Rail-to-Rail Output

OUT

Quad 10-Bit V

DAC in 16-Pin Narrow SSOP

OUT

LTC2600/LTC2610/ Octal 16-/14-/12-Bit V

LTC2620

DACs in 16-Lead Narrow SSOP

250μA per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output,

SPI Serial Interface

OUT

LTC2601/LTC2611/ Single 16-/14-/12-Bit V

LTC2621

DACs in 10-Lead DFN

300μA per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output,

SPI Serial Interface

OUT

LTC2602/LTC2612/ Dual 16-/14-/12-Bit V

LTC2622

DACs in 8-Lead MSOP

DACs in 16-Lead SSOP

300μA per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output,

SPI Serial Interface

OUT

LTC2604/LTC2614/ Quad 16-/14-/12-Bit V

LTC2624

250μA per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output,

SPI Serial Interface

OUT

2

LTC2605/LTC2615/ Octal 16-/14-/12-Bit V

LTC2625

DACs with I C Interface

250μA per DAC, 2.7V to 5.5V Supply Range, Rail-to-Rail Output,

OUT

2

I C Interface

2

LTC2606/LTC2616/ Single 16-/14-/12-Bit V

LTC2626

DACs with I C Interface

270μA per DAC, 2.7V to 5.5V Supply Range, Rail-to-Rail Output,

OUT

2

I C Interface

2

LTC2609/LTC2619/ Quad 16-/14-/12-Bit V

LTC2629

DACs with I C Interface

250μA per DAC, 2.7V to 5.5V Supply Range, Rail-to-Rail Output

OUT

with Separate V Pins for Each DAC

REF

LTC2630

LTC2631

LTC2640

Single 12-/10-/8-Bit V

Reference in SC70

DACs with 10ppm/°C

180μA per DAC, 2.7V to 5.5V Supply Range, 10ppm/°C Reference,

Rail-to-Rail Output, SPI Interface

OUT

2

Single 12-/10-/8-Bit I C V

Reference in ThinSOT

DACs with 10ppm/°C

180μA per DAC, 2.7V to 5.5V Supply Range, 10ppm/°C Reference,

OUT

2

Selectable External Ref. Mode, Rail-to-Rail Output, I C Interface

Single 12-/10-/8-Bit V

Reference in ThinSOT

DACs with 10ppm/°C

180μA per DAC, 2.7V to 5.5V Supply Range, 10ppm/°C Reference,

Selectable External Ref. Mode, Rail-to-Rail Output, SPI Interface

OUT

2636f

LT 1108 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

24

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC2636CDE-H8#TRPBF
厂家：	Linear
描述：	IC 8-BIT DAC, PDSO14, 4 X 3 MM, LEAD FREE, PLASTIC, MO-229WGED-3, DFN-14, Digital to Analog Converter 光电二极管
文件：	总24页 (文件大小：351K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC2636CDE-H8#TRPBF [Linear]

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