LTC2861IGN [Linear]
20Mbps RS485 Transceivers with Integrated Switchable Termination; 20Mbps的RS485收发器集成可切换端接
| 型号： | LTC2861IGN |
| 厂家： | 
Linear |
| 描述： | 20Mbps RS485 Transceivers with Integrated Switchable Termination |
| 文件： | 总16页 (文件大小：254K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC2859/LTC2861
20Mbps RS485 Transceivers
with Integrated Switchable
Termination
FEATURES
DESCRIPTION
The LTC®2859 and LTC2861 are low power, 20Mbps
RS485/422 transceivers operating on 5V supplies. The
receiver includes a logic-selectable 120Ω termination,
one-eighth unit load supporting up to 256 nodes per bus,
and a failsafe feature that guarantees a high output state
under conditions of floating or shorted inputs.
■
Integrated, Logic-Selectable 120Ω Termination
Resistor
■
20Mbps Max Data Rate
■
No Damage or Latchup to ESD: 1ꢀ5k ꢁHM
■
ꢁigh Input Impedance Supports 2ꢀ6 Nodes
■
250kbps Low-EMI Mode
■
Guaranteed Failsafe Receiver Operation Over the
The driver features a logic-selectable low-EMI 250kbps
operating mode, and maintains a high output impedance
over the entire common mode range when disabled or
when the supply is removed. Excessive power dissipation
causedbybuscontentionorafaultispreventedbycurrent
limiting all outputs and by a thermal shutdown.
Entire Common Mode Range
■
Current Limited Drivers and Thermal Shutdown
■
Delayed Micropower Shutdown ꢀ5μA Maxꢁ
■
Power Up/Down Glitch-Free Driver Outputs
■
Low Operating Current ꢀ900μA Max in Receive Modeꢁ
■
Meets All TIA/EIA-485-A Specifications
■
EnhancedESDprotectionallowstheLTC2859andLTC2861
towithstand 15kVꢀhumanbodymodelꢁonthetransceiver
interface pins without latchup or damage.
Available in 10-Pin 3mm × 3mm DFN, 12-Pin
4mm × 3mm DFN and 16-Pin SSOP Packages
APPLICATIONS
PRODUCT SELECTION GUIDE
■
Low Power RS485/RS422 Transceiver
■
Level Translator
PART NUMHER
LTC2859
DUPLEX
Half
PACKAGE
DFN-10
■
Backplane Transceiver
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
LTC2861
Full
SSOP-16, DFN-12
TYPICAL APPLICATION
LTC2859
LTC2859
LTC28ꢀ9 at 20Mbps
RO
R
R
RO
RE
TE
RE
TE
DI
120Ω
DE
DE
120Ω
Y
Z
D
D
DI
DI
SLO
SLO
Y–Z
2859/61 TA01
LTC2859
120Ω
285961 TA02
2V/DIV
20ns/DIV
R
D
RO RE TE DE DI SLO
285961fb
1
LTC2859/LTC2861
(Note 1)
ABSOLUTE MAXIMUM RATINGS
Supply Voltage ꢀV ꢁ ................................... –0.3V to 7V
Logic Input Voltages ꢀRE, DE, DI, TE, SLOꢁ... –0.3V to 7V
Operating Temperature ꢀNote 4ꢁ
CC
LTC2859C, LTC2861C .............................. 0°C to 70°C
LTC2859I, LTC2861I............................. –40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
Lead Temperature ꢀSoldering, 10 secꢁ
Interface I/O:
A, B, Y, Z...................................... ꢀV –15Vꢁ to +15V
CC
ꢀA-Bꢁ or ꢀB-Aꢁ with Terminat or Enabled.................6V
Receiver Output Voltage ꢀROꢁ........ –0.3V to ꢀV +0.3Vꢁ
GN Package ...................................................... 300°C
CC
PIN CONFIGURATION
TOP VIEW
TOP VIEW
TOP VIEW
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RO
RE
V
A
B
Z
CC
RO
RE
1
2
3
4
5
6
12
11
10
9
V
A
B
Z
Y
CC
RO
RE
DE
DI
1
2
3
4
5
10
9
V
B
A
CC
DE
13
11
DE
DI
8
DI
TE
Y
7
SLO
TE
8
TE
6
GND
GND
NC
NC
SLO
NC
GND
7
SLO
DD PACKAGE
10-LEAD ꢀ3mm × 3mmꢁ PLASTIC DFN
NC
DE PACKAGE
EXPOSED PAD ꢀPIN 11ꢁ PCB GND CONNECTION
12-LEAD ꢀ4mm × 3mmꢁ PLASTIC DFN
GN PACKAGE
16-LEAD ꢀNARROW 0.150ꢁ PLASTIC SSOP
T
= 125°C, θ = 43°C/W
JMAX
JA
EXPOSED PAD ꢀPIN 13ꢁ PCB GND CONNECTION
θ
= 3°C/W
JC
T
= 125°C, θ = 43°C/W
JMAX
JA
T
= 125°C, θ = 110°C/W
JMAX
JA
θ
= 4.3°C/W
JC
θ
JC
= 40°C/W
ORDER INFORMATION
LEAD FREE FINISꢁ
LTC2861CDE#PBF
LTC2861IDE#PBF
LTC2861CGN#PBF
LTC2861IGN#PBF
LTC2859CDD#PBF
LTC2859IDD#PBF
LEAD HASED FINISꢁ
LTC2861CDE
TAPE AND REEL
PART MARKING*
2861
PACKAGE DESCRIPTION
TEMPERATURE RANGE
0°C to 70°C
LTC2861CDE#TRPBF
LTC2861IDE#TRPBF
LTC2861CGN#TRPBF
LTC2861IGN#TRPBF
LTC2859CDD#TRPBF
LTC2859IDD#TRPBF
TAPE AND REEL
12-Lead ꢀ4mm × 3mmꢁ Plastic DFN
12-Lead ꢀ4mm × 3mmꢁ Plastic DFN
16-Lead Plastic SSOP
2861
–40°C to 85°C
0°C to 70°C
2861
2861I
16-Lead Plastic SSOP
–40°C to 85°C
0°C to 70°C
LBNX
10-Lead ꢀ3mm × 3mmꢁ Plastic DFN
10-Lead ꢀ3mm × 3mmꢁ Plastic DFN
PACKAGE DESCRIPTION
LBNX
–40°C to 85°C
TEMPERATURE RANGE
0°C to 70°C
PART MARKING*
2861
LTC2861CDE#TR
12-Lead ꢀ4mm × 3mmꢁ Plastic DFN
12-Lead ꢀ4mm × 3mmꢁ Plastic DFN
16-Lead Plastic SSOP
LTC2861IDE
LTC2861IDE#TR
2861
–40°C to 85°C
0°C to 70°C
LTC2861CGN
LTC2861CGN#TR
LTC2861IGN#TR
2861
LTC2861IGN
2861I
16-Lead Plastic SSOP
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
285961fb
2
LTC2859/LTC2861
The ● denotes the specifications which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at TA = 2ꢀ°C, kCC = ꢀk unless otherwise noted (Note 2).
SYMHOL
Driver
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
●
●
●
|V
|
OD
Differential Driver Output Voltage
R = ∞, I = 0mA, V = 4.5V ꢀFigure 1ꢁ
V
V
V
V
V
V
O
CC
CC
CC
CC
R = 27Ω ꢀRS485ꢁ, V = 4.5V ꢀFigure 1ꢁ
1.5
2.0
CC
R = 50Ω ꢀRS422ꢁ, V = 4.5V ꢀFigure 1ꢁ
CC
●
Δ|V
|
OD
Change in Magnitude of Driver
Differential Output Voltage for
Complementary Output States
R = 27Ω or R = 50Ω ꢀFigure 1ꢁ
0.2
V
●
●
V
Driver Common Mode Output Voltage
R = 27Ω or R = 50Ω ꢀFigure 1ꢁ
R = 27Ω or R = 50Ω ꢀFigure 1ꢁ
3.0
0.2
V
V
OC
Δ|V
|
Change in Magnitude of Driver
Common Mode Output Voltage for
Complementary Output States
OC
●
●
I
I
Driver Three-State ꢀHigh Impedanceꢁ
Output Current on Y and Z
DE = OV, V = –7V, +12V
10
μA
OZD
O
ꢀLTC2861 Onlyꢁ
Maximum Driver Short-Circuit Current
–7V ≤ ꢀY or Zꢁ ≤ 12 ꢀFigure 2ꢁ
120
250
mA
OSD
Receiver
●
●
●
I
Receiver Input Current ꢀA, Bꢁ
DE = TE = 0V, V = 0V or 5V, V or V =
125
0.2
μA
μA
V
IN2
CC
A
B
12V, Other at 0V
DE = TE = 0V, V = 0V or 5V, V or V =
–100
2.4
CC
A
B
–7V, Other at 0V
V
Receiver Differential Input Threshold
Voltage
–7V ≤ V ≤ 12
TH
CM
ΔV
Receiver Input Hysteresis
V
CM
= 0V
25
mV
V
TH
●
●
●
V
V
Receiver Output HIGH Voltage
Receiver Output LOW Voltage
I = –4mA, V = 200mV, V = 4.5V
0 ID CC
OH
OL
I = 4mA, V = –200mV, V = 4.5V
0.4
1
V
0
ID
CC
I
Receiver Three-State ꢀHigh Impedanceꢁ RE = 5V, 0V ≤ V ≤ V
Output Current on RO
μA
OZR
O
CC
●
●
R
Receiver Input Resistance
RE = 5V or 0V, DE = TE = 0V
–7V ≤ V = V ≤ 12V
96
125
120
kΩ
Ω
IN
A
B
R
TERM
Receiver Input Terminating Resistor
TE = 5V, V = 2V, V = –7, 0, 10V
108
156
AB
B
ꢀFigure 7ꢁ
Logic
●
●
●
V
V
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
DE, DI, RE, TE, SLO, V = 4.5V
2
V
V
IH
IL
CC
DE, DI, RE, TE, SLO, V = 4.5V
0.8
10
CC
I
DE, DI, RE, TE, SLO
0
μA
IN1
Supplies
●
●
●
I
I
I
Supply Current in Shutdown Mode
Supply Current in Receive Mode
Supply Current in Transmit Mode
DE = 0V, RE = V , TE = 0V
0
5
μA
μA
μA
SHDN
CCR
CC
No Load, DE = 0V, RE = 0V, TE = 0V
540
630
900
1000
No Load, DE = V , RE = V , SLO = V ,
CC
CCT
CC
CC
TE = 0V
●
●
●
I
I
I
Supply Current in Transmit SLO Mode
No Load, DE = V , RE = V , SLO = 0V,
670
660
640
1100
1100
1180
μA
μA
μA
CCTS
CC
CC
TE = 0V
Supply Current in Loopback Mode ꢀBoth No Load, DE = V , RE= 0V, SLO = V , TE
Driver and Receiver Enabledꢁ
CCL
CC
CC
= 0V
DE = 0V, RE = V , TE = V , SLO = V
CC
Supply Current in Termination Mode
CCRT
CC
CC
285961fb
3
LTC2859/LTC2861
SWITCHING CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 2ꢀ°C, kCC = ꢀk, TE = 0 unless otherwise noted (Note 2).
SYMHOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Driver in Normal Mode (SLO ꢁIGꢁ)
●
●
●
f
t
Maximum Data Rate
Note 3
20
Mbps
ns
MAX
, t
Driver Input to Output
R
DIFF
DIFF
= 54Ω, C = 100pF ꢀFigure 3ꢁ
10
1
50
6
PLHD PHLD
L
Δt
Driver Input to Output Difference
R
= 54Ω, C = 100pF ꢀFigure 3ꢁ
ns
PD
L
|t
-t
|
PLHD PHLD
●
●
●
t
t
Driver Output Y to Output Z
Driver Rise or Fall Time
R
R
= 54Ω, C = 100pF ꢀFigure 3ꢁ
1
4
6
12.5
70
ns
ns
ns
SKEWD
DIFF
L
, t
RD FD
= 54Ω, C = 100pF ꢀFigure 3ꢁ
L
DIFF
t
t
, t , t
,
Driver Enable or Disable Time
R = 500Ω, C = 50pF, RE = 0 ꢀFigure 4ꢁ
L L
ZLD ZHD LZD
HZD
●
●
t
, t
Driver Enable from Shutdown
Time to Shutdown
R = 500Ω, C = 50pF, RE = V ꢀFigure 4ꢁ
8
μs
ns
ZHSD ZLSD
L
L
CC
t
ꢀDE = ↓, RE = V ꢁ or ꢀDE = 0, RE ↑ꢁ
100
SHDN
CC
ꢀFigure 4ꢁ
Driver in SLO Mode (SLO LOW)
●
●
●
f
t
Maximum Data Rate
Note 3
250
kbps
μs
MAXS
t
Driver Input to Output
R
R
= 54Ω, C = 100pF ꢀFigure 3ꢁ
0.95
50
1.5
PLHDS, PHLDS
DIFF
L
Δt
Driver Input to Output Difference
= 54Ω, C = 100pF ꢀFigure 3ꢁ
500
ns
PDS
DIFF
L
|t
-t
|
PLHR PHLR
●
●
●
●
●
●
t
t
t
t
t
t
Driver Output A to Output B
Driver Rise or Fall Time
Driver Enable Time
R
R
= 54Ω, C = 100pF ꢀFigure 3ꢁ
200
0.9
500
1.5
300
70
ns
μs
ns
ns
μs
ns
SKEWDS
DIFF
L
t
= 54Ω, C = 100pF ꢀFigure 3ꢁ
L
RDS, FDS
DIFF
t
R = 500Ω, C = 50pF, RE = 0 ꢀFigure 4ꢁ
L L
ZHDS, ZLDS
t
Driver Disable Time
R = 500Ω, C = 50pF, RE = 0 ꢀFigure 4ꢁ
L L
LZDS, HZDS
t
Driver Enable from Shutdown
Time to Shutdown
R = 500Ω, C = 50pF, RE = V ꢀFigure 4ꢁ
L
8
ZHSDS, ZLSDS
L
CC
ꢀDE = 0, RE = ↑ꢁ or ꢀDE = ↓, RE = V
ꢀFigure 4ꢁ
ꢁ
CC
500
SHDNS
Receiver
●
●
t
t
t
, t
Receiver Input to Output
Differential Receiver Skew
C = 15pF, V = 1.5V, |V | = 1.5V, t and
F
50
1
70
6
ns
ns
PLHR PHLR
L
CM
AB
R
t < 4ns ꢀFigure 5ꢁ
C = 15pF ꢀFigure 5ꢁ
L
SKEWR
|t
-t
|
PLHR PHLR
●
●
, t
Receiver Output Rise or Fall Time
Receiver Enable/Disable
C = 15pF ꢀFigure 5ꢁ
L
3
12.5
50
ns
ns
RR FR
t
t
, t , t
,
R = 1kΩ, C =15pF, DE = V ꢀFigure 6ꢁ
ZLR ZHR LZR
HZR
L
L
CC
CC
DI = 0 or V
●
●
t
, t
Receiver Enable from Shutdown
R = 1kΩ, C = 15pF, DE = 0V ꢀFigure 6ꢁ
8
μs
μs
ZHSR ZLSR
L
L
DI = 0 or V
CC
t
, t
Termination Enable or Disable Time
V = 0V, V = 2V, RE = V , DE = 0V
100
RTEN RTZ
B
AB
CC
ꢀFigure 7ꢁ
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime..
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to device ground unless
otherwise specified.
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
Note 3: Maximum data rate is guaranteed by other measured parameters
and is not tested directly.
285961fb
4
LTC2859/LTC2861
TEST CIRCUITS
Y
Z
Y
R
R
I
GND
OR
CC
OSD
+
OD
–
GND
OR
DI
V
DI
DRIVER
DRIVER
V
V
CC
Z
+
OC
–
+
–7V to +12V
V
–
2859/61 F01-2
Figure 1. Driver DC Characteristics
Figure 2. Driver Output Short-Circuit Current
V
CC
t
t
,
t
t
,
PHLD
PHLDS
PLHD
DI
Y
PLHDS
OV
C
C
L
L
DI
t
, t
SKEWD SKEWDS
DRIVER
R
DIFF
1/2 V
O
V
Y, Z
O
Z
90%
10%
90%
10%
(Y-Z)
0
0
t
t
,
t
t
,
RD
RDS
FD
FDS
2859/61 F03
Figure 3. Driver Timing Measurement
R
L
V
GND
OR
CC
CC
t
t
t
t
,
ZLD
1/2 V
CC
,
,
DE
ZLDS
ZLSD
ZLSDS
Y
Z
V
OV
C
L
L
t
,
V
OR
GND
LZD
CC
V
CC
t
DI
DRIVER
LZDS
Y or Z
Z or Y
1/2 V
1/2 V
V
CC
CC
O
0.5V
0.5V
V
V
OL
OH
R
L
V
CC
DE
OR
GND
t
t
t
t
,
HZD
C
OV
HZDS,
SHDN,
SHDNS
t
t
t
t
,
ZHD
,
,
ZHDS
ZHSD
ZHSDS
2859/61 F04
Figure 4. Driver Enable and Disable Timing Measurement
285961fb
5
LTC2859/LTC2861
TEST CIRCUITS
V
AB
A-B
RO
0V
V
/2
/2
AB
A
B
–V
V
AB
CC
t
RO
PLHR
t
PHLR
90%
10%
V
CM
RECEIVER
90%
10%
V
1/2 V
CC
1/2 V
t
O
CC
C
L
V
AB
0V
t
FR
RR
t
t
– t
SKEWR = PLHR PHLR
2859/61 F05
Figure ꢀ. Receiver Propagation Delay Measurements
V
CC
t
t
,
RE
ZLR
ZLSR
1/2 V
CC
0V OR V
A
B
CC
R
V
L
0V
CC
RO
t
LZR
OR
RECEIVER
RE
V
CC
GND
RO
RO
V
1/2 V
1/2 V
C
L
O
CC
V
OR 0V
0.5V
0.5V
CC
V
OL
OH
V
CC
DI = 0V OR V
CC
0V
t
t
,
t
HZR
ZHR
ZHSR
2859/61 F06
Figure 6. Receiver Enable/Disable Time Measurements
V
AB
R
=
TERM
I
V
A
CC
A
B
TE
1/2 V
CC
RO
+
–
RECEIVER
V
V
0V
AB
t
RTEN
t
RTZ
90%
I
A
10%
+
–
TE
B
2859/61 F07
Figure 7. Termination Resistance and Timing Measurements
285961fb
6
LTC2859/LTC2861
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 2ꢀ°C, kCC = ꢀk, unless otherwise noted.
Receiver S5ew
vs Temperature
Driver Propagation Delay
vs Temperature
Driver S5ew vs Temperature
18
3
2
V
C
= 1.5V
R
C
= 54Ω
R
C
= 54Ω
DIFF
L
AB
L
DIFF
L
= 15pF
= 100pF
= 100pF
16
14
2
1
0
SLO = V
SLO = V
CC
CC
12
10
8
1
0
6
–1
–40 –20
4
60 80
20 40
TEMPERATURE ꢀ°Cꢁ
–40 –20
0
100 120
60 80
20 40
TEMPERATURE ꢀ°Cꢁ
–40 –20
0
20 40 60 80 100 120
0
100 120
TEMPERATURE ꢀ°Cꢁ
285961 G01
285961 G02
285961 G03
Driver Output Low/ꢁigh koltage
vs Output Current
Driver Differential Output koltage
vs Temperature
RTERM vs Temperature
5
4
3
2
1
0
5
4
3
135
130
125
120
115
110
105
100
95
V
R =
∞
OH
R = 100Ω
R = 54Ω
2
1
0
V
OL
0
10
20
30
40
50
60
70
40
TEMPERATURE ꢀ°Cꢁ
–40 –20
0
20
60 80 100 120
40 60
TEMPERATURE ꢀ°Cꢁ
–40 –20
0
20
80 100 120
OUTPUT CURRENT ꢀmAꢁ
285961 G05
285961 G06
285961 G04
Receiver Output koltage vs
Output Current (Source and Sin5)
Receiver Propagation Delay
vs Temperature
Supply Current vs Data Rate
60
50
40
30
20
10
0
5
4
3
2
1
0
70
65
60
55
50
45
40
35
30
V
C
= 1.5V
AB
L
SOURCE
= 15pF
R = 54Ω
R = 100Ω
R =
∞
SINK
40 60
20
TEMPERATURE ꢀ°Cꢁ
0
1
2
3
4
5
–40 –20
0
80 100 120
1
10
0.1
100
DATA RATE ꢀMbpsꢁ
OUTPUT CURRENT ꢀmAꢁ
285961 G09
285961 G07
285961 G08
285961fb
7
LTC2859/LTC2861
PIN FUNCTIONS
(DD/DE/GN)
RO(Pin1):ReceiverOutput.Ifthereceiveroutputisenabled
ꢀRE lowꢁ and A > B by 200mV, then RO will be high. If A
< B by 200mV, then RO will be low. If the receiver inputs
are open, shorted, or terminated without a valid signal, RO
will be high.
TE (Pin ꢀ): Internal Termination Resistance Enable. A high
input will connect a termination resistor ꢀ120Ω typicalꢁ
between pins A and B.
GND (Pins 6,11/6,13/6): Ground. Pins 11 and 13 are
backside thermal pad, connected to Ground.
RE (Pin 2): Receiver Enable. A low enables the receiver.
A high input forces the receiver output into a high imped-
ance state.
SLO (Pins 7/7/11): Driver Slew Rate Control. A low input
will force the driver into a reduced slew rate mode.
Y (Pins -/8/12): Positive Driver Output for LTC2861.
Z (Pins -/9/13): Negative Driver Output for LTC2861.
DE (Pin 3): Driver Enable. A high on DE enables the driver.
A low input will force the driver outputs into a high imped-
ance. If RE is high with DE and TE LOW, the part will enter
a low power shutdown state.
H (Pins 9/10/14): Negative Receiver Input ꢀand Negative
Driver Output for LTC2859ꢁ.
DI (Pin 4): Driver Input. If the driver outputs are enabled
ꢀDE HIGHꢁ, then a low on DI forces the driver positive
output LOW and negative output HIGH. A high on DI,
with the driver outputs enabled, forces the driver positive
output HIGH and negative output LOW.
A (Pins 8/11/1ꢀ): Positive Receiver Input ꢀand Positive
Driver Output for LTC2859ꢁ.
k
(Pins 10/12/16): Positive Supply. 4.5V < V < 5.5V.
CC
CC
Bypass with 0.1μF ceramic capacitor.
285961fb
8
LTC2859/LTC2861
FUNCTION TABLES
LTC28ꢀ9
LOGIC INPUTS
DE
0
RE
0
TE
0
MODE
Receive
A, H
RO
TERMINATOR
R
IN
R
IN
R
IN
R
IN
Enabled
Enabled
Hi-Z
Off
On
Off
On
Off
On
0
0
1
Receive with Term
Shutdown
0
1
0
0
1
1
Term Only
Hi-Z
1
0
0
Transmit with Receive
Driven
Driven
Enabled
Enabled
1
0
1
Transmit with Receive
and Term
1
1
1
1
0
1
Transmit
Driven
Driven
Hi-Z
Hi-Z
Off
On
Transmit with Term
LTC2861
LOGIC INPUTS
DE
0
RE
0
TE
0
MODE
Receive
A, H
Y, Z
Hi-Z
RO
TERMINATOR
R
R
R
R
R
R
Enabled
Enabled
Hi-Z
Off
On
Off
On
Off
On
IN
IN
IN
IN
IN
IN
0
0
1
Receive with Term
Shutdown
Hi-Z
0
1
0
Hi-Z
0
1
1
Term Only
Hi-Z
Hi-Z
1
0
0
Transmit with Receive
Driven
Driven
Enabled
Enabled
1
0
1
Transmit with Receive
and Term
1
1
1
1
0
1
Transmit
R
R
Driven
Driven
Hi-Z
Hi-Z
Off
On
IN
IN
Transmit with Term
BLOCK DIAGRAMS
LTC28ꢀ9
LTC2861
A
A
ꢀ15kVꢁ
ꢀ15kVꢁ
RE
RE
SLEEP/SHUTDOWN
LOGIC AND DELAY
SLEEP/SHUTDOWN
LOGIC AND DELAY
120Ω
120Ω
DE
DE
TE
TE
RO
SLO
DI
RO
SLO
DI
RECEIVER
RECEIVER
B
B
ꢀ15kVꢁ
ꢀ15kVꢁ
Z
ꢀ15kVꢁ
DRIVER
DRIVER
Y
ꢀ15kVꢁ
2859/61 BD
285961fb
9
LTC2859/LTC2861
APPLICATIONS INFORMATION
Driver
The LTC2859/LTC2861 also feature thermal shutdown
protectionthatdisablesthedriver, terminator, andreceiver
in case of excessive power dissipation.
The driver provides full RS485 and RS422 compatibility.
When enabled, if DI is high, Y-Z is positive for the full
duplex device ꢀLTC2861ꢁ and A-B is positive for the half-
duplex device ꢀLTC2859ꢁ.
SLO Mode: Slew Limiting for EMI Emissions Control
The LTC2859/LTC2861 feature a logic-selectable reduced-
slew mode ꢀSLO modeꢁ that softens the driver output
edges to control the high frequency EMI emissions from
equipment and data cables. The reduced slew rate mode
is entered by taking the SLO pin low, where the data rate is
limited to about 250kbps. Slew limiting also mitigates the
adverse effects of imperfect transmission line termination
caused by stubs or mismatched cables.
When the driver is disabled, both outputs are high-
impedance. For the full duplex LTC2861, the leakage on
the driver output pins is guaranteed to be less than 10μA
over the entire common mode range of –7V to +12V. On
the half-duplex LTC2859, the impedance is dominated by
the receiver input resistance, R .
IN
Driver Overvoltage and Overcurrent Protection
Figures 8a and 8b show the LTC2861 driver outputs in
normalandSLOmodewiththeircorrespondingfrequency
spectrums operating at 250kbps. SLO mode significantly
reduces the high frequency harmonics.
The driver outputs are protected from short circuits to
any voltage within the Absolute Maximum range of ꢀV
CC
–15Vꢁ to +15V. The maximum current in this condition is
250mA.Ifthepinvoltageexceedsabout 10V,currentlimit
folds back to about half of the peak value to reduce overall
power dissipation and avoid damaging the part.
Y, Z
Y–Z
Y–Z
285961 F08a
1V/DIV
2μs/DIV
10dB/DIV
1.25MHz/DIV
Driver Output at 12ꢀ5ꢁz into 100Ω Resistor
Frequency Spectrum of the Same Signal
Figure 8a. Driver Output in Normal Mode
Y, Z
Y–Z
Y–Z
285961 F08b
1V/DIV
2μs/DIV
10dB/DIV
1.25MHz/DIV
Driver Output at 12ꢀ5ꢁz into 100Ω Resistor
Frequency Spectrum of the Same Signal
Figure 8b. Driver Output in SLO Mode
285961fb
10
LTC2859/LTC2861
APPLICATIONS INFORMATION
Receiver and Failsafe
one-eighth unit load. This, in turn, means that 8X the
standard number of receivers, or 256 total, can be con-
nected to a line without loading it beyond what is called
out in the RS485 standard. The input resistance of the
receivers is unaffected by enabling/disabling the receiver
andbypowering/unpoweringthepart.Theequivalentinput
resistance looking into A and B is shown in Figure 9. The
termination resistor cannot be enabled by TE if the device
is unpowered or in thermal shutdown mode.
With the receiver enabled, when the absolute value of the
differentialvoltagebetweentheAandBpinsisgreaterthan
200mV, the state of RO will reflect the polarity of ꢀA-Bꢁ.
The LTC2859/LTC2861 have a failsafe feature that guaran-
tees the receiver output to be in a logic HIGH state when
the inputs are either shorted, left open, or terminated
ꢀexternally or internallyꢁ, but not driven for more than
about 3μs. The delay prevents signal zero crossings from
being interpreted as shorted inputs and causing RO to go
high inadvertently. This failsafe feature is guaranteed to
work for inputs spanning the entire common mode range
of –7V to +12V.
Switchable Termination
Proper cable termination is very important for good
signal fidelity. If the cable is not terminated with its char-
acteristic impedance, reflections will result in distorted
waveforms.
The receiver output is internally driven high ꢀto V ꢁ or
CC
lowꢀtogroundꢁwithnoexternalpull-upneeded. Whenthe
receiver is disabled the RO pin becomes Hi-Z with leakage
of less than 1μA for voltages within the supply range.
The LTC2859/LTC2861 are the first RS485 transceivers to
offer integrated switchable termination resistors on the
receiver input pins. This provides the tremendous advan-
tage of being able to easily change, through logic control,
the proper line termination for optimal performance when
configuring transceiver networks.
Receiver Input Resistance
The receiver input resistance from A or B to ground is
guaranteed to be greater than 96k when the termina-
tion is disabled. This is 8X higher than the requirements
for RS485 standard and thus this receiver represents a
When the TE pin is high, the termination resistor is en-
abled and the differential resistance from A to B is 120Ω.
Figure 10 shows the I/V characteristics between pins A
and B with the termination resistor enabled and disabled.
A
>96k
60Ω
TE
60Ω
B
2859/61 F09
>96k
Figure 9. Equivalent Input Resistance into A and H
(on the LTC28ꢀ9, kalid if Driver is Disabled)
Figure 10. Curve Trace Hetween A and H
with Termination Enabled and Disabled
285961fb
11
LTC2859/LTC2861
APPLICATIONS INFORMATION
TheresistanceismaintainedovertheentireRS485common
mode range of –7V to +12V as shown in Figure 11.
150
140
130
120
110
The integrated termination resistor has a high frequency
responsewhichdoesnotlimitperformanceatthemaximum
specified data rate. Figure 12 shows the magnitude and
phase of the termination impedance vs frequency.
Supply Current
The unloaded static supply currents in the LTC2859/
LTC2861areverylow—typicallyunder700μAforallmodes
of operation without the internal terminator enabled. In
applications with resistively terminated cables, the supply
currentisdominatedbythedriverload.Forexample,when
usingtwo120Ωterminatorswithadifferentialdriveroutput
voltage of 2V, the DC current is 33mA, which is sourced
by the positive voltage supply. This is true whether the
terminatorsareexternalorinternalsuchasintheLTC2859/
LTC2861. Power supply current increases with toggling
data due to capacitive loading and this term can increase
significantly at high data rates. Figure 13 shows supply
current vs data rate for two different capacitive loads ꢀfor
the circuit configuration of Figure 3ꢁ.
–10
–5
0
5
10
15
COMMON MODE VOLTAGE ꢀVꢁ
285961 F11
Figure 11. Termination Resistance
vs Common Mode koltage
140
120
0
MAGNITUDE
–5
100
80
–10
–15
–20
–25
PHASE
60
40
20
0
ꢁigh Speed Considerations
A ground plane layout is recommended for the LTC2859/
LTC2861. A 0.1μF bypass capacitor less than one quarter
–1
0
1
2
10
10
10
10
FREQUENCY ꢀMHzꢁ
285961 F12
inch away from the V pin is also recommended. The PC
CC
Figure 12. Termination Magnitude
and Phase vs Frequency
board traces connected to signals A/B and Z/Y ꢀLTC2861ꢁ
shouldbesymmetricalandasshortaspossibletomaintain
good differential signal integrity. To minimize capacitive
effects,thedifferentialsignalsshouldbeseparatedbymore
than the width of a trace and should not be routed on top
of each other if they are on different signal planes.
75
70
65
60
55
50
45
R
DIFF
= 54Ω
Care should be taken to route outputs away from any
sensitive inputs to reduce feedback effects that might
cause noise, jitter, or even oscillations. For example, in
the full duplex LTC2861, DI and A/B should not be routed
near the driver or receiver outputs.
C
= 1000pF
L
C
= 100pF
L
The logic inputs of the LTC2859/LTC2861 have 50mV of
hysteresis to provide noise immunity. Fast edges on the
outputscancauseglitchesinthegroundandpowersupplies
whichareexacerbatedbycapacitiveloading.Ifalogicinput
is held near its threshold ꢀtypically 1.5Vꢁ, a noise glitch
2
3
4
5
10
10
10
10
DATA RATE ꢀkbpsꢁ
285961 F13
Figure 13. Supply Current vs Data Rate
285961fb
12
LTC2859/LTC2861
APPLICATIONS INFORMATION
from a driver transition may exceed the hysteresis levels
on the logic and data inputs pins causing an unintended
state change. This can be avoided by maintaining normal
logic levels on the pins and by slewing inputs through
their thresholds by faster than 1V/μs when transitioning.
Good supply decoupling and proper line termination also
reduces glitches caused by driver transitions.
represents the specified maximum data rate in the RS485
standard. The dashed lines at 250kbps and 20Mbps show
the maximum data rates of the LTC2859/LTC2861 in Low-
EMI and normal modes, respectively.
10k
LOW-EMI MODE
MAX DATA RATE
1k
100
10
Cable Length vs Data Rate
For a given data rate, the maximum transmission distance
isboundedbythecableproperties. Atypicalcurveofcable
length vs data rate compliant with the RS485 standard is
shown in Figure 14. Three regions of this curve reflect
different performance limiting factors in data transmis-
sion. In the flat region of the curve, maximum distance is
determinedbyresistivelossesinthecable. Thedownward
sloping region represents limits in distance and data
rate due to AC losses in the cable. The solid vertical line
NORMAL
MODE MAX
DATA RATE
RS485 MAX
DATA RATE
10k
100k
1M
10M
100M
DATA RATE ꢀbpsꢁ
285961 F14
Figure 14. Cable Length vs Data Rate
(RS48ꢀ Standard Shown in Solid Lines)
PACKAGE DESCRIPTION
DD Pac5age
10-Lead Plastic DFN (3mm × 3mm)
ꢀReference LTC DWG # 05-08-1699ꢁ
R = 0.115
TYP
6
0.38 ± 0.10
10
0.675 ±0.05
3.50 ±0.05
2.15 ±0.05 (2 SIDES)
1.65 ±0.05
3.00 ±0.10
(4 SIDES)
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PACKAGE
OUTLINE
(DD10) DFN 1103
5
1
0.25 ± 0.05
0.50 BSC
0.25 ± 0.05
0.200 REF
0.75 ±0.05
0.50
BSC
2.38 ±0.10
(2 SIDES)
2.38 ±0.05
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION
OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS
OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
285961fb
13
LTC2859/LTC2861
PACKAGE DESCRIPTION
DE/UE Pac5age
12-Lead Plastic DFN (4mm × 3mm)
ꢀReference LTC DWG # 05-08-1695ꢁ
0.40 ± 0.10
4.00 ±0.10
(2 SIDES)
R = 0.115
TYP
7
12
0.70 ±0.05
R = 0.05
TYP
3.30 ±0.10
3.30 ±0.05
3.60 ±0.05
3.00 ±0.10
2.20 ±0.05
(2 SIDES)
1.70 ± 0.10
1.70 ± 0.05
PIN 1
TOP MARK
(NOTE 6)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
PACKAGE
OUTLINE
CHAMFER
(UE12/DE12) DFN 0806 REV D
6
1
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.25 ± 0.05
2.50 REF
0.50 BSC
0.50 BSC
2.50 REF
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3. ALL DIMENSIONS ARE IN MILLIMETERS
GN Pac5age
16-Lead Plastic SSOP (Narrow .1ꢀ0 Inch)
ꢀReference LTC DWG # 05-08-1641ꢁ
.189 – .196*
(4.801 – 4.978)
.045 ±.005
.009
(0.229)
REF
16 15 14 13 12 11 10 9
.254 MIN
.150 – .165
.229 – .244
.150 – .157**
(5.817 – 6.198)
(3.810 – 3.988)
.0165 ±.0015
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
1
2
3
4
5
6
7
8
.015 ± .004
(0.38 ± 0.10)
× 45°
.0532 – .0688
(1.35 – 1.75)
.004 – .0098
(0.102 – 0.249)
.007 – .0098
(0.178 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
.0250
(0.635)
BSC
.008 – .012
GN16 (SSOP) 0204
(0.203 – 0.305)
TYP
NOTE:
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
3. DRAWING NOT TO SCALE
285961fb
14
LTC2859/LTC2861
TYPICAL APPLICATIONS
Multi-Node Networ5 with End Termination Using LTC28ꢀ9
TE = 0V
TE = 0V
D
D
R
R
LTC2859
LTC2859
LTC2859
LTC2859
R
R
TE = 5V
TE = 5V
D
D
2859/61 TA04
285961fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC2859/LTC2861
TYPICAL APPLICATION
Failsafe “0” Application (Idle State = Logic “0”)
V
CC
100kΩ
LTC2859
R
RO
DI
I1
B
A
"A"
"B"
120Ω
D
I2
2859/61 TA03
RELATED PARTS
PART NUMHER
DESCRIPTION
COMMENTS
LTC485
Low Power RS485 Interface Transceiver
Differential Driver and Receiver Pair
3.3V Ultralow Power RS485 Transceiver
I
I
= 300μA ꢀTypꢁ
= 300μA
CC
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LTC491
LTC1480
LTC1483
LTC1485
LTC1487
3.3V Operation
Ultralow Power RS485 Low EMI Transceiver
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10Mbaud Operation
Ultralow Power RS485 with Low EMI, Shutdown and High
Input Impedance
Up to 256 Transceivers on the Bus
LTC1520
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LT1785
50Mbps Precision Quad Line Receiver
Isolated RS485 Full-Duplex Transceiver
52Mbps RS485 Transceiver with Precision Delay
60V Fault Protected RS485 Transceiver
Channel-to-Channel Skew 400ps ꢀTypꢁ
2500V
Isolation in Surface Mount Package
RMS
Propagation Delay Skew 500ps ꢀTypꢁ
60V Tolerant, 15kV ESD
285961fb
LT 0108 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
© LINEAR TECHNOLOGY CORPORATION 2006
ꢀ408ꢁ 432-1900 FAX: ꢀ408ꢁ 434-0507 www.linear.com
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