LTC2909CTS8-3.3 [Linear]
Precision Triple/Dual Input UV, OV and Negative Voltage Monitor; 精准三路/双路输入UV，OV和负电压监视器
| 型号： | LTC2909CTS8-3.3 |
| 厂家： | 
Linear |
| 描述： | Precision Triple/Dual Input UV, OV and Negative Voltage Monitor |
| 文件： | 总16页 (文件大小：231K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC2909
Precision Triple/Dual Input
UV, OV and Negative
Voltage Monitor
U
DESCRIPTIO
FEATURES
TheLTC®2909isadualinputmonitorintendedforavariety
of system monitoring applications. Polarity selection and
a buffered reference output allow the LTC2909 to monitor
positive and negative supplies for undervoltage (UV) and
overvoltage (OV) conditions.
■
Two Low Voltage Adjustable Inputs (0.5V)
■
Pin Selectable Input Polarity Allows Negative
and OV Monitoring
Guaranteed Threshold Accuracy: 1.5ꢀ
■
■
6.5V Shunt Regulator for High Voltage Operation
■
Low 50µA Quiescent Current
The two inputs have a nominal 0.5V threshold, featuring
tight 1.5% threshold accuracy over the entire operating
temperature range. Glitch filtering ensures reliable reset
operation without false triggering. A third fixed-threshold
UVLO monitor on the part’s V (also 1.5% accuracy) is
available for standard logic supplies.
■
Buffered 1V Reference for Negative Supply Offset
■
Input Glitch Rejection
Adjustable Reset Timeout Period
■
■
Selectable Internal Timeout Saves Components
CC
■
Open-Drain RST Output
■
Accurate UVLO for 2.5V, 3.3V, 5V Systems
■
■
The common reset output has a timeout that may use
a preset 200ms, be set by an external capacitor or be
disabled. A three-state input pin sets the input polarity
of each adjustable input without requiring any external
components.
Ultralow Voltage Reset: V = 0.5V Guaranteed
CC
Space Saving 8-Lead TSOT-23 and 3mm × 2mm DFN
Packages
U
APPLICATIO S
The LTC2909 provides a highly versatile, precise, space-
conscious, micropower solution for supply monitoring.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
■
Desktop and Notebook Computers
■
Handheld Devices
■
Network Servers
■
Core, I/O Monitor
■
Automotive
U
TYPICAL APPLICATIO
3.3V UV/OV (Window) Monitor Application with
200ms Internal Timeout (3.3V Logic Out)
SEL Pin Connection for Input Polarity
Combinations
C
BYP
100nF
3.3V
POLARITY
R
R
PU
P6
V
ADJ1
+
ADJ2
+
SEL PIN
10k
453k
CC
FAULT
OUTPUT
ADJ1
RST
V
CC
LTC2909-2.5
R
10.7k
P5
REF
ADJ2
SEL
OPEN
GND
+
–
TMR
–
–
R
76.8k
P4
GND
2909 TA01a
2909fa
1
LTC2909
W W U W
ABSOLUTE AXI U RATI GS
(Notes 1, 2)
Terminal Voltages
Operating Temperature Range
V
(Note 3)............................................. –0.3V to 6V
LTC2909C ................................................ 0°C to 70°C
LTC2909I .............................................–40°C to 85°C
Storage Temperature Range
CC
SEL, RST .............................................. –0.3V to 7.5V
ADJ1, ADJ2 .......................................... –0.3V to 7.5V
TMR..........................................–0.3V to (V + 0.3V)
DFN....................................................–65°C to 125°C
TSOT-23.............................................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)
CC
Terminal Currents
I
I
(Note 3).................................................... 10mA
.................................................................... 1mA
VCC
REF
TSOT-23............................................................ 300°C
U
W
U
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
DDB PART*
MARKING
TOP VIEW
SEL
1
2
3
4
8
7
6
5
ADJ1
ADJ2
REF
LBXG
LBXG
LBZS
LBZS
LBZT
LBZT
LTC2909CDDB-2.5
LTC2909IDDB-2.5
LTC2909CDDB-3.3
LTC2909IDDB-3.3
LTC2909CDDB-5
LTC2909IDDB-5
TMR
9
V
CC
RST
GND
DDB PACKAGE
8-LEAD (3mm 2mm) PLASTIC DFN
= 125°C, θ = 76°C/W
T
JMAX
JA
EXPOSED PAD (PIN 9) MAY BE LEFT OPEN OR TIED TO GND
(PCB CONNECTION REQUIRED FOR STATED θ
)
JA
ORDER PART
NUMBER
TS8 PART*
MARKING
TOP VIEW
ADJ1 1
ADJ2 2
REF 3
8 SEL
7 TMR
LTC2909CTS8-2.5
LTC2909ITS8-2.5
LTC2909CTS8-3.3
LTC2909ITS8-3.3
LTC2909CTS8-5
LTC2909ITS8-5
LTBXF
LTBXF
LTBZV
LTBZV
LTBZW
LTBZW
6 V
CC
GND 4
5 RST
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
= 125°C, θ = 250°C/W
T
JMAX
JA
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
*The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.
2909fa
2
LTC2909
ELECTRICAL CHARACTERISTICS The
(LTC2909-5), ADJ1 = ADJ2 = 0.55V, SEL = floating, unless otherwise noted. (Note 2)
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T = 25°C. V = 2.5V (LTC2909-2.5), V = 3.3V (LTC2909-3.3), V = 5V
A
CC
CC
CC
SYMBOL
PARAMETER
CONDITIONS
MIN
0.5
TYP
MAX
UNITS
V
●
●
●
●
V
Operating Supply Voltage
RST in Correct State
CC(MIN)
V
V
CC
V
CC
Shunt Regulation Voltage
Input Current
I
= 1mA, I = 0
VREF
6.0
6.5
50
6.9
V
CC(SHUNT)
VCC
I
CC
2.175 < V < 6V
150
µA
V
CC
V
RT
ADJ Input Threshold
ADJ Hysteresis (Note 4)
ADJ Input Current
0.492
1.5
0.500
3.5
0.508
10.0
15
ΔV
RT
TMR = V
mV
nA
CC
●
I
V
ADJ
= 0.55V
ADJ
●
●
●
V
V
CC
UVLO Threshold
LTC2909-2.5
LTC2909-3.3
LTC2909-5
2.175
2.871
4.350
2.213
2.921
4.425
2.250
2.970
4.500
V
V
V
CC(UVLO)
ΔV
UVLO Hysteresis (Note 4)
Buffered Reference Voltage
TMR Pull-Up Current
TMR = V
0.3
0.985
–1.5
1.5
0.7
1.000
–2.1
2.1
2.0
1.015
–2.7
2.7
%
V
CC(UVLO)
CC
●
●
●
●
●
●
V
REF
V
V
V
C
V
V
> 2.175V, I
= 1mA
VREF
CC
I
I
t
t
= 1V
µA
µA
ms
ms
V
TMR(UP)
TMR
TMR
TMR
TMR
TMR
TMR Pull-Down Current
Reset Timeout Period, External
Reset Timeout Period, Internal
Timer Disable Voltage
= 1V
TMR(DOWN)
RST(EXT)
RST(INT)
= 2.2nF
= 0V
16
20
25
150
200
260
V
Rising
V
V
V
CC
– 0.16
TMR(DIS)
CC
CC
– 0.36
– 0.25
●
●
●
●
ΔV
Timer Disable Hysteresis
V
V
V
Falling
Falling
Rising
60
110
150
mV
V
TMR(DIS)
TMR
TMR
TMR
V
Timer Internal Mode Voltage
Timer Internal Mode Hysteresis
0.14
40
0.21
70
0.27
110
TMR(INT)
ΔV
mV
µs
TMR(INT)
t
ADJx Comparator Propagation Delay
to RST
ADJx Driven Beyond Reset Threshold
(V ) by 5mV
50
150
500
PROP
RTX
●
t
UV
V
Undervoltage Detect to RST
V Less Than UVLO Threshold
CC
CC(UVLO)
50
150
500
µs
CC
(V
) by 1%
●
●
●
V
RST Output Voltage Low
V
V
V
= 0.5V, I = 5µA
= 1V, I = 100µA
= 3V, I = 2500µA
0.01
0.01
0.10
0.15
0.15
0.30
V
V
V
OL(RST)
CC
CC
CC
●
I
RST Output Voltage High Leakage
RST = V
1
µA
OH(RST)
CC
Three-State Input SEL
●
●
V
V
V
Low Level Input Voltage
0.4
V
V
V
IL
High Level Input Voltage
1.4
IH
Pin Voltage when Left in Open State
Allowable Leakage in Open State
I
= 0µA
SEL
0.9
Z
●
●
I
5
10
µA
µA
SEL(Z)
I
SEL Input Current
SEL = V or SEL = GND
25
µA
SEL
CC
which exceeds 6V may exceed the rated terminal current. Operation
from higher voltage supplies requires a series dropping resistor. See
Applications Information.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: Threshold voltages have no hysteresis unless the part is in
comparator mode. Hysteresis is one-sided, affecting only invalid-to-valid
transitions. See Applications Information.
Note 2: All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
Note 3: V maximum pin voltage is limited by input current. Since the
CC
V
pin has an internal 6.5V shunt regulator, a low impedance supply
CC
2909fa
3
LTC2909
U W
T = 25°C unless otherwise noted
A
TYPICAL PERFOR A CE CHARACTERISTICS
ADJ Threshold Voltage
vs Temperature
V
UVLO Threshold Variation
REF Output Voltage
vs Temperature
0.015
CC
vs Temperature
1.5
1.0
0.5
0
508
I
= 0A
REF
506
504
1.010
1.005
1.000
502
500
498
496
494
0.995
0.990
0.985
–0.5
–1.0
–1.5
492
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
–25
0
50
75 100 125
–50
25
TEMPERATURE (°C)
2909 G03
2909 G02
2909 G01
Quiescent Supply Current
vs Temperature
REF Output Load Regulation
REF Output Line Regulation
1.015
1.010
60
1.015
1.010
1.005
1.000
0.995
0.990
0.985
V
= 2.5V
I
= 0A
ADJ1 = 0.55V
ADJ2 = 0.45V
SEL = OPEN
CC
REF
55
50
V
= 5V
CC
T
= 125°C
= 25°C
T
= 125°C
= 25°C
A
A
1.005
1.000
45
40
35
30
25
V
= 3.3V
CC
T
T
A
A
V
= 2.5V
T
= –40°C
T
= –40°C
CC
A
A
0.995
0.990
0.985
20
4.5
5
–25
0
50
75 100 125
–1
–0.5
0
0.5
1
2
2.5
3
3.5
4
5.5
6
–50
25
SUPPLY VOLTAGE, V (V)
LOAD CURRENT, I
(mA)
TEMPERATURE (°C)
CC
REF
2909 G04
2909 G05
2909 G06
Allowable Glitch Duration
vs Magnitude
External Timeout Period
vs Capacitance
Reset Timeout Period
vs Temperature
260
240
220
200
10000
1000
100
700
600
500
400
300
200
100
0
EXTERNAL WITH
22nF CAPACITOR
RESET OCCURS
ABOVE CURVE
INTERNAL
180
160
140
10
1
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
0.1
1
10
100
(nF)
1000
0.1
1
10
100
TMR PIN CAPACITANCE, C
TMR
GLITCH PERCENTAGE PAST THRESHOLD (%)
2909 G08
2909 G07
2909 G09
2909fa
4
LTC2909
U W
TYPICAL PERFOR A CE CHARACTERISTICS
T = 25°C unless otherwise noted
A
Shunt Regulation Voltage
vs Temperature
Shunt Regulation Voltage
vs Supply Current
RST Output Voltage vs V
CC
5
4
3
2
1
0
7.0
6.8
6.6
6.4
6.2
6.0
7.0
6.8
6.6
6.4
6.2
6.0
T
= 25°C
ADJ1 = 0.55
ADJ2 = 0.45
SEL = OPEN
A
10k PULL-UP R TO V
CC
I
= 10mA
= 1mA
CC
I
CC
I
= 100µA
CC
LTC2909-2.5
LTC2909-3.3
LTC2909-5
0
1
2
3
4
5
–50
0
25
50
75 100 125
–25
0.01
0.1
1
10
100
SUPPLY VOLTAGE, V (V)
TEMPERATURE (°C)
SUPPLY CURRENT, I (mA)
CC
CC
2909 G11
2909 G12
2909 G10
RST Output Voltage vs V
RST Pull-Down Current vs V
RST Pull-Down Current vs V
CC
CC
CC
6
5
1
0.1
0.4
0.3
0.2
0.1
ADJ1 = 0.55
ADJ2 = 0.55
SEL = OPEN
RST AT 150mV
RST AT 50mV
4
3
V
CC
RST AT 150mV
0.01
RST WITH 10k PULL-UP
2
1
0
0.001
RST AT 50mV
4
RST WITH 100k PULL-UP
0
0.0001
0
1
2
3
5
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
0
0.2
0.4
0.6
0.8
1
SUPPLY VOLTAGE, V (V)
SUPPLY VOLTAGE, V (V)
CC
CC
SUPPLY VOLTAGE, V (V)
CC
2909 G15
2909 G14
2909 G13
RST V vs I
I
vs Temperature
I vs Temperature
SEL
OL
RST
SEL
1.0
0.8
0.6
0.4
–20
–18
–16
–14
–12
–10
20
18
16
14
12
10
V
= 3V
SEL = GND
CC
SEL = V
CC
NO PULL-UP R
T
= 125°C
A
T
= 25°C
A
T
= –40°C
A
0.2
0
0
10
15
(mA)
20
25
30
5
50
TEMPERATURE (°C)
125
–50 –25
0
25
75 100
–50 –25
0
25
50
75 100 125
I
RST
TEMPERATURE (°C)
1635 G07
2909 G17
2909 G18
2909fa
5
LTC2909
U
U
U
(TSOT-23/DFN Package)
PI FU CTIO S
ADJ1 (Pin 1/Pin 8): Adjustable Voltage Input 1. Input to
V
CC
(Pin 6/Pin 3): Power Supply. Bypass this pin to
voltage monitor comparator 1 (0.5V nominal threshold). ground with a 0.1μF (or greater) capacitor. Operates as
The polarity of the input is selected by the state of the a direct supply input for voltages up to 6V. Operates as a
SEL pin (refer to Table 1). Tie to REF if unused (with SEL shunt regulator for supply voltages greater than 6V and
= V or Open).
should have a resistor between this pin and the supply
CC
to limit V input current to no greater than 10mA. When
CC
ADJ2 (Pin 2/Pin 7): Adjustable Voltage Input 2. Input to
voltage monitor comparator 2 (0.5V nominal threshold).
The polarity of the input is selected by the state of the
SEL pin (refer to Table 1). Tie to GND if unused (with SEL
= GND or Open).
used without a current-limiting resistor, pin voltage must
not exceed 6V. UVLO options allow V to be used as an
CC
accurate third fixed 10% UV supply monitor.
TMR (Pin 7/Pin 2): Reset Timeout Control. Attach an
external capacitor (C
) to GND to set a reset timeout
TMR
REF(Pin3/Pin6):BufferedReferenceOutput. 1Vnominal
reference used for the offset of negative-monitoring appli-
cations. The buffered reference can source and sink 1mA.
The reference can drive a capacitive load of up to 1000pF.
Larger capacitance may degrade transient performance.
This pin does not require a bypass capacitor, nor is one
recommended. Leave open if unused.
of 9ms/nF. A low leakage ceramic capacitor is recom-
mended for timer accuracy. Capacitors larger than 1μF
(9 second timeout) are not recommended. See Applica-
tions Information for further details. Leaving this pin open
generates a minimum timeout of approximately 400μs. A
2.2nF capacitor will generate a 20ms timeout. Tying this
pin to ground will enable the internal 200ms timeout. Ty-
GND (Pin 4/Pin 5): Device Ground.
ing this pin to V will disable the reset timer and put the
CC
part in comparator mode. Signals from the comparator
RST(Pin5/Pin4):Open-DrainInvertedResetLogicOutput.
Asserts low when any positive polarity input voltage is
below threshold or any negative polarity input voltage is
outputs will then go directly to RST.
SEL (Pin 8/Pin 1): Input Polarity Select Three-State Input.
above threshold or V is below UVLO threshold. Held low
Connect to V , GND or leave unconnected in open state
CC
CC
for a timeout after all voltage inputs are valid. Requires an
to select one of three possible input polarity combinations
external pull-up resistor and may be pulled above V .
(refer to Table 1).
CC
Exposed Pad (Pin 9, DFN Only): The Exposed Pad may be
left unconnected. For better thermal contact, tie to a PCB
trace. This trace must be grounded or unconnected.
2909fa
6
LTC2909
W
BLOCK DIAGRA
SEL
V
CC
V
CC
6.5V
THREE-STATE
DECODE
CONTROL 2
CONTROL 1
ADJ1
ADJ2
+
TMR
–
THREE-STATE
DECODE
ADJUSTABLE
PULSE
RST
GND
GENERATOR
+
–
200ms
PULSE
GENERATOR
V
CC
+
–
SEL CONTROL 1 CONTROL 2
+
500mV
–
GND
H
L
L
H
H
L
OPEN
+
–
V
CC
REF
+
1.000V
–
2909 BD
WU
W
TI I G DIAGRA S
Normal Positive Polarity Input Timing
Comparator Mode Positive Polarity Input Timing
V
RT
V
ADJ
V
RT
V
ADJ
V
RT
t
t
t
PROP
t
PROP
PROP
RST
1V
1V
RST
RST
Normal Negative Polarity Input Timing
Comparator Mode Negative Polarity Input Timing
V
ADJ
V
RT
V
ADJ
V
RT
V
RT
t
PROP
t
RST
t
PROP
t
PROP
RST
1V
1V
RST
Normal UVLO Timing
Comparator Mode UVLO Timing
V
CC(UVLO)
V
V
V
V
CC CC(UVLO)
CC CC(UVLO)
t
UV
t
t
t
UV
RST
UV
RST
1V
1V
RST
2909 TD
2909fa
7
LTC2909
U
W U U
APPLICATIO S I FOR ATIO
The LTC2909 is a low power, high accuracy dual/triple
supply monitor with two adjustable inputs and an ac-
curate UVLO. Reset timeout may be selected with an
external capacitor, set to an internally generated 200ms,
or disabled entirely.
operate the part from a supply higher than 6V, the V pin
CC
musthaveaseriesresistor,R ,tothesupply.Thisresistor
CC
should be sized according to the following equation:
VS(MAX) – 6.2V
10mA
VS(MIN) – 6.8V
≤ RCC
≤
200µA +IVREF
The three-state polarity select pin (SEL) chooses one of
threepossiblepolaritycombinationsfortheadjustableinput
thresholds, as described in Table 1. Both input voltages
whereV
andV
aretheoperatingminimumand
S(MIN)
S(MAX)
maximumofthesupply, andI
isthemaximumcurrent
VREF
(V
and V
) must be valid (above threshold if con-
ADJ1
ADJ2
the user expects to draw from the reference output.
figured for positive polarity, below threshold if configured
Asanexample,consideroperationfromanautomobilebat-
terywhichmightdipaslowas10Vorspiketo60V.Assume
thattheuserwillbedrawing100μAfromthereference.We
must then pick a resistance between 5.4k and 10.7k.
for negative polarity), and V above the UVLO threshold
CC
for the reset timeout before RST is released. The LTC2909
assertstheresetoutputduringpower-up,power-downand
brownout conditions on any of the voltage inputs.
When the V pin is connected to a low impedance supply,
CC
Power-Up
it is important that the supply voltage never exceed 6V,
or the shunt regulator may begin to draw large currents.
Some supplies may have nominal value sufficiently close
to the shunt regulation voltage to prevent sizing of the
resistor according to the above equation. For such sup-
plies, a 470Ω series resistor may be used.
The LTC2909 uses proprietary low voltage drive circuitry
for the RST pin which holds RST low with as little as
200mV of V . This helps prevent an unknown voltage
on the RST line during power-up.
CC
In applications where the low voltage pull-down capabil-
ity is important, the supply to which the external pull-up
resistorconnectsshouldbethesamesupplywhichpowers
the part. Using the same supply for both ensures that RST
never floats above 200mV during power-up, as the pull-
down ability of the pin will then increase as the required
pull-down current to maintain a logic low increases.
Polarity Selection
TheexternalconnectionoftheSELpinselectsthepolarities
oftheLTC2909adjustableinputs.SELmaybeconnectedto
GND, connected to V or left unconnected during normal
CC
operation. When left unconnected, the maximum leakage
allowablefromthepintoeitherGNDorV is10μA.Table 1
CC
Once V passes the UVLO threshold, polarity selection
CC
shows the three possible selections of polarity based on
andtimerinitializationwilloccur. Ifthemonitoredsupplies
(ADJ1 and ADJ2) are valid, the appropriate timeout delay
willbegin, afterwhichRSTwillbereleased. Otherwise, the
SEL connection.
Table 1. Voltage Threshold Selection
ADJ1 INPUT
ADJ2 INPUT
SEL
partwillwaituntilallsuppliesarevalid(includingV above
the UVLO threshold) before beginning the timeout.
CC
Positive Polarity
(+) UV or (–) OV
Positive Polarity
(+) UV or (–) OV
V
CC
Positive Polarity
(+) UV or (–) OV
Negative Polarity
(–) UV or (+) OV
Power-Down
Open
Onpower-down,onceV dropsbelowtheUVLOthreshold
CC
Negative Polarity
(–) UV or (+) OV
Negative Polarity
(–) UV or (+) OV
Ground
or either V becomes invalid, RST asserts logic low. V
ADJ
CC
of at least 0.5V guarantees a logic low of 0.15V at RST.
Note: Open = open circuit or driven by a three-state buffer in high impedance
state with leakage current less than 10μA.
Shunt Regulator
Iftheuser’sapplicationrequires,theSELpinmaybedriven
The LTC2909 contains an internal 6.5V shunt regulator on
using a three-state buffer which satisfies the V , V and
IL IH
theV pintoallowoperationfromahighvoltagesupply.To
leakage of the three-state pin.
CC
2909fa
8
LTC2909
U
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APPLICATIO S I FOR ATIO
If the state of the SEL pin configures a given input as
“negative polarity,” the voltage at the ADJx pin must be
below the trip point (0.5V nominal), or the RST output will
be pulled low. Conversely, if a given input is configured
as “positive polarity,” the pin voltage must be above the
trip point or RST will assert low.
datasheet,anegativevoltageisconsidered“undervoltage”
if it is closer to ground than it should be (e.g., –4.3V for
a –5V supply).
Proper configuration of the SEL pin and setting of the
trip-points via external resistors allows for any two fault
conditions to be detected. For example, the LTC2909 may
monitor two supplies (positive, negative or one of each)
for UV or for OV (or one UV and one OV). It may also
monitor a single supply (positive or negative) for both UV
and OV. Tables 2a and 2b show example configurations
for monitoring possible combinations of fault condition
and supply polarity.
Thus, a“negativepolarity”inputmaybeusedtodetermine
whetheramonitorednegativevoltageissmallerinabsolute
value than it should be (–UV), or a monitored positive
voltage is larger than it should be (+OV). The opposite is
true for a “positive polarity” input (–OV or +UV). These
usages are also shown in Table 1. For purposes of this
Table 2a. Possible Combinations of Supply Monitoring. For Example Purposes, All Supplies are Monitored at 5ꢀ Tolerance and
Connections are Shown Only for ADJ1, ADJ2, REF, SEL
SEL = V
SEL = GND
CC
15V (UV) 5V (UV)
–15V (UV) –5V (UV)
R
R
R
R
N2B
1.37M
P2A
P2B
N2A
3.09M
1.15M
3.09M
ADJ1
ADJ1
ADJ2
REF
ADJ2
REF
SEL
SEL
R
R
R
R
N1B
133k
P1A
P1B
N1A
115k
137k
107k
2 Positive UV
2 Negative UV
–15V (OV) –5V (OV)
15V (OV) 5V (OV)
R
R
R
R
P2B
1.33M
N2A
N2B
P2A
10.2M
1.37M
6.19M
ADJ1
ADJ2
REF
ADJ1
ADJ2
REF
SEL
SEL
R
R
R
R
P1B
137k
N1A
N1B
P1A
309k
118k
200k
2 Negative OV
2 Positive OV
15V (UV) –15V (OV)
15V (OV) –15V (UV)
R
R
R
R
N2
3.09M
P2
N2
P2
3.09M
10.2M
6.19M
ADJ1
ADJ2
REF
ADJ1
ADJ2
REF
SEL
SEL
R
R
R
R
N1
107k
P1
N1
P1
115k
309k
200k
1 Positive UV, 1 Negative OV
1 Positive OV, 1 Negative UV
2909fa
9
LTC2909
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Table 2b. Possible Combinations of Supply Monitoring. For Example Purposes, All Supplies are Monitored at 5ꢀ Tolerance and
Connections are Shown Only for ADJ1, ADJ2, REF, SEL
SEL OPEN
15V (UV/OV)
–15V (UV/OV)
R
R
N6
10.2M
P6
2.37M
ADJ1
ADJ2
REF
ADJ1
ADJ2
REF
R
R
N5
40.2k
P5
10.7k
SEL
SEL
R
76.8k
R
N4
309k
P4
1 Positive UV and OV
1 Negative UV and OV
15V (UV) –15V (UV)
–15V (OV)15V (OV)
R
R
R
R
P2
6.19M
P2
N2
N2
3.09M
3.09M
10.2M
ADJ1
ADJ2
REF
ADJ1
ADJ2
REF
SEL
SEL
R
R
R
R
P1
200k
P1
N1
N1
115k
107k
309k
1 Positive UV, 1 Negative UV
1 Negative OV, 1 Positive OV
15V (UV) 5V (OV)
–15V (OV) –5V (UV)
R
R
P2B
1.33M
R
R
N2B
1.37M
P2A
N2A
3.09M
10.2M
ADJ1
ADJ2
REF
ADJ1
ADJ2
REF
SEL
SEL
R
R
R
R
P1A
P1B
N1A
N1B
115k
137k
309k
133k
1 Positive UV, 1 Positive OV
1 Negative UV, 1 Negative OV
Adjust Input Trip Point
band. To ensure that the threshold lies outside the power
supplytolerancerange,thenominalthresholdmustlieout-
side that range by the monitor’s accuracy specification.
Thetripthresholdforthesuppliesmonitoredbytheadjust-
able inputs is set with an external resistor divider, allowing
the user complete control over the trip point. Selection of
this trip voltage is crucial to the reliability of the system.
All three of the LTC2909 inputs (ADJ1, ADJ2, V UVLO)
CC
have the same relative threshold accuracy of 1.5% of the
programmednominalinputvoltage(overthefulloperating
temperature range). Therefore, using the LTC2909, the
typical 10% UV threshold is at 11.5% below the nominal
inputvoltagelevel.Fora5Vinput,thethresholdisnominally
4.425V. With 1.5% accuracy, the trip threshold range is
4.425V 75mV over temperature (i.e., 10% to 13% below
5V). The monitored system must thus operate reliably
down to 4.35V or 13% below 5V over temperature.
Any power supply has some tolerance band within which
it is expected to operate (e.g., 5V 10%). It is generally
undesirablethatasupervisorissuearesetwhenthepower
supply is inside this tolerance band. Such a “nuisance”
reset reduces reliability by preventing the system from
functioning under normal conditions.
Topreventnuisanceresets, thesupervisorthresholdmust
be guaranteed to lie outside the power supply tolerance
2909fa
10
LTC2909
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APPLICATIO S I FOR ATIO
The above discussion is concerned only with the DC
value of the monitored supply. Real supplies also have
relatively high frequency variation from sources such as
load transients, noise and pickup. These variations should
not be considered by the monitor in determining whether
a supply voltage is valid or not. The variations may cause
spurious outputs at RST, particularly if the supply voltage
is near its trip threshold.
lowpass filter with the resistor divider will further reject
high frequency components of the supply, at the cost of
slowing the monitor’s response to fault conditions.
Selecting External Resistors
In a typical positive supply monitoring application, the
ADJx pin connects to a tap point on an external resistive
divider between a positive voltage being monitored and
ground, as shown in Figure 1.
A common solution to the problem of spurious reset is
to introduce hysteresis around the nominal threshold.
However, this hysteresis degrades the effective accuracy
of the monitor and increases the range over which the
system must operate. The LTC2909 therefore does not
have hysteresis, except in comparator mode (see Setting
theResetTimeout).Ifhysteresisisdesiredinothermodes,
it may be added externally. See Typical Applications for
an example.
Whenmonitoringanegativesupply,theADJxpinconnects
to a tap point on a resistive divider between the negative
voltagebeingmonitoredandthebufferedreference(REF),
as shown in Figure 2.
V
MON
R
P2
P1
ADJx
0.5V
+
–
The LTC2909 uses two techniques to combat spurious
reset without sacrificing threshold accuracy. First, the
timeout period helps prevent high frequency variation
R
+
whose frequency is above 1/ t
RST output.
from appearing at the
RST
–
2909 F01
When either ADJ1 or ADJ2 becomes invalid, the RST pin
asserts low. When the supply recovers past the threshold,
theresettimerstarts(assumingitisnotdisabled)andRST
does not go high until it finishes. If the supply becomes
invalidanytimeduringthetimeoutperiod, thetimerresets
and starts fresh when the supply next becomes valid.
Figure 1. Setting Positive Supply Trip Point
REF
R
R
N1
N2
ADJx
+
–
While the reset timeout is useful at preventing toggling of
the reset output in most cases, it is not effective at pre-
venting nuisance resets due to short glitches (from load
transients or other effects) on a valid supply. To reduce
sensitivity to these short glitches, the comparator outputs
go through a lowpass filter before triggering the output
logic. Any transient at the input of a comparator needs to
be of sufficient magnitude and duration to pass the filter
before it can change the monitor state.
V
MON
+
0.5V
–
2909 F02
Figure 2. Setting Negative Supply Trip Point
Normally the user will select a desired trip voltage based
on their supply and acceptable tolerances, and a value of
R
N1
or R based on current draw. Current used by the
P1
The combination of the reset timeout and comparator
filtering prevents spurious changes in the output state
without sacrificing threshold accuracy. If further supply
glitch immunity is needed, the user may place an external
capacitor from the ADJ input to ground. The resultant RC
resistor divider will be approximately:
0.5V
I =
RX1
Recommended range is 1k to 1M.
2909fa
11
LTC2909
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APPLICATIO S I FOR ATIO
For a positive-monitoring application, R is then chosen
by:
P2
REF
ADJ1
+
–
R
P2
= R (2V
– 1)
P1
TRIP
R
N4
For a negative-monitoring application:
R
= R (1 – 2V
)
N2
N1
TRIP
R
R
N5
ADJ2
0.5V
+
–
Note that the value V
tive application.
should be negative for a nega-
TRIP
N6
V
MON
The LTC2909 can also be used to monitor a single supply
for both UV and OV. This may be accomplished with three
resistors, instead of the four required for two independent
supplies. Configurations are shown in Figures 3 and 4.
+
–
2909 F04
Figure 4. Setting UV and OV Trip Point for a Negative Supply
R
or R may be chosen as is R above.
P4
N4 P1
Suppose we wish to consume about 5μA in the divider, so
For a given R , monitoring a positive supply:
P4
R =100k.WethenfindR =21.0k,R =1.18M(nearest
N4
N5
N6
1%standardvalueshavebeenchosen). Suggestedvalues
of resistors for 5% monitoring are shown in Table 3.
VOV – VUV
RP5 = RP4
VUV
VOV
VUV
V
Monitoring/UVLO
CC
RP6 = RP4 2V –1
(
)
UV
TheLTC2909containsanaccuratethird10%undervoltage
monitor on the V pin. This monitor is fixed at a nominal
CC
For monitoring a negative supply with a given R :
N4
11.5% below the V specified in the part number. The
CC
VUV – VOV
RN5 = RN4
standard part (LTC2909-2.5) is configured to monitor a
2.5V supply (UVLO threshold of 2.213V), but versions
to monitor 3.3V and 5.0V (UVLO of 2.921V and 4.425V,
respectively) are available.
1– VUV
1– VOV
RN6 = RN4 1– 2V
(
)
1– VUV
UV
For applications that do not need V monitoring, the
CC
Forexample,considermonitoringa–5Vsupplyat 10%.For
thissupplyapplication:V =–5.575VandV =–4.425V.
2.5V version should be used, and the UVLO will simply
guarantee that the V is above the minimum required for
OV
UV
CC
proper threshold and timer accuracy before the timeout
begins.
ADJ1
+
–
V
MON
Setting the Reset Timeout
R
P6
The reset timeout of the LTC2909 may be configured
in one of three ways: internal 200ms, programmed by
external capacitor and no timeout (comparator mode).
The mode of the timer is determined by the connection
of the TMR pin.
R
R
P5
ADJ2
0.5V
+
–
P4
+
–
In externally-controlled mode, the TMR pin is connected
byacapacitortoground.Thevalueofthatcapacitorallows
for selection of a timeout ranging from about 400μs to 10
2909 F03
Figure 3. Setting UV and OV Trip Point for a Positive Supply
seconds. See the following section for details.
2909fa
12
LTC2909
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APPLICATIO S I FOR ATIO
Table 3. Suggested Resistor Values for 5ꢀ Monitoring
5ꢀ UV
5ꢀ OV
5ꢀ UV and OV
NOMINAL
R
R
R
R
R
R
X5
R
X6
VOLTAGE
24
X1
X2
X1
X2
X4
232k
115k
49.9k
115k
137k
221k
115k
63.4k
59.0k
127k
200k
133k
97.6k
107k
107k
10.2M
3.09M
1.07M
1.82M
1.15M
1.15M
422k
150k
107k
158k
174k
102k
200k
102k
78.7k
137k
340k
51.1k
115k
137k
102k
100k
118k
115k
40.2k
309k
5.11M
6.19M
2.49M
1.43M
1.33M
2.05M
221k
324k
301k
158k
113k
82.5k
76.8k
76.8k
162k
76.8k
76.8k
137k
82.5k
76.8k
187k
107k
174k
182k
40.2k
309k
11.5k
10.7k
10.7k
22.6k
10.7k
10.7k
19.1k
11.5k
10.7k
26.1k
15.0k
20.0k
22.6k
5.11k
40.2k
4.12M
2.37M
1.87M
2.94M
732k
453k
576k
221k
158k
267k
105k
2.00M
3.65M
1.07M
10.2M
15
12
9
5
3.3
2.5
1.8
1.5
1.2
1
–5
–9
–12
–15
1.37M
1.74M
2.49M
3.09M
1.37M
2.32M
1.07M
10.2M
Trip points are nominal voltage 6.5%.
If the user wishes to avoid having an external capacitor,
the TMR pin should be tied to ground, switching the part
to an internal 200ms timer.
the threshold is 500mV when the input is below 500mV,
and switches to 496.5mV when the input goes above
500mV.
If the user requires a shorter timeout than 400μs, or
wishes to perform application-specific processing of the
reset output, the part may be put in comparator mode by
Thecomparatormodefeatureshouldbeenabledbydirectly
shorting the TMR pin to the V pin. Connecting the pin to
CC
any other voltage may have unpredictable results.
tying the TMR pin to V . In comparator mode, the timer
CC
Selecting the Reset Timing Capacitor
is bypassed and comparator outputs go straight to the
reset output.
Connecting a capacitor, C
, between the TMR pin and
RST
TMR
ground sets the reset timeout, t . The following formula
The current required to hold TMR at ground or V is
CC
approximatesthevalueofcapacitorneededforaparticular
timeout:
about 2μA. To force the pin from the floating state to
ground or V may require as much as 100μA during the
CC
transition.
C
= t
• 110 [pF/ms]
TMR
RST
When the part is in comparator mode, one of the two
means of preventing false reset has been removed, so
a small amount of one-sided hysteresis is added to the
inputs to prevent oscillation as the monitored voltage
passes through the threshold. This hysteresis is such
thatthevalid-to-invalidtransitionthresholdisunchanged,
but the invalid-to-valid threshold is moved by about
0.7%. Thus, when the ADJ input polarity is positive,
the threshold voltage is 500mV nominal when the in-
put is above 500mV. As soon as the input drops below
500mV, the threshold moves up to 503.5mV nominal.
Conversely, when configured as a negative-polarity input,
Leaving the TMR pin open with no external capacitor
generates a reset timeout of approximately 400μs.
Maximum length of the reset timeout is limited by the
ability of the part to charge a large capacitor on start-up.
Initially, with a large (discharged) capacitor on the TMR
pin, the part will assume it is in internal timer mode (since
the pin voltage will be at ground). If the 2μA flowing out of
the TMR pin does not charge the capacitor to the ground-
sense threshold within the first 200ms after supplies
become good, the internal timer cycle will complete and
RST will go high too soon.
2909fa
13
LTC2909
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APPLICATIO S I FOR ATIO
pulled above V , providing the voltage limits of the pin
This imposes a practical limit of 1μF (9 second timeout) if
the length of timeout during power-up needs to be longer
than 200ms. If the power-up timeout is not important,
larger capacitors may be used, subject to the limitation
thatthecapacitorleakagecurrentmustnotexceed500nA,
or the function of the timer will be impaired.
CC
are observed.
The open-drain nature of the RST pin allows for wired-OR
connectionofseveralLTC2909stomonitormorethantwo
supplies(seeTypicalApplications). Otherlogicwithopen-
drain outputs may also connect to the RST line, allowing
other logic-determined conditions to issue a reset.
RST Output Characteristics
As noted in the discussion of power up and power down,
The DC characteristics of the RST pull-down strength
are shown in the Typical Performance Characteristics
section. RST is an open-drain pin and thus requires an
external pull-up resistor to the logic supply. RST may be
the circuits that drive RST are powered by V . During a
CC
fault condition, V of at least 0.5V guarantees a V of
CC
OL
0.15V at RST .
U
TYPICAL APPLICATIO S
Six Supply Undervoltage Monitor with 2.5V Reset Output and 20ms Timeout
15V
5V
–5V
SYSTEM
–15V
3.3V
2.5V
C
C
BYP2
100nF
BYP1
100nF
R
PU
10k
R
R
N2A
1.37M
P2A
1.15M
V
V
CC
CC
ADJ1
RST
RST
ADJ1
R
R
R
P1A
137k
R
N2B
N1A
P2B
3.09M
LTC2909-2.5
LTC2909-3.3
3.09M 133k
REF
SEL
SEL
REF
R
N1B
107k
R
P1B
115k
ADJ2
TMR
TMR
ADJ2
2909 TA02
C
C
TMR2
2.2nF
TMR1
GND
GND
2.2nF
48V Telecom UV/OV Monitor with Hysteresis
V
12V UV Monitor Powered from
12V, 20ms Timeout (1.8V Logic Out)
IN
36V TO 72V
SYSTEM
R
CC
C
BYP
R
R
P2A
P2B
1.91M
27k
100nF
1.43M
0.25W
C
BYP
R
CC
10k
100nF
5V
M2
R
P2A2
169k
12V
1.8V
R
PU
V
10k
CC
R
R
PU
P2
1.07M
V
CC
ADJ1
RST
V
: 43.3V
: 38.7V
10k
UV(RISING)
UV(FALLING)
FAULT
OUTPUT
10k*
R
V
ADJ1
RST
LTC2909-2.5
MANUAL
RESET
PUSHBUTTON
V
V
: 71.6V
: 70.2V
OV(RISING)
OV(FALLING)
R
P1
SEL
ADJ2
LTC2909-2.5
49.9k
R
R
R
P1B2
681k
P1A
P1B
REF
SEL
18.7k
13.7k
R
107k
N1
N2
REF
TMR
2.49M
M1
GND
–12V
ADJ2
TMR
C
TMR
GND
2909 TA03
*OPTIONAL FOR ESD
2.2nF
2909 TA01b
M1, M2: FDG6301N OR SIMILAR
IF LOADING OF RST WILL EXCEED 1nF,
A 1nF BYPASS CAPACITOR ON M1’s
DRAIN IS RECOMMENDED
2909fa
14
LTC2909
U
PACKAGE DESCRIPTIO
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702)
0.61 0.05
(2 SIDES)
R = 0.115
0.38 0.10
3.00 0.10
(2 SIDES)
TYP
5
8
0.56 0.05
(2 SIDES)
0.675 0.05
2.50 0.05
1.15 0.05
2.00 0.10
(2 SIDES)
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
PIN 1
CHAMFER OF
PACKAGE
OUTLINE
EXPOSED PAD
4
1
(DDB8) DFN 1103
0.25 0.05
0.25 0.05
0.75 0.05
0.200 REF
0.50 BSC
2.20 0.05
(2 SIDES)
0.50 BSC
2.15 0.05
(2 SIDES)
0 – 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
BOTTOM VIEW—EXPOSED PAD
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637)
2.90 BSC
(NOTE 4)
0.52
MAX
0.65
REF
1.22 REF
1.4 MIN
1.50 – 1.75
(NOTE 4)
2.80 BSC
3.85 MAX 2.62 REF
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.22 – 0.36
8 PLCS (NOTE 3)
0.65 BSC
0.80 – 0.90
0.20 BSC
DATUM ‘A’
0.01 – 0.10
1.00 MAX
0.30 – 0.50 REF
1.95 BSC
0.09 – 0.20
(NOTE 3)
TS8 TSOT-23 0802
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
2909fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC2909
U
TYPICAL APPLICATIO
Automotive Supply System with Overvoltage, Overcurrent and Overtemperature Protection and Undervoltage Reset
2.5V
DC/DC
DC/DC
D1: 1N5238B OR SIMILAR
Q1, Q2: FFB2227 OR SIMILAR
3.3V
SYSTEM
R
M1
S
0.01Ω
IRLZ34
V
IN
12V
C
BYP3
100nF
R
4.7k
L1
R
G2
R
R
R
R
R
R
P2E
2N6507
CC
4.7k
P2A
P2B
2.05M
P2C
221k
P2D
1.07M 1.15M
Q1
L2
10Ω
2.49M
Q2
D1
C
BYP2
100nF
R
R
PU1
4.7k
V
V
V
CC
CC
CC
100k
R
PU2
R
G1
1k
RST
ADJ1
RST
ADJ1
ADJ1
SEL
10k
R
10.7k
REF
R
P1D
49.9k
LTC2909-2.5
LTC2909-2.5
LTC2909-2.5
C
G
C
R
BYP1
100nF
FB2
100k
10nF
SEL
REF
SEL
REF
REF
RST
NTC THERMISTOR
NTHS-1206N01
R25 = 100k
V
SENSE GATE
CC
PWRGD LT1641-2
GND TIMER
ON
FB
TMR
TMR
TMR
ADJ2
ADJ2
ADJ2
R = 10.7k AT 85°C
R
51.1k
R
P1E
R
R
P1B
340k
GND
GND
P1C
GND
P1A
R
FB1
10k
221k
102k
C
T
2909 TA05
680nF
CIRCUIT BREAKER AND CROWBAR
12V OV AND 3.3V OV DETECT
2.5V OV AND T > 85°C DETECT
12V, 3.3V and 2.5V UV DETECT
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1326/LTC1326-2.5
Micropower Precision Triple Supply Monitor for
5V/2.5V, 3.3V and ADJ
4.725V, 3.118V, 1V Threshold ( 0.75%)
LTC1536
LTC1540
Precision Triple Supply Monitor for PCI Applications
Nanopower Comparator with Reference
Meets PCI t Timing Specifications
FAIL
Adjustable Hysteresis
LTC1726-2.5/LTC1726-5 Micropower Triple Supply Monitor for 2.5V/5V, 3.3V
and ADJ
Adjustable Reset and Watchdog Time-Outs
LTC1727/LTC1728
LTC1985-1.8
LTC2900
Micropower Triple Supply Monitor with Open-Drain
Reset
Individual Monitor Outputs in MSOP/5-Lead SOT-23
5-Lead SOT-23 Package
Micropower Triple Supply Monitor with Push-Pull
Reset Output
Programmable Quad Supply Monitor
Adjustable Reset, 10-Lead MSOP and 3mm × 3mm 10-Lead DFN
Package
LTC2901
LTC2902
Programmable Quad Supply Monitor
Programmable Quad Supply Monitor
Adjustable Reset and Watchdog Timer, 16-Lead SSOP Package
Adjustable Reset and Tolerance, 16-Lead SSOP Package, Margining
Functions
LTC2903
Precision Quad Supply Monitor
6-Lead SOT-23 Package, Ultralow Voltage Reset
LTC2904/LTC2905
LTC2906/LTC2907
3-State Programmable Precision Dual Supply Monitor Adjustable Tolerance and Reset Timer, 8-Lead SOT-23 Package
Precision Dual Supply Monitor 1-Selectable and
1 Adjustable
Separate V Pin, RST/RST Outputs/Adjustable Reset Timer
CC
LTC2908
LT6700
Precision Six Supply Monitor (Four Fixed and
2 Adjustable)
8-Lead SOT-23 and DDB Packages
6-Lead SOT-23 Package
Micropower, Low Voltage, Dual Comparator with
400mV Reference
2909fa
LT 0606 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
© LINEAR TECHNOLOGY CORPORATION 2005
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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