LTC2965IDD#PBF [Linear]
LTC2965 - 100V Micropower Single Voltage Monitor; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C;
| 型号： | LTC2965IDD#PBF |
| 厂家： | 
Linear |
| 描述： | LTC2965 - 100V Micropower Single Voltage Monitor; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C 光电二极管 |
| 文件： | 总18页 (文件大小：232K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC2965
100V Micropower Single
Voltage Monitor
FEATURES
DESCRIPTION
The LTC®2965 is a low current, high voltage single chan-
nel voltage monitor. Internal high value resistors sense
the input monitor pin providing a compact and low power
solutionforvoltagemonitoring.Twocomparatorreference
inputs(INHandINL)areincludedtoallowconfigurationof
ahighandlowthresholdusinganexternalresistivedivider
biased from the on-chip reference. A range selection pin
is provided to set the internal resistive divider for 10x or
40x scaling. The thresholds are scaled according to the
range selection settings. Additionally, either INH or INL
can be grounded to enable built-in hysteresis. Polarity
selection pin allows the output to be inverted. The output
is 100V capable and includes a 500k pull-up resistor to
an internal supply.
n
Wide Operating Range: 3.5V to 100V
n
Wide Monitoring Range: 3.5V to 98V
n
Quiescent Current: 7µA
Adjustable Threshold Range
Internal High Value Resistive Dividers
1.4ꢀ (ꢁax) Threshold Accuracy ꢂver Temperature
Polarity Selection
100V Rated ꢂutputs
n
n
n
n
n
n
Selectable Built-In Hysteresis
16-Lead ꢁS and 8-Lead 3mm × 3mm DFN Packages
n
APPLICATIONS
n
Portable Equipment
n
Battery-Powered Equipment
L, LT, LTC, LTꢁ, Linear Technology and the Linear logo are registered trademarks of Analog
Devices, Inc. All other trademarks are the property of their respective owners.
n
Telecom Systems
Automotive/Industrial Electronics
n
TYPICAL APPLICATION
Undervoltage Monitor
24V
5V
V
MONITOR RANGE
3.5V to 24.5V
14V to 98V
RANGE SELECTION
IN
V
10x
40x
IN
100k
REF
INH
INL
200k
91k
OUT
24V UNDERVOLTAGE
THRESHOLD
CONFIGURATION
5V
SYS
LTC2965
Supply Current vs VIN
12
909k
10
PS RS GND
8
6
2965 TA01a
4
2
0
POLARITY AND RANGE SELECTION
–45°C
25°C
RANGE = 40x
OUT = LOW
REF
90°C
I
= 0µA
125°C
RISING THRESHOLD
20.0V
18.2V
1.8V
10x
FALLING THRESHOLD
HYSTERESIS
RANGE
0
20
40
60
(V)
80
100
V
IN
2965 TA01b
2965fc
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For more information www.linear.com/LTC2965
LTC2965
ABSOLUTE MAXIMUM RATINGS (Notes 1, 2)
Input Voltages
ꢂperating Ambient Temperature Range
V ....................................................... –0.3V to 140V
LTC2965C................................................ 0°C to 70°C
LTC2965I.............................................–40°C to 85°C
LTC2965H.......................................... –40°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................300°C
IN
PS, RS ..................................................... –0.3V to 6V
INH, INL................................................... –0.3V to 6V
ꢂutput Voltages
ꢂUT ..................................................... –0.3V to 140V
Average Currents
V ...................................................................–20mA
IN
ꢂUT ................................................................... 5mA
REF .................................................................... 5mA
INH, INL.............................................................–1mA
PIN CONFIGURATION
TOP VIEW
TOP VIEW
1
2
3
4
5
6
7
8
V
16 OUT
15 NC
14 NC
13 NC
12 NC
11 GND
10 RS
IN
V
1
2
3
4
8
7
6
5
OUT
GND
RS
IN
NC
NC
REF
INH
INL
9
GND
NC
NC
REF
INH
INL
PS
9
PS
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
MS PACKAGE
16-LEAD PLASTIC MSOP
T
JꢁAX
= 150°C, θ = 120°C/W
JA
T
= 150°C, θ = 43°C/W
JA
JꢁAX
EXPꢂSED PAD (PIN 9) PCB GND CꢂNNECTIꢂN ꢂPTIꢂNAL
(http://www.linear.com/product/LTC2965#orderinfo)
ORDER INFORMATION
Lead Free Finish
TUBE
TAPE AND REEL
PART MARKING*
LGꢁK
PACKAGE DESCRIPTION
TEMPERATURE RANGE
0°C to 70°C
LTC2965CDD#PBF
LTC2965IDD#PBF
LTC2965HDD#PBF
LTC2965CꢁS#PBF
LTC2965IꢁS#PBF
LTC2965HꢁS#PBF
LTC2965CDD#TRPBF
LTC2965IDD#TRPBF
LTC2965HDD#TRPBF
LTC2965CꢁS#TRPBF
LTC2965IꢁS#TRPBF
LTC2965HꢁS#TRPBF
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
16-Lead Plastic ꢁSꢂP
LGꢁK
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LGꢁK
2965
2965
16-Lead Plastic ꢁSꢂP
–40°C to 85°C
–40°C to 125°C
2965
16-Lead Plastic ꢁSꢂP
Consult LTC ꢁarketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC ꢁarketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRꢁPBF suffix.
2965fc
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For more information www.linear.com/LTC2965
LTC2965
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RS = GND, PS = GND,
INH = 1.2V, INL = GND (Notes 1, 2).
SYMBOL
PARAMETER
CONDITIONS
MIN
3.5
3.5
3
TYP
MAX
100
98
UNITS
V
l
V
V
Input Supply ꢂperating Range
V
IN
IN
V
V
ꢁonitor Range
V
ꢁꢂN
VIN
IN
IN
l
l
I
Input Supply Current
V
V
V
= 100V, 40x
Rising
7
15
µA
V
IN
IN
IN
V
Undervoltage Lockout
3
UVLꢂ
Undervoltage Lockout Hysteresis
Falling
70
mV
Comparator Reference Input: INH, INL
l
V
V
Comparator Common ꢁode Voltage
0.35
2.45
V
Cꢁ
l
l
V
Error Voltage at 96V
INH = V , 40x
250
250
1360
400
mV
mV
ERR
IN
REF
0.35V ≤ INH ≤ 2.4V, 40x
l
l
V
Error Voltage at 24V
INH = V , 10x
35
35
315
75
mV
mV
IN
REF
0.35V ≤ INH ≤ 2.4V, 10x
l
l
V
Comparator ꢂffset Voltage
INH = 0.35V, 10x
1.9
3
mV
ꢀ
ꢂS
AV
Internal Resistive Divider Range Error
Comparator Built-in Hysteresis
INH = 2.4V, Range = 10x, 40x
0.4
ERR
l
l
V
INH = GND, INL Rising, V = 24V
INL = GND , INH Falling, V = 24V
14
–30
22
–22
30
–14
mV
mV
HYS
IN
IN
l
l
V
Built-in Hysteresis Enable Threshold
100
175
80
mV
µs
HYTH
t
I
V
to ꢂUT Comparator Propagation Delay
IN
ꢂverdrive = 10ꢀ, ꢂUT Falling,10x
INH = GND, INL = 1.2V
40
PD
l
l
Input Leakage Current (INH, INL)
V = 1.2V, I-Grade
V = 1.2V, H-Grade
0.1
0.1
1
10
nA
nA
IN(LKG)
Reference: REF
l
V
Reference ꢂutput Voltage
Reference ꢂutput Noise
I
≤ 100µA, V ≥ 3.5V
2.378 2.402 2.426
140
V
REF
REF
IN
Noise
100Hz to 100kHz
µV
RꢁS
Control Inputs: RS, PS
l
l
V
Select Input Threshold
Input Leakage Current
0.4
1.4
V
TH
I
V = 2.4V
100
nA
LKG
Status Outputs: OUT
l
l
V
ꢂL
Voltage ꢂutput Low
V
IN
V
IN
= 1.25V, I = 10µA
= 3.5V, I = 500µA
100
400
mV
mV
l
l
V
ꢂH
Voltage ꢂutput High
V
IN
V
IN
= 3.5V, I = –1µA
≥ 4.5V, I = –1µA
2
2.8
2.375
3
2.75
4
V
V
l
l
I
I
ꢂutput Current High
V = GND, V = 3.5V
–15
–7.5
–5
µA
nA
ꢂH
ꢂ(LKG)
IN
Leakage Current, ꢂutput High
V = 100V, V = 6V
250
IN
Note 1: Stresses beyond those listed under Absolute ꢁaximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
ꢁaximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
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For more information www.linear.com/LTC2965
LTC2965
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs VIN
VREF vs Temperature
VREF vs Load Current
12
10
2.412
2.408
2.404
2.400
2.396
2.392
2.388
2.450
2.425
2.400
2.375
2.350
V
= 3.5V
I = –10µA
IN
8
6
4
2
0
–45°C
25°C
–45°C
RANGE = 40x
OUT = LOW
25°C
90°C
125°C
90°C
I
= 0µA
125°C
REF
0
20
40
60
(V)
80
100
–50 –25
0
25
50 75 100 125 150
TEMPERATURE (°C)
0
0.4
1.2
1.6
2.0
0.8
V
LOAD CURRENT (mA)
IN
2965 G01
2965 G02
2965 G03
Comparator VOS vs Temperature
VREF vs VIN
% Range Error vs Temperature
2.450
2.425
2.400
2.375
2.350
1500
1000
500
0.4
0.2
0
25°C
V
= 1.2V
INH(L)
0
–500
–1000
–1500
–0.2
1µA
100µA
1mA
10x
40x
–0.4
75 100
2.7
3.0
3.2
V
3.5
(V)
3.7
4.0
–50 –25
0
25 50
125 150
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
TEMPERATURE (°C)
IN
2965 G04
2965 G06
2965 G05
VIN Falling Propagation Delay
vs % Overdrive
Built-In Hysteresis
vs Temperature
125
28
26
24
22
20
18
16
V
V
V
= 1.2V
= GND
V
= 1.2V
INL
INH
IN
INH(L)
= 12V
100
75
50
25
0
–45°C
25°C
90°C
125°C
0.1
1
10
100
–50
0
50
100
150
% OVERDRIVE (%)
TEMPERATURE (°C)
2965 G10
2965 G08
2965fc
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LTC2965
TYPICAL PERFORMANCE CHARACTERISTICS
Voltage Output High vs Pull-Down
Current (OUT)
Voltage Output Low vs Pull-Up
Current (OUT)
Voltage Output High
vs Input Voltage
4
3
2
1
0
1.50
1.25
3.5
3.2
V
IN
= 12V
–45°C
25°C
90°C
125°C
I = –1µA
1.00
0.75
2.9
2.6
0.50
0.25
0
2.3
2.0
1.7
–45°C
25°C
90°C
125°C
–6
–9
0
1
2
3
4
5
0
–12
–3
3
4
5
6
7
8
PULL-UP CURRENT (mA)
PULL-DOWN CURRENT (µA)
V
(V)
IN
2965 G10
2965 G09
2965 G11
PIN FUNCTIONS
ExposedPad(DD8Only):Exposedpadmaybeleftfloating
or connected to device ground.
to an internally generated supply between 3.5V and 5V
depending on input supply voltage. Blocking circuitry at
the pin allows the pin to be resistively pulled up to volt-
ages as high as 100V without back conducting onto the
GND: Device Ground.
INH: High Comparator Reference Input. Voltage on this
internal supply of the part. Polarity with respect to the V
IN
pin is multiplied by the configured range setting to set
pin is configured using the polarity select pin, PS. ꢂUT
pulls low when the part is in UVLꢂ.
the V high or rising threshold. Keep within valid voltage
IN
range, V , or tie to GND to configure built-in hysteresis
Cꢁ
PS: Polarity Selection. Connect to REF or a voltage >V
TH
where high threshold for V becomes INL + V
according to the RS pin configuration.
scaled
IN
HYS
to configure comparator output to be inverting with re-
spect to V . ꢂtherwise connect pin to GND to configure
IN
INL: Low Comparator Reference Input. Voltage on this pin
is multiplied by the configured range setting to set the V
low or falling threshold. Keep within valid voltage range,
comparator output to be noninverting with respect to V .
IN
IN
REF: Reference ꢂutput. V with respect to GND. Use a
REF
maximumof1nFtobypassunlessdampingresistorisused.
V
, or tie to GND to configure built-in hysteresis where
Cꢁ
low threshold becomes INH – V
scaled according to
RS: Range Select Input. RS selects 10x or 40x range.
Connect to REF or GND to configure pin. (See Table 1)
HYS
the RS pin configuration. ꢂtherwise, INH-INL sets the
hysteresis of the comparator. ꢂscillation will occur if INL
> INH unless built-in hysteresis is enabled.
V : Voltage ꢁonitor and Supply Input. An internal high
IN
value resistive divider is connected to the pin. If V falls
IN
OUT: Comparator ꢂutput. ꢂUT consists of a high voltage
active pull-down and a gated, resistive (500kΩ) pull-up
below the UVLꢂ threshold minus hysteresis, the output
is pulled low. If V < 1.2V, the logic state of the outputs
IN
cannot be guaranteed.
2965fc
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For more information www.linear.com/LTC2965
LTC2965
BLOCK DIAGRAMS
V
IN
V
REF
REF
1X
INTERNAL
REGULATOR
GND
70M
V
INT
V
+
–
HYTH
INH
INL
– +
HYS
+
–
500k
V
V
INT
V
HYS
+–
OUT
–
+
V
HYTH
PS
RS
10x/40x
2965 BD
2965fc
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LTC2965
OPERATION
The LTC2965 is a micropower single channel voltage
monitor with a 100V maximum operating voltage. Its
channel is comprised of an internal high value resistive
divider and a comparator with a high voltage output. A
reference voltage is provided to allow the thresholds to be
set independently. This configuration has the advantage
of being able to monitor very high voltages with very little
current draw while threshold programming is done using
low value resistors at low voltages. Integration of a resis-
tive divider for high voltage sensing makes the LTC2965
a compact and low power solution for generating voltage
status signals to a monitoring system.
pulled low assuming PS is ground. The amount of hys-
teresis referred to V is the difference in voltage between
IN
INH and INL scaled according to the RS pin configura-
tion. INH and INL have an allowable voltage range, V
.
Cꢁ
Figure 1 shows the allowable monitor voltage at V for
IN
each range as a function of comparator reference input
voltage (INL/INH).
Typically, an external resistive divider biased from REF is
used to generate the INH and INL pin voltages. A built-in
hysteresis feature requiring only two resistors can be
enabled on either the V rising edge by grounding INH
IN
or on the falling edge by grounding INL. For example, it
is appropriate to ground INH to activate rising edge hys-
teresis if an accurate falling voltage threshold is required
for undervoltage detection. Conversely, it is appropriate
to ground INL for falling edge built-in hysteresis if an ac-
curate overvoltage threshold is required. Do not ground
A built-in buffered reference gives the monitor flexibil-
ity to operate independently from a high voltage supply
without the requirement of additional low voltage biasing.
The reference provides an accurate voltage from which
a resistive divider to ground configures the threshold
voltage for the internal comparator. In addition, the REF
pin can be used as a logic high voltage for the range and
polarity select pins.
both INH and INL. ꢂscillation occurs if V > V unless
INL
INH
INH built-in hysteresis is enabled.
The high voltage ꢂUT pins have the capability to be pulled
up to a user defined voltage as high as 100V with an
external resistor. The LTC2965 also includes an internal
500k pull-up resistor to an internal voltage between 3.5V
The input voltage threshold at V is determined by the
IN
voltage on the INH and INL pins which are scaled by the
internal resistive divider. The LTC2965 offers two range
settings to select from, 10x and 40x, using the RS pin.
Use Table 1 to determine the correct configuration for
a desired range setting. The polarity select pin, (PS),
configures the ꢂUT pin to be inverting or noninverting
and 5V depending on input voltage. (See V in Electrical
ꢂH
Characteristics).
If the V pin falls below the UVLꢂ threshold then the ꢂUT
IN
pin is pulled low regardless of the PS pin state.
with respect to V allowing the part to be configured for
IN
monitoring overvoltage and undervoltage conditions with
100
either polarity output.
40x
Table 1.
V
MONITOR RANGE
3.5V to 24.5V
14V to 98V
RANGE SELECTION
RS
L
10x
IN
10x
40x
10
H
The INH pin determines the high or rising edge threshold
for V . If the monitored voltage connected to V rises
IN
IN
1
to the scaled INH voltage then the ꢂUT pin is pulled high
0.5
1
1.5
2
2.5
assuming PS is ground. Likewise, the INL pin determines
COMPARATOR REFERENCE INPUT (INL, INH) (V)
2965 F01
the low or falling edge threshold for V in each channel.
IN
Figure 1. Monitor Threshold
vs Comparator Reference Inputs
If V falls to the scaled INL voltage then the ꢂUT pin is
IN
2965fc
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LTC2965
APPLICATIONS INFORMATION
Threshold Configuration
Theclosest1ꢀvalueis909kΩ.R2canbedeterminedfrom:
The LTC2965 channel monitors the voltage applied to the
V
INH •RSUꢁ
(
)
–R1
R2=
V input. A comparator senses the V pin on one of its
IN
IN
VREF
inputs through the internal resistive divider. The other
input is connected to INH/INL that is in turn biased with
external resistive dividers off of the REF pin as shown in
2V •1.2ꢁΩ
2.402V
(
)
=
–909kΩ=90.2kΩ
Figure 2a and 2b. The V rising and falling thresholds
IN
The closest 1ꢀ value is 90.9kΩ. R3 can be determined
are determined by:
from R
:
SUꢁ
V
V
= RANGE • V
= RANGE • V
IN(RISE)
IN(FALL)
INH
R3 = R
– R1 – R2 = 1.2ꢁΩ – 909kΩ – 90.9kΩ
SUꢁ
= 200.1kΩ
INL
Where RANGE is the configured range of the internal
resistive divider. In order to set the threshold for the
LTC2965, choose an appropriate range setting for the
The closest 1ꢀ value is 200kΩ. Plugging the standard
values back into the equations yields the design values
for the V and V voltages:
INH
INL
desired V voltage threshold such that the INH and INL
IN
V
INH
= 2.002V, V = 1.819V
INL
voltages are within the specified common mode range,
V
. For example, if a falling threshold of 18V is desired
The corresponding threshold voltages are:
= 20.01V, V = 18.19V
Cꢁ
for monitoring a 24V power supply then a range greater
than 10x is allowed. However, to maximize the accuracy
V
IN(RISE)
IN(FALL)
Another possible way to configure the thresholds is with
independent dividers using two resistors per threshold to
set thevoltages on INHand INL. See Figure 2b. Care must
be taken such that the thresholds are not set too close to
each other, otherwise the mismatch of the resistors may
cause the voltage at INL to be greater than the voltage at
INH which may cause the comparator to oscillate.
of the V threshold the smallest acceptable range is used,
IN
10x in this case. To implement 2V of hysteresis referred
to V this means:
IN
V
INH
= 2V, V = 1.8V
INL
With 10x range the V thresholds are:
IN
V
= 20V, V
= 18V
IN(RISE)
IN(FALL)
As in the previous example, if R
= 1.2ꢁΩ is chosen
SUꢁ
ꢂne possible way to configure the thresholds is by us-
ing three resistors to set the voltages on INH and INL.
See Figure 2a. The solution for R1, R2 and R3 provides
three equations and three unknowns. ꢁaximum resistor
size is governed by maximum input leakage current. The
maximum input leakage current below 85°C is 1nA. For
a maximum error of 1ꢀ due to both input currents, the
resistive divider current should be at least 100 times the
sum of the leakage currents, or 0.2µA.
and the target for V is 1.8V:
INL
RSUꢁ =R1+R2
V
INL •RSUꢁ
1.8V •1.2ꢁΩ
(
)
(
)
=899.5kΩ
R1=
=
VREF
2.402V
The closest 1ꢀ value is 909kΩ. R2 can be determined by:
R1
R2= V – V
•
(
)
V
REF
INL
Ifinthisexample,aleakagecurrenterrorof0.1ꢀisdesired
then the total divider resistance is 1.2ꢁΩ which results in
INL
909kΩ
1.8V
(
)
=304kΩ
= 2.402V –1.8V •
(
)
a current of 2µA through this network. For R
= 1.2ꢁΩ
SUꢁ
RSUꢁ =R1+R2+R3
V
INL •RSUꢁ
1.8V •1.2ꢁΩ
(
)
(
)
=899.5kΩ
R1=
=
VREF
2.402V
2965fc
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LTC2965
APPLICATIONS INFORMATION
The closest 1ꢀ value is 301kΩ. Plugging the standard
Using built-in hysteresis, the V thresholds are:
INA
values back into the equation for V yields the design
INL
V
V
= RANGE • (INL + V
)
IN(RISE)
IN(FALL)
HYS
voltage for V
:
INL
= RANGE • INL
R1•V
R1+R2
909kΩ•2.402V
301kΩ+909kΩ
(
) (
)
=1.804V
REF
V
=
=
Figure 3b introduces built-in hysteresis on the falling edge
because INL is pulled to ground. Similarly, a two-resistor
network,R3andR4,isusedtosetthevoltageonINHusing:
INL
At this point in the independent divider example only the
values required to set the voltage at INL have been found.
Repeat the process for the INH input by substituting the
R4 V
R3 V
REF
=
–1
INH
above equations with V for V , R3 for R1, R4 for R2
INH
INL
and V = 2.0V.
Using built-in hysteresis the V thresholds are:
INH
IN
V
V
= RANGE • INH
IN(RISE)
IN(FALL)
V
V
V
IN
IN
IN
= RANGE • (INH – V
)
HYS
V
IN
REF
INH
INL
OUT
RS
REF
INH
INL
OUT
RS
Consider V = 2V with built-in hysteresis activated on
LTC2965
GND
LTC2965
INH
R3
R2
R1
R2
R4
R3
the falling edge. For 10x range, 1.1ꢀ falling hysteresis is
PS
PS
obtained.Ifalargerpercentageofhysteresisisdesiredthen
V
is alternatively set to 0.5V and the range is selected
INH
GND
to be 40x to obtain the same V threshold but with 4.4ꢀ
IN
R1
falling hysteresis. The amount of built-in hysteresis is
scaled according to Table 2. If more hysteresis is needed
then it is implemented in the external resistive divider as
described in the Threshold Configuration section.
2965 F02ab
Figure 2a. Three-Resistor
Threshold Configuration
Figure 2b.Two-Resistor
Threshold Configuration
V
V
IN
IN
Using Built-In Hysteresis
V
V
IN
IN
TheLTC2965hasthecapabilityofsimplifyingthethreshold
configuration such that only two resistors are required.
The device pins can be configured to select a built-in hys-
REF
OUT
REF
OUT
LTC2965
LTC2965
R2
R1
R4
R3
INH
INL
INH
INL
RS
PS
RS
PS
teresis voltage, V , which can be applied to either the
HYS
rising or falling threshold depending on whether the INH
or INL pin is grounded. Note that the hysteresis voltage
at each range setting remains at a fixed value. Figure 3
introduces examples of each configuration. For example,
if INH is biased from an external divider and the INL pin is
grounded, then hysteresis is enabled on the low or falling
GND
GND
2965 F03ab
Figure 3a. Rising Edge
Built-In Hysteresis
Figure 3b. Falling Edge
Built-In Hysteresis
Table 2. Built-In Hysteresis Voltage vs Range
threshold. The low threshold is then –V
relative to the
HYS
RANGE
10x
V
REFERRED BUILT-IN HYSTERESIS
IN
high threshold determined by INH. Figure 3a introduces
built-inhysteresisontherisingedgebecauseINHispulled
to ground. A two-resistor network, R1 and R2, is used to
set the voltage on INL using:
220mV
880mV
40x
R2 V
R1 V
REF
=
–1
INL
2965fc
9
For more information www.linear.com/LTC2965
LTC2965
APPLICATIONS INFORMATION
Error Analysis
The actual V falling threshold has an error tolerance of
IN
216mV or 1.2ꢀ.
V thresholds are subject to the following errors:
IN
• REF Voltage Variation (∆V
)
Improving Threshold Accuracy
The biggest threshold error terms are:
• External Resistive Divider Accuracy
• REF Voltage Variation
REF
• Comparator ꢂffset (V )
ꢂS
• Internal Divider Range Error (A
)
VERR
• External Resistive Divider Error (A
)
XERR
The effect these errors have on the V threshold is
IN
Evenusing1ꢀtoleranceresistors,externalresistivedivider
accuracystillaccountsforasmuchas 2ꢀthresholderror
while REF voltage variation accounts for 1ꢀ threshold
error. In order to minimize these threshold error terms,
an external reference can be used to set the thresholds for
INH/INL as shown in Figure 4. An LT6656-2.048 has an
initial accuracy of 0.05ꢀ and provides bias via the 0.1ꢀ
resistive divider network for INH and INL. It is biased off
of the LTC2965 REF pin. The threshold error tolerance
is calculated using the method described in the Typical
expressed by:
V
INH(L)
VERR =RANGE• VꢂS ∆VREF
•
VINH(L) •A
XERR
VREF
RANGE•AVERR •V
INH(L)
V
TꢂLERANCE
100
AXERR =2•
• 1–
INH(L)
VREF
Externaldividererrorisdeterminedbythepercentagetoler-
ance values of the resistors. If 1ꢀ tolerance resistors are
used in the external divider then there is a 2ꢀ worst-case
voltage error associated with it. The effects of comparator
Applications section with ∆V
= 1.024mV given the
REF
initial accuracy of the LT6656 2.048V output and using
0.1ꢀ tolerance resistors for the external divider.
offset and V voltage are uncorrelated with each other.
REF
Therefore, a Root-Sum-Square can be applied to the error
V
INL
VERR(REF) = RANGE ∆VREF
•
(
)
voltage referred to V . Using the example from Threshold
IN
V
REF
Configuration and assuming 1ꢀ resistors implement the
1.8V
2.048V
external resistive divider, the falling V threshold of ap-
= 10 • 1.024mV •
= 9mV
IN
( )
proximately 18V has an error tolerance of:
V
VREF
INL
V
VERR(EXT) = RANGE V •2•0.001• 1–
INL
(
)
INL
VERR(REF) = RANGE ∆VREF
•
(
)
V
REF
= 10 • 1.8V •0.0005 = 9mV
( ) (
)
1.8V
2.402V
= 10 • 24mV •
= 180mV
( )
VERR(VꢂS) = RANGE ∆VꢂS = 10 • 3mV = 30mV
(
)
)
(
(
)
( ) (
)
V
VREF
VERR(RS) = RANGE AVERR
V
(
)(
)
INL
INL
VERR(EXT) = RANGE V •2•0.01• 1–
(
)
INL
= 10 • 0.004 • 1.8V = 72mV
( ) ( ) (
)
= 10 • 1.8V •0.005 = 90mV
( ) (
VERR(VꢂS) = RANGE ∆VꢂS = 10 • 3mV = 30mV
)
VERR = VE2RR(REF) +VE2RR(EXT) +VE2RR(VꢂS) +VE2RR(RS)
(
)
(
)
( ) (
)
2
2
2
2
=
9mV + 9mV + 30mV + 72mV
(
)
(
)
(
)
(
)
VERR(RS) = RANGE AVERR
V
(
)
(
)(
)
INL
= 79mV
= 10 • 0.004 • 1.8V = 72mV
( ) ( ) (
VERR = VE2RR(REF) +VE2RR(EXT) +VE2RR(VꢂS) +VE2RR(RS)
)
The resulting V threshold error is reduced to 0.44ꢀ
IN
from 1.2ꢀ in the previous error analysis example.
2
2
2
2
=
180mV + 90mV + 30mV + 72mV
(
)
(
)
(
)
(
)
= 216mV
2965fc
10
For more information www.linear.com/LTC2965
LTC2965
APPLICATIONS INFORMATION
V
connected to the input resonant ringing can occur as a
result of series inductance. The peak voltage could rise
to 2x the input supply, but in practice can reach 2.5x if
a capacitor with a strong voltage coefficient is present.
Circuit board trace inductances of as little as 10nH can
produce significant ringing. Ringing beyond the absolute
maximum specification can be destructive to the part and
shouldbeavoidedwheneverpossible.ꢂneeffectivemeans
IN
R4
10k
LT6656-2.048
OUT IN
V
IN
REF
R3
47.5k
0.1%
GND
1µF
LTC2965
INH
R2
200k
0.1%
INL
GND
R1
1.8M
0.1%
to eliminate ringing seen at the V pins and to protect the
IN
2965 F04
part is to include a 1kΩ to 5kΩ resistance between the
monitored voltage and the V pin as shown in Figure 5.
Figure 4. Reducing VIN Threshold Error
IN
This provides damping for the resonant circuit. If there is
a decoupling capacitor on the V pins the time constant
IN
Output Configuration with Polarity Selection
formed by the RC network should be considered.
TheꢂUTpinmaybeusedwithawiderangeofuser-defined
voltages up to 100V with an external resistor. Select a
resistor compatible with desired output rise time and load
current specifications. When the status outputs are low,
power is dissipated in the pull-up resistors. An internal
pull-up is present if the ꢂUT pins are left floating or if
low power consumption is required. The internal pull-up
resistor does not draw current if an external resistor pulls
V
IN
R
1k
S
V
/V
INA INB
LTC2965
GND
ꢂUT up to a voltage greater than V .
ꢂH
2965 F05
If PS is connected to ground, the comparator output is
Figure 5. Hot Swap Protection
noninverting. This means that ꢂUT pulls low when V
IN
falls below the scaled INL voltages. ꢂUT is released after
V rises above the scaled INH voltage. Likewise, if PS is
IN
High Voltage Pin Creepage/Clearance Options
connected up to REF or a voltage > V , the comparator
TH
Appropriate spacing between component lead traces is
critical to avoid flashover between conductors. There
are multiple industry and safety standards that have
differentspacingrequirementsdependingonfactorssuch
asoperatingvoltage,presenceofconformalcoat,elevation,
etc. The LTC2965 is available in a 16-lead ꢁSꢂP package
whichofferslandingclearanceofatleast0.79mm(0.031in).
The package incorporates unconnected pins between all
adjacent high voltage and low voltage pins to maximize
PC board trace clearance. For voltages >30V the ꢁSꢂP
should be used, otherwise the smaller or DFN is sufficient
whenclearanceisnotanissue.Formoreinformation,refer
to the printed circuit board design standards described in
IPC2221 and UL60950.
output is inverting. This means that ꢂUT pulls low when
V
rises above the scaled INH voltage and is released
IN
when V falls below the scaled INL voltage.
IN
If the V pin falls below the UVLꢂ threshold minus
IN
hysteresis, the output is pulled to ground. The output is
guaranteed to stay low for V ≥ 1.25V regardless of the
IN
output logic configuration.
It is recommended that circuit board traces associated
with the ꢂUT pin be located on a different layer than those
associated with the INH/INL and REF pins where possible
to avoid capacitive coupling.
Hot Swap Events
The LTC2965 can withstand high voltage transients up
to 140V. However, when a supply voltage is abruptly
2965fc
11
For more information www.linear.com/LTC2965
LTC2965
APPLICATIONS INFORMATION
Voltage Reference
1nF
The REF pin is a buffered reference with a voltage of V
10nF + 4.3kΩ
0.1µF + 1.5kΩ
1µF + 600Ω
REF
referenced to GND. A bypass capacitor up to 1000pF
in value can be driven by the REF pin directly. Larger
capacitances require a series resistance to dampen the
transient response as shown in Figure 6A. If a resistive
divider is already present then the bypass capacitor can
be connected to the INH or INL pin as shown in Figure 6B.
Figure 6C shows the resistor value required for different
capacitorvaluestoachievecriticaldamping.Bypassingthe
reference can help prevent false tripping of the compara-
tors by preventing glitches on the INH/INL pins. Figure 7
shows the reference load transient response. Figure 8
shows the reference line transient response. If there is a
decoupling capacitor on the INH/INL pin the time constant
formed by the RC network should be considered. Use a
capacitor with a compatible voltage rating.
V
REF
2.4V
50mV/DIV
LOAD CURRENT
100µA
10µA
2965 F07
100µs/DIV
Figure 7. VREF Load Transient
1nF
1µF + 600Ω
V
REF
2.4V
REF
INH
INL
REF
INH
INL
10mV/DIV
LTC2965
GND
LTC2965
R
S
8V
1V/DIV
3.5V
R
S
V
IN
C
C
REF
REF
GND
2965 F06ab
2965 F08
6a
6b
10µs/DIV
100
Figure 8. VREF Line Transient
10
1
0.1
0.001
0.01
0.1
1
CAPACITANCE VALUE (µF)
2965 F06c
6c
Figure 6. Using Series Resistance to Dampen REF
Transient Response
2965fc
12
For more information www.linear.com/LTC2965
LTC2965
TYPICAL APPLICATIONS
Negative Voltage Monitor with Output Level Shift
Current Sink/Source
Figure 9 illustrates an LTC2965 configured to monitor a
–15V supply with a level-shifted output to a 5V supply. Q1
buffers the digital input of the 5V system from the –15V
supply and prevents UV from going below GND. The
ꢂUT pin drives the base of Q1 through a resistor network
comprised of R3 and R4. Keep R4/R3 ≥0.4 to ensure
there is proper base current to pull UV to ground. If an
exposed pad is present it should be tied to the LTC2965
GND pin or left open.
The LTC2965 can be used as a high voltage current source
or a current sink as shown in Figure 10. The current is
determined by placing a resistive load, R , on the REF
SET
pin. The total current is then V /R + I because the
REF SET
VA
bias current of the part adds a small error term. Part of
the bias current is the internal resistive divider which is
approximately 78ꢁΩ with the RS pin configured to 10x.
5V
–15V MONITOR WITH LEVEL SHIFT
R4
R5
DIGITAL
INPUT
RISING THRESHOLD
FALLING THRESHOLD
HYSTERESIS
–14.5V
–14.2V
–0.3V
10X
510k 200k
UV
RANGE SETTING
Q1
MMBT2907
FAIRCHILD
V
IN
R3
1M
REF
LTC2965
OUT
INH
INL
R2
976k
R1
1.43M
PS RS GND
–15V
2965 F09
Figure 9. Negative Voltage Monitor with Output Level Shift to a 5V Digital Input
Current Sink
Current Source
I
= V /R
I
= V /R
SET
REF SET
SET
REF SET
V
IN
I
= 1mA
OPEN
LOAD
SINK
V
V
IN
V
IN
IN
REF
REF
INH
INL
LTC2965
LTC2965
INH
INL
OUT
OUT
OPEN
R
SET
2.4k
R
SET
2.4k
PS RS GND
PS RS GND
I
= (V /R ) – I
REF SET
LOAD
I
= 1mA
ERROR
SUPPLY
SRC
2965 F10
Figure 10. LTC2965 Configured as High Voltage Current Source
2965fc
13
For more information www.linear.com/LTC2965
LTC2965
TYPICAL APPLICATIONS
Configure the current to be no greater than 1mA to ensure
that the REF voltage stays within 1ꢀ tolerance. Current
values larger than 1mA exceed the REF buffer’s load
regulation capability and cause the REF voltage to drop
out of regulation.
lower float limit of 13.7V Q1 turns off and the solar panel
current passes through to the battery and load. ꢂnce
the battery voltage rises to the upper charging limit of
14.7V, Q1 turns on shorting the solar panel to ground
with D1 isolating the battery from the shunt path. The
upper and lower thresholds are generated from the on-
chip reference as a separate external divider to set INH
and INL and scaled by 10x. The charging thresholds are
temperature compensated by an NTC thermistor over a
0°C to 50°C range.
Shunt Mode Hysteretic Regulator
Figure 11 shows the LTC2965 used as the controller for a
shuntmodehystereticregulatortomanageabattery-based
solar power system. When the battery voltage reaches a
2965fc
14
For more information www.linear.com/LTC2965
LTC2965
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTC2965#packaging for the most recent package drawings.
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
0.70 ±0.05
3.5 ±0.05
2.10 ±0.05 (2 SIDES)
1.65 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50
BSC
2.38 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.125
0.40 ±0.10
TYP
5
8
3.00 ±0.10
(4 SIDES)
1.65 ±0.10
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
(DD8) DFN 0509 REV C
4
1
0.25 ±0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.38 ±0.10
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
2965fc
15
For more information www.linear.com/LTC2965
LTC2965
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTC2965#packaging for the most recent package drawings.
MS Package
16-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1669 Rev A)
0.889 ±0.127
(.035 ±.005)
5.10
3.20 – 3.45
(.201)
(.126 – .136)
MIN
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
0.50
(.0197)
BSC
0.305 ±0.038
(.0120 ±.0015)
TYP
0.280 ±0.076
(.011 ±.003)
REF
16151413121110
9
RECOMMENDED SOLDER PAD LAYOUT
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
DETAIL “A”
0.254
4.90 ±0.152
(.193 ±.006)
(.010)
0° – 6° TYP
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
1 2 3 4 5 6 7 8
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
MSOP (MS16) 0213 REV A
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
2965fc
16
For more information www.linear.com/LTC2965
LTC2965
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
09/15 Fixed typos
3, 4, 10 – 12
B
03/16 Added Absolute ꢁaximum Rating for INH and INL Pins
08/17 Corrected example error threshold calculations
2
C
10
2965fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
17
LTC2965
TYPICAL APPLICATION
D1
B130**
100mA MAXIMUM
24 HOUR AVERAGE
LOAD CURRENT
25V
100µF
FUSE
2A
1A
SOLAR
PANEL
LC-P127R2P***
(12V, 7.2Ah)
1M
V
IN
REF
INH
Q1
BUK7640-100A*
46.4k
6.81k
95.3k
LTC2965
OUT
150k
47nF
INL
NTC****
100k
GND RS PS
*NXP
**DIODES INC
***PANASONIC
****MURATA NCP18WF104JO3RB
2965 F11
Figure 11. Shunt Mode Hysteretic Regulator
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PART NUMBER
DESCRIPTION
COMMENTS
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CC
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Separate V Pin, Eight Inputs, Up to Two Negative ꢁonitors
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Adjustable Reset Timer, 16-Lead SSꢂP and DFN Packages
LTC2912/LTC2913/ Single/Dual/Quad UV and ꢂV Voltage ꢁonitors
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LTC2915/LTC2916 Single Voltage Supervisors with 27 Pin-Selectable Thresholds
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ꢁanual Reset and Watchdog Functions, 8- and 10-Lead
TSꢂT-23, ꢁSꢂP and DFN Packages
LTC2966
LTC2960
LT6700
100V ꢁicropower Dual Voltage ꢁonitor
1.75V to 98V ꢁonitoring Range, 3.5V to 100V ꢂperating Range,
7µA Quiescent Current
36V Nano-Current Two Input Voltage ꢁonitor
ꢁicropower Dual Comparator with 400mV Reference
36V, 850nA Quiescent Current, 2mm × 2mm 8-Lead DFN and
TSꢂT-23 Packages
SꢂT-23, 2mm × 3mm DFN Package
2965fc
LT 0817 REV C • PRINTED IN USA
www.linear.com/LTC2965
18
LINEAR TECHNOLOGY CORPORATION 2015
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SI9137LG
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SI9122E
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