LTC2966HUD#PBF_技术文档

LTC2966

100V Micropower Dual

Voltage Monitor

FEATURES

DESCRIPTION

The LTC^®2966 is a low current, high voltage dual channel

voltage monitor. Internal high value resistors sense the

input monitor pins providing a compact and low power

solution for voltage monitoring. Each channel includes

two comparator reference inputs (INH/INL) to allow con-

figuration of a high and low threshold using an external

resistive divider biased from the on-chip reference. Range

selection pins are provided for each channel to set the

internal resistive dividers for 5x, 10x, 20x and 40x scaling.

Thethresholdsarescaledaccordingtotherangeselection

settings. Additionally, either INH or INL can be grounded

to enable built-in hysteresis. Polarity selection pins allow

each output to be inverted. The outputs are 100V capable

and include a 500k pull-up resistor to an internal supply.

n

Wide Operating Range: 3.5V to 100V

n

Wide Monitoring Range: 1.75V to 98V

n

Quiescent Current: 7µA

Adjustable Threshold Range

Internal High Value Resistive Dividers

n

1.4ꢀ (ꢁax) Threshold Accuracy ꢂver Temperature

n

Polarity Selection

100V Rated ꢂutputs

Selectable Built-In Hysteresis

20-Lead SW and 16-Lead 3mm × 3mm QFN

Packages

n

APPLICATIONS

n

Portable Equipment

L, LT, LTC, LTꢁ, Linear Technology and the Linear logo are registered trademarks of Analog

Devices, Inc. All other trademarks are the property of their respective owners.

n

Battery-Powered Equipment

n

Telecom Systems

Automotive/Industrial Electronics

n

TYPICAL APPLICATION

Dual Undervoltage Monitor

RANGE

V

IN

MONITOR RANGE SELECTION

48V

24V

5V

1.75V* to 12.25V

5x

3.5V to 24.5V

7V to 49V

10x

20x

40x

V

INA

V

INB

REF

100k

200k

91k

48V UNDERVOLTAGE

INHA

OUTA

OUTB

14V to 98V

THRESHOLD

CONFIGURATION

5V

SYS

LTC2966

*Requires either V or V > 3.5V

INA

INB

INLA

INHB

24V UNDERVOLTAGE

909k

Supply Current vs V_INA(B)

INLB

12

10

PSA RS1A RS2A PSB RS1B RS2B GND

8

6

POLARITY AND RANGE SELECTION

CHANNEL

4

2

0

A

B

RANGE = 40x

–45°C

40.03V 20.0V

36.4V 18.2V

3.6V

20x

RISING THRESHOLD

FALLING THRESHOLD

HYSTERESIS

OUTA(B) = LOW

25°C

90°C

125°C

1.8V

10x

V

I

= GND

INB(A)

= 0µA

RANGE

2966 TA01a

REF

0

20

40

V

60

(V)

80

100

INA

2966 TA01b

2966fc

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For more information www.linear.com/LTC2966

LTC2966

ABSOLUTE MAXIMUM RATINGS ^{(Notes 1, 2)}

Input Voltages

ꢂperating Ambient Temperature Range

V

, V ............................................ –0.3V to 140V

LTC2966C................................................ 0°C to 70°C

LTC2966I.............................................–40°C to 85°C

LTC2966H.......................................... –40°C to 125°C

Storage Temperature Range .................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec)...................300°C

INA INB

PSA, PSB, RS1A, RS1B, RS2A, RS2B...... –0.3V to 6V

INHA, INHB, INLA, INLB .......................... –0.3V to 6V

ꢂutput Voltages

ꢂUTA, ꢂUTB ........................................ –0.3V to 140V

Average Currents

V

, V ........................................................–20mA

INA INB

ꢂUTA, ꢂUTB ...................................................... 5mA

REF .................................................................... 5mA

INHA, INHB, INLA, INLB ....................................–1mA

PIN CONFIGURATION

TOP VIEW

V

1

2

3

4

5

6

7

8

9

20

V

INB

INA

NC

19 NC

16 15 14 13

OUTA

NC

18 OUTB

17 NC

REF

INHA

INLA

RS1A

1

2

3

4

12 GND

11 INHB

17

GND

REF

16 GND

15 INHB

14 INLB

13 RS1B

12 RS2B

11 PSB

INLB

10

9

INHA

INLA

RS1A

RS2A

RS1B

5

6

7

8

UD PACKAGE

16-LEAD (3mm × 3mm) PLASTIC QFN

PSA 10

SW PACKAGE

20-LEAD PLASTIC SO

T

= 150°C, θ = 68°C/W

JA

JꢁAX

EXPꢂSED PAD (PIN 17) PCB GND CꢂNNECTIꢂN ꢂPTIꢂNAL

T

JꢁAX

= 150°C, θ = 35°C/W

JA

ORDER INFORMATION

LEAD FREE FINISH

http://www.linear.com/product/LTC2966#orderinfo

TUBE

TAPE AND REEL

PART MARKING*

LGꢁG

PACKAGE DESCRIPTION

TEMPERATURE RANGE

0°C to 70°C

LTC2966CUD#PBF

LTC2966IUD#PBF

LTC2966HUD#PBF

LTC2966CSW#PBF

LTC2966ISW#PBF

LTC2966HSW#PBF

LTC2966CUD#TRPBF

LTC2966IUD#TRPBF

LTC2966HUD#TRPBF

LTC2966CSW#TRPBF

LTC2966ISW#TRPBF

LTC2966HSW#TRPBF

16-Lead (3mm × 3mm) Plastic QFN

LGꢁG

–40°C to 85°C

LGꢁG

–40°C to 125°C

LTC2966SW

20-Lead Plastic Small ꢂutline (Wide .300 Inch) 0°C to 70°C

20-Lead Plastic Small ꢂutline (Wide .300 Inch) –40°C to 85°C

20-Lead Plastic Small ꢂutline (Wide .300 Inch) –40°C to 125°C

Consult LTC ꢁarketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

Consult LTC ꢁarketing for information on nonstandard lead based finish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through

designated sales channels with #TRꢁPBF suffix.

2966fc

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For more information www.linear.com/LTC2966

LTC2966

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_INA= V_INB= 12V, RS1/RS2 = GND, PS = GND,

INH = 1.2V, INL = GND (Notes 1, 2).

SYMBOL

PARAMETER

CONDITIONS

or V

MIN

3.5

1.75

3

TYP

MAX

100

98

UNITS

l

V

Input Supply ꢂperating Range

V

IN

INA

INB

V

ꢁonitor Range

(Note 3)

ꢁꢂN

IN

l

I

VA

Input Supply Current

V

= 100V, V = GND, 40x

= GND, V = 100V, 40x

7

15

50

µA

nA

INA

INB

l

I

VB

V

Input Supply Current

V

= 100V, V = GND, 40x

3

7

2

15

50

4

µA

nA

µA

INB

INA

= GND, V = 100V, 40x

INA

= 100V, V = 5V, 40x

INA

l

V

UVLꢂ

Undervoltage Lockout

V

or V Rising

3

V

INA

INB

Undervoltage Lockout Hysteresis

and V Falling

70

mV

INB

Comparator Reference Input: INHA, INHB, INLA, INLB

l

V

Comparator Common ꢁode Voltage

0.35

2.45

V

Cꢁ

l

V

Error Voltage at 96V

Error Voltage at 48V

Error Voltage at 24V

Error Voltage at 12V

INH = V , 40x

250

1360

400

mV

ERR

IN

REF

0.35V ≤ INH ≤ 2.4V, 40x

l

INH = V , 20x

100

630

150

mV

REF

0.35V ≤ INH ≤ 2.4V, 20x

l

INH = V , 10x

35

315

75

mV

REF

0.35V ≤ INH ≤ 2.4V, 10x

l

INH = V , 5x

15

155

35

mV

REF

0.35V ≤ INH ≤ 2.4V, 5x

l

V

Comparator ꢂffset Voltage

INH = 0.35V, 10x

1.9

3

mV

ꢀ

ꢂS

AV

Internal Resistive Divider Range Error

Comparator Built-in Hysteresis

INH = 2.4V, Range = 5x, 10x, 20x, 40x

0.4

ERR

l

V

INH = GND, INL Rising

INL = GND, INH Falling

14

–30

22

–22

30

–14

mV

HYS

l

V

Built-in Hysteresis Enable Threshold

100

175

80

mV

µs

HYTH

t

I

V

to ꢂUT Comparator Propagation Delay

IN

ꢂverdrive = 10ꢀ, ꢂUT Falling, 10x

INH = GND, INL = 1.2V

40

PD

l

Input Leakage Current (INH, INL)

V = 1.2V, I-Grade

V = 1.2V, H-Grade

0.1

1

10

nA

IN(LKG)

Reference: REF

l

V

Reference ꢂutput Voltage

Reference ꢂutput Noise

I

≤ 100µA, V ≥ 3.5V

2.378 2.402 2.426

140

V

REF

IN

Noise

100Hz to 100kHz

µV

RꢁS

Control Inputs: RS1A, RS2A, RS1B, RS2B, PSA, PSB

l

V

Select Input Threshold

Input Leakage Current

0.4

1.4

V

TH

I

V = 2.4V

100

nA

LKG

Status Outputs: OUTA, OUTB

l

V

ꢂL

Voltage ꢂutput Low

V

IN

V

IN

= 1.25V, I = 10µA

= 3.5V, I = 500µA

100

400

mV

l

V

ꢂH

Voltage ꢂutput High

V

IN

V

IN

= 3.5V, I = –1µA

≥ 4.5V, I = –1µA

2

2.5

2.375

3

2.75

4

V

l

I

ꢂutput Current High

V = GND, V = 3.5V

–15

–7.5

–5

µA

nA

ꢂH

ꢂ(LKG)

IN

Leakage Current, ꢂutput High

V = 100V, V = 6V

250

IN

Note 1: Stresses beyond those listed under Absolute ꢁaximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

ꢁaximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All currents into pins are positive; all voltages are referenced to

GND unless otherwise noted.

Note 3: Requires either V or V >3.5V.

INA

INB

2966fc

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For more information www.linear.com/LTC2966

LTC2966

TYPICAL PERFORMANCE CHARACTERISTICS

Supply Current vs V_INA(B)

V_INBPin Current vs V_INB

V_REFvs Temperature

12

10

2.5

2.0

1.5

1.0

0.5

0

2.412

2.408

2.404

2.400

2.396

2.392

2.388

RANGE = 40x

OUTA(B) = LOW

I = –10µA

V

= 5V

= 0µA

INA

REF

I

8

6

4

2

0

RANGE = 40x

OUTA(B) = LOW

–45°C

25°C

–45°C

25°C

V

REF

= GND

90°C

INB(A)

I

= 0µA

125°C

0

20

40

V

60

(V)

80

100

0

20

60

(V)

80

100

–50 –25

40

V

0

25

50 75 100 125 150

TEMPERATURE (°C)

INA

INB

2966 G01

2966 G02

2966 G03

% Range Error vs Temperature

V_REFvs Load Current

V_REFvs V_INA(B)

2.450

2.425

2.400

2.375

2.350

2.450

2.425

2.400

2.375

2.350

0.4

0.2

0

V

= 3.5V

25°C

IN

–0.2

–45°C

25°C

90°C

125°C

5x

1µA

100µA

1mA

10x

20x

40x

–0.4

–50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

0

0.4

0.8

1.2

1.6

2.0

2.7

3.0

3.2

3.5

(V)

3.7

4.0

LOAD CURRENT (mA)

V

INA

2966 G06

2966 G04

2966 G05

V_INFalling Propagation Delay

vs % Overdrive

Built-In Hysteresis

vs Temperature

Comparator V_OSvs Temperature

125

100

75

50

25

0

28

26

24

22

20

18

16

1500

1000

500

V

= 1.2V

= GND

V

= 1.2V

V

= 1.2V

INL

INH

IN

INH(L)

= 12V

0

–500

–1000

–1500

–45°C

25°C

90°C

125°C

0.1

1

10

100

–50

0

50

100

150

75 100

–50 –25

0

25 50

125 150

% OVERDRIVE (%)

TEMPERATURE (°C)

2966 G08

2966 G09

2966 G07

2966fc

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LTC2966

TYPICAL PERFORMANCE CHARACTERISTICS

Voltage Output High vs Pull-Down

Current (OUTA/OUTB)

Voltage Output Low vs Pull-Up

Current (OUTA/OUTB)

Voltage Output High

vs Input Voltage

4

3

2

1

0

3.5

3.2

1.50

1.25

V

IN

= 12V

V

= 12V

I = –1µA

IN

2.9

2.6

1.00

0.75

2.3

2.0

1.7

0.50

0.25

0

–45°C

25°C

90°C

125°C

–45°C

25°C

90°C

125°C

–6

–9

0

–12

–3

3

4

5

6

7

8

0

1

2

3

4

5

V

(V)

PULL-DOWN CURRENT (µA)

PULL-UP CURRENT (mA)

IN

2966 G10

2966 G12

2966 G11

PIN FUNCTIONS

Exposed Pad (UD16 Only): Exposed pad may be left float-

scaled according to the RS pin configuration. ꢂtherwise,

INHA-INLA sets the hysteresis of the Channel A compara-

tor. ꢂscillation will occur if INLA > INHA unless built-in

hysteresis is enabled.

ing or connected to device ground.

GND: Device Ground.

INHA:ChannelAHighComparatorReferenceInput.Voltage

INLB:ChannelBLowComparatorReferenceInput.Voltage

on this pin is multiplied by the configured range setting

to set the V high or rising threshold. Keep within valid

INA

to set the V low or falling threshold. Keep within valid

INB

voltage range, V , or tie to GND to configure built-in

Cꢁ

voltage range, V , or tie to GND to configure built-in

Cꢁ

hysteresis where high threshold for V becomes INLA

INA

hysteresis where low threshold becomes INHB – V

HYS

+ V

scaled according to the RS pin configuration.

HYS

scaled according to the RS pin configuration. ꢂtherwise,

INHB-INLB sets the hysteresis of the Channel B compara-

tor. ꢂscillation will occur if INLB > INHB unless built-in

hysteresis is enabled.

INHB:ChannelBHighComparatorReferenceInput.Voltage

on this pin is multiplied by the configured range setting

to set the V high or rising threshold. Keep within valid

INB

voltage range, V , or tie to GND to configure built-in

Cꢁ

OUTA: Channel A Comparator ꢂutput. ꢂUTA consists

of a high voltage active pull-down and a gated, resistive

(500kΩ)pull-uptoaninternallygeneratedsupplybetween

3.5V and 5V depending on input supply voltage. Blocking

circuitry at the pin allows the pin to be resistively pulled

up to voltages as high as 100V without back conducting

onto the internal supply of the part. Polarity with respect

hysteresis where high threshold for V becomes INLB

INB

+ V

scaled according to the RS pin configuration.

HYS

INLA:ChannelALowComparatorReferenceInput.Voltage

on this pin is multiplied by the configured range setting

to set the V low or falling threshold. Keep within valid

INA

voltage range, V , or tie to GND to configure built-in

Cꢁ

hysteresis where low threshold becomes INHA – V

to the V pin is configured using the polarity select pin,

HYS

INA

PSA. ꢂUTA pulls low when the part is in UVLꢂ.

2966fc

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LTC2966

PIN FUNCTIONS

OUTB: Channel B Comparator ꢂutput. ꢂUTB consists

of a high voltage active pull-down and a gated, resistive

(500kΩ)pull-uptoaninternallygeneratedsupplybetween

3.5V and 5V depending on input supply voltage. Blocking

circuitry at the pin allows the pin to be resistively pulled

up to voltages as high as 100V without back conducting

onto the internal supply of the part. Polarity with respect

REF: Reference ꢂutput. V with respect to GND. Use a

REF

maximumof1nFtobypassunlessdampingresistorisused.

RS1A-RS2A: Channel A Range Select Input. RS1A-RS2A

select 5x, 10x, 20x or 40x range for Channel A. Connect

to REF or GND to configure the pin. (See Table 1)

RS1B-RS2B: Channel B Range Select Input. RS1B-RS2B

select 5x, 10x, 20x or 40x range for Channel B. Connect

to REF or GND to configure the pin. (See Table 1)

to the V pin is configured using the polarity select pin,

INB

PSB. ꢂUTB pulls low when the part is in UVLꢂ.

V

, V :VoltageꢁonitorandSupplyInputs. Aninternal

PSA: Channel A Polarity Selection. Connect to REF or a

INA INB

high value resistive divider is connected to the pin. The

voltage >V to configure comparator output to be invert-

TH

greater of V and V is used to generate an internal

ing with respect to V . ꢂtherwise connect pin to GND

INA

INB

INA

voltage rail with priority given to V . If both V and

to configure comparator output to be noninverting with

INA

V

fall below the UVLꢂ threshold minus hysteresis, the

respect to V

.

INB

INA

outputs are pulled low. If V < V < 1.2V, the logic

INB

INA

PSB: Channel B Polarity Selection. Connect to REF or a

state of the outputs cannot be guaranteed.

voltage >V to configure comparator output to be invert-

TH

ing with respect to V . ꢂtherwise connect pin to GND

INB

to configure comparator output to be noninverting with

respect to V

.

INB

2966fc

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LTC2966

BLOCK DIAGRAM

V

INA

V

INB

V

REF

1X

V

IN

PRIORITIZER

GND

70M

V

INT

V

+

–

HYTH

INHA

INHB

– +

HYS

+

500k

V

INT

V

HYS

–

+–

OUTA

OUTB

INLA

INLB

–

+

V

PSA

HYTH

RS1A

5x/10x/20x/40x

RS2A

PSB

RS1B

RS2B

CHANNEL A

CHANNEL B

2966 BD

2966fc

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LTC2966

OPERATION

TheLTC2966isamicropowerdualchannelvoltagemonitor

with a 100V maximum operating voltage. Each channel is

comprised of an internal high value resistive divider and a

comparatorwithahighvoltageoutput.Areferencevoltage

is provided to allow the thresholds of each channel to be

set independently. This configuration has the advantage

of being able to monitor very high voltages with very little

current draw while threshold configuration is done using

low value resistors at low voltages.

Table 1.

V

MONITOR

RANGE

RS1

RS2

IN

SELECTION

1.75V* to 12.25V

3.5V to 24.5V

7V to 49V

5x

L

H

L

H

10x

20x

40x

14V to 98V

H

*Requires either V or V > 3.5V.

INA

INB

The INH pin determines the high or rising edge threshold

forV ineachchannel.Ifthemonitoredvoltageconnected

IN

The two channels of the LTC2966 provide independent

monitoring capabilities for multiple voltages or work in

conjunctiontosetupanundervoltage/overvoltagemonitor.

Integration of a resistive divider for high voltage sensing

makes the LTC2966 a compact and low power solution for

generating voltage status signals to a monitoring system.

to V rises to the scaled INHA voltage then the ꢂUT pin

INA

is pulled high assuming PSA is ground. Likewise, the INL

pin determines the low or falling edge threshold for V in

IN

each channel. If V falls to the scaled INLA voltage then

INA

the ꢂUT pin is pulled low assuming PSA is ground. The

amount of hysteresis referred to V is the difference in

IN

A built-in buffered reference gives the monitor flexibility to

operate independently from a high voltage supply without

therequirementofadditionallowvoltagebiasing.Therefer-

ence provides an accurate voltage from which a resistive

divider to ground configures the threshold voltage for the

internal comparators. In addition, the REF pin can be used

asalogichighvoltagefortherangeandpolarityselectpins.

voltage between INH and INL scaled according to the RS

pin configuration. INH and INL have an allowable voltage

range, V . Figure 1 shows the allowable monitor voltage

Cꢁ

atV foreachrangeasafunctionofcomparatorreference

IN

input voltage (INL, INH).

Typically, an external resistive divider biased from REF is

used to generate the INH and INL pin voltages. A built-in

hysteresis feature requiring only two resistors can be

The input voltage threshold at V is determined by the

IN

voltage on the INH and INL pins which are scaled by the

attenuation internal resistive divider. In the LTC2966 the

attenuation of the internal divider is configured using two

range select pins, RS1 and RS2 to select 5x, 10x, 20x or

40x for each channel. Use Table 1 to determine the correct

configurationforadesiredrangesetting.Thepolarityselect

pins, (PSA/PSB), configure the corresponding ꢂUT pin to

enabled on either the V rising edge by grounding INH

IN

or on the falling edge by grounding INL. For example, it

is appropriate to ground INH to activate rising edge hys-

teresis if an accurate falling voltage threshold is required

for undervoltage detection. Conversely, it is appropriate

to ground INL for falling edge built-in hysteresis if an ac-

curate overvoltage threshold is required. Do not ground

be inverting or noninverting with respect to V allowing

IN

both INH and INL. ꢂscillation occurs if V > V unless

INH built-in hysteresis is enabled.

INL

INH

the part to be configured for monitoring overvoltage and

undervoltage conditions with either polarity output.

2966fc

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LTC2966

OPERATION

100

10

1

The high voltage ꢂUT pins have the capability to be pulled

up to a user defined voltage as high as 100V with an

external resistor. The LTC2966 also includes an internal

500k pull-up resistor to an internal voltage between 3.5V

40x

20x

10x

5x

and 5V depending on input supply voltage. (See V in

ꢂH

Electrical Characteristics) Wire-ꢂR functionality is imple-

mented by connecting ꢂUTA and ꢂUTB with appropriate

monitor configuration.

Supply current is drawn from the higher of V or V

INA

INB

with priority given to V . If both V pins fall below the

INA

IN

0.5

1

1.5

2

2.5

UVLꢂthresholdthenbothꢂUTpinsarepulledlowregard-

COMPARATOR REFERENCE INPUT (INL, INH) (V)

2966 F01

less of the PS pin state.

Figure 1. Monitor Threshold Threshold vs

Comparator Reference Inputs

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LTC2966

APPLICATIONS INFORMATION

Threshold Configuration

Theclosest1ꢀvalueis909kΩ. R2canbedeterminedfrom:

Each LTC2966 channel (A/B) monitors the voltage applied

V

_INH•R_SUꢁ

(

)

–R1

R2=

to the corresponding V input. A comparator senses the

IN

V_REF

V pin on one of its inputs through the internal resistive

IN

2V •1.2ꢁΩ

)

divider. The other input is connected to INH/INL that is

=

–909kΩ = 90.2kΩ

in turn biased with external resistive dividers off of the

2.402V

REF pin as shown in Figure 2a and 2b. The V rising and

IN

The closest 1ꢀ value is 90.9kΩ. R3 can be determined

falling thresholds are determined by:

from R

:

SUꢁ

V

= RANGE • V

IN(RISE)

IN(FALL)

INH

INL

R3 = R

– R1 – R2 = 1.2ꢁΩ – 909kΩ – 90.9kΩ

SUꢁ

= 200.1kΩ

Where RANGE is the configured range of the internal

resistive divider. In order to set the threshold for the

LTC2966, choose an appropriate range setting for the

The closest 1ꢀ value is 200kΩ. Plugging the standard

values back into the equations yields the design values

for the V and V voltages:

INH

INL

desired V voltage threshold such that the INH and INL

IN

V

INH

= 2.001V, V = 1.819V

INL

voltages are within the specified common mode range,

V

. For example, if a falling threshold of 18V is desired

The corresponding threshold voltages are:

= 20.01V, V = 18.19V

Cꢁ

for monitoring a 24V power supply then a range greater

than 10x is allowed. However, to maximize the accuracy

V

IN(RISE)

IN(FALL)

Another possible way to configure the thresholds is with

independent dividers using two resistors per threshold to

set thevoltages on INHand INL. See Figure 2b. Care must

be taken such that the thresholds are not set too close to

each other, otherwise the mismatch of the resistors may

cause the voltage at INL to be greater than the voltage at

INH which may cause the comparator to oscillate.

of the V threshold the smallest acceptable range is used,

IN

10x in this case. To implement 2V of hysteresis referred

to V this means:

IN

V

INH

= 2V, V = 1.8V

INL

With 10x range the V thresholds are:

IN

V

= 20V, V

= 18V

IN(RISE)

IN(FALL)

As in the previous example, if R

= 1.2ꢁΩ is chosen

SUꢁ

ꢂne possible way to configure the thresholds is by us-

ing three resistors to set the voltages on INH and INL.

See Figure 2a. The solution for R1, R2 and R3 provides

three equations and three unknowns. ꢁaximum resistor

size is governed by maximum input leakage current. The

maximum input leakage current below 85°C is 1nA. For

a maximum error of 1ꢀ due to both input currents, the

resistive divider current should be at least 100 times the

sum of the leakage currents, or 0.2µA.

and the target for V is 1.8V:

INL

R_SUꢁ=R1+R2

V

_INL•R_SUꢁ

(

)

1.8V •1.2ꢁΩ

(

)

= 899.5kΩ

R1=

=

V_REF

2.402V

The closest 1ꢀ value is 909kΩ. R2 can be determined by:

R1

R2= V – V

•

(

)

REF

INL

V

Ifinthisexample,aleakagecurrenterrorof0.1ꢀisdesired

then the total divider resistance is 1.2ꢁΩ which results in

INL

909kΩ

1.8V

(

)

= 304kΩ

= 2.402V –1.8V •

(

)

a current of 2µA through this network. For R

= 1.2ꢁΩ

SUꢁ

R_SUꢁ=R1+R2+R3

V

_INL•R_SUꢁ

(

)

1.8V •1.2ꢁΩ

(

)

= 899.5kΩ

R1=

=

V_REF

2.402V

2966fc

10

For more information www.linear.com/LTC2966

LTC2966

APPLICATIONS INFORMATION

The closest 1ꢀ value is 301kΩ. Plugging the standard

Using built-in hysteresis, the V thresholds are:

IN

values back into the equation for V yields the design

INL

V

= RANGE • (INL + V

)

IN(RISE)

IN(FALL)

HYS

voltage for V

:

INL

= RANGE • INL

R1•V

909kΩ •2.402V

301kΩ+909kΩ

(

) (

=

)

REF

V

=

=1.804V

INL

Figure 3b introduces built-in hysteresis on the falling edge

because INL is pulled to ground. Similarly, a two-resistor

network,R3andR4,isusedtosetthevoltageonINHusing:

R1+R2

(

)

(

At this point in the independent divider example only the

values required to set the voltage at INL have been found.

Repeat the process for the INH input by substituting the

R4 V

R3 V

REF

=

–1

INH

above equations with V for V , R3 for R1, R4 for R2

INH

INL

and V = 2.0V.

Using built-in hysteresis the V thresholds are:

INH

IN

V

IN

V

= RANGE • INH

IN(RISE)

IN(FALL)

V

INA

= RANGE • (INH – V

)

HYS

REF

1/2 LTC2966

RS1A

OUTA

REF

1/2 LTC2966

RS1A

OUTA

R3

R2

R1

R2

R4

R3

Consider V = 2V with built-in hysteresis activated on

INH

INHA

the falling edge. For 10x range, 1.1ꢀ falling hysteresis is

RS2A

PSA

RS2A

PSA

obtained. If a larger percentage of hysteresis is desired

INLA

thenV isalternativelysetto1Vandtherangeisselected

INH

GND

R1

to be 20x to obtain the same V threshold but with 2.2ꢀ

IN

falling hysteresis. The amount of built-in hysteresis is

scaled according to Table 2. If more hysteresis is needed

then it is implemented in the external resistive divider as

described in the Threshold Configuration section.

2966 F02ab

Figure 2a. Three-Resistor

Threshold Configuration

Figure 2b. Two-Resistor

Threshold Configuration

V

IN

Using Built-In Hysteresis

V

INA

TheLTC2966hasthecapabilityofsimplifyingthethreshold

configuration such that only two resistors per channel are

required. The device pins can be configured to select a

REF

1/2 LTC2966

RS1A

OUTA

REF

1/2 LTC2966

RS1A

OUTA

R4

R3

R2

R1

RS2A

PSA

RS2A

PSA

built-in hysteresis voltage, V , which can be applied to

HYS

INHA

INLA

INH

INL

either the rising or falling threshold depending on whether

the INH or INL pin is grounded. Note that the hysteresis

voltage at each range setting remains at a fixed value.

Figure 3 introduces examples of each configuration. For

example, if INH is biased from an external divider and the

INL pin is grounded, then hysteresis is enabled on the

GND

2966 F03ab

Figure 3a. Rising Edge

Built-In Hysteresis by

Grounding INH

Figure 3b. Falling Edge

Built-In Hysteresis by

Grounding INL

low or falling threshold. The low threshold is then –V

HYS

relativetothehighthresholddeterminedbyINH. Figure3a

introduces built-in hysteresis on the rising edge because

INH is pulled to ground. A two-resistor network, R1 and

R2, is used to set the voltage on INL using:

Table 2. Built-In Hysteresis Voltage vs Range

RANGE

5x

V

REFERRED BUILT-IN HYSTERESIS

IN

110mV

220mV

440mV

880mV

10x

R2 V

REF

20x

=

–1

R1 V

40x

INL

2966fc

11

For more information www.linear.com/LTC2966

LTC2966

APPLICATIONS INFORMATION

Error Analysis

The actual V falling threshold has an error tolerance of

IN

216mV or 1.2ꢀ.

V thresholds are subject to the following errors:

IN

• REF Voltage Variation (∆V

)

Improving Threshold Accuracy

The biggest threshold error terms are:

• External Resistive Divider Accuracy

• REF Voltage Variation

REF

• Comparator ꢂffset (V )

ꢂS

• Internal Divider Range Error (A

)

VERR

• External Resistive Divider Error (A

)

XERR

The effect these errors have on the V threshold is

expressed by:

IN

Evenusing1ꢀtoleranceresistors,externalresistivedivider

accuracystillaccountsforasmuchas 2ꢀthresholderror

while REF voltage variation accounts for 1ꢀ threshold

error. In order to minimize these threshold error terms,

an external reference can be used to set the thresholds for

INH/INL as shown in Figure 4. An LT6656-2.048 has an

initial accuracy of 0.05ꢀ and provides bias via the 0.1ꢀ

resistive divider network for INH and INL. It is biased off

of the LTC2966 REF pin. The threshold error tolerance

is calculated using the method described in the Typical

V





INH(L)

V_ERR=RANGE• V_ꢂS∆V_REF

•

V_INH(L)•A_XERR







V_REF



RANGE•A_VERR•V

INH(L)

TꢂLERANCE

100

V

INH(L)





A_XERR= 2•

• 1–









V

REF

Externaldividererrorisdeterminedbythepercentagetoler-

ance values of the resistors. If 1ꢀ tolerance resistors are

used in the external divider then there is a 2ꢀ worst-case

voltage error associated with it. The effects of comparator

Applications section with ∆V

= 1.024mV given the

REF

initial accuracy of the LT6656 2.048V output and using

0.1ꢀ tolerance resistors for the external divider.

offset and V voltage are uncorrelated with each other.

REF







V

Therefore, a Root-Sum-Square can be applied to the error

INL

V_ERR(REF)= RANGE ∆V_REF

•

(

)



voltage referred to V . Using the example from Threshold

V

_REF

IN



Configuration and assuming 1ꢀ resistors implement the











1.8V

2.048V

= 10 • 1.024mV •

= 9mV

external resistive divider, the falling V threshold of ap-



( )

IN

proximately 18V has an error tolerance of:













V

V_REF

INL







V_ERR(EXT)= RANGE  V •2•0.001• 1–

V

(

)







INL

V_ERR(REF)= RANGE ∆V_REF

•

(

)





V



_REF

= 10 • 1.8V •0.0005 = 9mV

( ) (

)











1.8V

2.402V

= 10 • 24mV •

= 180mV



( )

V_ERR(VꢂS)= RANGE ∆V_ꢂS= 10 • 3mV = 30mV

(

)

(

)

( ) (

)













V_ERR(RS)= RANGE A_VERR

V

(

)(

)

INL

V_REF

V_ERR(EXT)= RANGE  V •2•0.01• 1–

(

)







INL



= 10 • 0.004 • 1.8V = 72mV

( ) ( ) (

)

= 10 • 1.8V •0.005 = 90mV

( ) (

)

V_ERR= V_E²_RR(REF)+V_E²_RR(EXT)+V_E²_RR(VꢂS)+V_E²_RR(RS)

V_ERR(VꢂS)= RANGE ∆V_ꢂS= 10 • 3mV = 30mV

(

)

(

)

( ) (

V

)

2

=

9mV + 9mV + 30mV + 72mV

(

)

(

)

(

)

(

)

V_ERR(RS)= RANGE A_VERR

(

)

(

)(

)

INL

= 79mV

= 10 • 0.004 • 1.8V = 72mV

( ) ( ) (

V_ERR= V_E²_RR(REF)+V_E²_RR(EXT)+V_E²_RR(VꢂS)+V_E²_RR(RS)

)

The resulting V threshold error is reduced to 0.44ꢀ

IN

from 1.2ꢀ in the previous error analysis example.

2

=

180mV + 90mV + 30mV + 72mV

(

)

(

)

(

)

(

)

= 216mV

2966fc

12

For more information www.linear.com/LTC2966

LTC2966

APPLICATIONS INFORMATION

V

current specifications. When the status outputs are low,

power is dissipated in the pull-up resistors. An internal

pull-up is present if the ꢂUT pins are left floating or if

low power consumption is required. The internal pull-up

resistor does not draw current if an external resistor pulls

IN

R4

10k

LT6656-2.048

OUT IN

V

IN

REF

R3

47.5k

0.1%

GND

1µF

LTC2966

INH

R2

ꢂUT up to a voltage greater than V .

ꢂH

200k

0.1%

INL

GND

If PS is connected to ground, the comparator output is

R1

1.8M

0.1%

noninverting. This means that ꢂUT pulls low when V

IN

falls below the scaled INL voltage. ꢂUT is released after

2966 F04

V

rises above the scaled INH voltage. Likewise, if PS

IN

Figure 4. Reducing V_INThreshold Error

is connected to REF or a voltage >V , the comparator

TH

output is inverting. This means that ꢂUT pulls low when

Disabling a Channel

V

rises above the scaled INH voltage and is released

IN

Figure 5 shows the proper technique for disabling a chan-

nel.Table4summarizesthecorrectconnections.Correctly

disabling an unused channel prevents its comparator

output from chattering and introducing unwanted noise

in the system.

when V falls below the scaled INL voltage.

IN

If both V pins fall below the UVLꢂ threshold minus hys-

IN

teresis, the outputs are pulled to ground. The outputs are

guaranteed to stay low for V ≥ V ≥ 1.25V regardless

INA

INB

of the output logic configuration.

Table 4. Disabling a Channel

It is recommended that circuit board traces associated

with the ꢂUT pin be located on a different layer than those

associated with the INH/INL and REF pins where possible

to avoid capacitive coupling.

CONNECT TO

GND

V

IN

INH

INL

REF

GND

RS1

RS2

PS

GND or REF

ꢂpen

Hot Swap Events

The LTC2966 can withstand high voltage transients up

to 140V. However, when a supply voltage is abruptly

connected to the input resonant ringing can occur as a

result of series inductance. The peak voltage could rise

to 2x the input supply, but in practice can reach 2.5x if

a capacitor with a strong voltage coefficient is present.

Circuit board trace inductances of as little as 10nH can

produce significant ringing. Ringing beyond the absolute

maximum specification can be destructive to the part and

shouldbeavoidedwheneverpossible.ꢂneeffectivemeans

ꢂUT

V

INA

REF

OUTA

OPEN

1/2 LTC2966

INHA

INLA

RS1A

RS2A

PSA

GND

to eliminate ringing seen at the V pins and to protect the

IN

part is to include a 1kΩ to 5kΩ resistance between the

2966 F05

monitored voltage and the V pin as shown in Figure 6.

IN

Figure 5. Disabling a Channel

This provides damping for the resonant circuit. If there

is a decoupling capacitor on the V /V pins the time

INA INB

Output Configuration with Polarity Selection

constantformedbytheRCnetworkshouldbeconsidered.

TheꢂUTpinmaybeusedwithawiderangeofuser-defined

voltages up to 100V with an external resistor. Select a

resistor compatible with desired output rise time and load

2966fc

13

For more information www.linear.com/LTC2966

LTC2966

APPLICATIONS INFORMATION

V

IN

REF

INH

INL

REF

INH

INL

R

S

1k

LTC2966

GND

LTC2966

GND

R

S

R

S

V

/V

INA INB

C

REF

LTC2966

2966 F07ab

GND

2966 F06

7a

7b

Figure 6. Hot Swap Protection

100

High Voltage Pin Creepage/Clearance Options

10

1

Appropriate spacing between component lead traces is

critical to avoid flashover between conductors. There

are multiple industry and safety standards that have

differentspacingrequirementsdependingonfactorssuch

as operating voltage, presence of conformal coat, eleva-

tion, etc. The LTC2966 is available in a 20-lead SW pack-

age which offers pin-to-pin clearance of at least 0.76mm

(0.03in) to satisfy high voltage external component lead

specifications for standards such as the UL60950 and

IPC2221. The package incorporates unconnected pins

between all adjacent high voltage and low voltage pins to

maximize PC board trace clearance. For voltages >30V the

SW shouldbeused,otherwisethesmallerQFNissufficient

whenclearanceisnotanissue.Formoreinformation,refer

to the printed circuit board design standards described in

IPC2221 and UL60950.

0.1

0.001

0.01

0.1

1

CAPACITANCE VALUE (µF)

2966 F07c

7c

Figure 7. Using Series Resistance to Dampen REF

Transient Response

1nF

10nF + 4.3kΩ

0.1µF + 1.5kΩ

1µF + 600Ω

V

REF

2.4V

50mV/DIV

Voltage Reference

LOAD CURRENT

100µA

10µA

The REF pin is a buffered reference with a voltage of V

REF

referenced to GND. A bypass capacitor up to 1000pF

in value can be driven by the REF pin directly. Larger

capacitances require a series resistance to dampen the

transient response as shown in Figure 7A. If a resistive

divider is already present then the bypass capacitor can

be connected to the INH or INL pin as shown in Figure 7B.

Figure 7C shows the resistor value required for different

capacitor values to achieve critical damping. Bypass-

ing the reference can help prevent false tripping of the

comparators by preventing glitches on the INH/INL pins.

Figure 8 shows the reference load transient response.

Figure 9 shows the reference line transient response. If

thereis adecoupling capacitoron the INH/INL pinthe time

constantformedbytheRCnetworkshouldbeconsidered.

Use a capacitor with a compatible voltage rating.

2966 F08

100µs/DIV

Figure 8. V_REFLoad Transient

1nF

1µF + 600Ω

V

REF

2.4V

10mV/DIV

8V

1V/DIV

3.5V

V

INA

2966 F09

10µs/DIV

Figure 9. V_REFLine Transient

2966fc

14

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LTC2966

TYPICAL APPLICATIONS

48V UV/OV Monitor

15V Undervoltage Monitor

The LTC2966 can be used to monitor a positive and a

negative supply simultaneously. In the circuit shown in

Figure 11, Channel B is used to monitor the –15V supply

The circuit in Figure 10 monitors a single 48V supply

and is configured for UV/ꢂV window detection. Channel

A is used to monitor undervoltage conditions where the

36V threshold is determined by 1.8V at INLA scaled by

20x. Channel B is used to monitor overvoltage conditions

where the 72V threshold is determined by the same 1.8V

at INHB with 40x range. UV is pulled high to indicate an

undervoltage condition when the supply drops below the

UV threshold. Therefore PSA is pulled to REF to obtain

the correct polarity on ꢂUTA. ꢂV is pulled high when the

supply rises above the ꢂV threshold which means PSB is

pulled to ground to obtain the appropriate output polarity.

Connecting INHA and INLB to ground enables internal

hysteresis for each channel in the appropriate direction

and reduces the number of external components.

by connecting V ’s internal resistor divider to REF and

INB

configuring to 5x range. The voltage at the V sensing

IN

inputoftheChannelBcomparatorisfixedat480mV.When

the–15VsupplyisundervoltageINHB>480mVandꢂUTB

is pulled low because PSB is connected to ground. As the

negative supply comes into regulation the comparator

monitors the INHB pin to detect when its voltage crosses

480mVcorrespondingto–14.3V.UVBisreleasedindicating

that there is no longer an undervoltage condition. As the

negative supply drops out of regulation the comparator

monitors the INLB pin to detect when its voltage crosses

480mV,correspondingto–13.6Vduetotheexternaldivider

48V OV/UV MONITOR

CHANNEL

A

B

RISING THRESHOLD

36.6V 72.2V

FALLING THRESHOLD 36.0V 71.2V

HYSTERESIS

RANGE

0.6V

20x

1.0V

40x

48V

REF

5V

V

INA

V

INB

R3

100k

R4

C1

1000pF

10V

100k

R2

UV

INHA

INLA

INHB

INLB

OUTA

OUTB

294k

LTC2966

5V

SYS

R1

887k

OV

PSA RS1A RS2A PSB RS1B RS2B GND

2966 F10

Figure 10. Use Range Selection and Built-In Hysteresis to Minimize External Components

2966fc

15

For more information www.linear.com/LTC2966

LTC2966

TYPICAL APPLICATIONS

gain. UVB is pulled low after the comparator detects the

threshold crossing to indicate an undervoltage condition.

Channel A is configured to monitor for an undervoltage

condition on the 15V supply by pulling UVA low when the

positive supply drops below 13.6V.

ꢂV thresholds, where channel A and B are configured

similarly to the 48V UV/ꢂV monitor circuit in Figure 10.

Hysteresis for each comparator is implemented by the

external resistor network. High voltage ꢂUT pins allow a

pair of 4N25 opto-couplers to be used in translating the

statussignalsforthe5Vsystem. R5, R6, R7andR8setthe

maximum current through the optos to be approximately

4.2mA. If an exposed pad is present it should be tied to

the GND pin or left open.

–48V UV/OV Voltage Monitor

InthecircuitshowninFigure12,theLTC2966isconfigured

as a –48V UV/ꢂV monitor by referencing the GND pin to

the negative supply. R1 through R4 configure the UV and

±±15V 5VꢀMONIMꢁ

CHANNEL

A

B

RISING THRESHOLD

14.3V –14.4V

FALLING THRESHOLD 13.5V –13.6V

HYSTERESIS

RANGE

0.8V

10x

–0.8V

5x

15V

5V

V

INA

V

INB

REF

R7

100k

R8

R3

100k

162k

R

UVA

S

INHA

OUTA

OUTB

600

R2

12.4k

C1

LTC2966

5V

SYS

INLA

INHB

1µF

R4

R1

226k

10V

182k

UVB

R5

8.6k

INLB

R6

1.4M

PSA RS1A RS2A PSB RS1B RS2B GND

RTN

2965 F11

–15V

Figure 11. Dual Polarity Voltage Monitoring

2966fc

16

For more information www.linear.com/LTC2966

LTC2966

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/product/LTC2966#packaging for the most recent package drawings.

UD Package

16-Lead Plastic QFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1691 Rev Ø)

0.70 ±0.05

3.50 ±0.05

2.10 ±0.05

1.45 ±0.05

(4 SIDES)

PACKAGE OUTLINE

0.25 ±0.05

0.50 BSC

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

BOTTOM VIEW—EXPOSED PAD

PIN 1 NOTCH R = 0.20 TYP

OR 0.25 × 45° CHAMFER

R = 0.115

TYP

0.75 ±0.05

3.00 ±0.10

(4 SIDES)

15 16

PIN 1

TOP MARK

(NOTE 6)

0.40 ±0.10

1

2

1.45 ± 0.10

(4-SIDES)

(UD16) QFN 0904

0.200 REF

0.25 ±0.05

0.00 – 0.05

0.50 BSC

NOTE:

1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

2966fc

17

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LTC2966

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/product/LTC2966#packaging for the most recent package drawings.

SW Package

20-Lead Plastic Small Outline (Wide .300 Inch)

(Reference LTC DWG # 05-08-1620)

.050 BSC .045 .005

.030 .005

TYP

.496 – .512

(12.598 – 13.005)

NOTE 4

N

19 18

16

14 13 12 11

20

N

17

15

.325 .005

.420

MIN

.394 – .419

(10.007 – 10.643)

NOTE 3

1

2

3

N/2

RECOMMENDED SOLDER PAD LAYOUT

.291 – .299

(7.391 – 7.595)

NOTE 4

2

3

5

7

8

9

10

1

4

6

.037 – .045

.093 – .104

(2.362 – 2.642)

.010 – .029

(0.940 – 1.143)

× 45°

(0.254 – 0.737)

.005

(0.127)

RAD MIN

0° – 8° TYP

.050

(1.270)

BSC

.004 – .012

.009 – .013

(0.102 – 0.305)

NOTE 3

(0.229 – 0.330)

.014 – .019

.016 – .050

(0.406 – 1.270)

INCHES

(MILLIMETERS)

S20 (WIDE) 0502

(0.356 – 0.482)

TYP

NOTE:

1. DIMENSIONS IN

2. DRAWING NOT TO SCALE

3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.

THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS

4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

2966fc

18

For more information www.linear.com/LTC2966

LTC2966

REVISION HISTORY

REV

DATE

DESCRIPTION

PAGE NUMBER

A

09/15 Fixed typos

1, 3, 10, 11,

12, 15

B

C

03/16 Added ABS ꢁax Rating for INHA, INHB, INLA and INLB pins

08/17 Corrected example error threshold calculations

2

12

2966fc

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconn tio itsinir its escribed.l re ill n in ring on existing patent rights.

19

Feocr mnoorfe cfocrumaatsiodn www ihneeairn.cwom/oLtTCf296e6

LTC2966

TYPICAL APPLICATION

5V

–48V UV/OV MONITOR

CHANNEL

RISING THRESHOLD

FALLING THRESHOLD –36.0V –56.0V

HYSTERESIS

RANGE

R9

R10

100k

A

B

100k

UV

OV

–40.0V –72.0V

5V

SYS

–4.0V –16.0V

20x

40x

4.2mA

AT –48V

4.2mA

AT –48V

RTN

R6

1k

R8

1k

4N25

V

INA

V

INB

4N25

REF

R4

66.5k

R5

10k

INHA

OUTA

OUTB

R3

33.2k

C1

LTC2966

R7

10k

INLA

INHB

INLB

1000pF

10V

R2

66.5k

PSA RS1A RS2A PSB RS1B RS2B GND

R1

232k

2966 F12

–48V

Figure 12. Monitoring Negative Voltage with Isolation

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COMMENTS

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Separate V Pin, Adjustable Reset Timer

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ꢁanual Reset and Watchdog Functions, 8- and 10-Lead

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100V ꢁicropower Single Voltage ꢁonitor

3.5V to 98V ꢁonitoring Range, 3.5V to 100V ꢂperating Range,

7µA Quiescent Current

36V Nano-Current Two Input Voltage ꢁonitor

ꢁicropower Dual Comparator with 400mV Reference

36V, 850nA Quiescent Current, 2mm × 2mm 8-Lead DFN and

TSꢂT-23 Packages

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2966fc

LT 0817 REV C • PRINTED IN USA

www.linear.com/LTC2966

20

 LINEAR TECHNOLOGY CORPORATION 2015

For more information www.linear.com/LTC2966


型号：	LTC2966HUD#PBF
厂家：	Linear
描述：	LTC2966 - 100V Micropower Dual Voltage Monitor; Package: QFN; Pins: 16; Temperature Range: -40°C to 125°C
文件：	总20页 (文件大小：248K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC2966HUD#PBF [Linear]

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