LTC3026EMSE

更新时间:2024-09-18 02:23:50
品牌:Linear
描述:1.5A Low Input Voltage VLDO Linear Regulator

LTC3026EMSE 概述

1.5A Low Input Voltage VLDO Linear Regulator 1.5A低输入电压VLDO线性稳压器 稳压芯片

LTC3026EMSE 数据手册

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LTC3026  
1.5A Low Input Voltage  
VLDO Linear Regulator  
U
FEATURES  
DESCRIPTIO  
The LTC®3026 is a very low dropout (VLDOTM) linear  
regulatorthatcanoperateatinputvoltagesdownto1.14V.  
The device is capable of supplying 1.5A of output current  
with a typical dropout voltage of only 100mV. To allow  
operation at low input voltages the LTC3026 includes a  
boostconverterthatprovidesthenecessaryheadroomfor  
the internal LDO circuitry.  
Input Voltage Range:  
1.14V to 3.5V (with Boost Enabled)  
1.14V to 5.5V (with External 5V Boost)  
Low Dropout Voltage: 100mV at IOUT = 1.5A  
Adjustable Output Range: 0.4V to 2.6V  
Output Current: Up to 1.5A  
Excellent Supply Rejection Even Near Dropout  
Shutdown Disconnects Load from VIN and VBST  
Output current comes directly from the input supply to  
maximize efficiency. The boost converter requires only a  
small chip inductor and ceramic capacitor for operation.  
Additionally, the boosted output voltage of one LTC3026  
can supply the boost voltage for other LTC3026s, thus  
requiring a single inductor for multiple LDOs. A user  
supplied boost voltage can be used eliminating the need  
for an inductor altogether.  
Low Operating Current: IIN = 950µA at VIN = 1.5V  
Low Shutdown Current:  
IIN < 1µA (Typ), IBST = 0.1µA (Typ)  
Stable with 10µF or Greater Ceramic Capacitors  
Short-Circuit, Reverse Current Protected  
Overtemperature Protected  
Available in 10-Lead MSOP and 10-Lead  
(3mm × 3mm) DUFN Packages  
The LTC3026 regulator is stable with 10µF or greater  
ceramic output capacitors. The device has a low 0.4V  
reference voltage which is used to program the output  
voltage via two external resistors. The device also has  
internal current limit, overtemperature shutdown, and  
reverse output current protection. The LTC3026 is avail-  
able in a small 10-lead MSOP or low profile (0.75mm)  
10-lead 3mm × 3mm DFN package.  
APPLICATIO S  
High Efficiency Linear Regulator  
Post Regulator for Switching Supplies  
Microprocessor Supply  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
VLDO is a trademark of Linear Technology Corporation.  
All other trademarks are the property of their respective owners.  
Patent Pending  
U
TYPICAL APPLICATIO  
1.2V Output Voltage from 1.5V Input Supply  
Dropout Voltage vs Output Current  
L1  
10µH  
150  
SW  
BST  
5V BOOST  
CONVERTER  
4.7µF  
IN  
100  
V
= 1.5V  
IN  
1.2V  
1.5V  
2.0V  
2.6V  
+
0.4V  
4.7µF  
V
= 1.2V,  
OUT  
ADJ  
OUT  
1.5A  
50  
0
8.06k  
4.02k  
C
OUT  
10µF  
OFF ON  
SHDN  
GND  
LTC3026  
100k  
1.0  
1.5  
PG  
0
0.5  
3026 TA01a  
I
(A)  
OUT  
3026 TA01b  
L1: MURATA LQH2MCN100K02  
3026f  
1
LTC3026  
W W U W  
ABSOLUTE AXI U RATI GS  
(Note 1)  
Operating Junction Temperature  
VBST to GND ................................................ –0.3V to 6V  
VIN to GND................................................... –0.3V to 6V  
SHDN, and ADJ to GND ................ –0.3V to (VIN + 0.3V)  
Output Short-Circuit Duration.......................... Indefinite  
Range ............................................... 40°C to 125°C  
Storage Temperature Range ................. 65°C to 125°C  
Lead Temperature (MSE, Soldering, 10 sec) ........ 300°C  
U
W
U
PACKAGE/ORDER I FOR ATIO  
ORDER PART  
ORDER PART  
TOP VIEW  
NUMBER  
NUMBER  
TOP VIEW  
IN  
IN  
1
2
3
4
5
10 OUT  
IN  
IN  
GND  
SW  
BST  
1
2
3
4
5
10 OUT  
9
8
7
6
OUT  
ADJ  
PG  
LTC3026EDD  
LTC3026EMSE  
9
8
7
6
OUT  
ADJ  
PG  
GND  
SW  
BST  
11  
11  
SHDN  
SHDN  
DD PART  
MARKING  
MSE PART  
MARKING  
MSE PACKAGE  
10-LEAD PLASTIC MSOP  
TJMAX = 125°C, θJA = 40°C/W  
EXPOSED PAD IS GND (PIN 11)  
MUST BE SOLDERED TO PCB  
DD PACKAGE  
10-LEAD (3mm × 3mm) PLASTIC DFN  
TJMAX = 125°C, θJA = 40°C/W  
LBHW  
LTBJB  
EXPOSED PAD IS GND (PIN 11)  
MUST BE SOLDERED TO PCB  
Consult LTC Marketing for parts specified with wider operating temperature ranges.  
(BOOST ENABLED, LSW = 10µH)  
ELECTRICAL CHARACTERISTICS  
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.  
VIN = 1.5V, VOUT = 1.2V, CIN = CBST = 4.7µF, COUT = 10µF (all capacitors ceramic) unless otherwise noted.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
Operating Voltage  
Operating Current  
(Note 2)  
1.14  
3.5  
V
IN  
I
I
I
I
I
= 0mA, V  
= 0mA, V  
= 0mA, V  
= 0mA, V  
= 0.8V, V  
= 1.2V, V  
= 1.2V, V  
= 1.2V, V  
= V , V = 1.2V  
1160  
950  
640  
400  
µA  
µA  
µA  
µA  
IN  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
SHDN  
SHDN  
SHDN  
SHDN  
IN IN  
= V , V = 1.5V  
IN IN  
= V , V = 2.5V  
IN IN  
= V , V = 3.5V  
IN IN  
I
Shutdown Current  
V
= 0V, V = 3.5V  
0.6  
10  
20  
40  
µA  
INSHDN  
SHDN  
IN  
Inductor Size Requirement  
Inductor Peak Current Requirement  
4.7  
150  
µH  
mA  
V
V
Boost Output Voltage Range  
Boost Undervoltage Lockout  
Boost Output Drive (Note 3)  
V
= V  
4.8  
4.0  
5
5.2  
4.4  
V
V
BST  
SHDN  
IN  
4.2  
BSTUVLO  
V
V
< 1.4V  
1.4V  
7
10  
mA  
mA  
IN  
IN  
3026f  
2
LTC3026  
(BOOST DISABLED, VSW = 0V)  
ELECTRICAL CHARACTERISTICS  
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.  
VIN = 1.5V, VOUT = 1.2V, VBST = 5V, CIN = CBST = 1µF, COUT = 10µF (all capacitors ceramic) unless otherwise noted.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
5.5  
200  
20  
UNITS  
V
V
Operating Voltage  
(Note 2)  
1.14  
IN  
I
I
Operating Current  
I
= 100µA, V  
= V , 1.2V V 5V  
95  
0.6  
5
µA  
µA  
V
IN  
INSHDN  
OUT  
SHDN  
IN  
IN  
Shutdown Current  
V
V
= 0V, V = 3.5V  
IN  
SHDN  
SHDN  
V
V
Boost Operating Voltage (Note 7)  
Undervoltage Lockout  
Boost Operating Current  
Boost Shutdown Current  
= V  
4.5  
4.0  
5.5  
4.4  
275  
5
BST  
IN  
4.25  
175  
1
V
BSTUVLO  
BST  
I
I
I
= 100µA, V  
= V  
µA  
µA  
OUT  
SHDN  
IN  
V
= 0V  
SHDN  
BSTSHDN  
(BOOST ENABLED or DISABLED)  
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.  
VIN = 1.5V, VOUT = 1.2V, CIN = CBST = 1µF, COUT = 10µF (all capacitors ceramic) unless otherwise noted.  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
Regulation Voltage  
(Note 5)  
1mA I  
1mA I  
1.5A, 1.14V V 3.5V, V  
= 5V, V  
= 5V, V  
= 0.8V  
= 0.8V  
0.397  
0.395  
0.4  
0.4  
0.403  
0.405  
V
V
ADJ  
OUT  
OUT  
IN  
BST  
BST  
OUT  
OUT  
1.5A, 1.14V V 3.5V, V  
IN  
OUT  
Programming Range  
0.4  
2.6  
250  
100  
V
mV  
nA  
A
Dropout Voltage (Note 6)  
ADJ Input Current  
V
V
V
= 1.5V, V  
= 0.38, I = 1.5A  
OUT  
100  
IN  
ADJ  
I
I
I
= 0.4V  
–100  
1.5  
ADJ  
OUT  
LIM  
ADJ  
SHDN  
Continuous Output Current  
Output Current Current Limit  
Output Voltage Noise  
= V  
IN  
3
A
e
n
f = 10Hz to 100kHz, I = 800mA  
L
Boost Disabled  
Boost Enabled  
110  
210  
µV  
µV  
RMS  
RMS  
V
V
SHDN Input High Voltage  
1.14V V 3.5V  
1.0  
1.2  
V
V
IHSHDN  
IN  
3.5V V 5.5V  
IN  
SHDN Input Low Voltage  
SHDN Input High Current  
SHDN Input Low Current  
PG Output Low Voltage  
1.14V V 5.5V  
0.4  
1
V
µA  
µA  
V
ILSHDN  
IHSHDN  
ILSHDN  
IN  
I
I
SHDN = V  
–1  
–1  
IN  
SHDN = 0V  
= 2mA  
1
V
I
0.1  
0.4  
1
OLPG  
OHPG  
PG  
I
PG Output High Leakage Current V = 5.5V  
0.01  
µA  
PG  
PG  
Output Threshold (Note 4)  
PG High to Low  
PG Low to High  
–12  
–10  
–9  
–7  
–6  
–4  
%
%
Note 1: Absolute Maximum Ratings are those values beyond which the life  
of a device may be impaired. This IC has overtemperature protection that  
is intended to protect the device during momentary overload conditions.  
Junction temperatures will exceed 125°C when overtemperature is active.  
Continuous operation above the specified maximum operating junction  
temperature may impair device reliability.  
Note 5: Operating conditions are limited by maximum junction  
temperature. The regulated output voltage specification will not apply for  
all possible combinations of input voltage and output current. When  
operating at maximum input voltage, the output current range must be  
limited. When operating at maximum output current, the input voltage  
range must be limited.  
Note 2: Minimum Operating Voltage required for regulation is:  
Note 6: Dropout voltage is minimum input to output voltage differential  
needed to maintain regulation at a specified output current. In dropout, the  
V
V  
+ V  
IN  
OUT(MIN)  
DROPOUT  
output voltage will be equal to V – V  
.
IN  
DROPOUT  
Note 3: When using BST to drive loads other than LTC3026s, the load  
must be high impedance during start-up (i.e. prior to PG going high).  
Note 7: To maintain correct regulation  
Note 4: PG threshold expressed as a percentage difference from the “V  
V
V  
– 2.4V  
ADJ  
OUT  
BST  
Regulation Voltage” as given in the table.  
3026f  
3
LTC3026  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
IN Supply Current with Boost  
Converter Disabled  
IN Supply Current with Boost  
Converter Enabled  
BST Supply Current with Boost  
Converter Disabled  
1.50  
1.25  
1.00  
0.75  
0.50  
0.25  
0
200  
150  
100  
50  
200  
150  
100  
50  
V
= 5V  
V
= 5V  
BST  
40°C  
25°C  
BST  
40°C  
25°C  
40°C  
25°C  
85°C  
85°C  
125°C  
85°C  
125°C  
0
0
1.0  
1.5  
2.0  
2.5  
(V)  
3.0  
3.5  
2.0 2.5  
2.0 2.5  
1.0 1.5  
1.0 1.5  
3.0 3.5 4.0 4.5 5.0 5.5  
(V)  
3.0 3.5 4.0 4.5 5.0 5.5  
(V)  
V
V
V
IN  
IN  
IN  
3026 G01  
3026 G02  
3026 G03  
BST Voltage vs Temperature  
ADJ Voltage vs Temperature  
IN Shutdown Current  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
404  
403  
402  
401  
400  
399  
398  
397  
396  
5.050  
5.025  
5.000  
4.975  
4.950  
V
= 1.5V  
IN  
1mA  
1.5A  
3.5V  
1.2V  
V
V
V
= 5V  
BST  
IN  
OUT  
= 1.5V  
2.5V  
=1.2V  
0
25  
50  
100 125  
0
25  
50  
100 125  
0
25  
50  
100 125  
–50 –25  
75  
–50 –25  
75  
–50 –25  
75  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
3026 G05  
3026 G04  
3026 G06  
Ripple Rejection  
Ripple Rejection  
Dropout Voltage vs Input Voltage  
200  
180  
160  
140  
120  
100  
80  
60  
50  
40  
30  
20  
10  
0
70  
60  
50  
40  
30  
20  
10  
0
V
OUT  
= 0.38V  
FB  
10kHz  
1MHz  
I
=1.5A  
100kHz  
60  
V
V
V
I
= 5V  
= 1.5V  
=1.2V  
= 800mA  
= 10µF  
BST  
IN  
OUT  
OUT  
40°C  
25°C  
85°C  
125°C  
V
V
I
= 5V  
BST  
OUT  
OUT  
C
OUT  
40  
=1.2V  
= 800mA  
= 10µF  
20  
C
OUT  
0
1.4  
1.6 1.8 2.0  
(V)  
2.4 2.6  
2.0  
(V)  
2.4 2.6  
1000  
10000  
1000000 1E+07  
100000  
1.2  
2.2  
1.2  
1.8  
V
2.2  
100  
1.4  
1.6  
V
FREQUENCY (Hz)  
IN  
IN  
3026 G07  
3026 G08  
3026 G09  
3026f  
4
LTC3026  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
Shutdown Threshold  
Output Current Limit  
BST to OUT Headroom Voltage  
1200  
900  
600  
300  
2.22  
2.20  
2.18  
2.16  
2.14  
2.12  
2.10  
2.08  
2.06  
2.04  
2.02  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
V
= 0V  
OUT  
A
T
= 25°C  
RISE  
RISE  
FALL  
FALL  
RISE  
FALL  
CURRENT LIMIT  
40°C  
THERMAL LIMIT  
25°C  
125°C  
1
2
3
4
5
6
1.5  
2.0  
3.0  
2.5  
1.0  
3.5  
–50  
0
25  
50  
75  
125  
–25  
100  
V
IN  
(V)  
TEMPERATURE (°C)  
V
IN  
(V)  
3026 G10  
3026 G11  
3026 G12  
Delay from Enable to PG with  
Boost Disabled  
Delay from Enable to PG with  
Boost Enabled  
Output Load Transient Response  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
1.5A  
2mA  
400  
375  
350  
325  
300  
275  
250  
V
= 0.8V  
OUT  
40°C  
25°C  
85°C  
OUT  
I
OUT  
R
= 8  
OUT  
AC 20mV/DIV  
V
= 0.8V  
OUT  
40°C  
25°C  
85°C  
OUT  
R
= 8Ω  
V
C
V
V
= 1.5V  
100µs/DIV  
1.0  
1.5  
2.0  
V
2.5  
(V)  
3.0  
3.5  
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5  
(V)  
OUT  
OUT  
IN  
= 10µF  
V
IN  
IN  
= 1.7V  
= 5V  
3026 G14  
3026 G15  
3026 G13  
BST  
BST Ripple and Feedthrough  
to OUT  
IN Supply Transient Response  
BST/OUT Startup  
HI  
LO  
5V  
SHDN  
BST  
2V  
1.5V  
V
IN  
V
BST  
AC 20mV/DIV  
1V  
1.5V  
V
OUT  
AC  
V
OUT  
AC 5mV/DIV  
10mV/DIV  
OUT  
0V  
T
R
V
= 25°C  
= 1Ω  
IN  
200µs/DIV  
V
V
I
= 1.2V  
V
I
= 1.2V  
= 800mA  
= 10µF  
= 5V  
A
OUT  
OUT  
IN  
OUT  
C
10µs/DIV  
20µs/DIV  
OUT  
OUT  
= 1.5V  
= 1.7V  
= 1A  
C
3026 G16  
3026 G17  
3026 G18  
OUT  
BST  
= 10µF  
V
T
OUT  
L
T
= 10µH  
= 25°C  
SW  
A
= 25°C  
A
3026f  
5
LTC3026  
U
U
U
PI FU CTIO S  
IN (Pins 1, 2): Input Supply Voltage. Output load current  
is supplied directly from IN. The IN pin should be locally  
bypassed to ground if the LTC3026 is more than a few  
inches away from another source of bulk capacitance. In  
general, the output impedance of a battery rises with  
frequency, so it is usually advisable to include an input  
bypass capacitor when supplying IN from a battery. A  
capacitor in the range of 0.1µF to 4.7µF is usually suffi-  
cient.  
been achieved. When providing an external BST voltage  
(i.e. boost converter disabled) a 1µF low ESR ceramic  
capacitor can be used.  
SHDN (Pin 6): Shutdown Input Pin, Active Low. This pin  
is used to put the LTC3026 into shutdown. The SHDN pin  
current is typically less than 10nA. The SHDN pin cannot  
be left floating and must be tied to a valid logic level (such  
as IN) if not used.  
PG (Pin 7): Power Good Pin. When PG is high impedance  
OUT is in regulation, and low impedance when OUT is in  
shutdown or out of regulation.  
GND (Pins 3, 11): Ground and Heat Sink. Connect to  
PCB ground plane or large pad for optimum thermal  
performance.  
ADJ(Pin8):OutputAdjustPin.Thisistheinputtotheerror  
amplifier. It has a typical bias current of 0.1nA flowing into  
the pin. The ADJ pin reference voltage is 0.4V referenced  
to ground. The output voltage range is 0.4V to 2.6V and is  
typically set by connecting ADJ to a resistor divider from  
OUT to GND. See Figure 2.  
SW (Pin 4): Boost Switching Pin. This is the boost  
converter switching pin. A 4.7µH to 40µH inductor able to  
handle a peak current of 150mA is connected from this pin  
to VIN. The boost converter can be disabled by shorting  
this pin to GND. This allows the use of an external boosted  
supply from a second LTC3026 or other source.  
OUT(Pins9,10):RegulatedOutputVoltage.TheOUTpins  
supply power to the load. A minimum output capacitance  
of5µFisrequiredtoensurestability. Largeroutputcapaci-  
tors may be required for applications with large transient  
loads to limit peak voltage transients. See the Applications  
Information section for more information on output  
capacitance.  
BST (Pin 5): Boost Output Voltage Pin. With boost con-  
verter enabled bypass the BST pin with a 4.7µF low ESR  
ceramic capacitor to GND (CBST). BST does not load VIN  
when in shutdown, but is diode connected to IN through  
the external inductor, thus, will not go to ground with VIN  
present. UsersshouldnotpresentanyloadstotheBSTpin  
(with boost enabled) until PG signals that regulation has  
3026f  
6
LTC3026  
W
BLOCK DIAGRA  
BOOST  
CONVERTER  
SW  
4
6
5 BST  
+
SHDN  
SWITCHING  
LOGIC  
EN  
IN  
1,2  
SHDN  
0.4V  
+
REFERENCE  
UVLO  
OUT  
9,10  
V
OFF  
+
PG  
7
+
+
0.372V  
8
ADJ  
OVERSHOOT DETECT  
GND  
3,11  
3026 BD  
3026f  
7
LTC3026  
U
OPERATIO  
TheLTC3026isaVLDO(verylowdropout)linearregulator  
which operates from input voltages as low as 1.14V. The  
LDO uses an internal NMOS transistor as the pass device  
in a source-follower configuration. The BST pin provides  
thehighersupplynecessaryfortheLDOcircuitrywhilethe  
output current comes directly from the IN input for high  
efficiency regulation. The BST pin can either be supplied  
off-chip by an external 5V source or it can be generated  
through the internal boost converter of the LTC3026.  
converter disabled the user must provide an external 5V  
supply to BST, or the BST pin can be tied to the boosted  
supply of a second LTC3026 with the boost converter  
enabled. Thus only one inductor is required for two (or  
possibly more) functioning LTC3026s.  
Care must be taken not to short the BST pin to GND, since  
the body diode of the internal PMOS transistor connects  
the BST and SW pins. Shorting BST to GND with an  
inductor connected between IN and SW can ramp the  
inductor current to destructive levels, potentially destroy-  
ing the inductor and/or the part.  
Boost Converter Operation  
For applications where an external 5V supply is not avail-  
able, the LTC3026 contains an internal boost converter to  
produce the necessary 5V supply for the LDO. The boost  
converter utilizes Burst Mode® operation to achieve high  
efficiency for the relatively low current levels needed for  
the LDO circuitry. The boost converter requires only a  
small chip inductor between the IN and SW pins and a  
small 4.7µF capacitor at BST.  
LDO Operation  
An undervoltage lockout comparator (UVLO) senses the  
BST pin voltage to ensure that the bias supply for the LDO  
is greater than 4.2V before enabling the LDO. If BST is  
below 4.2V, the UVLO shuts down the LDO, and OUT is  
pulled to GND through the external divider and an internal  
4k resistor.  
The operation of the boost converter is described as  
follows. During the first half of the switching cycle, an  
internal NMOS switch between SW and GND turns on,  
ramping the inductor current. A peak comparator senses  
when the inductor current reaches 100mA, at which point  
the NMOS is turned off and an internal PMOS between SW  
and BST turns on, transferring the inductor current to the  
BST pin. The PMOS switch continues to deliver power to  
BST until the inductor current approaches zero, at which  
point the PMOS turns off and the NMOS turns back on,  
repeating the switching cycle.  
The LDO provides a high accuracy output capable of  
supplying 1.5A of output current with a typical dropout  
voltageofonly100mV.Asingleceramiccapacitorassmall  
as 10µF is all that is required for output bypassing. A low  
reference voltage allows the LTC3026 output to be pro-  
grammed to much lower voltages than available in com-  
mon LDOs (range of 0.4V to 2.6V).  
The devices also include current limit and thermal over-  
load protection, and will survive an output short-circuit  
indefinitely. The fast transient response of the follower  
output stage overcomes the traditional tradeoff between  
dropout voltage, quiescent current and load transient  
response inherent in most LDO regulator architectures,  
see Figure 1.  
A burst comparator with hysteresis monitors the voltage  
on the BST pin. When BST is above the upper threshold of  
the comparator, no switching occurs. When BST falls  
below the comparator’s lower threshold, switching com-  
mences and the BST pin gets charged. The upper and  
lower thresholds of the burst comparator are set to main-  
tain a 5V supply at BST with approximately 40mV to 50mV  
of ripple.  
The LTC3026 also includes a soft-start feature to prevent  
excessive current flow at VIN during start-up. When the  
LDOisenabled, thesoft-startcircuitrygraduallyincreases  
the LDO reference voltage from 0V to 0.4V over a period  
of approximately 200µs, see Figure 2.  
The LTC3026 has an option to disable the internal boost  
converter by shorting the SW pin to GND. With the boost  
Burst Mode is a registered trademark of Linear Technology Corporation.  
3026f  
8
LTC3026  
U
OPERATIO  
1.5A  
R2  
R1  
I
OUT  
V
= 0.4V (1 +  
)
V
OUT  
OUT  
0mA  
LTC3026  
R2  
R1  
C
ADJ  
OUT  
OUT  
AC 20mV/DIV  
GND  
3026 F02  
Figure 3. Programming the LTC3026  
The LTC3026 operates at a relatively high gain of  
270µV/A refered to the ADJ input. Thus, a load current  
change of 1mA to 1.5A produces a 400µV drop at the ADJ  
input. To calculate the change in the output, simply mul-  
tiply by the gain of the feedback network (i.e. 1 + R2/R1).  
For example, to program the output for 1.2V choose R2/  
R1 = 2. In this example an output current change of 1mA  
to 1.5A produces –400µV • (1 + 2) = 1.2mV drop at the  
output.  
V
C
V
V
= 1.5V  
200µs/DIV  
OUT  
OUT  
IN  
B
= 10µF  
= 1.7V  
= 5V  
Figure 1. Output Load Step Response  
HI  
LO  
SHDN  
OUT  
1.5V  
Power Good Operation  
0V  
1.5V  
0V  
The LTC3026 includes an open-drain power good (PG)  
output pin with hysteresis. If the chip is in shutdown or  
under UVLO conditions (VBST < 4.25V), PG is low imped-  
ance to ground. PG becomes high impedance when VOUT  
rises to 93% of its regulation voltage. PG stays high  
impedance until VOUT falls back down to 91% of its  
regulation value. A pull-up resistor can be inserted be-  
tween PG and a positive logic supply (such as IN, OUT,  
BST, etc.) to signal a valid power good condition. VIN  
should be the minimum operating voltage (1.14V) or  
greater for PG to function correctly.  
PG  
T
= 25°C  
100µs/DIV  
A
R
= 1  
OUT  
V
V
= 1.7V  
IN  
= 5V  
B
Figure 2. Soft-Start with Boost Disable  
Adjustable Output Voltage  
The output voltage is set by the ratio of two external  
resistors as shown in Figure 3. The device servos the  
output to maintain the ADJ pin voltage at 0.4V (referenced  
toground). Thus, thecurrentinR1isequalto0.4V/R1. For  
good transient response, stability and accuracy the cur-  
rent in R1 should be at least 80µA, thus, the value of R1  
should be no greater than 5k. The current in R2 is the  
current in R1 plus the ADJ pin bias current. Since the ADJ  
pin bias current is typically <10nA it can be ignored in the  
output voltage calculation. The output voltage can be  
calculated using the formula in Figure 3. Note that in  
shutdown the output is turned off and the divider current  
will be zero once COUT is discharged.  
Output Capacitance and Transient Response  
The LTC3026 is designed to be stable with a wide range of  
ceramic output capacitors. The ESR of the output capaci-  
toraffectsstability,mostnotablywithsmallcapacitors.An  
output capacitor of 10µF or greater with an ESR of 0.05Ω  
or less is recommended to ensure stability. The LTC3026  
is a micropower device and output transient response will  
be a function of output capacitance. Larger values of  
output capacitance decrease the peak deviations and  
provide improved transient response for larger load cur-  
rentchanges.Notethatbypasscapacitorsusedtodecouple  
3026f  
9
LTC3026  
U
OPERATIO  
in a small package, but exhibit strong voltage and tem-  
perature coefficients as shown in Figures 4 and 5. When  
used with a 2V regulator, a 10µF Y5V capacitor can exhibit  
an effective value as low as 1µF to 2µF over the operating  
temperature range. The X5R and X7R dielectrics result in  
more stable characteristics and are more suitable for use  
as the output capacitor. The X7R type has better stability  
across temperature, while the X5R is less expensive and  
is available in higher values.  
individual components powered by the LTC3026 will  
increase the effective output capacitor value. High ESR  
tantalum and electrolytic capacitors may be used, but a  
low ESR ceramic capacitor must be in parallel at the  
output. There is no minimum ESR or maximum capacitor  
size requirements.  
Extra consideration must be given to the use of ceramic  
capacitors. Ceramic capacitors are manufactured with a  
variety of dielectrics, each with different behavior across  
temperature and applied voltage. The most common di-  
electrics used are Z5U, Y5V, X5R and X7R. The Z5U and  
Y5V dielectrics are good for providing high capacitances  
A minimum capacitance of 5µF must be maintained at all  
times on the LTC3026 LDO output.  
20  
0
BOTH CAPACITORS ARE 10µF,  
6.3V, 0805 CASE SIZE  
X5R  
–20  
–40  
–60  
–80  
–100  
Y5V  
0
1
2
3
4
5
6
DC BIAS VOLTAGE (V)  
3026 F03  
Figure 4. Ceramic Capacitor DC Bias Characteristics  
20  
X5R  
0
–20  
Y5V  
–40  
–60  
–80  
BOTH CAPACITORS ARE 10µF,  
6.3V, 0805 CASE SIZE  
–100  
50  
–50  
–25  
0
25  
75  
TEMPERATURE (°C)  
3026 F04  
Figure 5. Ceramic Capacitor Temperature Characteristics  
3026f  
10  
LTC3026  
U
OPERATIO  
Boost Converter Component Selection  
important to give careful consideration to all sources of  
thermal resistance from junction to ambient. Additional  
heat sources mounted nearby must also be considered.  
A 10µH chip inductor with a peak saturation current (ISAT  
)
ofatleast150mAisrecommendedforusewiththeinternal  
boost converter. The inductor value can range between  
4.7µH to 40µH, but values less than 10µH result in higher  
switching frequency, increased switching losses, and  
lower max output current available at the BST pin. See  
Table 1 for a list of component suppliers.  
For surface mount devices, heat sinking is accomplished  
by using the heat-spreading capabilities of the PC board  
and its copper traces. Copper board stiffeners and plated  
through holes can also be used to spread the heat gener-  
ated by power devices.  
Table 1. Inductor Vendor Information  
A junction-to-ambient thermal coefficient of 40°C/W is  
achieved by connecting the exposed pad of the MSOP or  
DFNpackagedirectlytoagroundplaneofabout2500mm2.  
SUPPLIER  
Coilcraft  
Murata  
PART NUMBER  
0603PS-103KB  
WEBSITE  
www.coilcraft.com  
www.murata.com  
www.t-yuden.com  
www.TDK.com  
LQH2MCN100K02  
LB2016T100M  
Calculating Junction Temperature  
Taiyo Yuden  
TDK  
Example:Givenanoutputvoltageof1.2V, aninputvoltage  
of 1.8V ±4%, an output current range of 0mA to 1A and a  
maximum ambient temperature of 50°C, what will the  
maximum junction temperature be?  
NLC252018T-100K  
It is also recommended that the BST pin be bypassed to  
ground with a 4.7µF or greater ceramic capacitor. Larger  
values of capacitance will not reduce the size of the BST  
ripple much, but will decrease the ripple frequency pro-  
portionally. The BST pin should maintain 1µF of capaci-  
tance at all times to ensure correct operation (See “Output  
Capacitance and Transient Response” section about ca-  
pacitor selection). High ESR tantalum and electrolytic  
capacitors may be used, but a low ESR ceramic must be  
used in parallel for correct operation.  
The power dissipated by the device will be approximately:  
IOUT(MAX)(VIN(MAX) – VOUT  
)
where:  
IOUT(MAX) = 1A  
VIN(MAX) = 1.87V  
so:  
P = 1A(1.87V – 1.2V) = 0.67W  
Thermal Considerations  
Even under worst-case conditions LTC3026’s BST pin  
power dissipation is only about 1mW, thus can be ig-  
nored. The junction to ambient thermal resistance will be  
on the order of 40°C/W. The junction temperature rise  
above ambient will be approximately equal to:  
The power handling capability of the device will be limited  
by the maximum rated junction temperature (125°C). The  
majority of the power dissipated in the device will be the  
output current multiplied by the input/output voltage  
differential: (IOUT)(VIN – VOUT). Note that the BST current  
is less than 200µA even under heavy loads, so its power  
consumption can be ignored for thermal calculations.  
0.67W(40°C/W) = 26.8°C  
The maximum junction temperature will then be equal to  
the maximum junction temperature rise above ambient  
plus the maximum ambient temperature or:  
The LTC3026 has internal thermal limiting designed to  
protectthedeviceduringmomentaryoverloadconditions.  
For continuous normal conditions, the maximum junction  
temperature rating of 125°C must not be exceeded. It is  
TA = 26.8°C + 50°C = 76.8°C  
3026f  
11  
LTC3026  
U
OPERATIO  
Short-Circuit/Thermal Protection  
Reverse Input Current Protection  
The LTC3026 has built-in output short-circuit current  
limiting as well as over temperature protection. During  
short-circuit conditions, internal circuitry automatically  
limits the output current to approximately 3A. At higher  
temperatures, or in cases where internal power dissipa-  
tion cause excessive self heating on-chip, the thermal  
shutdowncircuitrywillshutdowntheboostconverterand  
LDO when the junction temperature exceeds approxi-  
mately 150°C. It will reenable the converter and LDO once  
the junction temperature drops back to approximately  
140°C. The LTC3026 will cycle in and out of thermal  
shutdown without latch-up or damage until the overstress  
condition is removed. Long term overstress (TJ > 125°C)  
should be avoided as it can degrade the performance or  
shorten the life of the part.  
The LTC3026 features reverse input current protection to  
limit current draw from any supplementary power source  
at the output. Figure 6 shows the reverse output current  
limit for constant input and output voltages cases. Note:  
Positive input current represents current flowing into the  
VIN pin of LTC3026.  
With VOUT held at or below the output regulation voltage  
and VIN varied, IN current flow will follow Figure 6’s  
curves. IIN reverse current ramps up to about 16µA as the  
VIN approaches VOUT. Reverse input current will spike up  
as VIN approaches within about 30mV of VOUT as the  
reversecurrentprotectioncircuitryisdisabledandnormal  
operation resumes. As VIN transitions above VOUT the  
reverse current transitions into short circuit current as  
long as VOUT is held below the regulation voltage.  
30  
20  
IN CURRENT  
LIMIT ABOVE 1.45V  
10  
0
–10  
–20  
–30  
0
0.9  
INPUT VOLTAGE (V)  
1.5  
0.3  
0.6  
1.2  
1.8  
3026 F06  
Figure 6. Input Current vs Input Voltage  
3026f  
12  
LTC3026  
U
OPERATIO  
capacitancetothisnodereducestheefficiencyandamount  
of current available from the boost converter. For these  
reasons it is recommended that the SW pin be connected  
to the switching inductor with as short a trace as possible.  
If the user has any sensitive nodes near the SW node, a  
ground shield may be placed between the two nodes to  
reduce coupling.  
Layout Considerations  
Connection from BST and OUT pins to their respective  
ceramic bypass capacitor should be kept as short as  
possible. The ground side of the bypass capacitors should  
be connected directly to the ground plane for best results  
or through short traces back to the GND pin of the  
part. Long traces will increase the effective series ESR  
and inductance of the capacitor which can degrade  
performance.  
BecausetheADJpinisrelativelyhighimpedance(depend-  
ing on the resistor divider used), stray capacitance at this  
pin should be minimized (<10pF) to prevent phase shift in  
the error amplifier loop. Additionally special attention  
should be given to any stray capacitances that can couple  
external signals onto the ADJ pin producing undesirable  
output ripple. For optimum performance connect the ADJ  
pin to R1 and R2 with a short PCB trace and minimize all  
other stray capacitance to the ADJ pin.  
With the boost converter enabled, the SW pin will be  
switching between ground and 5V whenever the BST pin  
needstoberecharged. ThetransitionedgeratesoftheSW  
pin can be quite fast (~10ns). Thus care must be taken to  
make sure the SW node does not couple capacitively to  
other nodes (especially the ADJ pin). Additionally, stray  
C
C
IN  
OUT  
1
2
3
4
5
IN  
OUT 10  
IN  
9
8
7
6
OUT  
ADJ  
R2  
R1  
GND  
SW  
BST  
PG  
SHDN  
C
BST  
3026 F05  
VIA CONNECTION TO GND PLANE  
Figure 7. Suggested Layout  
3026f  
13  
LTC3026  
U
TYPICAL APPLICATIO S  
Using 1 Boost with Multiple Regulators  
V
= 2.5V  
IN  
TO ADDITIONAL  
REGULATORS  
10µH  
BST  
OUT  
BST  
OUT  
SW  
IN  
SW  
4.7µF  
1µF  
LTC3026  
LTC3026  
V
V
OUT2  
OUT1  
IN  
1.8V, 1.5A  
1.5V, 1.5A  
C
OUT2  
14k  
11k  
C
OUT1  
10µF  
ADJ  
PG  
ADJ  
PG  
SHDN  
GND  
SHDN  
GND  
10µF  
100k  
100k  
4.02k  
4.02k  
4.7µF  
1µF  
PG1  
PG2  
LTC3026 WITH BOOST ENABLED FANOUT:  
3-LTC3026 FOR V <1.4V  
BOOT STRAPPED LTC3026  
(BOOST DISABLED)  
IN  
3026 TA03  
5-LTC3025 FOR VI >1.4V  
N
2.5V Output from 3.3V Supply with External 5V Bias  
V
= 5V  
BIAS  
BST  
OUT  
SW  
IN  
1µF  
LTC3026  
V
OUT  
V
= 3.3V  
IN  
2.5V, 1.5A  
21k  
C
OUT  
ADJ  
PG  
SHDN  
GND  
10µF  
100k  
4.02k  
1µF  
PG  
3026 TA04  
3026f  
14  
LTC3026  
U
PACKAGE DESCRIPTIO  
MSE Package  
10-Lead Plastic MSOP  
(Reference LTC DWG # 05-08-1663)  
BOTTOM VIEW OF  
EXPOSED PAD OPTION  
2.06 ± 0.102  
2.794 ± 0.102  
(.110 ± .004)  
0.889 ± 0.127  
(.035 ± .005)  
(.081 ± .004)  
1
DETAIL “A”  
0.254  
1.83 ± 0.102  
(.072 ± .004)  
(.010)  
0° – 6° TYP  
GAUGE PLANE  
5.23  
(.206)  
MIN  
2.083 ± 0.102 3.20 – 3.45  
(.082 ± .004) (.126 – .136)  
0.53 ± 0.152  
(.021 ± .006)  
DETAIL “A”  
10  
0.18  
(.007)  
0.50  
(.0197)  
BSC  
0.305 ± 0.038  
(.0120 ± .0015)  
TYP  
3.00 ± 0.102  
(.118 ± .004)  
(NOTE 3)  
0.497 ± 0.076  
(.0196 ± .003)  
REF  
10 9  
8
7 6  
RECOMMENDED SOLDER PAD LAYOUT  
0.86  
1.10  
(.034)  
REF  
(.043)  
MAX  
3.00 ± 0.102  
(.118 ± .004)  
(NOTE 4)  
NOTE:  
4.90 ± 0.152  
(.193 ± .006)  
1. DIMENSIONS IN MILLIMETER/(INCH)  
2. DRAWING NOT TO SCALE  
3. DIMENSION DOES NOT INCLUDE MOLD FLASH,  
PROTRUSIONS OR GATE BURRS. MOLD FLASH,  
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED  
0.152mm (.006") PER SIDE  
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH  
OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS  
SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)  
SHALL BE 0.102mm (.004") MAX  
SEATING  
PLANE  
0.17 – 0.27  
(.007 – .011)  
TYP  
0.127 ± 0.076  
(.005 ± .003)  
MSOP (MSE) 0603  
1
2
3
4 5  
0.50  
(.0197)  
BSC  
DD Package  
10-Lead Plastic DFN (3mm × 3mm)  
(Reference LTC DWG # 05-08-1699)  
R = 0.115  
TYP  
6
0.38 ± 0.10  
10  
0.675 ±0.05  
3.50 ±0.05  
1.65 ±0.05  
3.00 ±0.10  
(4 SIDES)  
1.65 ± 0.10  
(2 SIDES)  
2.15 ±0.05 (2 SIDES)  
PIN 1  
TOP MARK  
(SEE NOTE 6)  
PACKAGE  
OUTLINE  
(DD10) DFN 1103  
5
1
0.25 ± 0.05  
0.50 BSC  
0.75 ±0.05  
0.200 REF  
0.25 ± 0.05  
0.50  
BSC  
2.38 ±0.10  
(2 SIDES)  
2.38 ±0.05  
(2 SIDES)  
0.00 – 0.05  
BOTTOM VIEW—EXPOSED PAD  
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS  
NOTE:  
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).  
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT  
2. DRAWING NOT TO SCALE  
3. ALL DIMENSIONS ARE IN MILLIMETERS  
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE  
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE  
5. EXPOSED PAD SHALL BE SOLDER PLATED  
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE  
TOP AND BOTTOM OF PACKAGE  
3026f  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-  
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.  
15  
LTC3026  
U
TYPICAL APPLICATIO  
Efficient, Low Noise 1.5V Output from 1.8V DC/DC Buck Converter  
(LTC3026 Boost Converter Disabled)  
4.5V V 5.5V  
IN  
33pF  
200pF  
30k  
1
2
3
4
5
10  
I
SW  
TH  
R
SENSE  
0.04Ω  
0.1µF  
LTC1773  
9
8
7
6
RUN/SS SENSE  
1µF  
V
1.8V  
2A  
BUCK  
SYNC/FCB  
V
IN  
SW  
IN  
BST  
OUT  
ADJ  
PG  
L1  
LTC3026  
2.5µH  
V
1.5V  
1.5A  
V
TG  
BG  
OUT  
FB  
C
IN  
11k  
GND  
47µF  
C
OUT  
SHDN  
GND  
10V  
10µF  
1µF  
4.02k  
Si9942DY  
100k  
C
BUCK  
PG  
100k  
1%  
80.6k  
1%  
47µF  
10V  
3026 TA02  
C
, C  
: TAIYO YUDEN LMK550BJ476MM  
IN BUCK  
L1: CDRH5D28  
: IRC LR1206-01-R040-F  
R
SENSE  
RELATED PARTS  
PART NUMBER DESCRIPTION  
COMMENTS  
LT1761  
100mA, Low Noise LDO in ThinSOT  
300mV Dropout Voltage, Low Noise: 20µV  
ThinSOT Package  
, V = 1.8V to 20V,  
RMS IN  
LT1762  
150mA, Low Noise LDO  
300mV Dropout Voltage, Low Noise: 20µV  
MS8 Package  
, V = 1.8V to 20V,  
RMS IN  
LT1763  
500mA, Low Noise LDO  
300mV Dropout Voltage, Low Noise: 20µV  
, V = 1.8V to 20V, SO-8 Package  
RMS IN  
LT1764A  
3A, Fast Transient Response, Low Noise LDO  
340mV Dropout Voltage, Low Noise: 40µV  
TO-220 and DD Packages  
, V = 2.7V to 20V,  
RMS IN  
LTC1844  
LT1962  
LT1963A  
LT1964  
LTC3025  
LT3150  
150mA, Very Low Dropout LDO  
80mV Dropout Voltage, Low Noise <30µV  
Stable with 1µF Output Capacitors, ThinSOT Package  
, V = 1.6V to 6.5V,  
RMS IN  
300mA, Low Noise LDO  
270mV Dropout Voltage, Low Noise: 20µV  
MS8 Package  
, V = 1.8V to 20V,  
RMS IN  
1.5A Low Noise, Fast Transient Response LDO  
200mA, Low Noise, Negative LDO  
340mV Dropout Voltage, Low Noise: 40µV  
SOT-223 and SO-8 Packages  
, V = 2.5V to 20V, TO-220, DD,  
RMS IN  
340mV Dropout Voltage, Low Noise 30µV  
ThinSOT Package  
, V = –1.8V to –20V,  
RMS IN  
300mA Micropower VLDO Linear Regulator  
45mV Dropout Voltage, Low Noise 80µV  
, V = 0.9V to 5.5V,  
RMS IN  
Low I : 54µA, 2mm × 2mm 6-Lead DFN Package  
Q
Fast Transient Response, VLDO Regulator  
Controller  
0.035mV Dropout Voltage via External FET, V : 1.3V to 10V  
IN  
3026f  
LT/TP 0405 500 • PRINTED IN USA  
LinearTechnology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
16  
©LINEAR TECHNOLOGY CORPORATION 2005  
(408) 432-1900 FAX: (408) 434-0507 www.linear.com  

LTC3026EMSE 替代型号

型号 制造商 描述 替代类型 文档
LTC3026EMSE#TRPBF Linear 暂无描述 完全替代

LTC3026EMSE 相关器件

型号 制造商 描述 价格 文档
LTC3026EMSE#PBF Linear LTC3026 - 1.5A Low Input Voltage VLDO Linear Regulator; Package: MSOP; Pins: 10; Temperature Range: -40&amp;deg;C to 85&amp;deg;C 获取价格
LTC3026EMSE#TRPBF Linear 暂无描述 获取价格
LTC3026EMSEPBF Linear 1.5A Low Input Voltage VLDO Linear Regulator 获取价格
LTC3026EMSETR Linear 1.5A Low Input Voltage VLDO Linear Regulator 获取价格
LTC3026EMSETRPBF Linear 1.5A Low Input Voltage VLDO Linear Regulator 获取价格
LTC3026_1 Linear 1.5A Low Input Voltage VLDO Linear Regulator 获取价格
LTC3026_1208 Linear 1.5A Low Input Voltage VLDO Linear Regulator 获取价格
LTC3035 Linear 300mA VLDO Linear Regulator with Charge Pump Bias Generator 获取价格
LTC3035 ADI 具有充电泵偏置发生器的 300mA VLDO 线性稳压器 获取价格
LTC3035EDDB Linear 300mA VLDO Linear Regulator with Charge Pump Bias Generator 获取价格

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