LTC3220-1_15 [Linear]
360mA Universal 18-Channel LED Driver;型号: | LTC3220-1_15 |
厂家: | Linear |
描述: | 360mA Universal 18-Channel LED Driver |
文件: | 总20页 (文件大小:220K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC3220/LTC3220-1
360mA Universal
18-Channel LED Driver
FEATURES
DESCRIPTION
n
Eighteen 20mA Universal Current Sources with
TheLTC3220/LTC3220-1arehighlyintegratedmulti-display
LEDdrivers.Thesepartscontainahighefficiency,lownoise
charge pump to provide power to up to eighteen universal
LED current sources. The LTC3220/LTC3220-1 require
only five small ceramic capacitors to form a complete
LED power supply and current controller.
64-Step Linear Brightness Control
n
Independent On/Off, Brightness Level, Blinking and
Gradation Control for Each Current Source Using
2
2-Wire I C Interface
n
Low Noise Multi-Mode Charge Pump (1x, 1.5x, 2x)
Provides Up to 91% Efficiency
The LED currents are set by an internal precision cur-
rent reference. Independent dimming, on/off, blinking
and gradation control for all universal current sources
n
Slew Limited Switching Reduces Conducted and
Radiated Noise (EMI)
n
Up to 360mA Total Output Current
2
is achieved via the I C serial interface. 6-bit linear DACs
n
Internal Current Reference
are available to adjust brightness levels independently for
each universal LED current source.
n
Single Reset Pin for Asynchronous Shutdown and
Reset of All Data Registers
2
n
TheLTC3220/LTC3220-1chargepumpoptimizesefficiency
based on the voltage across the LED current sources. The
part powers up in 1x mode and will automatically switch
to boost mode whenever any enabled LED current source
begins to enter dropout. The first dropout switches the
parts into 1.5x mode and a subsequent dropout switches
the LTC3220/LTC3220-1 into 2x mode. The parts reset to
Two I C Addresses Are Available (LTC3220: 0011100,
LTC3220-1: 0011101)
n
n
n
n
Automatic or Forced Mode Switching
Internal Soft-Start Limits Inrush Current
Short-Circuit/Thermal Protection
4mm × 4mm Ultrathin (0.55mm) 28-Lead QFN
Package
2
1x mode whenever a data bit is updated via the I C port.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 6411531.
APPLICATIONS
n
Video Phones with QVGA+ Displays
n
Keypad Lighting
n
General/Miscellaneous Lighting
TYPICAL APPLICATION
6-LED Main, 4 RGB LEDs
C2
C3
2.2μF
2.2μF
RGB1
RGB2
RGB3
RGB4
MAIN
C1P C1M C2P C2M
V CPO
IN
V
IN
C4
C1
LTC3220
LTC3220-1
4.7μF
2.2μF
18
DV
CC
ULED1-18
DV
CC
0.1μF
3220 TA01
2
SCL/SDA
I C
RESET
RST
GND
32201fc
1
LTC3220/LTC3220-1
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 4)
TOP VIEW
V , DV , CPO to GND................................ –0.3V to 6V
IN
CC
ULED1-ULED18 to GND............................... –0.3V to 6V
SDA, SCL, RST............................–0.3V to (DV + 0.3V)
CC
28 27 26 25 24 23 22
I
I
(Continuous) (Note 2) ..................................360mA
CPO
ULED1-18
ULED1
ULED2
ULED3
ULED4
ULED5
ULED6
ULED7
1
2
3
4
5
6
7
21 ULED18
(Note 2) ..................................................25mA
ULED17
ULED16
ULED15
ULED14
ULED13
ULED12
20
19
18
17
16
15
CPO Short-Circuit Duration.............................. Indefinite
Operating Temperature Range (Note 3)
LTC3220E/LTC3220E-1 ........................ –40°C to 85°C
LTC3220I/LTC3220I-1 ........................ –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
29
8
9
10 11 12 13 14
PF PACKAGE
28-LEAD UTQFN (4mm s 4mm)
T
= 125°C, θ = 37°C/W
JMAX
JA
EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC3220EPF#PBF
LTC3220EPF-1#PBF
LTC3220IPF#PBF
LTC3220IPF-1#PBF
TAPE AND REEL
PART MARKING*
3220T
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3220EPF#TRPBF
LTC3220EPF-1#TRPBF
LTC3220IPF#TRPBF
LTC3220IPF-1#TRPBF
–40°C to 85°C
–40°C to 85°C
–40°C to 125°C
–40°C to 125°C
28-Lead UTQFN (4mm × 4mm)
28-Lead UTQFN (4mm × 4mm)
28-Lead UTQFN (4mm × 4mm)
28-Lead UTQFN (4mm × 4mm)
2201T
3220T
2201T
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, DVCC = 3V, RST = high, C1 = C2 = C3 = 2.2μF, C4 = 4.7μF,
unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
V
Operating Voltage
Operating Current
2.9
5.5
V
IN
I
I
I
I
= 0, 1x Mode
= 0, 1.5x Mode
= 0, 2x Mode
580
2.4
3.2
μA
mA
mA
VIN
CPO
CPO
CPO
DV UVLO Threshold
1
V
V
V
CC
l
DV Operating Voltage
CC
1.5
5.5
V
IN
UVLO Threshold
1.5
32201fc
2
LTC3220/LTC3220-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, DVCC = 3V, RST = high, C1 = C2 = C3 = 2.2μF, C4 = 4.7μF,
unless otherwise noted.
SYMBOL
PARAMETER
Shutdown Current
CONDITIONS
MIN
TYP
MAX
UNITS
μA
l
l
V
3.2
7
1
IN
DV Shutdown Current
CC
μA
Universal LED Current, 6-Bit Linear DACs, ULED = 1V
l
Full-Scale LED Current
18
20
22
mA
mA
mA
Minimum (I ) LED Current Step
0.314
0.395
LSB
Minimum Programmable Current
ULED Data Register Programmed to
0b00000001
LED Current Matching
LED Dropout Voltage
Blink Rate Period
Any Two Outputs, 50% of FS
1.5
%
I
= FS
120
mV
LED
REG19, D4 = 0
REG19, D4 = 1
1.25
2.5
Sec
Sec
ULED Up/Down Gradation Ramp Times
Gradation Period
REG19, D1 = 1, D2 = 0
REG19, D1 = 0, D2 = 1
REG19, D1 = 1, D2 = 1
0.24
0.48
0.96
Sec
Sec
Sec
REG19, D1 = 1, D2 = 0
REG19, D1 = 0, D2 = 1
REG19, D1 = 1, D2 = 1
0.313
0.625
1.25
0.410
0.820
1.640
Sec
Sec
Sec
V
General Purpose Output Mode (GPO)
I
= 1mA, Single Output Enabled
5
4
mV
μs
OL
OUT
LED Turn-On Delay
Charge Pump (CPO)
From Stop Bit, Part Enabled
1x Mode Output Impedance
1.5x Mode Output Impedance
2x Mode Output Impedance
CPO Regulation Voltage
0.6
3.6
4.1
Ω
Ω
Ω
V
V
= 3V, V
= 3V, V
= 4.2V (Note 5)
= 4.8V (Note 5)
IN
CPO
IN
CPO
1.5x Mode, I
2x Mode, I
= 20mA
4.5
5.03
V
V
CPO
= 20mA
CPO
l
Clock Frequency
0.65
0.85
1.05
MHz
CPO Short-Circuit Detection
l
l
Threshold Voltage
Test Current
0.4
10
1.3
30
V
CPO = 0V
mA
SDA, SCL, RST
l
l
l
l
l
V
V
0.3 • DV
V
V
IL
CC
0.7 • DV
–1
IH
CC
I
IH
I
IL
SDA, SCL, RST = DV
SDA, SCL, RST = 0V
1
1
μA
μA
V
CC
–1
V
OL
Digital Output Low (SDA)
Reset Pulse Duration
I
= 3mA
0.12
0.4
PULLUP
RST Timing
20
ns
Serial Port Timing (Notes 6, 7)
f
t
Clock Operating Frequency
400
kHz
μs
SCL
BUF
Bus Free Time Between Stop and Start
Condition
1.3
t
t
t
Hold Time After (Repeated) Start Condition
Repeated Start Condition Setup Time
Stop Condition Setup Time
0.6
0.6
0.6
μs
μs
μs
HD,STA
SU,STA
SU,STO
32201fc
3
LTC3220/LTC3220-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, DVCC = 3V, RST = high, C1 = C2 = C3 = 2.2μF, C4 = 4.7μF,
unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
0
TYP
MAX
UNITS
ns
t
t
t
t
t
t
t
t
Data Hold Time
900
HD,DAT(OUT)
Input Data Hold Time
Data Setup Time
0
ns
HD,DAT(IN)
100
1.3
0.6
20
20
ns
SU,DAT
Clock Low Period
Clock High Period
Clock Data Fall Time
Clock Data Rise Time
Spike Supression Time
μs
LOW
μs
HIGH
300
300
50
ns
f
ns
r
ns
SP
Note 4: These devices include overtemperature protection that is intended
to protect the devices during momentary overload conditions. Junction
temperatures will exceed 125°C when overtemperature protection is
active. Continuous operation above the specified maximum operating
junction temperature may result in device degradation or failure.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Based on long term current density limitations.
Note 5: 1.5x mode output impedance is defined as (1.5V – V )/I
.
IN
CPO OUT
Note 3: The LTC3220E/LTC3220E-1 are guaranteed to meet performance
specifications from 0°C to 85°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3220I/LTC3220I-1
are guaranteed to meet performance specifications over the full –40°C to
125°C operating temperature range.
2x mode output impedance is defined as (2V – V )/I
.
IN
CPO OUT
Note 6: All values are referenced to V and V levels.
IH
IL
Note 7: Guaranteed by design.
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted.
Mode Switch Dropout Times
1.5x Mode CPO Ripple
2x Mode CPO Ripple
2s
1.5s
1s
V
V
CPO
CPO
V
CPO
20mV/DIV
20mV/DIV
1V/DIV
AC COUPLED
AC COUPLED
3220 G01
3220 G02
3220 G03
V
= 3.6V
250μs/DIV
V
CPO
C
= 3.6V
500ns/DIV
V
CPO
C
CPO
= 3.6V
= 200mA
= 4.7μF
500ns/DIV
IN
IN
IN
I
= 200mA
= 4.7μF
I
CPO
32201fc
4
LTC3220/LTC3220-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted.
1.5xModeChargePumpOpen-Loop
OutputResistancevsTemperature
1x Mode Switch Resistance
vs Temperature
1.5x Mode CPO Voltage vs ICPO
4.8
4.6
4.4
4.2
4.0
3.8
3.6
4.5
4.3
4.1
3.9
3.5
3.3
3.1
2.9
2.7
2.5
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
V
= 3.3V
= 3.9V
3.6V
IN
3.5V
V
= 3.6V
IN
3V
3.1V
3.2V
3.3V
3.4V
V
IN
0
120
180
(mA)
240
300
360
60
–25 –10
20 35 50 65 80 95 110
TEMPERATURE (°C)
–40 –25 –10
5
20 35 50 65 80 95 110 125
–40
125
5
I
TEMPERATURE (°C)
CPO
3220 G06
3220 G05
3220 G04
Oscillator Frequency
vs VIN Voltage
2xModeChargePumpOpen-Loop
OutputResistancevsTemperature
2x Mode CPO Voltage vs ICPO
4.9
4.7
4.5
4.3
4.1
3.9
3.7
3.5
3.3
3.1
2.9
5.2
5.1
5.0
4.9
4.8
4.7
4.6
4.5
4.4
4.3
4.2
810
800
790
780
770
760
750
740
730
3.3V-3.6V
T
= 25°C
A
3.2V
3.1V
T
= –45°C
A
3V
T
= 125°C
A
T
= 85°C
A
–25 –10
5
20 35 50 65 80
TEMPERATURE (°C)
110 125
0
60
180
(mA)
240
300
360
4.2
VOLTAGE (V)
–40
95
2.9
3.55
4.85
5.5
120
I
V
CPO
IN
3220 G07
3220 G08
3220 G09
VIN Shutdown Current
vs VIN Voltage
1x Mode No Load VIN Current
vs VIN Voltage
DVCC Current vs DVCC Voltage
3.0
2.5
610
605
7.5
6.5
RST = SDA = DV
CC
T
= 125°C
A
T
= 85°C
A
2.0
1.5
600
595
5.5
4.5
T
= 25°C
A
f
= 400kHz
SCL
f
= 100kHz
SCL
T
= –40°C
A
1.0
0.5
0
590
585
580
3.5
2.5
1.5
f
= 10kHz
SCL
1.5
2.5
3.5
DV VOLTAGE (V)
4.5
5.5
2.9
3.55
4.2
4.85
5.5
2.9
3.55
4.2
VOLTAGE (V)
4.85
5.5
V
VOLTAGE (V)
IN
CC
3220 G11
3220 G12
3220 G10
32201fc
5
LTC3220/LTC3220-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted.
1.5x Mode VIN Current vs ICPO
(IVIN – 1.5ICPO
2x Mode VIN Current vs ICPO
(IVIN – 2ICPO
ULED Pin Current
)
)
vs ULED Pin Voltage
14
12
10
8
16
14
12
10
25
20
15
10
5
8
6
6
4
4
2
0
2
0
0
60
120
240
240
360
0
300
360
0
60
120
180
I (mA)
CPO
300
180
(mA)
0.05
0.1
0.15
0
0.2
I
ULED PIN VOLTAGE (V)
CPO
3220 G13
3220 G14
3220 G15
18-LED ULED Display Efficiency
vs VIN Voltage
ULED Current vs Input Code
25
20
15
10
5
100
90
80
70
60
50
40
30
20
10
0
0
0
09
12
1B
24
2D
36
3F
2.9 3.225 3.55 3.875 4.2 4.525 4.85 5.175 5.5
V
VOLTAGE (V)
INPUT CODE (HEX)
IN
3220 G17
3220 G16
PIN FUNCTIONS
ULED1-ULED18(Pins1-9,13-21):CurrentSourceOutputs
for Driving LEDs. The LED current can be set from 0mA
to 20mA in 64 steps via software control and internal
6-bit linear DAC. Each output can be disabled by setting
the associated data register REG1 to REG18 low. ULED1
to ULED18 can also be used as I C controlled open-drain
general purpose outputs. Connect unused outputs to
ground.
DV (Pin 10): Supply Voltage for All digital I/O lines. This
CC
pinsetsthelogicreferenceleveloftheLTC3220/LTC3220-1.
DV will reset the data registers when set below the
CC
undervoltage lockout threshold. A 0.1μF X5R or X7R
ceramic capacitor should be connected to ground.
2
2
SCL (Pin 11): I C Clock Input. The logic level for SCL is
referenced to DV .
CC
32201fc
6
LTC3220/LTC3220-1
PIN FUNCTIONS
SDA (Pin 12): Input Data for the Serial Port. Serial data is
RST (Pin 25): Active Low Reset Input. RST Resets all
internal registers and forces LTC3220/LTC3220-1 into
shutdown mode.
shifted in one bit per clock cycle to control the LTC3220/
LTC3220-1. The logic level is referenced to DV .
CC
C1P, C2P, C1M, C2M (Pins 27, 26, 23, 22): Charge Pump
Flying Capacitor Pins. A 2.2μF X7R or X5R ceramic ca-
pacitor should be connected from C1P to C1M and C2P
to C2M.
CPO (Pin 28): Output of the Charge Pump. Used to power
all LEDs. A 4.7μF X5R or X7R ceramic capacitor should
be connected to ground.
Exposed Pad (Pin 29): Ground. The Exposed Pad must
be soldered to PCB ground.
V (Pin 24): Supply Voltage for the Entire Device. This pin
IN
must be bypassed with a single 2.2μF low ESR ceramic
capacitor.
BLOCK DIAGRAM
27
23
C1M
26
C2P
22
C2M
EXPOSED
PAD
C1P
29
28
850kHz
OSCILLATOR
CPO
CHARGE PUMP
V
IN
24
ULED1
ULED2
ULED3
ULED4
ULED5
ULED6
ULED7
ULED8
–
+
1
2
3
4
5
6
7
8
1.22V
18
18 UNIVERSAL
CURRENT SOURCES
AND DACS
DV
CC
10
25
RST
CONTROL
LOGIC
MASTER/SLAVE
REG
SDA
SCL
12
11
SHIFT REGISTER
ULED18 ULED17 ULED16 ULED15 ULED14 ULED13 ULED12 ULED11 ULED10 ULED9
21 20 19 18 17 16 15 14 13
9
3220 BD
32201fc
7
LTC3220/LTC3220-1
OPERATION
Power Management
Soft-Start
The LTC3220/LTC3220-1 use a switched capacitor charge
pump to boost CPO as much as 2 times the input voltage
up to 5.1V. The part starts up in 1x mode. In this mode,
Initially, when the part is in shutdown, a weak switch
connects V to CPO. This allows V to slowly charge the
IN
IN
CPO output capacitor and prevent large charging currents
from occurring.
V
is connected directly to CPO. This mode provides
IN
maximum efficiency and minimum noise. The LTC3220/
LTC3220-1 will remain in 1x mode until an LED current
source drops out. Dropout occurs when a current source
voltage becomes too low for the programmed current
to be supplied. When dropout is detected, the LTC3220/
LTC3220-1 will switch into 1.5x mode. The CPO voltage
will then start to increase and will attempt to reach 1.5×
The LTC3220/LTC3220-1 also employ a soft-start feature
on the charge pump to prevent excessive inrush current
andsupplydroopwhenswitchingintothestep-upmodes.
The current available to the CPO pin is increased linearly
over a typical period of 125μs. Soft-start occurs at the
start of both 1.5x and 2x mode changes.
V
up to 4.6V. Any subsequent dropout will cause the
IN
Charge Pump Strength
part to enter the 2x mode. The CPO voltage will attempt
WhentheLTC3220/LTC3220-1operateineither1.5xmode
or 2x mode, the charge pump can be modeled as a Theve-
nin-equivalent circuit to determine the amount of current
available from the effective input voltage and effective
to reach 2× V up to 5.1V.
IN
A 2-phase non-overlapping clock activates the charge
pump switches. In the 2x mode the flying capacitors are
charged on alternate clock phases from V to minimize
IN
open-loop output resistance, R (Figure 1).
OL
CPO voltage ripple. In 1.5x mode the flying capacitors are
R
is dependent on a number of factors including the
OL
charged in series during the first clock phase and stacked
switching term, 1/(2f
• C ), internal switch resis-
OSC
FLY
in parallel on V during the second phase. This sequence
IN
tances and the non-overlap period of the switching circuit.
ofcharginganddischargingtheflyingcapacitorscontinues
However, for a given R , the amount of current available
OL
at a constant frequency of 850kHz.
will be directly proportional to the advantage voltage of
The current delivered by each LED current source is con-
trolled by an associated DAC. Each DAC is programmed
1.5V – CPO for 1.5x mode and 2V – CPO for 2x mode.
IN
IN
Consider the example of driving LEDs from a 3.1V supply.
2
via the I C port.
R
OL
+
CPO
–
1.5V OR
IN
+
–
2V
IN
3220 F01
Figure 1. Charge Pump Open-Loop Thevenin Equivalent Circuit
32201fc
8
LTC3220/LTC3220-1
OPERATION
If the LED forward voltage is 3.8V and the current sources
require 100mV, the advantage voltage for 1.5x mode is
3.1V • 1.5 – 3.8V – 0.1V or 750mV. Notice that if the input
voltage is raised to 3.2V, the advantage voltage jumps to
900mV, a 20% improvement in available strength.
Universal Current Sources (ULED1 to ULED18)
There are eighteen universal 20mA current sources. Each
current source has a 6-bit linear DAC for current control.
The output current range is 0mA to 20mA in 64 steps.
Each current source is disabled when an all zero data word
is written. The supply current for that source is reduced to
zero. Unused outputs should be connected to GND.
From Figure 1, for 1.5x mode the available current is
given by:
1.5VIN − VCPO
(1)
(2)
IOUT
=
GPO Mode
ROL
ULED1toULED18canbeusedasgeneralpurposeoutputs
(GPO). Current sources in the GPO mode can be used as
For 2x mode, the available current is given by:
2
I C controlled open-drain drivers. A ULED output can be
2VIN − VCPO
IOUT
=
selected to operate in GPO mode by programming both
Bit 6 and Bit 7 of its data register (REG1 to REG18) to a
logic high. In the GPO mode, dropout detection is dis-
abled and output swings to ground will not cause mode
switching.
R
Notice that the advantage voltage in this case is 3.1V • 2
– 3.8V – 0.1V = 2.3V. R is higher in 2x mode but a sig-
OL
nificant overall increase in available current is achieved.
The GPOs can be programmed to either act as a switch
(strong pull-down mode) in which the part will only con-
sume approximately 3μA of quiescent current, or they can
be programmed to have a regulated current of up to 20mA
(currentlimitmode),whichwouldrequireseveralhundred
microamps of additional quiescent current.
Mode Switching
The LTC3220/LTC3220-1 will automatically switch from
1x mode to 1.5x mode and subsequently to 2x mode
whenever a dropout condition is detected at an LED pin.
Dropout occurs when a current source voltage becomes
too low for the programmed current to be supplied. The
mode change will not occur unless dropout exists for ap-
proximately 400μs.
When a ULED output is used in GPO mode during shut-
down, CPO should not be used as a power source since
the current available from the CPO pin would be limited
by the weak pull-up current source. This weak pull-up is
The mode will automatically switch back to 1x whenever
2
only meant to keep the output capacitor charged to V
IN
a register is updated via the I C port, when gradation
during shutdown and is unable to supply large amounts
of current. CPO can, however, be used as a power source
when the part is enabled.
completes ramping down and after each blink period.
The parts can be forced to operate in 1x, 1.5x or 2x mode
bywritingtheappropriatebitsintoREG0. Thisfeaturemay
be used for operating loads powered by CPO.
Conversely, when a ULED output is used in GPO strong
pull-downmode,acurrentlimitingresistorshouldbeused
in series with the ULED output so that the current does
not exceed the Absolute Maximum rated current.
Non-programmed current sources do not affect dropout.
32201fc
9
LTC3220/LTC3220-1
OPERATION
Blinking
LTC3220/LTC3220-1. When RST is low, the part is in shut-
2
down and cannot be programmed through the I C port.
Each universal output (ULED1 to ULED18) can be set to
blink with an on time of 0.156 seconds, or 0.625 seconds
and a period of 1.25 seconds, or 2.5 seconds via the I C
port. The blinking rate is selected via REG19 and ULED
outputs are selected via REG1 to REG18. Blinking and
gradation rates are independent. Please refer to Applica-
tion Note 115 for detailed information and examples on
programming blinking.
Shutdown Current
2
Shutdown occurs when all the current source data bits
have been written to zero, when the shutdown bit in REG0
is written with a logic 1, when RST is pulled low, or when
DV is set below the undervoltage lockout voltage.
CC
Although the LTC3220/LTC3220-1 are designed to have
very low shutdown current, they will draw about 3μA
Gradation
from V when in shutdown. Internal logic ensures that
IN
Universal LED outputs ULED1 to ULED18 can be set to
have the current ramp up and down at 0.24 seconds, 0.48
seconds and 0.96 seconds rates via the I C port. Each of
the LTC3220/LTC3220-1 are in shutdown when DV is
CC
low. Note, however that all of the logic signals that are
2
referenced to DV (SCL, SDA and RST) will need to be
CC
theseoutputscanhaveeitherblinkingorgradationenabled.
The gradation time is set via REG19 and ULED outputs
are selected via REG1 to REG18. The ramp direction is
also controlled via REG19. Setting the up bit high causes
gradation to ramp up, setting this bit to a low causes
gradation to ramp down. Please refer to Application Note
115 for detailed information and examples on program-
ming gradation.
at DV or below (i.e., ground) to avoid violation of the
CC
absolute maximum specifications on these pins.
EMI Reduction
The flying capacitor pins C1M, C1P, C2M and C2P have
controlled slew rates to reduce conducted and radiated
noise.
Serial Port
WhengradationisdisabledtheLEDoutputcurrentremains
at the programmed value.
2
The microcontroller compatible I C serial port provides
all of the command and control inputs for the LTC3220/
LTC3220-1. Data on the SDA input is loaded on the rising
edge of SCL. D7 is loaded first and D0 last. There are
20 data registers, one address register and one sub-ad-
dress register. Once all address bits have been clocked
into the address register, an acknowledge occurs. The
Thechargepumpmodeisresetto1xmodeaftergradation
completes ramping down.
Chip Reset (RST)
TheRSTpinisusedtoturnoffthechip,includingthecharge
pump and all ULED outputs, and clear all registers in the
32201fc
10
LTC3220/LTC3220-1
OPERATION
sub-address register is then written to, followed by the
data register. Each data register has a sub-address. After
the data register has been written a load pulse is created
after the stop bit. The load pulse transfers all of the data
held in the data registers to the DAC registers. The stop
bit can be delayed until all of the data master registers
have been written. At this point the LED current will be
changed to the new settings. The serial port uses static
logic registers so there is no minimum speed at which it
can be operated.
when the bus is not in use. External pull-up resistors or
current sources, such as the LTC1694 SMBus accelerator,
are required on these lines.
The LTC3220/LTC3220-1 are receive-only (slave) devices.
2
2
There are two I C addresses available. The LTC3220 I C
2
address is 0011100 and the LTC3220-1 I C address is
2
0011101. The I C address is the only difference between
the LTC3220 and LTC3220-1.
Write Word Protocol Used By the LTC3220/LTC3220-1
2
I C Interface
1
7
1
1
8
1
8
1
1
S
Slave Address Wr
A
*Sub-Address
A
Data Byte
A
P**
TheLTC3220/LTC3220-1communicatewithahost(master)
2
S = Start Condition, Wr = Write Bit = 0, A = Acknowledge,
P = Stop Condition
*The sub-address uses only the first 5 bits, D0, D1, D2, D3 and D4.
**Stop can be delayed until all of the data registers have been written.
usingthestandardI C2-wireinterface.TheTimingDiagram
(Figure 3) shows the timing relationship of the signals on
the bus. The two bus lines, SDA and SCL, must be high
SUB-ADDRESS
DATA BYTE
LTC3220
0
ADDRESS
WR
0
0
1
1
1
1
0
0
0
1
S7
S6
S5
S4
S3
S2
S1
S0
7
6
5
4
3
2
1
0
LTC3220-1
ADDRESS
WR
0
0
0
1
1
START
SDA
STOP
0
0
1
1
1
0
0
0
8
ACK
9
S7
1
S6
2
S5
3
S4
4
S3
5
S2
6
S1
7
S0 ACK
ACK
9
7
1
6
2
5
3
4
4
3
5
2
6
1
7
0
8
1
2
3
4
5
6
7
8
9
SCL
3220 FO2
Figure 2. Bit Assignments
SDA
t
t
BUF
t
SU, STA
SU, DAT
t
t
t
SU, STO
t
LOW
HD, STA
HD, DAT
3220 F03
SCL
t
t
HD, STA
HIGH
t
SP
START
CONDITION
REPEATED START
CONDITION
STOP
CONDITION
START
CONDITION
t
t
f
r
Figure 3. Timing Parameters
32201fc
11
LTC3220/LTC3220-1
OPERATION
Sub-Address Byte
MSB
7
LSB
0
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Register Function
REG0 COMMAND
0
0
0
1
REG1
REG2
ULED1
ULED2
ULED3
ULED4
ULED5
ULED6
ULED7
ULED8
ULED9
ULED10
ULED11
ULED12
ULED13
ULED14
ULED15
ULED16
ULED17
ULED18
0
0
0
1
REG3
0
0
REG4
0
1
REG5
0
0
REG6
0
1
REG7
0
0
REG8
0
1
REG9
0
0
REG10
REG11
REG12
REG13
REG14
REG15
REG16
REG17
REG18
REG19
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
GRAD/
BLINK
REG0, Command Byte.
Register Sub-Address = 0000
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
Unused
Unused
Unused
Unused
Shutdown
Force2x
Force1p5x Quick write
Quick write
Force1p5
Force2x
0
1
Serial write to each register
Parallel write, REG1 data is written to all eighteen universal registers
1
0
Forces charge pump into 1.5x mode
Enables mode logic to control mode changes based on dropout signal
1
0
Forces charge pump into 2x mode
Enables mode logic to control mode changes based on dropout signal
Force1x
D2 (Force1p5x) = 1
Forces Charge Pump into 1x Mode
D3 (Force2x) = 1
Shutdown
1
0
Shuts down part while preserving data in registers
Normal operation
32201fc
12
LTC3220/LTC3220-1
OPERATION
Data Bytes
REG1 to REG18, Universal LED 6-bit linear DAC data with
blink/gradation.
Sub-Address 00001 to 10010 per Sub-Address Table
Blink/Gradation/Dropout Enable
MSB
LED Current Data
LSB
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Normal
Blink Enabled
Gradation Enabled
GPO Mode*
0
0
1
0
1
0
D5
D5
D5
D4
D4
D4
D3
D3
D3
D2
D2
D2
D1
D1
D1
D0
D0
D0
Strong Pull-Down Mode
Current Limited Mode
High Impedance/Off
*(Gradation/Blink/Dropout Off)
1
1
0
1
1
0
0
D5
0
0
D4
0
0
D3
0
0
D2
0
0
D1
0
0
D0
0
REG19, Gradation and Blinking
MSB
LSB
D7
D6
D5
Unused
D4
GB4
D3
GB3
D2
D1
GB1
D0
Up
Unused
Unused
GB2
Up
0
1
Gradation counts down
Gradation counts up
Blink Times and Period
Gradation Ramp Times and Period
D4 (GB4)
D3 (GB3)
On Time
Period
D2 (GB2)
D1 (GB1)
Ramp Time
Period
0
0
1
1
0
1
0
1
0.625s
0.156s
0.625s
0.156s
1.25s
1.25s
2.5s
0
0
1
1
0
1
0
1
Disabled
0.24s
Disabled
0.313s
0.625s
1.25s
0.48s
2.5s
0.96s
32201fc
13
LTC3220/LTC3220-1
OPERATION
Bus Speed
Acknowledge
2
The I C port is designed to be operated at speeds up to
The acknowledge signal is used for handshaking between
the master and the slave. An acknowledge (active low)
generatedbytheslave(LTC3220/LTC3220-1)letsthemas-
ter know that the latest byte of information was received.
The acknowledge related clock pulse is generated by the
master. The master releases the SDA line (high) during
the acknowledge clock cycle. The slave-receiver must pull
down the SDA line during the acknowledge clock pulse
so that it remains a stable low during the high period of
this clock pulse.
400kHz. It has built-in timing delays to ensure correct
operation when addressed from an I C compliant master
device. It also contains input filters designed to suppress
glitches should the bus become corrupted.
2
Start and Stop Conditions
A bus-master signals the beginning of a communication
to a slave device by transmitting a START condition.
A START condition is generated by transitioning SDA
from high to low while SCL is high. When the master has
finished communicating with the slave, it issues a STOP
condition by transitioning SDA from low to high while
SCL is high. The bus is then free for communication with
Slave Address
EachversionofLTC3220/LTC3220-1respondstoaunique
address which has been factory programmed (Table 1).
The eighth bit of the address byte (R/W) must be 0 for the
LTC3220/LTC3220-1 to recognize the address since it is a
write only device. This effectively forces the address to be
8 bits long where the least significant bit of the address
is 0. If the correct seven bit address is given but the R/W
bit is 1, the LTC3220/LTC3220-1 will not respond.
2
another I C device.
Byte Format
Each byte sent to the LTC3220/LTC3220-1 must be 8 bits
long followed by an extra clock cycle for the acknowledge
bit to be returned by the LTC3220/LTC3220-1. The data
shouldbesenttotheLTC3220/LTC3220-1mostsignificant
bit (MSB) first.
Table 1. LTC3220/LTC3220-1 Factory Programmed Slave
Address
PART NUMBER
LTC3220
SLAVE ADDRESS
0011100
LTC3220-1
0011101
32201fc
14
LTC3220/LTC3220-1
OPERATION
Bus Write Operation
2
In certain circumstances the data on the I C bus may be-
come corrupted. In these cases the LTC3220/LTC3220-1
respond appropriately by preserving only the last set of
complete data that it has received. For example, assume
the LTC3220/LTC3220-1 has been successfully addressed
and is receiving data when a STOP condition mistakenly
occurs. The LTC3220/LTC3220-1 will ignore this STOP
condition and will not respond until a new START condi-
tion, correct address, sub-address and new set of data
and STOP condition are transmitted.
The master initiates communication with the LTC3220/
LTC3220-1 with a START condition and a 7-bit address
followed by the write bit R/W = 0. If the address matches
that of the LTC3220/LTC3220-1, the LTC3220/LTC3220-1
returnanacknowledge.Themastershouldthendeliverthe
most significant sub-address byte for the data register to
bewritten.AgaintheLTC3220/LTC3220-1acknowledgeand
thenthedataisdeliveredstartingwiththemostsignificant
bit. This cycle is repeated until all of the required data reg-
istershavebeenwritten.Anynumberofdatalatchescanbe
written. Eachdatabyteistransferredtoaninternalholding
latch upon the return of an acknowledge. After all data
bytes have been transferred to the LTC3220/LTC3220-1,
themastermayterminatethecommunicationwithaSTOP
condition. Alternatively, a Repeat-START condition can be
Likewise, if the LTC3220/LTC3220-1 were previously ad-
dressed and sent valid data but not updated with a STOP,
theywillrespondtoanySTOPthatappearsonthebuswith
only one exception, independent of the number of Repeat-
START’s that have occurred. If a Repeat-START is given
and the LTC3220/LTC3220-1 successfully acknowledge
their addresses and first byte, they will not respond to a
STOP until all bytes of the new data have been received
and acknowledged.
2
initiated by the master and another chip on theI C bus can
be addressed. This cycle can continue indefinitely and the
LTC3220/LTC3220-1 will remember the last input of valid
data that it received. Once all chips on the bus have been
addressed and sent valid data, a global STOP condition
can be sent and the LTC3220/LTC3220-1 will update all
registers with the data that it had received.
Quick Write
Registers REG1 to REG18 can be written in parallel by set-
ting Bit 0 of REG 0 high. When this bit is set high the next
writesequencetoREG1willwritethedatatoREG1through
REG18, which are all of the universal LED registers.
32201fc
15
LTC3220/LTC3220-1
APPLICATIONS INFORMATION
IN
V , CPO Capacitor Selection
the required output current. The error signal of the loop is
storeddirectlyontheoutputcapacitor.Theoutputcapacitor
also serves as the dominant pole for the control loop. To
prevent ringing or instability, it is important for the output
capacitor to maintain at least 3.2μF of capacitance over all
conditions and the ESR should be less than 80mΩ.
ThestyleandvalueofthecapacitorsusedwiththeLTC3220/
LTC3220-1 determine several important parameters such
as regulator control loop stability, output ripple, charge
pump strength and minimum start-up time.
To reduce noise and ripple, it is recommended that low
equivalent series resistance (ESR) ceramic capacitors are
Multilayer ceramic chip capacitors typically have excep-
tional ESR performance. MLCCs combined with a tight
board layout will result in very good stability. As the value
used for both C
and C . Tantalum and aluminum
VIN
CPO
capacitors are not recommended due to high ESR.
of C
controls the amount of output ripple, the value
CPO
The value of C directly controls the amount of output
of C controls the amount of ripple present at the input
CPO
VIN
ripple for a given load current. Increasing the size of C
pin (V ). The LTC3220/LTC3220-1 input current will be
CPO
IN
will reduce output ripple at the expense of higher start-up
current. The peak-to-peak output ripple of the 1.5x mode
is approximately given by the expression:
relatively constant while the charge pump is either in the
inputchargingphaseortheoutputchargingphasebutwill
drop to zero during the clock nonoverlap times. Since the
nonoverlaptimeissmall(~25ns),thesemissing“notches”
will result in only a small perturbation on the input power
supply line. Note that a higher ESR capacitor such as tan-
talum will have higher input noise due to the higher ESR.
Therefore, ceramic capacitors are recommended for low
ESR. Input noise can be further reduced by powering the
LTC3220/LTC3220-1 through a very small series inductor
as shown in Figure 4. A 10nH inductor will reject the fast
current notches, thereby presenting a nearly constant
current load to the input power supply. For economy, the
10nH inductor can be fabricated on the PC board with
about 1cm (0.4") of PC board trace.
IOUT
3fOSC •CCPO
(3)
VRIPPLEP-P
=
where f
is the LTC3220/LTC3220-1 oscillator fre-
OSC
quencyortypically850kHzandC istheoutputstorage
CPO
capacitor.
The output ripple in 2x mode is very small due to the fact
that load current is supplied on both cycles of the clock.
Bothtypeandvalueoftheoutputcapacitorcansignificantly
affectthestabilityoftheLTC3220/LTC3220-1. Asshownin
the Block Diagram, the LTC3220/LTC3220-1 use a control
loop to adjust the strength of the charge pump to match
V
BAT
LTC3220
LTC3220-1
GND
3220 F04
Figure 4. 10nH Inductor Used for Input Noise Reduction
(Approximately 1cm of Board Space)
32201fc
16
LTC3220/LTC3220-1
APPLICATIONS INFORMATION
Flying Capacitor Selection
Table 2 shows a list of ceramic capacitor manufacturers
and how to contact them:
Warning: Polarized capacitors such as tantalum or
aluminum should never be used for the flying capaci-
tors since their voltage can reverse upon start-up of the
LTC3220/LTC3220-1. Ceramic capacitors should always
be used for the flying capacitors.
Table 2. Recommended Capacitor Vendors
AVX
Kemet
www.avxcorp.com
www.kemet.com
www.murata.com
www.t-yuden.com
www.vishay.com
Murata
Taiyo Yuden
Vishay
The flying capacitors control the strength of the charge
pump. In order to achieve the rated output current it is
necessary to have at least 1.6μF of capacitance for each of
theflyingcapacitors. Capacitorsofdifferentmaterialslose
their capacitance with higher temperature and voltage at
different rates. For example, a ceramic capacitor made of
X7Rmaterialwillretainmostofitscapacitancefrom–40°C
to 85°C, whereas a Z5U or Y5V style capacitor will lose
considerable capacitance over that range. Z5U and Y5V
capacitors may also have a very poor voltage coefficient
causingthemtolose60%ormoreoftheircapacitancewhen
the rated voltage is applied. Therefore, when comparing
differentcapacitors,itisoftenmoreappropriatetocompare
the amount of achievable capacitance for a given case size
ratherthancomparingthespecifiedcapacitancevalue.For
example, over rated voltage and temperature conditions,
a 1μF, 10V, Y5V ceramic capacitor in a 0603 case may not
provide any more capacitance than a 0.22μF, 10V, X7R
available in the same case. The capacitor manufacturer’s
data sheet should be consulted to determine what value
of capacitor is needed to ensure minimum capacitances
at all temperatures and voltages.
Layout Considerations and Noise
The LTC3220/LTC3220-1 have been designed to minimize
EMI.Howeverduetotheirhighswitchingfrequencyandthe
transient currents produced by the LTC3220/LTC3220-1,
careful board layout is necessary. A true ground plane
and short connections to all capacitors will improve
performance and ensure proper regulation under all
conditions.
The flying capacitor pins C1P, C2P, C1M and C2M have
controlled edge rate waveforms. The large dv/dt on these
pins can couple energy capacitively to adjacent PCB runs.
Magnetic fields can also be generated if the flying capaci-
torsarenotclosetotheLTC3220/LTC3220-1(i.e., theloop
area is large). To decouple capacitive energy transfer, a
Faraday shield may be used. This is a grounded PCB trace
between the sensitive node and the LTC3220/LTC3220-1
pins. For a high quality AC ground, it should be returned
to a solid ground plane that extends all the way to the
LTC3220/LTC3220-1.
32201fc
17
LTC3220/LTC3220-1
APPLICATIONS INFORMATION
In 1.5x boost mode, the efficiency is similar to that of a
linear regulator with an effective input voltage of 1.5 times
the actual input voltage. This is because the input current
for a 1.5x charge pump is approximately 1.5 times the
load current. In an ideal 1.5x charge pump, the power
efficiency would be given by:
Power Efficiency
To calculate the power efficiency (η) of an LED driver chip,
the LED power should be compared to the input power.
The difference between these two numbers represents
lost power whether it is in the charge pump or the cur-
rent sources. Stated mathematically, the power efficiency
is given by:
PLED
VLED •ILED
V•1.5•I1.5• V
VLED
ηIDEAL
=
=
=
P
PLED
(4)
η=
P
Similarly, in 2x boost mode, the efficiency is similar to
that of a linear regulator with an effective input voltage
of 2 times the actual input voltage. In an ideal 2x charge
pump, the power efficiency would be given by:
IN
The efficiency of the LTC3220/LTC3220-1 depends upon
the mode in which it is operating. Recall that the LTC3220/
LTC3220-1 operate as pass switches, connecting V to
IN
CPO, until dropout is detected at the I pin. This feature
PLED VLED •ILED
VLED
LED
ηIDEAL
=
=
=
providestheoptimumefficiencyavailableforagiveninput
voltage and LED forward voltage. When it is operating as
a switch, the efficiency is approximated by:
P
V•2•I2• V
Thermal Management
PLED VLED •ILED VLED
For higher input voltages and maximum output current,
therecanbesubstantialpowerdissipationintheLTC3220/
LTC3220-1. If the junction temperature increases above
approximately 150°C, the thermal shutdown circuitry will
automatically deactivate the output current sources and
charge pump. To reduce maximum junction temperature,
a good thermal connection to the PC board is recom-
mended. Connecting the Exposed Pad to a ground plane
and maintaining a solid ground plane under the device
will reduce the thermal resistance of the package and PC
board considerably.
(5)
η=
=
=
P
V•I
V
since the input current will be very close to the sum of
the LED currents.
At moderate to high output power, the quiescent current
of the LTC3220/LTC3220-1 is negligible and the expres-
sion above is valid.
Once dropout is detected at any LED pin, the LTC3220/
LTC3220-1 enable the charge pump in 1.5x mode.
32201fc
18
LTC3220/LTC3220-1
PACKAGE DESCRIPTION
PF Package
28-Lead UTQFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1759 Rev Ø)
0.70 0.05
2.64 0.05
2.40 REF
4.50 0.05
3.10 0.05
2.64 0.05
PACKAGE OUTLINE
0.20 0.05
0.40 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
BOTTOM VIEW—EXPOSED PAD
R = 0.10
PIN 1 NOTCH
R = 0.20 TYP
OR 0.25 × 45°
CHAMFER
0.55 0.05
R = 0.05
TYP
4.00 0.10
TYP
27 28
PIN 1
TOP MARK
(NOTE 6)
0.40 0.5
1
2
2.64 0.10
2.64 0.10
4.00 0.10
2.40 REF
(PF28) UTQFN 0907
0.127 REF
0.00 – 0.05
0.20 0.05
0.40 BSC
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE, IF PRESENT
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
32201fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC3220/LTC3220-1
TYPICAL APPLICATION
Cellular Phone Multi-Display LED Controller with Auxiliary Current Source Output
2.2μF
2.2μF
BLINKING
STATUS
INDICATORS
CAM
MAIN
RGB
GPO 1, 2, 3
V
IN
C1P C1M C2P C2M
V CPO
IN
V
IN
60mA
100k
GPO4
2.2μF
0.1μF
LTC3220
4.7μF
18
LTC3220-1
DV
ULED1-18
DV
CC
CC
3220 TA02
2
SCL/SDA
I C
RST
GND
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC3205
250mA, 1MHz, Multi-Display LED Controller
400mA, 800kHz, Multi-Display LED Controller
600mA Universal Multi-Output LED/CAM Driver
VIN: 2.8V to 4.5V, VOUT(MAX) = 5.5V, IQ = 50μA, ISD < 1μA, QFN Package
VIN: 2.8V to 4.5V, VOUT(MAX) = 5.5V, IQ = 50μA, ISD < 1μA, QFN Package
LTC3206
LTC3207
V : 2.9V to 5.5V, 12 Universal Individually Controlled LED Drivers, One
BAT
Camera Driver, 4mm × 4mm QFN Package
LTC3208
High Current Software Configurable Multi-Display VIN: 2.9V to 4.5V, VOUT(MAX) = 5.5V, IQ = 250μA, ISD < 3μA, 17 Current Sources
LED Controller
(MAIN, SUB, RGB, CAM, AUX), 5mm × 5mm QFN Package
LTC3209-1/
LTC3209-2
600mA MAIN/Camera/AUX LED Controller
VIN: 2.9V to 4.5V, IQ = 400mA, Up to 94% Efficiency, 4mm × 4mm
QFN-20 Package
LTC3210
VIN: 2.9V to 4.5V, IQ = 400μA, 3-Bit DAC Brightness Control for MAIN and CAM
LEDs, 3mm × 3mm QFN Package
MAIN/CAM LED Controller in 3mm × 3mm QFN
LTC3210-1
LTC3210-2
LTC3210-3
LTC3212
MAIN/CAM LED Controller with 64-Step
Brightness Control
MAIN/CAM LED Controller with 32-Step
Brightness Control
MAIN/CAM LED Controller with 32-Step
Brightness Control
RGB LED Driver and Charge Pump
6-Bit DAC Brightness Control for MAIN and 3-Bit Brightness Control for CAM,
3mm × 3mm QFN Package
Drives 4 MAIN LEDs, 3mm × 3mm QFN Package
Drives 3 MAIN LEDs, 3mm × 3mm QFN Package
Drives RGB LEDs, 25mA/LED × 3, V Range: 2.9V to 4.5V, 2mm × 3mm DFN
IN
Package
LTC3214
LTC3215
500mA Camera LED Charge Pump
VIN: 2.9V to 4.5V, Single Output, 3mm × 3mm DFN Package
700mA Low Noise High Current LED
Charge Pump
VIN: 2.9V to 4.4V, VOUT(MAX) = 5.5V, IQ = 300μA, ISD < 2.5μA, DFN Package
LTC3216
1A Low Noise High Current LED Charge Pump
with Independent Flash/Torch Current Control
VIN: 2.9V to 4.4V, VOUT(MAX) = 5.5V, IQ = 300μA, ISD < 2.5μA, DFN Package
LTC3217
LTC3218
600mA Low Noise Multi-LED Camera Light
VIN: 2.9V to 4.4V, I = 400μA, Four 100mA Outputs, QFN Package
Q
400mA Single-Wire Camera LED Charge Pump
91% Efficiency, V Range: 2.9V to 4.5V, 2mm × 3mm DFN Package,
IN
High Side Current Sense
LTC3219
250mA Universal Multi-Output LED Driver
V
2.9V to 5.5V, Nine Universal Individually Controlled LED Drivers,
BAT
3mm × 3mm QFN Package
LTC3440/LTC3441
LTC3443
600mA/1.2A IOUT, 2MHz/1MHz, Synchronous
Buck-Boost DC/DC Converter
600mA/1.2A IOUT, 600kHz, Synchronous
Buck-Boost DC/DC Converter
VIN: 2.4V to 5.5V, VOUT(MAX) = 5.25V, IQ = 25μA/50μA, ISD <1μA,
MS/DFN Packages
VIN: 2.4V to 5.5V, VOUT(MAX) = 5.25V, IQ = 28μA, ISD <1μA, DFN Package
LTC3453
1MHz, 800mA Synchronous Buck-Boost High
Power LED Driver
VIN(MIN): 2.7V to 5.5V, VIN(MAX): 2.7V to 4.5V, IQ = 2.5mA, ISD < 6μA,
QFN Package
32201fc
LT 0409 REV C • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
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© LINEAR TECHNOLOGY CORPORATION 2007
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号:
LTC3220IPF-1#PBF
LTC3220/LTC3220-1 - 360mA Universal 18-Channel LED Driver; Package: UTQFN; Pins: 28; Temperature Range: -40°C to 85°C
Linear
LTC3220IPF-1#TRPBF
LTC3220/LTC3220-1 - 360mA Universal 18-Channel LED Driver; Package: UTQFN; Pins: 28; Temperature Range: -40°C to 85°C
Linear
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