LTC3240EDC-2.5#TRPBF [Linear]
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Linear |
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LTC3240-3.3/LTC3240-2.5
3.3V/2.5V Step-Up/
Step-Down Charge Pump
DC/DC Converter
U
DESCRIPTIO
FEATURES
®
■
Step-Up/Step-Down Charge Pumps Generate Fixed
The LTC 3240-3.3/LTC3240-2.5 are step-up/step-down
3.3V or 2.5V Outputs
IN
Output Current up to 150mA
Automatic Mode Switching
Constant Frequency (1.2MHz) Operation in
Step-Up Mode
Low Dropout Regulator Operation in
Step-Down Mode
Low No-Load Quiescent Current: I = 65µA
Built-In Soft-Start Reduces Inrush Current
Shutdown Disconnects Load from Input
Shutdown Current < 1µA
charge pump DC/DC converters that produce a fixed
regulated output voltage of 3.3V or 2.5V over a wide input
voltage range (1.8V to 5.5V).
■
V Range: 1.8V to 5.5V
■
■
■
With input voltages greater than the regulated output
voltage the LTC3240 operates as a low dropout regulator.
Oncetheinputvoltagedropswithin100mVoftheregulated
output voltage the part automatically switches to step-up
mode.Instep-upmodetheLTC3240operatesasaconstant
frequency (1.2MHz) doubling charge pump.
■
■
■
■
■
■
■
Q
TheLTC3240-3.3/LTC3240-2.5featurelownoloadoperat-
ing current (65µA typical) and ultralow operating current
in shutdown (<1µA). Built-in soft-start circuitry prevents
excessive inrush current during start-up. Thermal shut-
down and current-limit circuitry allow the parts to survive
Short-Circuit/Thermal Protection
Available in a 6-Lead (2mm × 2mm) DFN Package
U
a continuous short-circuit from V
to GND.
OUT
APPLICATIO S
The LTC3240-3.3/LTC3240-2.5 require only three tiny
external ceramic capacitors for an ultrasmall application
footprint.TheLTC3240-3.3/LTC3240-2.5areavailableina
6-pin (2mm × 2mm) DFN package.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 6411531.
■
2 AA to 2.5V
■
2-3 AA/Li-Ion to 3.3V
■
Low Power Supplies for Cameras, I/O Supplies,
Audio, PC Cards, Misc. Logic, etc., in a Wide Variety
of Handheld Products
U
TYPICAL APPLICATIO
Output Voltage vs Input Voltage (Full Range)
Li-Ion to 3.3V at Up to 150mA
3.50
I
= 30mA
OUT
1µF
3.45
3.40
3.35
3.30
3.25
3.20
3.15
3.10
+
–
C
C
IN
3.3V
V
V
2.7V TO 4.5V
OUT
I
= 150mA
OUT
Li-Ion OR
3-CELL NiMH
1µF
LTC3240-3.3
GND
4.7µF
OFF ON
SHDN
3240 TA01a
3.7 4.2
INPUT VOLTAGE (V)
1.7 2.2 2.7 3.2
4.7 5.2 5.7
3240 TA01b
3240fb
1
LTC3240-3.3/LTC3240-2.5
W W U W
ABSOLUTE AXI U RATI GS
(Note 1)
U
W
U
PACKAGE/ORDER I FOR ATIO
TOP VIEW
V to GND...................................................–0.3V to 6V
IN
V
to GND .............................................–0.3V to 5.5V
GND
1
2
3
6
5
4
SHDN
OUT
⎯
⎯
⎯
⎯
–
SHDN to GND................................ –0.3V to (V + 0.3V)
7
IN
V
C
IN
V
OUT
Short-Circuit Duration............................. Indefinite
+
V
C
OUT
Operating Temperature Range (Note 2) ...–40°C to 85°C
Storage Temperature Range...................–65°C to 125°C
Maximum Junction Temperature .......................... 125°C
DC PACKAGE
6-LEAD (2mm × 2mm) PLASTIC DFN
T
= 125°C, θ = 80°C/W (NOTE 4)
JA
EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PCB
JMAX
ORDER PART NUMBER
DC PART MARKING
LTC3240EDC-3.3
LTC3240EDC-2.5
LBXJ
LCBP
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS The
●
⎯
denotes the specifications which apply over the full operating
⎯
⎯
⎯
temperature range, otherwise specifications are at T = 25°C, SHDN = V , C = 1µF, C = 1µF, C
= 4.7µF unless otherwise noted.
A
IN FLY
IN
OUT
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
Input Voltage Range
●
1.8
5.5
V
IN
Output Voltage Range
LTC3240-3.3
1.8V ≤ V ≤ 2.5V, I
< 40mA
< 150mA
●
●
3.168
3.168
3.3
3.3
3.432
3.432
V
V
OUT
IN
OUT
OUT
2.5V ≤ V ≤ 5.5V, I
IN
LTC3240-2.5
1.8V ≤ V ≤ 5.5V, I
< 60mA
●
2.4
2.5
65
2.6
100
1
V
µA
µA
IN
OUT
I
IN
No Load Input Current
Shutdown Current
I
= 0, 1.8V ≤ V ≤ 5.5V
OUT IN
⎯ ⎯ ⎯ ⎯
I
SHDN = 0V, V
= 0V
0.1
⎯
⎯
⎯
⎯
SHDN
OUT
η
Efficiency
V
V
= 2.5V, I
= 3.7V, I
= 100mA
= 100mA
64
87
%
%
IN
IN
OUT
OUT
LTC3240-3.3
LTC3240-2.5
V
V
= 2V, I
= 3V, I
= 50mA
= 50mA
63
83
%
%
IN
IN
OUT
OUT
⎯ ⎯ ⎯ ⎯
SHDN Input High Voltage
⎯ ⎯ ⎯ ⎯
SHDN Input Low Voltage
⎯ ⎯ ⎯ ⎯
SHDN Input Current
⎯ ⎯ ⎯ ⎯
SHDN Input Current
Output Current Limit
V
V
I
1.8V ≤ V ≤ 5.5V
●
●
●
●
1.2
V
V
IH
IN
1.8V ≤ V ≤ 5.5V
0.4
1
IL
IN
V
= V = 5.5V
–1
–1
µA
µA
⎯
⎯
⎯
⎯
IH
SHDN
IN
I
I
V
= 0V
1
⎯
⎯
⎯
⎯
IL
SHDN
V
V
= 3.7V, V
= 2.4V, V
= 0V Step-Down Mode
= 0V Step-Up Mode
450
270
mA
mA
LIM
IN
OUT
OUT
IN
⎯
⎯
⎯
⎯
t
V
OUT
Turn-On Time
From the Rising Edge of SHDN to 90% of V
ON
OUT
V
V
= 2.5V, R
= 3.7V, R
= 66Ω
= 66Ω
0.5
0.4
ms
ms
IN
IN
LOAD
LOAD
Step-Up Mode
I
Burst Mode Threshold
Output Ripple
V
= 2.4V
15
20
1.2
20
mA
BURST
IN
V
I
= 100mA, V
= 2.4V
= 2.5V or 3.3V
mV
P-P
RIPPLE
OSC
OUT
OUT
f
Switching Frequency
Burst Mode® Output Ripple
V
IN
V
IN
●
0.6
1.8
MHz
V
= 2.4V
mV
P-P
RIPPLE(BURST)
Burst Mode is a registered trademark of Linear Technology Corporation.
3240fb
2
LTC3240-3.3/LTC3240-2.5
ELECTRICAL CHARACTERISTICS The
●
⎯
denotes the specifications which apply over the full operating
⎯
⎯
⎯
temperature range, otherwise specifications are at T = 25°C, SHDN = V , C = 1µF, C = 1µF, C
= 4.7µF unless otherwise noted.
A
IN FLY
IN
OUT
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
R
OL
Effective Open-Loop
Output Resistance
LTC3240-3.3
Doubler Mode
V
IN
V
IN
= 1.8V, V
= 1.8V, V
= 3V
= 2.25V
7.5
8.0
Ω
Ω
OUT
OUT
LTC3240-2.5
(Note 3)
–40°C to 85°C operating temperature range are assured by design,
characterization and correlation with statistical process controls.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3240-3.3/LTC3240-2.5 are guaranteed to meet
performance specifications from 0°C to 85°C. Specifications over the
Note 3: R ≡ (2V – V )/I
OUT OUT
OL
IN
Note 4: Failure to solder the exposed backside of the package to a PCB
ground plane will result in a thermal resistance much higher than 80°C/W.
U W
TYPICAL PERFOR A CE CHARACTERISTICS (T = 25°C, C = C = 1µF, C = 4.7µF
A
FLY
IN
OUT
unless otherwise noted)
⎯ ⎯ ⎯ ⎯
SHDN Threshold Voltage
vs Supply Voltage
Oscillator Frequency vs Supply
Short-Circuit Current
vs Supply Voltage
Voltage (Doubler Mode)
1.8
1.6
1.0
700
600
–40°C
85°C
25°C
0.8
0.6
500
1.4
1.2
–40°C
85°C
25°C
400
300
200
100
0.4
0.2
0
1.0
0.8
0.6
SHUTDOWN
HYSTERESIS
0
1.8
2.2
2.6
3.0
3.4
3.8
1.80
3.30 3.80 4.30
2.30 2.80
4.80 5.30
5.80
2.7 3.2 3.7 4.2
SUPPLY VOLTAGE (V)
5.7
1.7 2.2
4.7 5.2
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
3240 G01
3240 G02
3240 G03
Load Regulation (LTC3240-2.5)
Start-Up Time vs Supply Voltage
Load Regulation (LTC3240-3.3)
3.40
3.35
3.30
3.25
3.20
2.60
2.55
2.50
2.45
2.40
1000
900
I
= 50mA
LOAD
800
700
V
V
= 3.7V
= 2.5V
IN
IN
V
= 2.8V
= 2.4V
IN
V
= 1.8V
IN
V
IN
600
500
400
V
= 1.8V
IN
1.6 1.8
2
2.2 2.4 2.6 2.8
(V)
3
3.2 3.4 3.6
0
30
60
90
120
150
0
30
60
90
120
150
V
LOAD CURRENT (mA)
LOAD CURRENT (mA)
IN
3240 G04
3240 G05
3240 G06
3240fb
3
LTC3240-3.3/LTC3240-2.5
U W
(T = 25°C, C = C = 1µF, C = 4.7µF
OUT
TYPICAL PERFOR A CE CHARACTERISTICS
A
FLY
IN
unless otherwise noted)
No-Load Input Current
vs Supply Voltage (LTC3240-3.3)
No-Load Input Current
vs Supply Voltage (LTC3240-2.5)
Effective Open-Loop Resistance
vs Temperature (LTC3240-3.3)
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
10
9
V
V
= 1.8V
OUT
IN
= 3V
8
7
6
5
1.7
3.7
4.7 5.2
1.7
3.7
4.7 5.2
2.2 2.7 3.2
4.2
5.7
2.2 2.7 3.2
4.2
5.7
–40
–15
10
35
60
85
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
3240 G08
3240 G09
3240 G07
Mode Switch Threshold
vs Load Current (LTC3240-3.3)
Mode Switch Threshold
vs Load Current (LTC3240-2.5)
Efficiency vs Supply Voltage
(LTC3240-3.3)
100
90
80
70
60
50
40
30
20
10
0
2.95
2.90
2.85
2.80
2.75
2.70
2.65
3.80
3.75
3.70
3.65
3.60
3.55
3.50
3.45
3.40
LDO TO DOUBLER
MODE (V FALLING)
DOUBLER TO
LDO MODE
IN
IN
(V RISING)
I
= 40mA
LOAD
DOUBLER TO LDO
MODE (V RISING)
IN
I
= 1mA
LOAD
LDO TO
DOUBLER MODE
LDO TO DOUBLER
MODE (V FALLING)
DOUBLER TO LDO
MODE (V RISING)
(V FALLING)
IN
IN
IN
100 120
0
20 40 60 80
140 160
80 100
0
20 40 60
120 140 160
1.80
2.30 2.80 3.30 3.80 4.30 5.80
4.80 5.30
I (mA)
LOAD
SUPPLY VOLTAGE (V)
I
(mA)
LOAD
3240 G11
3240 G10
3240 G12
Output Noise/Ripple
(LTC3240-3.3)
V
Soft-Start (LTC3240-3.3)
OUT
V
OUT
2V/DIV
V
OUT
20mV/DIV
AC COUPLED
SHDN
2V/DIV
3240 G13
3240 G14
V
= 2.4V
LOAD
200µs/DIV
V
= 2.4V
IN
500ns/DIV
IN
R
= 66Ω
I
= 100mA
LOAD
3240fb
4
LTC3240-3.3/LTC3240-2.5
U W
(T = 25°C, C = C = 1µF, C
= 4.7µF
TYPICAL PERFOR A CE CHARACTERISTICS
A
FLY
IN
OUT
unless otherwise noted)
Load Transient Response
(LTC3240-3.3)
Output Noise/Ripple
(LTC3240-2.5)
Load Transient Response
(LTC3240-2.5)
V
OUT
V
OUT
20mV/DIV
20mV/DIV
LDO MODE
AC COUPLED
AC COUPLED
Burst Mode
V
OUT
OPERATION
20mV/DIV
CONST FREQUENCY
AC COUPLED
MODE
60mA
50mA
I
I
LOAD
LOAD
10mA
10mA
3240 G15
3240 G17
3240 G16
V
I
= 3.7V
LOAD
10µs/DIV
V
I
= 2.4V
LOAD
10µs/DIV
V
I
= 2.4V
LOAD
500ns/DIV
IN
IN
IN
= 10mA TO 60mA
= 10mA TO 50mA
= 100mA
U
U
U
PI FU CTIO S
–
C (Pin 5): Flying Capacitor Negative Terminal.
GND (Pin 1): Ground. This pin should be tied to a ground
plane for best performance.
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
SHDN(Pin6):ActiveLowShutdownInput.AlowonSHDN
disables the LTC3240-3.3/LTC3240-2.5. This pin is a high
impedanceCMOSinputpinwhichmustbedrivenwithvalid
logic levels. This pin must not be allowed to float.
V (Pin 2): Input Supply Voltage. V should be bypassed
IN
IN
with a 1μF or greater, low ESR ceramic capacitor.
V
(Pin 3): Regulated Output Voltage. V
should be
OUT
OUT
Exposed Pad (Pin 7): Ground. The exposed pad must be
soldered to PCB ground to provide electrical contact and
optimum thermal performance.
bypassedwitha4.7μForgreater,lowESRceramiccapaci-
tor as close to the pin as possible for best performance.
+
C (Pin 4): Flying Capacitor Positive Terminal.
3240fb
5
LTC3240-3.3/LTC3240-2.5
W
BLOCK DIAGRA
SOFT-START
AND
SWITCH CONTROL
6
SHDN
V
3
OUT
1.2MHz
OSCILLATOR
–
+
–
+
V
+ 100mV
OUT
+
4
5
C
V
2
IN
–
C
CHARGE
PUMP
3204 BD
1, 7
GND
3240fb
6
LTC3240-3.3/LTC3240-2.5
U
OPERATIO (Refer to the Block Diagram)
TheLTC3240isastep-up/step-downchargepumpDC/DC
is initiated if the output load current falls below an inter-
nally programmed threshold. Once Burst Mode operation
is initiated, the part shuts down the internal oscillator to
reduce the switching losses, and goes into a low current
state. This state is referred to as the sleep state in which
the IC consumes only about 65μA from the input. When
the output voltage droops enough to overcome the burst
comparatorhysteresis,thepartwakesupandcommences
normal fixed frequency operation recharging the output
capacitor.IftheoutputloadisstilllessthantheBurstMode
thresholdthepartwillre-entersleepstate.ThisBurstMode
converter. For V greater than V
by about 100mV it
IN
OUT
operates as a low dropout regulator. Once V drops to
IN
within 100mV of V , the part automatically switches
OUT
into charge pump mode to boost V to the regulated
IN
output voltage. Regulation is achieved by sensing the
output voltage through an internal resistor divider and
modulating the charge pump output current based on
the error signal.
Inthechargepumpmodea2-phasenonoverlappingclock
activates the charge pump switches. The flying capacitor
threshold varies with V , V
and the choice of output
IN OUT
is charged from V on the first phase of the clock. On
IN
storage capacitor.
the second phase of the clock it is stacked in series with
V
IN
and connected to V . This sequence of charging
OUT
Soft-Start
and discharging the flying capacitor continues at a free
The LTC3240 has built-in soft-start circuitry to prevent
excessive current flow during start-up. The soft-start is
achievedbyinternalcircuitrythatslowlyrampstheamount
of current available to the output storage capacitor from
zero to a value of 300mA over a period of approximately
2ms. The soft-start circuitry is reset in the event of a com-
manded shutdown or thermal shutdown.
running frequency of 1.2MHz (typ).
Shutdown Mode
In shutdown mode, all circuitry is turned off and the
LTC3240 draws only leakage current from the V supply.
IN
⎯
⎯
⎯
⎯
Furthermore, V
is disconnected from V . The SHDN
OUT
IN
pin is a CMOS input with a threshold voltage of approxi-
mately 0.8V. The LTC3240 is in shutdown when a logic
Short-Circuit/Thermal Protection
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
low is applied to the SHDN pin. Since the SHDN pin is a
high impedance CMOS input, it should never be allowed
to float. To ensure that its state is defined, it must always
be driven with a valid logic level.
The LTC3240 has built-in short-circuit current limit as
well as overtemperature protection. During a short-circuit
condition,thepartautomaticallylimitsitsoutputcurrentto
approximately300mA.Ifthejunctiontemperatureexceeds
approximately160°Cthethermalshutdowncircuitryshuts
down current delivery to the output. Once the junction
temperature drops back to approximately 150°C cur-
rent delivery to the output is resumed. The LTC3240 will
cycle in and out of thermal shutdown indefinitely without
latch-up or damage until the short-circuit condition on
Since the output voltage of this device can go above the
input voltage, circuitry is required to control the state of
the converter even in shutdown. This circuitry will draw
an input current of 5μA in shutdown. However, this cur-
rent is eliminated when the output voltage (V ) drops
to less than approximately 0.8V.
OUT
V
OUT
is removed. Long term overstress (i.e. operation at
Burst Mode Operation
junction temperatures above 125°C) should be avoided
as it reduces the lifetime of the part and can result in
degraded performance.
The LTC3240 provides automatic Burst Mode operation
whileoperatingasachargepump,toincreaseefficiencyof
the power converter at light loads. Burst Mode operation
3240fb
7
LTC3240-3.3/LTC3240-2.5
U
W U U
APPLICATIO S I FOR ATIO
Power Efficiency
For the LTC3240 in charge pump mode, the maximum
available output current and voltage can be calculated
During LDO operation, the power efficiency (η) of the
from the effective open-loop output resistance, R , and
OL
LTC3240 is given by:
the effective output voltage, 2V
.
IN(MIN)
POUT VOUT •IOUT VOUT
η =
=
=
From Figure 1, the available current is given by:
PIN
V •IOUT
IN
V
IN
2V – VOUT
IN
IOUT
=
At moderate to high output power, the quiescent cur-
rent of the LTC3240 is negligible and the expression
above is valid. For example, the measured efficiency of
ROL
Typical R values as a function of temperature are shown
OL
LTC3240-3.3, with V = 3.7V, I
= 100mA and V
in Figure 2.
IN
OUT
OUT
regulating to 3.3V is 87% which is in close agreement
R
OL
with the theoretical value of 89%.
+
–
+
During charge pump operation, the power efficiency (η)
of the LTC3240 is similar to that of a linear regulator with
an effective input voltage of twice the actual input volt-
age. This occurs because the input current for a voltage
doubling charge pump is approximately twice the output
current. In an ideal regulating voltage doubler the power
efficiency is given by:
2V
IN
I
V
OUT
OUT
–
3240 F01
Figure 1. Equivalent Open-Loop Circuit
10
V
V
= 1.8V
OUT
IN
= 3V
9
POUT VOUT •IOUT VOUT
η =
=
=
PIN
V • 2IOUT
IN
2V
IN
8
At moderate to high output power, the switching losses
and the quiescent current of the LTC3240 are negligible
and the expression above is valid. For example, the mea-
7
6
sured efficiency of LTC3240-3.3 with V = 2.5V, I
=
IN
OUT
100mA and V
regulating to 3.3V is 64% which is in
OUT
5
–40
–15
10
35
60
85
close agreement with the theoretical value of 66%.
TEMPERATURE (°C)
3240 G07
Effective Open-Loop Output Resistance (R )
OL
Figure 2. Typical R vs Temperature
OL
Theeffectiveopen-loopoutputresistance(R )ofacharge
OL
pump is a very important parameter which determines the
strength of the charge pump. The value of this parameter
depends on many factors such as the oscillator frequency
V , V
Capacitor Selection
IN OUT
The style and value of capacitors used with the LTC3240
determineseveralimportantparameterssuchasregulator
controlloopstability, outputripple, chargepumpstrength
and minimum start-up time.
(f ), value of the flying capacitor (C ), the nonoverlap
OSC
FLY
time, the internal switch resistances (R ), and the ESR of
S
the external capacitors. A first order approximation for
To reduce noise and ripple, it is recommended that low
ESR (<0.1Ω) ceramic capacitors be used for both C and
R
is given below:
OL
IN
1
R0L ≅ 2
RS +
∑
C
. C should be 1µF or greater while C
should be
OUT IN
OUT
f
OSC •CFLY
S=1TO 4
4.7µF or greater. Tantalum and aluminum capacitors are
not recommended because of their high ESR.
3240fb
8
LTC3240-3.3/LTC3240-2.5
U
W U U
APPLICATIO S I FOR ATIO
1cm OF WIRE
InchargepumpmodethevalueofC directlycontrolsthe
OUT
10nH
2
amountofoutputrippleforagivenloadcurrent.Increasing
V
IN
thesizeofC
willreducetheoutputrippleattheexpense
LTC3240-3.3/
LTC3240-2.5
OUT
V
IN
2.2µF
0.22µF
ofhigherminimumturn-ontime. Thepeak-to-peakoutput
ripple is approximately given by the expression:
1
GND
3240 F03
IOUT
VRIPPLE(P−P)
≅
2fOSC •COUT
Figure 3. 10nH Inductor Used for
Additional Input Noise Reduction
where f
is the oscillator frequency (typically 1.2MHz)
OSC
and C
is the value of the output capacitor.
OUT
Further input noise reduction can be achieved by power-
ing the LTC3240 through a very small series inductor as
shown in Figure 3. A 10nH inductor will reject the fast
current notches, thereby presenting a nearly constant
current load to the input power supply. For economy, the
10nH inductor can be fabricated on the PC board with
about 1cm (0.4") of PC board trace.
Also, the value and style of the output capacitor can sig-
nificantly affect the stability of the LTC3240. As shown
in the Block Diagram, the LTC3240 uses a linear control
loop to adjust the strength of the charge pump to match
the current required at the output. The error signal of this
loop is stored directly on the output storage capacitor.
This output capacitor also serves to form the dominant
pole of the control loop. To prevent ringing or instability
on the LTC3240, it is important to maintain at least 2µF
of capacitance over all conditions.
Flying Capacitor Selection
Warning:Apolarizedcapacitorsuchastantalumoralumi-
num should never be used for the flying capacitor since
its voltage can reverse upon start-up of the LTC3240.
Low ESR ceramic capacitors should always be used for
the flying capacitor.
Excessive ESR on the output capacitor can degrade the
loop stability of the LTC3240. The closed-loop output
resistance of the LTC3240 is designed to be 0.5Ω. For a
100mAloadcurrentchange,theoutputvoltagewillchange
by about 50mV. If the output capacitor has 0.5Ω or more
of ESR, the closed-loop frequency response will cease to
rolloffinasimpleone-polefashionandpoorloadtransient
response or instability could result. Ceramic capacitors
typicallyhaveexceptionalESRperformanceandcombined
with a tight board layout should yield very good stability
and load transient performance.
The flying capacitor controls the strength of the charge
pump. A 1µF or greater ceramic capacitor is suggested
for the flying capacitor. For the LTC3240-3.3 operating
at an input voltage in the range 1.8V ≤ V ≤ 2.5V, it is
IN
necessary to have at least 0.5µF of capacitance for the
flying capacitor in order to achieve the maximum rated
current of 40mA.
For very light load applications, the flying capacitor may
be reduced to save space or cost. From the first order
Just as the value of C
controls the amount of output
OUT
ripple, the value of C controls the amount of ripple
approximation of R in the “Effective Open-Loop Output
IN
OL
present at the input pin (V ) in charge pump mode. The
Resistance” section, the theoretical minimum output
resistance of a voltage doubling charge pump can be
expressed by the following equation:
IN
input current to the LTC3240 is relatively constant during
the input charging phase and the output charging phase
but drops to zero during the nonoverlap times. Since the
nonoverlap time is small (~25ns), these missing notches
result in a small perturbation on the input power supply
line. A higher ESR capacitor such as tantalum will have
higher input noise than a low ESR ceramic capacitor.
Therefore, ceramic capacitors are again recommended
for their exceptional ESR performance.
2V – VOUT
1
IN
ROL(MIN)
=
≅
IOUT
fOSC •CFLY
where f
is the switching frequency (1.2MHz) and C
is the value of the flying capacitor. The charge pump
will typically be weaker than the theoretical limit due
OSC
FLY
3240fb
9
LTC3240-3.3/LTC3240-2.5
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APPLICATIO S I FOR ATIO
to additional switch resistance. However, for very light
load applications, the above expression can be used as a
guideline in determining a starting capacitor value.
C
IN
1µF
0603
GND
SHDN
C–
Ceramic Capacitors
V
IN
C
FLY
V
OUT
Ceramic capacitors of different materials lose their ca-
pacitance with higher temperature and voltage at differ-
ent rates. For example, a capacitor made of X5R or X7R
material will retain most of its capacitance from –40°C
to 85°C whereas a Z5U or Y5V style capacitor will lose
considerable capacitance over that range. Z5U and Y5V
capacitorsmayalsohaveapoorvoltagecoefficientcausing
them to lose 60% or more of their capacitance when the
rated voltage is applied. Therefore when comparing dif-
ferent capacitors, it is often more appropriate to compare
the amount of achievable capacitance for a given case size
ratherthandiscussingthespecifiedcapacitancevalue.For
example, a 4.7µF 10V Y5V ceramic capacitor in a 0805
case only retains 25% of its rated capacitance over tem-
perature with a 3.3V bias, while a 4.7µF 10V X5R ceramic
capacitor will retain 80% of its rated capacitance over the
same conditions. The capacitor manufacturer’s data sheet
should be consulted to ensure the desired capacitance at
all temperatures and voltages.
1µF
0603
C
OUT
4.7µF
C+
0603
3240 F04
Figure 4. Recommended Layout
Thermal Management
For higher input voltages and maximum output current,
therecanbesubstantialpowerdissipationintheLTC3240.
Ifthejunctiontemperatureincreasesaboveapproximately
160°C, the thermal shutdown circuitry will automatically
deactivate the output. To reduce the maximum junction
temperature, agoodthermalconnectiontothePCboardis
recommended. Connecting GND (Pin 1) and the Exposed
PadoftheDFNpackagetoagroundplaneunderthedevice
on two layers of the PC board can reduce the thermal
resistance of the package and PC board considerably.
Below is a list of ceramic capacitor manufacturers and
how to contact them:
Derating Power at High Temperatures
To prevent an overtemperature condition in high power
applications, Figure 5 should be used to determine the
maximumcombinationofambienttemperatureandpower
dissipation.
AVX
www.avxcorp.com
www.kemet.com
Kemet
Murata
Taiyo Yuden
Vishay
TDK
www.murata.com
www.t-yuden.com
www.vishay.com
The power dissipated in the LTC3240 should always fall
under the line shown for a given ambient temperature.
The power dissipation of the LTC3240 in step-up mode
is given by the expression:
www.component.tdk.com
Layout Considerations
P = (2V – V ) • I
OUT
D
IN
OUT
Due to the high switching frequency and high transient
currents produced by LTC3240, careful board layout is
necessary for optimum performance. A true ground plane
and short connections to all the external capacitors will
improve performance and ensure proper regulation under
all conditions. Figure 4 shows an example layout for the
LTC3240.
The power dissipation in step-down mode is given by:
P = (V – V ) • I
D
IN
OUT
OUT
3240fb
10
LTC3240-3.3/LTC3240-2.5
U
W U U
APPLICATIO S I FOR ATIO
3.0
This derating curve assumes a maximum thermal resis-
θ
= 80°C/W
JA
tance, θ , of 80°C/W for the 2 × 2 DFN package. This can
JA
2.5
2.0
1.5
1.0
0.5
0
be achieved from a printed circuit board layout with a solid
ground plane and a good connection to the ground pins of
LTC3240 and the Exposed Pad of the DFN package.
THERMAL
SHUTDOWN
T
= 160°C
J
It is recommended that the LTC3240 be operated in the
region corresponding to T ≤ 125°C for continuous opera-
J
RECOMMENDED
OPERATION
tion as shown in Figure 5. Short term operation may be
T
= 125°C
J
acceptablefor125°C≤T ≤160°Cbutlongtermoperation
J
in this region should be avoided as it may reduce the life of
50
–50 –25
0
25
75 100 125 150
the part or cause degraded performance. For T ≥ 160°C,
AMBIENT TEMPERATURE (°C)
J
LT3240 F05
the part will be in thermal shutdown.
Figure 5. Maximum Power Dissipation vs Ambient Temperature
U
PACKAGE DESCRIPTIO
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703)
R = 0.115
TYP
0.56 0.05
(2 SIDES)
0.38 0.05
4
6
0.675 0.05
2.50 0.05
1.15 0.05
2.00 0.10
(4 SIDES)
0.61 0.05
(2 SIDES)
PIN 1 BAR
PIN 1
PACKAGE
OUTLINE
TOP MARK
CHAMFER OF
(SEE NOTE 6)
EXPOSED PAD
(DC6) DFN 1103
3
1
0.25 0.05
0.25 0.05
0.50 BSC
0.50 BSC
0.75 0.05
0.200 REF
1.37 0.05
(2 SIDES)
1.42 0.05
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3240fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC3240-3.3/LTC3240-2.5
U
TYPICAL APPLICATIO
2.5V Output from 2-Cell NiMH
1µF
4
5
+
–
C
C
2
1, 7
6
3
V
V
1.8V TO 3V
2-CELL
NiMH
2.5V
OUT
IN
1µF
4.7µF
LTC3240-2.5
GND
OFF ON
SHDN
3240 TA02
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1751-3.3/LTC1751-5 100mA, 800kHz Regulated Doubler
V : 2V to 5V, V
IN
= 3.3V/5V, I = 20µA, I < 2µA, MS8 Package
Q SD
OUT(MAX)
LTC1983-3/LTC1983-5
LTC3200-5
100mA, 900kHz Regulated Inverter
V : 3.3V to 5.5V, V
= –3V/–5V, I = 25µA, I < 2µA, ThinSOTTM
IN
OUT(MAX)
OUT(MAX)
OUT(MAX)
Q SD
Package
100mA, 2MHz Low Noise, Doubler/White LED
Driver
V : 2.7V to 4.5V, V
IN
= 5V, I = 3.5mA, I < 1µA, ThinSOT Package
Q SD
LTC3202
125mA, 1.5MHz Low Noise, Fractional White
LED Driver
V : 2.7V to 4.5V, V
= 5.5V, I = 2.5mA, I < 1µA, DFN, MS
Q SD
IN
Packages
LTC3204-3.3
LTC3204B-3.3
LTC3204-5
Low Noise, Regulated Charge Pumps in
(2mm × 2mm) DFN Package
V : 1.8V to 4.5V (LTC3204B-3.3), 2.7V to 5.5V (LTC3204B-5), I = 48µA,
IN Q
“B” Version Without Burst Mode Operation, 6-Lead (2mm × 2mm) DFN
Package
LTC3204B-5
LTC3440
LTC3441
LTC3443
600mA (I ) 2MHz Synchronous Buck-Boost
95% Efficiency, V : 2.5V to 5.5V, V
= 2.5V, I = 25µA, I ≤ 1µA,
Q SD
OUT
IN
OUT(MIN)
OUT(MIN)
OUT(MIN)
DC/DC Converter
10-Lead MS Package
High Current Micropower 1MHz Synchronous
Buck-Boost DC/DC Converter
95% Efficiency, V : 2.5V to 5.5V, V
= 2.5V, I = 25µA, I ≤ 1µA,
Q SD
IN
DFN Package
High Current Micropower 600kHz Synchronous 96% Efficiency, V : 2.4V to 5.5V, V
Buck-Boost DC/DC Converter
= 2.4V, I = 28µA, I < 1µA,
Q SD
IN
DFN Package
ThinSOT is a trademark of Linear Technology Coorporation
3240fb
LT 0806 REV B • PRINTED IN USA
12 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
© LINEAR TECHNOLOGY CORPORATION 2006
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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