LTC3408EDD [Linear]
1.5MHz, 600mA Synchronous Step-Down Regulator with Bypass Transistor; 为1.5MHz ， 600mA同步降压型稳压器，旁路晶体管
| 型号： | LTC3408EDD |
| 厂家： | 
Linear |
| 描述： | 1.5MHz, 600mA Synchronous Step-Down Regulator with Bypass Transistor |
| 文件： | 总12页 (文件大小：157K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3408
1.5MHz, 600mA
Synchronous Step-Down
Regulator with Bypass Transistor
U
FEATURES
DESCRIPTIO
The LTC®3408 is a high efficiency monolithic synchro-
nous buck regulator optimized for WCDMA power ampli-
fier applications. The output voltage can be dynamically
programmed from 0.3V to 3.5V. At VOUT > 3.6V an internal
0.08Ω bypass P-channel MOSFET connects VOUT directly
to VIN, eliminating power loss through the inductor.
■
Dynamically Adjustable Output from 0.3V to 3.5V
■
■
600mA Output Current
Internal 0.08
Transistor
High Efficiency: Up to 96%
1.5MHz Constant Frequency Operation
No Schottky Diode Required
Low Dropout Operation: 100% Duty Cycle
2.5V to 5V Input Voltage Range
Shutdown Mode Draws <1µA Supply Current
Current Mode Operation for Excellent Line and
Load Transient Response
Overtemperature Protected
Available in 8-Lead 3mm × 3mm DFN Package
Ω P-Channel MOSFET Bypass
■
■
■
■
■
■
■
The input voltage range is 2.5V to 5V making the LTC3408
ideally suited for single Li-Ion battery-powered applica-
tions. 100% duty cycle provides low dropout operation,
extending battery life in portable systems.
Switching frequency is internally set at 1.5MHz, allowing
the use of small surface mount inductors and capacitors.
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode.
■
■
U
The LTC3408 is available in a low profile (0.75mm) 8-lead
3mm × 3mm DFN package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
U.S. Patent Numbers: 5481178, 6580258, 6304066, 6127815, 6498466, 6611131
APPLICATIO S
■
WCDMA Cell Phone Power Amplifiers
Wireless Modems
■
U
TYPICAL APPLICATIO
Efficiency Power Lost vs Load Current
WCDMA Transmitter Power Supply
100
90
80
70
60
50
40
30
20
10
0
1
4.7µH*
V
V
IN
2.7V
OUT
REF
3× V
V
SW
LTC3408
IN
†
C
**
600mA
C
TO 5V
OUT
IN
4.7µF
10µF
CER
0.1
CER
V
OUT
RUN
REF
GND
OUTPUT
WCDMA
RF PA
PROGRAMMING
DAC
0.01
0.01
V
V
V
V
= 1.2V
= 1.5V
= 1.8V
= 2.5V
OUT
OUT
OUT
OUT
*MURATA LQH32CN4R7M11
3403 TA01
**TAIYO YUDEN JMK212BJ475MG
†
TAIYO YUDEN JMK212BJ106MN
1
10
100
1000
LOAD CURRENT (mA)
3408 F04
3408f
1
LTC3408
W W
U W
U W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
Input Supply Voltage (<300µs) .................. –0.3V to 6V
Input Supply Voltage (DC) ....................... –0.3V to 5.5V
RUN, REF, VOUT Voltages .......................... –0.3V to VIN
SW Voltage (DC) ......................... –0.3V to (VIN + 0.3V)
P-Channel Switch Source Current (DC) ............. 800mA
N-Channel Switch Sink Current (DC) ................. 800mA
Peak SW Sink and Source Current ........................ 1.3A
Bypass P-Channel FET Source Current (DC).............. 1A
Operating Temperature Range (Note 2) .. –40°C to 85°C
Junction Temperature (Note 3)............................ 125°C
Storage Temperature Range ................ –65°C to 125°C
ORDER PART
TOP VIEW
NUMBER
V
1
2
3
4
8
7
6
5
V
V
OUT
OUT
LTC3408EDD
V
IN
IN
9
GND
SW
REF
RUN
DD PACKAGE
DD PART MARKING
LAEA
8-LEAD (3mm × 3mm) PLASTIC DFN
EXPOSED PAD IS GND (PIN 9)
MUST BE SOLDERED TO PCB
TJMAX = 125°C, θJA = 43°C/ W, θJC = 3°C/ W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
VIN = 3.6V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Regulated Output Voltage
V
V
= 1.1V
= 0.1V
●
●
3.23
0.25
3.3
0.3
3.37
0.35
V
V
OUT
REF
REF
∆V
Output Voltage Line Regulation
Peak Inductor Current
V
V
= 2.5V to 5V, V = 0.6V
●
0.1
1
0.4
%/V
A
OUT
IN
IN
REF
I
= 3V, V = 0.9V
0.70
2.5
1.25
PK
REF
V
V
Output Voltage Load Regulation
Input Voltage Range
0.7
%
V
LOADREG
IN
●
●
5
I
Input Current
Shutdown Current
V
V
= 1.2V, SW = Open
= 0V, SW = Open
1.5
0.1
2.5
1
mA
µA
MHz
kHz
S
RUN
RUN
f
Oscillator Frequency
V
V
≥ 0.25V
≤ 0.1V
1.2
550
1.5
700
1.8
850
OSC
REF
REF
V
Bypass PFET Turn-Off Threshold
Bypass PFET Turn-On Threshold
V
V
=
=
1.167
1.2
V
V
REF
REF
REF
1.21
1.26
0.4
R
R
R
R
R
R
of P-Channel FET
I
I
= 160mA, Wafer Level
= 160mA, DD Package
0.3
0.4
Ω
Ω
Ω
Ω
Ω
Ω
PFET
DS(ON)
DS(ON)
DS(ON)
SW
SW
of N-Channel FET
I
I
= –160mA, Wafer Level
= –160mA, DD Package
0.3
0.4
0.4
NFET
SW
SW
of Bypass P-Channel FET
I
I
= 100mA, V = 3V, Wafer Level
= 100mA, V = 3V, DD Package (Note 4)
0.05
0.08
0.08
BYPASS
OUT
OUT
IN
IN
I
I
SW Leakage
V
V
= 0V, V = 0V or 5V, V = 5V
0.01
0.01
1
1
1
µA
µA
V
LSW
RUN
OUT
SW
IN
Bypass PFET Leakage
RUN Threshold
= 0V, V = 5V, V = 0V
LBYP
IN
REF
V
●
●
●
0.3
1.5
1
RUN
RUN
REF
I
I
RUN Input Current
REF Input Current
V
= 0V or 2.5V
0.01
0.01
µA
µA
RUN
1
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 2: The LTC3408E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
Note 3: T is calculated from the ambient temperature T and power
J
A
dissipation P according to the following formula:
D
LTC3408: T = T + (P )(43°C/W)
J
A
D
3408f
2
LTC3408
ELECTRICAL CHARACTERISTICS
Note 4: When V > 1.2V and V x3 > V , the P-channel FET will be on
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
REF
REF
IN
in parallel with the bypass PFET reducing the overall R
.
DS(ON)
Note 5: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
U W
(From Figure 1)
TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs Output Current
Efficiency vs VOUT
Efficiency vs Output Current
110
100
90
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
T
= 25°C
OUT
T
= 25°C
IN
T
= 25°C
OUT
A
V
A
A
= 1.5V
V
= 3.6V
V
= 1.2V
100mA
V
= 3.6V
V
= 3.6V
IN
IN
600mA
V
= 4.2V
V
= 4.2V
IN
IN
80
70
60
50
0
1
2
3
4
0.1
1
10
100
1000
0.1
1
10
100
1000
V
(V)
OUTPUT CURRENT (mA)
OUT
OUTPUT CURRENT (mA)
3408 G02
3408 G04
3408 G03
Oscillator Frequency
vs Supply Voltage
Oscillator Frequency
vs Temperature
Efficiency vs Output Current
1.70
1.65
1.60
1.55
1.50
1.45
1.40
1.35
1.30
1.8
1.7
1.6
1.5
1.4
1.3
1.2
100
90
80
70
60
50
40
30
20
10
0
T
= 25°C
T
= 25°C
OUT
A
V
= 3.6V
A
IN
V
= 2.5V
V
IN
= 3.6V
V
IN
= 4.2V
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
2
3
4
5
6
0.1
1
10
100
1000
SUPPLY VOLTAGE (V)
OUTPUT CURRENT (mA)
3408 G07
3408 G05
3408 G06
3408f
3
LTC3408
TYPICAL PERFOR A CE CHARACTERISTICS (From Figure 1)
U W
Frequency vs VOUT
Output Voltage vs Load Current
RDS(ON) vs Input Voltage
1600
1400
1200
1000
800
0.7
0.6
1.844
1.834
1.824
1.814
1.804
1.794
1.784
1.774
T
= 25°C
IN
T
= 25°C
T
= 25°C
IN
A
A
A
V
= 3.6V
V
= 3.6V
MAIN
SWITCH
0.5
0.4
0.3
0.2
0.1
SYNCHRONOUS
SWITCH
BYPASS
SWITCH
600
400
0
0
0.4
0.6
(V)
0.8
1.0
1.2
0.2
0
300
700
9001000
0
1
2
3
4
5
6
7
100 200
400 500 600
800
V
OUT
LOAD CURRENT (mA)
INPUT VOTLAGE (V)
3408 G08
3408 G09
3408 G10
Dynamic Supply Current
vs Supply Voltage
R
DS(ON) vs Temperature
Switch Leakage vs Temperature
0.7
0.6
300
250
200
150
4500
4000
3500
3000
2500
2000
1500
1000
500
T
= 25°C
V
= 5.5V
A
V
= 2.7V
IN
IN
V
I
= 1.8V
RUN = 0V
OUT
= 0A
V
= 3.6V
LOAD
IN
V
= 4.2V
IN
FORCED CONTINUOUS
MODE
0.5
0.4
0.3
0.2
0.1
MAIN
SWITCH
SYNCHRONOUS SWITCH
100
50
0
BYPASS
SWITCH
MAIN SWITCH
SYNCHRONOUS SWITCH
V
= 3V
IN
V
= 4.2V
75
IN
0
0
50
100 125
–50 –25
0
25
4
50
100 125
2
3
5
6
–50 –25
0
25
75
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
3408 G11
3408 G12
3408 G13
Switch Leakage vs Input Voltage
Start-Up from Shutdown
120
100
80
60
40
20
0
T
= 25°C
A
RUN
2V/DIV
RUN = 0V
SYNCHRONOUS
SWITCH
V
OUT
1V/DIV
MAIN
SWITCH
I
L
500mA/DIV
3408 G15
V
V
= 3.6V
40µs/DIV
IN
= 0.6V
REF
R
= 3Ω
LOAD
0
2
3
4
5
6
1
INPUT VOLTAGE (V)
3408 G14
3408f
4
LTC3408
U W
(From Figure 1)
TYPICAL PERFOR A CE CHARACTERISTICS
Output Ripple Waveform
Load Step Response
V
OUT
V
OUT
100mV/DIV
10mV/DIV
I
L
500mA/DIV
I
L
I
LOAD
100mA/DIV
500mA/DIV
3408 G17
3408 G16
V
V
I
= 3.6V
= 0.6V
LOAD
V
V
I
= 3.6V
= 0.6V
LOAD
20µs/DIV
200ns/DIV
IN
REF
IN
REF
= 0mA TO 600mA
= 0A
REF Transient
VOUT vs VREF
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
I
I
= 100mA
V
= 4.2V
L
IN
V
= 600mA
REF
L
0.5V/DIV
V
OUT
1V/DIV
3408 G18
V
V
= 4.2V
40µs/DIV
IN
= 0V TO 1.4V
REF
R
LOAD
= 5Ω
0
0.5
1.5
1.0
V
(V)
REF
3408 G19
U
U
U
PI FU CTIO S
VOUT (Pins1, 8):OutputVoltageFeedbackPin. Aninternal
resistive divider divides the output voltage down by 3 for
comparison to the external reference voltage. The drain of
the P-channel bypass MOSFET is connected to this pin.
RUN (Pin 5): Run Control Input. Forcing this pin above
1.5V enables the part. Forcing this pin below 0.3V shuts
down the device. In shutdown, all functions are disabled
drawing <1µA supply current. Do not leave RUN floating.
VIN (Pins 2, 7): Main Supply Pin. Must be closely de-
coupled to GND, Pin 3, with a 10µF or greater ceramic
capacitor.
REF(Pin6): ExternalReferenceInput. Controlstheoutput
voltage to 3× the applied voltage at REF. Also turns on the
bypass MOSFET when VREF > 1.2V.
GND (Pin 3): Ground Pin.
Exposed Pad (Pin 9): Connect to GND, Pin 3.
SW (Pin 4): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchro-
nous power MOSFET switches.
3408f
5
LTC3408
U
U
W
FU CTIO AL DIAGRA
SLOPE
COMP
OSC
OSC
V
V
2
7
IN
FREQ
–
+
÷
2
REF
6
–
+
SLEEP
+
–
5Ω
IN
+
–
V
OUT
0.85V
I
COMP
EA
FB
BURST
8
360k
180k
V
Q
Q
S
OUT
+
–
1
I
R
BCMP
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
RS LATCH
ANTI-
SHOOT-
THRU
P-CHANNEL
V
IN
SW
4
9
–
BCMP
+
1.2V
+
–
RUN
5
I
RCMP
3
3408 BD
GND
U
OPERATIO
(Refer to Functional Diagram)
4.7µH*
V
IN
V
OUT
3× V
output voltage can respond quickly to the external refer-
ence voltage by sourcing or sinking current as needed.
2.7V
TO 5V
V
SW
REF
600mA
IN
†
C
**
C
OUT
IN
LTC3408
4.7µF
10µF
CER
V
RUN
OUT
CER
REF
REF
Controlling the Output Voltage
GND
*MURATA LQH32CN4R7M11
**TAIYO YUDEN JMK212BJ475MG
The output voltage can be dynamically programmed from
0.3V to 3.5V using theREF input. Because the gain toVOUT
from REF is internally set to 3, the corresponding input
range at REF is 0.1V to 1.167V. VOUT can be modulated
during operation by driving REF with an external DAC.
†
TAIYO YUDEN JMK212BJ106MN
3403 F01
Figure 1. Typical Application
Main Control Loop
TheLTC3408usesaconstantfrequency,currentmodestep-
down architecture. The main (P-channel MOSFET), syn-
chronous (N-channel MOSFET) and bypass (P-channel
MOSFET) switches are internal. During normal operation,
the internal main switch is turned on each cycle when the
oscillator sets the RS latch, and turned off when the cur-
rent comparator, ICOMP, resets the RS latch. The peak in-
ductor current at which ICOMP resets the RS latch, is con-
trolled by the output of error amplifier EA. When the load
current increases, it causes a slight decrease in the feed-
back voltage, FB, relative to the external reference, which
inturn,causestheEAamplifier’soutputvoltagetoincrease
untiltheaverageinductorcurrentmatchesthenewloadcur-
rent. While the main switch is off, the synchronous switch
is turned on until the beginning of the next clock cycle.
WhenREFexceeds1.2V,a0.08ΩinternalbypassP-channel
MOSFET connects VIN to VOUT, dramatically reducing the
drop across the inductor and the main switch.
Short-Circuit Protection
A current sense comparator monitors the current across
the bypass P-channel MOSFET with a trip current of about
2.5A. When this current is exceeded during a VOUT short
to ground, the bypass P-channel MOSFET is immediately
turned off. The propagation delay of the current sensing
comparator, IBCMP, detecting an overcurrent condition to
turningoffthebypassP-channelMOSFETisapproxmately
100ns.OncethebypassP-channelMOSFETisoffforabout
10µs to 20µs, it is allowed to turn back on. The initial
current limit is then lowered to about 1.6A after the first
current limit trip. If the short to ground persists, the cur-
The LTC3408 operates in forced continuous mode where
the inductor current is constantly cycled. In this mode, the
rent comparator will trip at the lower current limit, turning
3408f
6
LTC3408
U
OPERATIO
(Refer to Functional Diagram)
but less than VIN/3, the bypass P-channel MOSFET will be
on, but the main switch will be off. For best performance
and lowest voltage drop from VIN to VOUT, always ensure
that the REF voltage is greater than both 1.2V and VIN/3.
offandonthebypassP-channelMOSFETwithafrequency
of approximately 50kHz to 100kHz at 1.6A peak current.
This will continue until the short is removed. While the
bypass P-channel MOSFET is pulsing intermittently, the
inherent current limit of the step-down regulator limits its
peak current to about 1A.
An important detail to remember is that at low input
supply voltages, the RDS(ON) of the P-channel switch
increases (see Typical Performance Characteristics).
Therefore, the user should calculate the power dissipa-
tion when the LTC3408 is used at 100% duty cycle with
low input voltage (See Thermal Considerations in the
Applications Information section).
Dropout Operation
If the reference voltage would cause VOUT to exceed VIN,
the LTC3408 enters dropout operation. During dropout,
the main switch remains on continuously and operates at
100%dutycycle. IfthevoltageatREFislessthan1.2V, the
bypass P-channel MOSFET will stay off even in dropout
operation. The output voltage is then determined by the
inputvoltageminusthevoltagedropacrossthemainswitch
and the inductor. If the voltage at REF is greater than 1.2V,
Low Supply Operation
The LTC3408 will operate with input supply voltages as
low as 2.5V, but the maximum allowable output current is
reduced at this low voltage. Figure 2 shows the reduction
in the maximum output current as a function of input
voltage for various output voltages.
1200
1000
Slope Compensation and Inductor Peak Current
V
V
= 1.8V
= 1.5V
OUT
OUT
800
600
400
200
0
V
= 2.5V
OUT
Slope compensation provides stability in constant fre-
quency architectures by preventing subharmonic oscilla-
tions at high duty cycles. It is accomplished internally by
adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%. Normally, this
results in a reduction of maximum inductor peak current
for duty cycles >40%. However, the LTC3408 uses a
patent-pending scheme that counteracts this compensat-
ing ramp, which allows the maximum inductor peak
current to remain unaffected throughout all duty cycles.
2.5
3.5
4.0
4.5
5.0
5.5
3.0
SUPPLY VOLTAGE (V)
3408 F02
Figure 2. Maximum Output Current vs Input Voltage
W U U
U
APPLICATIO S I FOR ATIO
currents. As Equation 1 shows, a greater difference be-
tween VIN and VOUT produces a larger ripple current.
Where these voltages are subject to change, the highest
VIN and lowest VOUT will determine the maximum ripple
current. A reasonable starting point for setting ripple
currentisIL=120mA(20%ofthemaximumload,600mA).
The basic LTC3408 application circuit is shown in Fig-
ure 1. External component selection is driven by the load
requirementandbeginswiththeselectionofLfollowedby
CIN and COUT
.
Inductor Selection
For most applications, the value of the inductor will fall in
the range of 4µH to 6µH. Its value is chosen based on the
desired ripple current. Large value inductors lower ripple
current and small value inductors result in higher ripple
1
(f)(L)
VOUT
V
IN
∆IL =
VOUT 1–
(1)
3408f
7
LTC3408
W U U
U
APPLICATIO S I FOR ATIO
At output voltages below 0.6V, the switching frequency
decreaseslinearlytoaminimumofapproximately700kHz.
This places the maximum ripple current (in forced con-
tinuous mode) at the highest input voltage and the lowest
output voltage. In practice, the resulting ouput ripple
voltage is 10mV to 15mV using the components specified
in Figure 1.
maximum RMS current must be used. The maximum
RMS capacitor current is given by:
[VOUT (V – VOUT )]1/2
IN
CIN required IRMS ≅ IOMAX
V
IN
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
usedfordesignbecauseevensignificantdeviationsdonot
offer much relief. Note that the capacitor manufacturer’s
ripplecurrentratingsareoftenbasedon2000hoursoflife.
This makes it advisable to further derate the capacitor, or
choose a capacitor rated at a higher temperature than re-
quired. Always consult the manufacturer if there is any
question.
TheDCcurrentratingoftheinductorshouldbeatleastequal
to the maximum load current plus half the ripple current to
prevent core saturation. Thus, a 660mA rated inductor
shouldbeenoughformostapplications(600mA+60mA).
Forbetterefficiency,choosealowDC-resistanceinductor.
Inductor Core Selection
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR
requirement for COUT has been met, the RMS current
ratinggenerallyfarexceedstheIRIPPLE(P-P) requirement.
The output ripple VOUT is determined by:
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy mate-
rialsaresmallanddon’tradiatemuchenergybutgenerally
cost more than powdered iron core inductors with similar
electrical characteristics. The choice of which style induc-
tor to use often depends more on the price versus size
requirements and any radiated field/EMI requirements
than on what the LTC3408 requires to operate. Table 1
shows some typical surface mount inductors that work
well in LTC3408 applications.
1
∆VOUT ≅ ∆I ESR +
L
8f C
OUT
where f = operating frequency, COUT = output capacitance
and IL = ripple current in the inductor. For a fixed output
voltage, the output ripple is highest at maximum input
voltage since IL increases with input voltage.
Table 1. Representative Surface Mount Inductors
PART
NUMBER
VALUE
(µH)
DCR
MAX DC
SIZE
3
(ΩMAX) CURRENT (A) WxLxH (mm )
Aluminum electrolytic and dry tantalum capacitors are
bothavailableinsurfacemountconfigurations.Inthecase
oftantalum,itiscriticalthatthecapacitorsaresurgetested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalum. These are
specially constructed and tested for low ESR so they give
the lowest ESR for a given volume. Other capacitor types
include Sanyo POSCAP, Kemet T510 and T495 series, and
Sprague 593D and 595D series. Consult the manufacturer
for other specific recommendations.
Sumida
4.7
4.7
4.7
4.7
4.7
4.7
0.135
0.078
0.216
0.150
0.250
0.20
0.5
0.63
0.75
0.65
0.210
0.79
3.2 x 3.2 x 1.2
3.2 x 3.2 x 2.0
3.5 x 4.1 x 0.8
2.5 x 3.2 x 2.0
1.6 x 2.0 x 1.6
3.6 x 3.6 x 1.2
CDRH2D11
Sumida
CDRH2D18/LD
Sumida
CMD4D06
Murata
LQH32C
Taiyo Yuden
LBLQ2016
Toko
D312C
The bulk capacitance values in Figure 1(a) (CIN = 10µF,
COUT = 4.7µF) are tailored to mobile phone applications, in
which the output voltage is expected to slew quickly
accordingtotheneedsofthepoweramplifier. Holdingthe
output capacitor to 4.7µF facilitates rapid charging and
discharging. Whentheoutputvoltagedescendsquicklyin
CIN and COUT Selection
Incontinuousmode,thesourcecurrentofthetopMOSFET
is a square wave of duty cycle VOUT/VIN. To prevent large
voltage transients, a low ESR input capacitor sized for the
3408f
8
LTC3408
W U U
APPLICATIO S I FOR ATIO
U
forced continuous mode, the LTC3408 will actually pull
current from the output until the command from VREF is
satisfied. Onalternatehalfcyles, thiscurrentactuallyexits
the VIN terminal, potentially causing a rise in VIN and
forcing current into the battery. To prevent deterioration
of the battery, use sufficient bulk capacitance with low
ESR; at least 10µF is recommended.
and get damaged. The faster VOUT is commanded low, the
higher is the voltage spike at the input. For best results,
ramp the REF pin from high to low as slow as the
application will allow. Avoid abrupt changes in voltage of
>0.2V/µs. If ramp control is unavailable, an RC filter with
a time constant of 10µs can be inserted between the REF
pin and the DAC as shown in Figure 3.
Using Ceramic Input and Output Capacitors
LTC3408
10k
REF
DAC
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. Because the
LTC3408’s control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
1000pF
GND
3408 F03
Figure 3. Filtering the REF Pin
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
oftenusefultoanalyzeindividuallossestodeterminewhat
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
However, care must be taken when ceramic capacitors are
usedattheinputandtheoutput.Whenaceramiccapacitor
is used at the input and the power is supplied by a wall
adapter through long wires, a load step at the output can
induce ringing at the input, VIN. At best, this ringing can
couple to the output and be mistaken as loop instability. At
worst, a sudden inrush of current through the long wires
can potentially cause a voltage spike at VIN large enough
to damage the part.
Efficiency = 100% – (L1 + L2 + L3 + ...)
whereL1, L2, etc. aretheindividuallossesasapercentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3408 circuits: VIN quiescent current and I2R
losses. The VIN quiescent current loss dominates the effi-
ciencylossatlowloadcurrentswhereastheI2Rlossdomi-
nates the efficiency loss at medium to high load currents.
In a typical efficiency plot, the efficiency curve at low load
currents can be misleading since the actual power lost is
of little consequence as illustrated in Figure 4.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
Ceramic capacitors of Y5V material are not recommended
because normal operating voltages cause their bulk ca-
pacitance to become much less than the nominal value.
Programming the Output Voltage With a DAC
1.TheV quiescentcurrentconsistsoftwocomponents:
IN
Theoutputvoltagecanbedynamicallyprogrammedtoany
voltage from 0.3V to 3.5V with an external DAC driving the
REF pin. When the output is commanded low, the output
voltage descends quickly in forced continuous mode
pulling current from the output and transferring it to the
input. If the input is not connected to a low impedance
source capable of absorbing the energy, the input voltage
couldriseabovetheabsolutemaximumvoltageofthepart
the DC bias current as given in the electrical characteris-
ticsandtheinternalmainswitchandsynchronousswitch
gate charge currents. The gate charge current results
fromswitchingthegatecapacitanceoftheinternalpower
MOSFET switches. Each time the gate is switched from
high to low to high again, a packet of charge, dQ, moves
from V to ground. The resulting dQ/dt is typically larger
IN
than the DC bias current. In continuous mode,
3408f
9
LTC3408
W U U
U
APPLICATIO S I FOR ATIO
100
90
80
70
60
50
40
30
20
10
0
1
junction temperature of the part. If the junction tempera-
ture reaches approximately 150°C, both power switches
will be turned off and the SW node will become high
impedance.
0.1
To prevent the LTC3408 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
0.01
0.01
V
V
V
V
= 1.2V
= 1.5V
= 1.8V
= 2.5V
OUT
OUT
OUT
OUT
1
10
100
1000
LOAD CURRENT (mA)
TR = (PD)(θJA)
3408 F04
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to the
ambient temperature.
Figure 4. Power Lost vs Load Current
IGATECHG = f(QT + QB), where QT and QB are the gate
charges of the internal top and bottom switches. Both the
DC bias and gate charge losses are proportional to VIN,
thus, their effects will be more pronounced at higher
supply voltages. (The gate charge of the bypass FET is,
of course, negligible because it is infrequently cycled.)
2. I2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor RL. In con-
tinuousmode, theaverageoutputcurrentflowingthrough
inductor L is “chopped” between the main switch and the
synchronous switch. Thus, the series resistance looking
into the SW pin is a function of both top and bottom
MOSFET RDS(ON) and the duty cycle (DC) as follows:
The junction temperature, TJ, is given by:
TJ = TA + TR
where TA is the ambient temperature.
As an example, consider the LTC3408 in dropout at an
inputvoltageof2.7V,aloadcurrentof600mA(0.9V≤VREF
< 1.2V) and an ambient temperature of 70°C. With VREF
<
1.2V, the entire 600mA flows through the main P-channel
FET. From the typical performance graph of switch resis-
tance, the RDS(ON) of the P-channel switch at 70°C is
approximately 0.52Ω. Therefore, power dissipated by the
part is:
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
PD = (ILOAD2) • RDS(ON) = 187.2mW
The RDS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Charateristics
curves. Hence, to obtain I2R losses, simply add RSW to RL
and multiply the result by the square of the average output
current.
For the 8L DFN package, the θJA is 43°C/W. Thus, the
junction temperature of the regulator is:
TJ = 70°C + (0.1872)(43) = 78°C
which is below the maximum junction temperature of
125°C.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
Modifying this example, suppose that VREF is raised to
1.2V or higher. This turns on the bypass P-channel FET as
wellasthemainP-channelFET.Assumethattheinductor’s
DC resistance is 0.1Ω, the RDS(ON) of the main P-channel
switch is 0.52Ω, and the RDS(ON) of the bypass P-channel
switchis0.08Ω.ThecurrentthroughtheP-channelswitch
and the inductor will be 69mA, causing power dissipation
of (0.069A)2 • 0.62Ω = 2.9mW. The bypass FET will
Thermal Considerations
In most applications the LTC3408 does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3408 is running at high ambient tempera-
ture with low supply voltage and high duty cycles, such as
in dropout, the heat dissipated may exceed the maximum
3408f
10
LTC3408
W U U
U
APPLICATIO S I FOR ATIO
dissipate (0.531A)2 • 0.08Ω = 22.6mW. Thus, TJ = 70°C +
(0.0143 + 0.0425)(43) = 71.1°C.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3408. These items are also illustrated graphically in
Figures 5 and 6. Check the following in your layout:
Reductions in power dissipation occur at higher supply
voltages, where the junction temperature is lower due to
reduced switch resistance (RDS(ON)).
1. The power traces, consisting of the GND trace, the SW
traceandtheVIN traceshouldbekeptshort,directandwide.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (ILOAD • ESR), where ESR is the effective series
resistance of COUT. ILOAD also begins to charge or dis-
chargeCOUT, whichgeneratesafeedbackerrorsignal. The
regulator loop then acts to return VOUT to its steady state
value.DuringthisrecoverytimeVOUT canbemonitoredfor
overshoot or ringing that would indicate a stability prob-
lem. For a detailed explanation of switching control loop
theory, see Application Note 76.
2. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC drive to the
internal power MOSFETs.
3. Keep the (–) plates of CIN and COUT as close as possible.
Design Example
As a design example, assume the LTC3408 is used in a
singlelithium-ionbattery-poweredcellularphoneapplica-
tion. The VIN will be operating from a maximum of 4.2V
down to about 2.7V. The load current requirement is a
maximum of 0.6A but most of the time it will be in standby
mode, requiring only 2mA. Efficiency at both low and high
load currents is important. Output voltage is 2.5V. With
this information we can calculate L using Equation (1),
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
dischargedbypasscapacitorsareeffectivelyputinparallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 • CLOAD).
Thus, a 10µF capacitor charging to 3.3V would require a
250µs rise time, limiting the charging current to about
130mA.
1
VOUT
V
IN
L =
VOUT 1–
(2)
(f)(∆IL)
VIA TO REF
R
REF
TO DAC
C
OUT
VIA TO PIN 1
V
OUT
VIA TO PIN 8
C
OUT
C
IN
1
2
3
4
8
7
6
5
V
V
V
OUT
OUT
R
VIA TO PIN 2
REF
V
IN
IN
V
1
2
3
4
8
7
6
5
V
V
OUT
OUT
V
DAC
IN
C
C
IN
V
IN
REF
IN
LTC3408
GND
SW
REF
GND
SW
REF
VIA TO PIN 7
C
REF
RUN
RUN
LTC3408
L1
3403 F05
VIA TO V
VIA TO GND
IN
BOLD LINES INDICATE HIGH CURRENT PATHS
3408 F06
Figure 5. Layout Diagram
Figure 6. Suggested Layout
3408f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LTC3408
W U U
U
APPLICATIO S I FOR ATIO
ESR of less than 0.25Ω. In most cases, a ceramic capaci-
tor will satisfy this requirement.
Substituting VOUT = 2.5V, VIN = 4.2V, IL = 120mA and
f = 1.5MHz in Equation (2) gives:
4.7µH*
V
IN
2, 7
4
2.5V
1.5MHz(120mA)
2.5V
4.2V
V
2.7V
V
SW
OUT
IN
OUT
**
L =
1–
= 5.6µH
TO 5V
†
C
C
IN
OUT
LTC3408
10µF
CER
4.7µF
CER
5
6
1, 8
*
RUN
REF
V
A 4.7µH inductor works well for this application. For best
efficiency choose a 660mA or greater inductor with less
than 0.2Ω series resistance.
3403 F07
10k
MURATA LQH32CN4R7M11
TAIYO YUDEN JMK212BJ475MG
TAIYO YUDEN JMK212BJ106MN
DAC
**
GND
3, 9
†
1000pF
CIN will require an RMS current rating of at least 0.3A ≅
LOAD(MAX)/2 at temperature and COUT will require an
Figure 7
U
PACKAGE DESCRIPTIO
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
R = 0.115
0.38 0.10
8
TYP
5
0.675 0.05
3.5 0.05
2.15 0.05 (2 SIDES)
1.65 0.05
3.00 0.10
(4 SIDES)
1.65 0.10
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
PACKAGE
OUTLINE
(DD8) DFN 1203
4
1
0.25 0.05
0.75 0.05
0.200 REF
0.25 0.05
0.50 BSC
0.50
BSC
2.38 0.05
(2 SIDES)
2.38 0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC3403
1.5MHz, 600mA Synchronous Step-Down Regulator
with Bypass Transistor
Up to 96% Efficiency, V : 2.5V to 5V, V : 0.3V to 3.5V,
IN OUT
I = 20µA, I < 1µA, DFN Package
Q
SD
LTC3405/LTC3405A-1.5/ 1.5MHz, 300mA (I ) Synchronous
Up to 95% Efficiency, V : 2.5V to 5.5V, I = 20µA,
IN Q
OUT
LTC3405A-1.8
Monolithic Step-Down Regulators
Fixed Output Voltages Available, ThinSOTTM Package
LTC3406B/LTC3406B-1.5/ 1.5MHz, 600mA, (I ) Synchronous Monolithic
Up to 95% Efficiency, with Pulse Skipping Mode Enabled,
Fixed Output Voltages Available, ThinSOT Package
OUT
LTC3406B-1.8
Step-Down Regulators with Burst Mode Defeat
LTC3407/LTC3407-2
1.5MHz/2.25MHz, 600mA/800mA Dual (I ) Synchronous
Up to 91% Efficiency, V : 2.5V to 5.5V, I = 4µA,
IN Q
MS10 Package
OUT
Monolithic Step-Down Regulator
LTC5505
ThinSOT RF Power Detector with Buffered Output
and >40dB Dynamic Range
300MHz to 3GHz, Temperatrue Compensated,
LTC5505-1: –28dBm to 18dBm,
LTC5505-2: –32dBm to 12dBm, V = 2.7V to 6V
CC
Burst Mode is a registered trademark of Linear Technology Corporaton. ThinSOT is a trademark of Linear Technology Corporation.
3408f
LT/TP 0504 1K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
LINEAR TECHNOLOGY CORPORATION 2003
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