LTC3409AEDD#TRPBF [Linear]
LTC3409A - 600mA Low VIN Buck Regulator in 3mm x 3mm DFN; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C;
| 型号： | LTC3409AEDD#TRPBF |
| 厂家： | 
Linear |
| 描述： | LTC3409A - 600mA Low VIN Buck Regulator in 3mm x 3mm DFN; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C 稳压器 |
| 文件： | 总20页 (文件大小：210K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3602
2.5A, 10V, Monolithic
Synchronous Step-Down
Regulator
FEATURES
DESCRIPTION
TheLTC®3602isahighefficiency,monolithicsynchronous,
step-downDC/DCconverterutilizingaconstant-frequency,
currentmodearchitecture.Itoperatesfromaninputvoltage
range of 4.5V to 10V and provides an adjustable regulated
output voltage from 0.6V to 9.5V while delivering up to
2.5A of output current. The internal synchronous power
switch with 65mΩ on-resistance increases efficiency
and eliminates the need for an external Schottky diode.
The switching frequency can either be set by an external
resistororsynchronizedtoanexternalclock. OPTI-LOOP®
compensationallowsthetransientresponsetobeoptimized
over a wide range of loads and output capacitors.
n
Wide Input Voltage Range: 4.5V to 10V
n
2.5A Output Current
n
Low R
Internal Switches: 65mΩ and 90mΩ
DS(ON)
n
n
n
n
n
n
n
n
n
Programmable Frequency: 300kHz to 3MHz
Low Quiescent Current: 75μA
0.6V 1ꢀ Reference Allows Low Output Voltage
99ꢀ Maximum Duty Cycle
Adjustable Burst Mode® Clamp
Synchronizable to External Clock
Power Good Output Voltage Monitor
Overtemperature Protection
Available in 16-Lead Exposed TSSOP and
4mm × 4mm QFN Packages
The LTC3602 can be configured for either Burst Mode op-
erationorforcedcontinuousoperation.Forcedcontinuous
operation reduces noise and RF interference, while Burst
Mode operation provides the high efficiency at light loads.
In Burst Mode operation, external control of the burst
clamp level allows the output voltage ripple to be adjusted
according to the requirements of the application.
APPLICATIONS
n
Point-of-Load Supplies
n
Portable Instruments
n
Server Backplane Power
Battery-Powered Devices
n
, LT, LTC, LTM, Burst Mode and OPTI-LOOP are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
3.3V, 2.5A, 1MHz Step-Down Regulator
Efficiency and Power Loss vs Load Current
100
95
90
85
80
75
70
65
60
10000
1000
100
10
V
IN
V
= 7V
IN
4.5V TO 10V
EFFICIENCY
22μF
1μF
PV
INTV
IN
CC
RUN
BOOST
POWER LOSS
0.22μF
2.2μH
R
T
V
3.3V
2.5A
OUT
105k
PGOOD
TRACK/SS
SW
LTC3602
100μF
4.32k
1nF
I
PGND
TH
1
10
SYNC/MODE
V
FB
0.01
0.1
1
475k
22pF
LOAD CURRENT (A)
3602 TA01b
105k
3602 TA01
3602fb
1
LTC3602
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Input Supply Voltage (PV ).......................–0.3V to 11V
Peak SW Sink and Source Current (Note 7).............6.5A
Operating Temperature Range (Note 2)....–40°C to 85°C
Junction Temperature (Notes 5, 6)........................ 125°C
Lead Temperature
IN
SW (DC)...................................... –0.3V to (PV + 0.3V)
IN
BOOST ................................. (V –0.3V) to (V + 6V)
SW
SW
RUN ...........................................................–0.3V to 11V
All Other Pins...............................................–0.3V to 6V
(Soldering, FE Package 10 seconds)................. 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
20 19 18 17 16
SYNC/MODE
PGOOD
1
2
3
4
5
6
7
8
16 INTV
CC
15 PV
IN
PGND
PV
PV
1
2
3
4
5
15
14
13
12
11
IN
IN
R
14 BOOST
13 SW
T
PGND
I
TH
17
PGND
INTV
21
8
CC
V
FB
12 SW
PGND
SYNC/MODE
RUN
11 SW
TRACK/SS
PGOOD
TRACK/SS
PGND
10 PGND
6
7
9 10
9
PGND
FE PACKAGE
16-LEAD PLASTIC TSSOP
UF PACKAGE
20-LEAD (4mm s 4mm) PLASTIC QFN
T
= 125°C, θ = 38°C/W, θ = 10°C/W
JA JC
EXPOSED PAD (PIN 17) IS SGND, MUST BE SOLDERED TO PCB
JMAX
T
= 125°C, θ = 37°C/W, θ = 10°C/W
JA JC
JMAX
EXPOSED PAD (PIN 21) IS SGND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC3602EFE#PBF
LTC3602IFE#PBF
LTC3602EUF#PBF
LTC3602IUF#PBF
TAPE AND REEL
PART MARKING*
3602FE
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3602EFE#TRPBF
LTC3602IFE#TRPBF
LTC3602EUF#TRPBF
LTC3602IUF#TRPBF
16-Lead Plastic TSSOP
–40°C to 85°C
–40°C to 85°C
–40°C to 85°C
–40°C to 85°C
3602FE
16-Lead Plastic TSSOP
3602
20-Lead (4mm × 4mm) Plastic QFN
20-Lead (4mm × 4mm) Plastic QFN
3602
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 8.4V unless otherwise specified.
SYMBOL
PV
PARAMETER
CONDITIONS
MIN
4.5
TYP
MAX
10
UNITS
V
Operating Voltage Range
Regulated Feedback Voltage
Feedback Voltage Line Regulation
Feedback Voltage Load Regulation
IN
l
l
V
I
TH
= 0.7V (Note 3)
0.594
0.6
0.005
0.02
0.606
V
FB
V
I
= 5V to 10V, I = 0.7V
ꢀ/V
ꢀ
ΔV
ΔV
IN
TH
FB(LINEREG)
= 0.36V to 0.84V
0.1
TH
FB(LOADREG)
3602fb
2
LTC3602
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 8.4V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
10
MAX
12
UNITS
ꢀ
Power Good Range
ΔV
PGOOD
PGOOD
R
Power Good Resistance
FB Input Bias Current
Transconductance Amplifier g
11
18
Ω
I
10
nA
FB
g
1.7
ms
m
m
I
S
Supply Current
Active Mode
Sleep Mode
Shutdown
(Note 4)
500
75
0.2
700
100
1
μA
μA
μA
INTV
V
LDO Output Voltage
CC
4.8
0.4
5
90
5.2
V
ns
CC
t
Minimum Controllable ON-Time
RUN Pin ON Threshold
TRACK/SS Pull-Up Current
Oscillator Frequency
ON, MIN
l
V
RUN
V
Rising
0.7
1.25
1
1
V
RUN
I
f
f
μA
TRACK/SS
OSC
R = 105k
0.8
0.3
1.2
3
MHz
MHz
T
SYNC Capture Range
SYNC
R
Top Switch On-Resistance
Bottom Switch On-Resistance
90
67
mΩ
mΩ
DS(ON)
I
I
Peak Current Limit
3.8
4.1
4.5
0.1
4.2
700
5.2
1
A
μA
V
LIM
Switch Leakage Current
LSW
V
V
INTV Undervoltage Lockout
INTV Ramping Up
4.3
UVLO
CC
CC
INTV Undervoltage Lockout Hysteresis
mV
UVLO, HYS
CC
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 5: T is calculated from the ambient temperature T and the power
J
A
dissipation as follows: T = T + (P )(θ C/W).
J
A
D
JA
Note 2: The LTC3602E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 6: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 3: The LTC3602 is tested in a feedback loop that adjusts V to
FB
achieve a specified error amplifier output voltage (I ).
TH
Note 7: This limit indicates the current density limitations of the internal
metallization and it is not tested in production.
TYPICAL PERFORMANCE CHARACTERISTICS
Burst Mode Operation
Load Step Transient Forced Continuous
V
V
= 7V
OUT
LOAD = 50mA
V
V
= 7V
IN
= 3.3V
OUT
IN
= 3.3V
OUTPUT
VOLTAGE
100mV/DIV
OUTPUT
VOLTAGE
50mV/DIV
LOAD
CURRENT
1A/DIV
INDUCTOR
CURRENT
500mA/DIV
3602 G02
3602 G01
10μs/DIV
10μs/DIV
3602fb
3
LTC3602
TYPICAL PERFORMANCE CHARACTERISTICS
Switch On-Resistance
Switch On-Resistance
vs Temperature
VREF vs Temperature
vs Input Voltage
95
90
0.6008
0.6006
0.6004
0.6002
140
120
V
– V = INTV
SW
V
= 8.4V
V
= 8.4V
BOOST
CC
IN
IN
TOP
85
80
75
70
65
100
80
60
40
20
TOP
BOTTOM
0.6000
0.5998
0.5996
BOTTOM
60
0
4
5
6
7
8
9
10
50
TEMPERATURE (°C)
100 125
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
–50
25
75
–25
0
INPUT VOLTAGE (V)
3602 G03
3602 G04
3602 G05
PVIN Leakage Current
vs Input Voltage
Frequency vs ROSC
Frequency vs Input Voltage
7
6
5
4
3
2
1
0
3500
3000
1020
1015
1010
1005
R
= 105k
V
= 0V
OSC
RUN
2500
2000
1500
1000
500
1000
995
990
985
980
0
5
6
8
4
9
200
(k)
300 350
7
0
50
100 150
R
250
4
5
6
7
8
9
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
OSC
3602 G08
3602 G07
3602 G06
Quiescent Current
vs Input Voltage
Quiescent Current
vs Temperature
Frequency vs Temperature
600
500
400
300
200
100
0
600
500
400
300
200
100
0
1020
1015
1010
1005
R
OSC
= 105k
ACTIVE
ACTIVE
1000
995
990
985
980
SLEEP
SLEEP
4
5
6
7
8
9
10
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
INPUT VOLTAGE (V)
3602 G10
3602 G09
3602 G11
3602fb
4
LTC3602
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Peak Inductor Current
vs Burst Clamp Voltage
Maximum Peak Inductor Current
vs Duty Cycle
Efficiency vs Load Current,
Burst Mode Operation
3.0
2.5
2.0
1.5
1.0
0.5
0
100
95
90
85
80
75
70
5
4
3
FIGURE 6 CIRCUIT
V
= 5V
IN
V
= 9V
IN
2
1
0
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0.01
0.1
1
10
0
10 20 30 40 50 60 70 80 90 100
BURST CLAMP VOLTAGE (V)
LOAD CURRENT (A)
DUTY CYCLE (%)
3602 G13
3602 G12
3602 G14
Efficiency vs Load Current,
Forced Continuous
Efficiency vs Input Voltage
Efficiency vs Frequency
100
95
90
85
80
75
70
100
98
96
94
92
90
88
86
84
100
90
80
70
60
50
40
30
20
10
0
FIGURE 6 CIRCUIT
FIGURE 6 CIRCUIT
FIGURE 6 CIRCUIT
V
LOAD
= 7V
IN
I
= 1A
I
= 1A
LOAD
V
= 5V
IN
I
= 2.5A
LOAD
2.2μH
1μH
V
= 9V
IN
4.7μH
4
5
6
7
8
9
10
0.01
0.1
1
10
0
500 1000 1500 2000 2500 3000
FREQUENCY (kHz)
INPUT VOLTAGE (V)
LOAD CURRENT (A)
3602 G17
3602 G16
3602 G15
5V LDO Output Voltage
vs Temperature
TRACK/SS Current
vs Temperature
Load Regulation
0.10
0.00
5.10
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
1.40
1.35
1.30
1.25
1.20
1.15
1.10
FIGURE 6 CIRCUIT
V
= 7V
IN
–0.10
–0.20
50
75 100 125
0
0.5
1 1.5
LOAD CURRENT (A)
2
2.5
3
–50
0
25
–25
50
TEMPERATURE (oC)
125
–50
0
25
75 100
–25
TEMPERATURE (oC)
3602 G19
3602 G18
3602 G20
3602fb
5
LTC3602
PIN FUNCTIONS
SYNC/MODE (Pin 1/Pin 4): Mode Select and External
Clock Synchronization Input.
FE/UF Package
be programmed by connecting a capacitor between this
pin and ground. Leave this pin floating to use the internal
1ms soft-start clamp. Do not tie this pin to INTV or to
CC
PGOOD (Pin 2/Pin 5): Power Good Output. Open-drain
logic output that is pulled to ground when the output volt-
age is not within 10ꢀ of regulation point.
PV .
IN
PGND (Pins 8, 9, 10/Pins 12, 13, 14, 15): Power
Ground.
R (Pin 3/Pin 6): Frequency Set Pin.
T
SW (Pins 11, 12, 13/Pins 16, 17, 18, 19): Switch Node
Connection to the Inductor.
I
(Pin 4/Pin 7): Error Amplifier Compensation Point.
(Pin 5/Pin 8): Feedback Pin.
TH
V
FB
BOOST (Pin 14/Pin 20): Bootstrapped Supply to the Top
Side Floating Gate Driver.
SGND (Pin 17/Pin 9, Pin 21): Signal Ground.
RUN (Pin 6/Pin 10): Run Control Input. This pin may be
PV (Pin 15/Pins 1,2): Power Input Supply. Decouple
IN
tied to PV to enable the chip.
this pin with a capacitor to PGND
IN
TRACK/SS(Pin7/Pin11):TrackingInputfortheController
INTV (Pin 16/Pin 3): Output of Internal 5V LDO.
CC
or Optional External Soft-Start Input. This pin allows the
Exposed Pad (Pin 17/Pin 21): SGND. Exposed pad is
signal ground and must be soldered to the PCB.
start-up of V
to “track” the external voltage at this pin
OUT
usinganexternalresistordivider.Anexternalsoft-startcan
BLOCK DIAGRAM
I
TH
BOOST
INTV
PV
IN
CC
1μA
0.6V
VOLTAGE
REFERENCE
SLOPE
COMPENSATION
RECOVERY
TRACK/SS
1ms
SOFT-START
BCLAMP
+
–
ERROR
AMPLIFIER
BURST
COMPARATOR
+
+
+
–
MAIN
I-COMPARATOR
+
V
FB
–
SYNC/MODE
SW
SW
+
–
0.54V
+
–
SLOPE
COMPENSATION
OSILLATOR
OVER-CURRENT
SW
COMPARATOR
+
–
+
–
LOGIC
PGND
PGND
PGND
0.66V
REVERSE
COMPARATOR
PGOOD
+
–
R
T
RUN
SYNC/MODE
3602 BD
3602fb
6
LTC3602
OPERATION
Main Control Loop
Burst Mode Operation
Connecting the SYNC/MODE pin to a voltage in the range
of 0.42V to 1V enables Burst Mode operation. In Burst
Mode operation, the internal power MOSFETs operate
intermittently at light loads. This increases efficiency by
minimizing switching losses. During Burst Mode opera-
tion, the minimum peak inductor current is externally set
by the voltage on the SYNC/MODE pin and the voltage
TheLTC3602isamonolithic,constant-frequency,current-
mode step-down DC/DC converter. During normal opera-
tion, theinternaltoppowerswitch(N-channelMOSFET)is
turned on at the beginning of each clock cycle. Current in
the inductor increases until the current comparator trips
and turns off the top power MOSFET. The peak inductor
current at which the current comparator shuts off the top
on the I pin is monitored by the burst comparator to
power switch is controlled by the voltage on the I pin.
TH
TH
determine when sleep mode is enabled and disabled.
When the average inductor current is greater than the
load current, the voltage on the I pin drops. As the I
The error amplifier adjusts the voltage on the I pin by
TH
comparing the feedback signal from a resistor divider on
the V pin with an internal 0.6V reference. When the load
TH
TH
FB
voltage falls below 330mV, the burst comparator trips and
current increases, it causes a reduction in the feedback
enables sleep mode. During sleep mode, the top power
voltage relative to the reference. The error amplifier raises
MOSFET is held off and the I pin is disconnected from
the I voltage until the average inductor current matches
TH
TH
theoutputoftheerroramplifier.Themajorityoftheinternal
circuitry is also turned off to reduce the quiescent current
to 75μA while the load current is solely supplied by the
the new load current. When the top power MOSFET shuts
off, the synchronous power switch (N-channel MOSFET)
turns on until either the bottom current limit is reached or
the beginning of the next clock cycle. The bottom current
limit is set at –2.5A for forced continuous mode and 0A
for Burst Mode operation.
output capacitor. When the output voltage drops, the I
TH
pin is reconnected to the output of the error amplifier and
the top power MOSFET along with all the internal circuitry
is switched back on. This process repeats at a rate that
is dependent on the load demand. Pulse-skipping opera-
tion is implemented by connecting the SYNC/MODE pin
to ground. This forces the burst clamp level to be at 0V.
As the load current decreases, the peak inductor current
The operating frequency is externally set by an external
resistor connected between the R pin and ground. The
T
practical switching frequency can range from 300kHz to
3MHz.
Overvoltage and undervoltage comparators will pull the
PGOOD output low if the output voltage comes out of
regulation by 7.5ꢀ. In an overvoltage condition, the top
powerMOSFETisturnedoffandthebottompowerMOSFET
isswitchedonuntileithertheovervoltageconditionclears
or the bottom MOSFET’s current limit is reached.
will be determined by the voltage on the I pin until the
TH
I
voltage drops below 330mV. At this point, the peak
TH
inductor current is determined by the minimum on-time
of the current comparator. If the load demand is less than
the average of the minimum on-time inductor current,
switching cycles will be skipped to keep the output volt-
age in regulation.
Forced Continuous Mode
Frequency Synchronization
ConnectingtheSYNC/MODEpintoINTV willdisableBurst
CC
Mode operation and force continuous current operation.
At light loads, forced continuous mode operation is less
efficientthanBurstModeoperation,butmaybedesirablein
some applications where it is necessary to keep switching
harmonics out of a signal band. The output voltage ripple
is minimized in this mode.
TheinternaloscillatoroftheLTC3602canbesynchronized
to an external clock connected to the SYNC/MODE pin.
The frequency of the external clock can be in the range of
300kHz to 3MHz. For this application, the oscillator timing
resistor should be chosen to correspond to a frequency
that is 25ꢀ lower than the synchronization frequency.
When synchronized, the LTC3602 will operate in pulse-
skipping mode.
3602fb
7
LTC3602
OPERATION
Dropout Operation
Overtemperature Protection
Whentheinputsupplyvoltagedecreasestowardtheoutput
voltage, the duty cycle increases toward the maximum
on-time. Furtherreductionofthesupplyvoltageforcesthe
top switch to remain on for more than one cycle until it
attempts to stay on continuously. In order to replenish the
voltage on the floating BOOST supply capacitor, however,
the topswitch isforced offand the bottomswitchisforced
onforapproximately85nseverysixteenclockcycles. This
achieves an effective duty cycle that can exceed 99ꢀ. The
output voltage will then be primarily determined by the
input voltage minus the voltage drop across the upper
internal N-channel MOSFET and the inductor.
When using the LTC3602 in an application circuit, care
must be taken not to exceed any of the ratings speci-
fied in the Absolute Maximum Ratings section. As an
added safeguard, however, the LTC3602 does incorporate
an overtemperature shutdown feature. If the junction
temperature reaches approximately 150°C, both power
switches will be turned off and the SW node will become
high impedance. After the part has cooled to below 115°C,
it will restart.
Voltage Tracking and Soft-Start
Some microprocessors and DSP chips need two power
supplieswithdifferentvoltagelevels. Thesesystemsoften
requirevoltagesequencingbetweenthecorepowersupply
and the I/O power supply. Without proper sequencing,
latch-up failure or excessive current draw may occur that
could result in damage to the processor’s I/O ports or the
I/O ports of a supporting system device such as memory,
an FPGA or a data converter. To ensure that the I/O loads
are not driven until the core voltage is properly biased,
tracking of the core supply and the I/O supply voltage is
necessary.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant-fre-
quency architectures by preventing subharmonic oscilla-
tions at duty cycles greater than 50ꢀ. It is accomplished
internally by adding a compensating ramp to the inductor
current signal at duty cycles in excess of 30ꢀ. Normally,
the maximum inductor peak current is reduced when
slope compensation is added. In the LTC3602, however,
slope compensation recovery is implemented to reduce
the variation of the maximum inductor peak current (and
therefore the maximum available output current) over the
range of duty cycles.
Voltage tracking is enabled by applying a ramp voltage to
the TRACK/SS pin. When the voltage on the TRACK pin
is below 0.6V, the feedback voltage will regulate to this
tracking voltage. When the tracking voltage exceeds 0.6V,
tracking is disabled and the feedback voltage will regulate
to the internal reference voltage.
Short-Circuit Protection
When the output is shorted to ground, the inductor cur-
rent decays very slowly during a single switching cycle.
To prevent current runaway from occurring, a secondary
current limit is imposed on the inductor current. If the
inductor valley current increases to more than 4.5A, the
top power MOSFET will be held off and switching cycles
will be skipped until the inductor current is reduced.
The TRACK/SS pin is also used to implement an external
soft-start function. A 1.2μA current is sourced from this
pin so that an external capacitor may be added to create
a smooth ramp. If this ramp is slower than the internal
1ms soft-start, then the output voltage will track this ramp
during start up instead. Leave this pin floating to use the
internal 1ms soft-start ramp. Do not tie the TRACK/SS
pin to INTV or to PV .
CC
IN
3602fb
8
LTC3602
APPLICATIONS INFORMATION
ThebasicLTC3602applicationcircuitisshownonthefront
page of this data sheet. External component selection is
determined by the maximum load current and begins with
theselectionoftheinductorvalueandoperatingfrequency
A reasonable starting point for selecting the ripple current
is ΔI = 0.4(I
), where I
is the maximum output
L
MAX
MAX
current. The largest ripple current occurs at the highest
V . To guarantee that the ripple current stays below a
IN
followed by C and C
.
specified maximum, the inductor value should be chosen
IN
OUT
according to the following equation:
Operating Frequency
⎛
⎞ ⎛
⎞
VOUT
VOUT
V
IN(MAX)
Selection of the operating frequency is a tradeoff between
efficiency and component size. High frequency operation
allows the use of smaller inductor and capacitor values.
Operation at lower frequencies improves efficiency by
reducing internal gate charge and switching losses but
requires larger inductance values and/or capacitance to
maintainlowoutputripplevoltage.Theoperatingfrequency
oftheLTC3602isdeterminedbyanexternalresistorthatis
L =
• 1–
⎟ ⎜
⎜
⎟
fΔI
L(MAX) ⎠ ⎝
⎝
⎠
The inductor value will also have an effect on Burst Mode
operation. The transition from low current operation
begins when the peak inductor current falls below a level
set by the burst clamp. Lower inductor values result in
higher ripple current which causes this to occur at lower
load currents. This causes a dip in efficiency in the upper
range of low current operation. In Burst Mode operation,
lower inductance values will cause the burst frequency
to increase.
connectedbetweentheR pinandground.Thevalueofthe
T
resistor sets the ramp current that is used to charge and
dischargeaninternaltimingcapacitorwithintheoscillator
and can be calculated by using the following equation:
1.15 • 1011
Inductor Core Selection
ROSC
=
– 10k
f(Hz)
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
affordthecorelossfoundinlowcostpowderedironcores,
forcing the use of the more expensive ferrite cores. Actual
core loss is independent of core size for a fixed inductor
value but it is very dependent on the inductance selected.
As the inductance increases, core losses decrease. Un-
fortunately, increased inductance requires more turns of
wire and therefore copper losses will increase.
Although frequencies as high as 3MHz are possible, the
minimum on-time of the LTC3602 imposes a minimum
limit on the operating duty cycle. The minimum on-time
is typically 90ns. Therefore, the minimum duty cycle is
equal to 100 • 90ns • f(Hz).
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
Ferrite designs have very low core losses and are pre-
ferred at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard,” which means that
inductancecollapsesabruptlywhenthepeakdesigncurrent
is exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
ripplecurrentΔI increaseswithhigherV anddecreases
L
IN
with higher inductance.
⎛
⎞
V
fL
VOUT
⎛
⎞
OUT
ΔIL =
• 1–
⎜
⎝
⎟
⎠
⎜
⎝
⎟
V
⎠
IN
Having a lower ripple current reduces the ESR losses
in the output capacitors and the output voltage ripple.
Highest efficiency operation is achieved at low frequency
with small ripple current. This, however, requires a large
inductor.
Different core materials and shapes will change the
size/current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy ma-
terials are small and do not radiate energy but generally
cost more than powdered iron core inductors with similar
3602fb
9
LTC3602
APPLICATIONS INFORMATION
characteristics. The choice of which style inductor to use
mainly depends on the price vs size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Coiltronics, Coilcraft,
Toko and Sumida.
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
currentratingsandlongtermreliability.Ceramiccapacitors
have excellent low ESR characteristics but can have a high
voltage coefficient and audible piezoelectric effects. The
high Q of ceramic capacitors with trace inductance can
also lead to significant ringing.
C and C
Selection
IN
OUT
The input capacitance, C , is needed to filter the trapezoi-
IN
dal current at the source of the top MOSFET. To prevent
large ripple voltage, a low ESR input capacitor sized for
the maximum RMS current should be used. RMS current
is given by:
Using Ceramic Input and Output Capacitors
VOUT
V
VOUT
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input and
thepowerissuppliedbyawalladapterthroughlongwires,
a load step at the output can induce ringing at the input,
IN
IRMS =IOUT(MAX)
•
•
–1
V
IN
This formula has a maximum at V = 2V , where
IN
OUT
I
= I /2. This simple worst-case condition is com-
RMS
OUT
monlyusedfordesignbecauseevensignificantdeviations
do not offer much relief. Note that ripple current ratings
from capacitor manufacturers are often based on only
2000 hours of life which makes it advisable to further
derate the capacitor, or choose a capacitor rated at a
higher temperature than required. Several capacitors may
also be paralleled to meet size or height requirements in
the design.
V . At best, this ringing can couple to the output and be
IN
mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause a
voltage spike at V large enough to damage the part.
IN
Output Voltage Programming
The selection of C
is determined by the effective series
OUT
The output voltage is set by an external resistive divider
according to the following equation:
resistance(ESR)thatisrequiredtominimizevoltageripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response as described in a later section.
R2
R1
⎛
⎝
⎞
VOUT = 0.6V • 1+
⎜
⎟
⎠
The output ripple, ΔV , is determined by:
OUT
The resistive divider allows the V pin to sense a fraction
FB
of the output voltage as shown in Figure 1.
⎛
⎜
⎝
⎞
1
ΔVOUT ≤ ΔIL • ESR+
⎟
8fCOUT
⎠
V
OUT
R2
The output ripple is highest at maximum input voltage
V
since ΔI increases with input voltage. Multiple capacitors
FB
L
LTC3602
R1
placed in parallel may be needed to meet the ESR and
RMScurrenthandlingrequirements.Drytantalum,special
polymer,aluminumelectrolyticandceramiccapacitorsare
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
SGND
3602 F01
Figure 1. Setting the Output Voltage
3602fb
10
LTC3602
APPLICATIONS INFORMATION
Burst Clamp Programming
Pulse-skipping,whichisacompromisebetweenlowoutput
voltage ripple and efficiency, can be implemented by con-
If the voltage on the SYNC/MODE pin is less than INTV
CC
necting the SYNC/MODE pin to ground. This sets I
to
BURST
by 1V or more, Burst Mode operation is enabled. During
Burst Mode operation, the voltage on the SYNC/MODE
pin determines the burst clamp level. This level sets the
0A. Inthiscondition, thepeakinductorcurrentislimitedby
the minimum on-time of the current comparator and the
lowest output voltage ripple is achieved while still opera-
ting discontinuously. During very light output loads,
pulse-skipping allows only a few switching cycles to be
skipped while maintaining the output voltage in regulation.
minimumpeakinductorcurrent,I
,foreachswitching
BURST
cycle according to the following equation:
IBURST
VBURST
=
+ 0.42V
6A / V
is the voltage on the SYNC/MODE pin. I
Frequency Synchronization
V
can
BURST
BURST
The LTC3602’s internal oscillator can be synchronized
to an external clock signal. During synchronization, the
top MOSFET turn-on is locked to the falling edge of the
externalfrequencysource.Thesynchronizationfrequency
range is 300kHz to 3MHz. Synchronization only occurs if
the external frequency is greater than the frequency set by
be programmed in the range of 0A to 3.5A, which cor-
responds to a V range of 0.42V to 1V. As the output
BURST
load current drops, the peak inductor current decreases
to keep the output voltage in regulation. When the output
load current demands a peak inductor current that is less
than I
, the burst clamp will force the peak inductor
BURST
the R resistor. Because slope compensation is generated
T
current to remain equal to I
regardless of further
BURST
by the oscillator’s internal ramp, the external frequency
should be set 25ꢀ higher than the frequency set by the
reductions in the load current. Since the average inductor
current is therefore greater than the output load current,
R resistor to ensure that adequate slope compensation
T
the voltage on the I pin will decrease. When the I
TH
TH
is present. When synchronized, the LTC3602 will operate
in pulse-skipping mode.
voltage drops to 330mV, sleep mode is enabled in which
both power MOSFETs are shut off along with most of the
circuitry to minimize power consumption. All circuitry is
turned back on and the power MOSFETs begin switching
againwhentheoutputvoltagedropsoutofregulation. The
INTV Regulator
CC
TheLTC3602featuresanintegratedP-channellowdropout
value for I
is determined by the desired amount of
linear regulator (LDO) that supplies power to the INTV
BURST
CC
output voltage ripple. As the value of I
increases, the
supply pin from the PV pin. This LDO supply has been
BURST
IN
sleep time between pulses and the output voltage ripple
designed to deliver up to 35mA of load current for the
powering of the internal gate drivers and other internal
circuitry.Asmallexternalloadmayalsobeappliedprovided
increases. The burst clamp voltage, V
, can be set
BURST
by a resistor divider from the INTV pin. Alternatively,
CC
the SYNC/MODE pin may be tied directly to the V pin to
that the total current from the INTV supply does not
FB
CC
set V
= 0.6V (I
= 1A), or through an additional
exceed 35mA. The INTV pin should be bypassed with
BURST
BURST
CC
divider resistor (R3) to set V
Figure 2).
= 0.46V to 0.6V (see
no less than a 0.22μF ceramic capacitor. A 1μF ceramic
capacitor is suitable for most applications.
BURST
R2
V
OUT
INTV
FB
CC
LTC3602
R2
R1
LTC3602
R3 (OPTIONAL)
SYNC/MODE
SGND
SYNC/MODE
R1
SGND
3602 F02
V
= 0.46V TO 1V
V
= 0.46V TO 0.6V
BURST
BURST
Figure 2. Programing the Burst Clamp
3602fb
11
LTC3602
APPLICATIONS INFORMATION
Topside MOSFET Driver Supply (BOOST Pin)
voltage of the converter. To use the default, internal 1ms
soft-start ramp, leave the TRACK/SS pin floating. Do not
The LTC3602 uses a bootstrapped supply to power the
gate of the internal topside MOSFET (Figure 3). When the
topside MOSFET is off and the SW pin is low, diode D
tietheTRACK/SSpintoINTV ortoPV . Toincreasethe
CC
IN
soft-start time above 1ms, place a cap on the TRACK/SS
pin. A 1.2μA internal pull-up current will charge this cap,
resulting in a soft-start ramp time given by:
BST
charges capacitor C
to the voltage on the INTV sup-
BST
CC
ply. In order to turn on the topside MOSFET, the voltage on
the BOOST pin is then applied to its gate. As the topside
0.6
tSS =CSS •
1.2µA
MOSFET turns on, the SW pin rises to the PV voltage
IN
and the BOOST pin rises to PV + INTV , thereby keep-
IN
CC
ing the MOSFET fully enhanced. For most applications, a
0.22μFceramiccapacitorisappropriateforC . Schottky
When the LTC3602 detects a fault condition (either
undervoltage lockout or overtemperature), the TRACK/SS
pin is quickly pulled to ground and the internal soft-start
timer is also reset. This ensures an orderly restart when
using an external soft-start capacitor.
BST
diode D should have a reverse breakdown voltage that
BST
is greater than PV
.
IN(MAX)
INTV
CC
Toimplementtracking,aresistordividerisplacedbetween
D
C
LTC3602
an external supply (V ) and the TRACK/SS pin as shown
BST
X
C
in Figure 5a. This technique can be used to cause V
ratiometrically track the V supply (Figure 5b), according
to
INTVCC
BOOST
OUT
X
BST
to the following:
SW
3602 F03
VOUT
VX
RTA RA +RB
•
=
Figure 3. Topside MOSFET Supply
RA RTA +RTB
Run and Soft-Start/Tracking Functions
For coincident tracking, as shown in Figure 5c, (V
X
=
OUT
V during start-up),
The LTC3602 has a low power shutdown mode which is
controlled by the RUN pin. Pulling the RUN pin below 0.7V
puts the LTC3602 into a low quiescent current shutdown
R
TA
= R , R = R
A TB B
Note that the 1.2μA current that is sourced from the
TRACK/SS pin will cause a slight offset in the voltage seen
mode (I < 1μA). When the RUN pin is greater than 0.7V,
Q
thecontrollerisenabled.TheRUNpincanbedrivendirectly
on the TRACK/SS pin and consequently on the V
volt-
OUT
from logic as shown in Figure 4.
ageduringtracking. ThisV
current is given by:
offsetduetotheTRACK/SS
OUT
Soft-start and tracking are implemented by limiting the
effective reference voltage as seen by the error amplifier.
Ramping up the effective reference into the error amp in
turn causes a smooth and controlled ramp on the output
RTARTA RA +RB
VOS,TRK =(1.2µA)•
•
RTA +RTB
RA
For most applications, this offset is small and has minimal
effect on tracking performance. For improved tracking ac-
3.3V OR 5V
PV
IN
LTC3602
RUN
LTC3602
RUN
4.7MΩ
curacy, reduce the parallel impedance of R and R .
TA
TB
3602 F04
Figure 4. RUN Pin Interfacing
3602fb
12
LTC3602
APPLICATIONS INFORMATION
V
OUT
TheV operatingcurrentlossdominatestheefficiencyloss
IN
2
at very low load currents whereas the I R loss dominates
R
B
V
X
the efficiency loss at medium to high load currents.
V
FB
R
TB
TA
LTC3602
TRACK/SS
R
A
1.TheV operatingcurrentcomprisesthreecomponents:
IN
The DC Supply Current as given in the electrical char-
acteristics, the internal MOSFET gate charge currents
and the internal topside MOSFET transition losses. The
MOSFET gate charge current results from switching the
gatecapacitanceoftheinternalpowerMOSFETswitches.
R
3602 F05a
Figure 5a. Using the TRACK/SS Pin to Track VX
The gates of these switches are driven from the INTV
CC
V
X
supply. Each time the gate is switched from high to
low to high again, a packet of charge dQ moves from
INTV to ground. The resulting dQ/dt is the current
CC
V
OUT
out of INTV that is typically larger than the DC bias
CC
current. In continuous mode, the gate charge current
can be approximated by I
= f(9.5nC). Since the
IN
GATECHG
INTV voltage is generated from V by a linear regula-
CC
TIME
tor, the current that is internally drawn from the INTV
CC
(5b) Ratiometric Tracking
supply can be treated as V current for the purposes
IN
of efficiency considerations.
V
V
X
Transition losses apply only to the internal topside
MOSFET and become more prominent at higher input
voltages. Transition losses can be estimated from:
OUT
2
Transition Loss = (1.7) V • I
• (120pF) • f
O(MAX)
IN
2
2. I R losses are calculated from the resistances of the
internal switches, R and external inductor R . In
SW
L
3602 F05b,c
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
TIME
(5c) Coincident Tracking
Efficiency Considerations
top and bottom MOSFET R
(DC) as follows:
and the duty cycle
DS(ON)
Theefficiencyofaswitchingregulatorisequaltotheoutput
power divided by the input power times 100ꢀ. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
R
= (R )(DC) + (R )(1 – DC)
DS(ON)TOP DS(ON)BOT
SW
The R
for both the top and bottom MOSFETs can
DS(ON)
beobtainedfromtheTypicalPerformanceCharacteristics
2
curves. Thus, to obtain I R losses, simply add R to
SW
Efficiency = 100ꢀ – (L1 + L2 + L3 + ...)
R and multiply the result by the square of the average
L
output current:
where L1, L2, etc. are the individual losses as a percent-
age of input power.
2
2
I R Loss = I (R + R )
O
SW
L
Although all dissipative elements in the circuit produce
Other losses, including C and C
ESR dissipative
IN
OUT
losses, two main sources usually account for most of the
losses and inductor core losses, generally account for
2
losses: V operating current and I R losses.
less than 2ꢀ of the total power loss.
IN
3602fb
13
LTC3602
APPLICATIONS INFORMATION
Thermal Considerations
Checking Transient Response
Inmostapplications,theLTC3602doesnotdissipatemuch
heatduetoitshighefficiency.But,inapplicationswherethe
LTC3602 is running at high ambient temperature with low
supply voltage and high duty cycles, such as in dropout,
the heat dissipated may exceed the maximum junction
temperatureofthepart.Ifthejunctiontemperaturereaches
approximately 150°C, both power switches will be turned
off and the SW node will become high impedance.
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
immediately shifts by an amount
OUT
equal to ΔI
•(ESR), where ESR is the effective series
LOAD
resistance of C . ΔI
also begins to charge or dis-
OUT
LOAD
chargeC ,generatingafeedbackerrorsignalusedbythe
OUT
regulator to return V
to its steady-state value. During
can be monitored for overshoot
OUT
this recovery time, V
OUT
To prevent the LTC3602 from exceeding the maximum
junctiontemperature,theuserwillneedtodosomethermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum
junction temperature of the part. The temperature rise is
given by:
or ringing that would indicate a stability problem. The I
TH
pinexternalcomponentsandoutputcapacitorshowninthe
frontpageapplicationwillprovideadequatecompensation
for most applications.
Design Example
T = (P ) • (θ )
R
D
JA
As a design example, consider using the LTC3602 in
where P is the power dissipated by the regulator and θ
an application with the following specifications: V
=
D
JA
IN
is the thermal resistance from the junction of the die to
8.4V, V
= 3.3V, I
= 2.5A, I
= 100mA,
OUT
OUT(MAX)
OUT(MIN)
the ambient temperature.
f= 1MHz. Because efficiency is important at both high and
low load current, Burst Mode operation will be utilized.
First, calculate the timing resistor:
The junction temperature, T , is given by:
J
T = T + T
R
J
A
1.15•1011
where T is the ambient temperature.
ROSC
=
–10k =105k
A
1MHz
As an example, consider the LTC3602 in dropout at an
input voltage of 8V, a load current of 2.5A and an ambi-
ent temperature of 70°C. From the Typical Performance
Next, calculate the inductor value for about 40ꢀ ripple
current at maximum V :
IN
graph of Switch Resistance, the R
of the top switch
DS(ON)
⎛
⎞
⎛
⎝
⎞
at 70°C is approximately 120mΩ. Therefore, power dis-
sipated by the part is:
3.3V
3.3V
8.4V
⎜
⎜
⎟
⎟
L=
• 1–
=2µH
⎜
⎟
⎠
1MHz 1A
(
)( )
⎝
⎠
2
2
P = (I
)(R
) = (2.5A) (120mΩ) = 0.75W
DS(ON)
D
LOAD
Using a 2.2μH inductor results in a maximum ripple cur-
rent of:
For the TSSOP package, the θ is 38°C/W. Thus the junc-
JA
tion temperature of the regulator is:
⎛
⎞
⎛
⎝
⎞
3.3V
3.3V
8.4V
T = 70°C + (0.75W)(38°C/W) = 98.5°C
J
⎜
⎜
⎟
⎟
ΔIL =
• 1–
= 0.91A
⎜
⎟
⎠
1MHz 2.2µH
(
)(
)
⎝
⎠
which is below the maximum junction temperature of
125°C.
C
will be selected based on the ESR that is required
OUT
to satisfy the output voltage ripple requirement and the
bulk capacitance needed for loop stability. In this applica-
tion, a tantalum capacitor will be used to provide the bulk
3602fb
14
LTC3602
APPLICATIONS INFORMATION
capacitance and a ceramic capacitor in parallel to lower
PC Board Layout Checklist
the total effective ESR. For this design, a 100μF ceramic
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3602. Check the following in your layout:
capacitor will be used. C should be sized for a maximum
IN
current rating of:
3.3V
8.4V
8.4V
3.3V
1. A ground plane is recommended. If a ground plane layer
is not used, the signal and power grounds should be
segregated with all small signal components returning
to the SGND pin at one point which is then connected
to the PGND pin close to the LTC3602.
IRMS = 2.5A •
•
–1=1.22ARMS
Decoupling the PV pin with a 22μF ceramic capacitor is
IN
adequate for most applications.
The output voltage can now be programmed by choosing
the values of R1 and R2. Chose R1 = 105k and calculate
R2 as:
2.Connectthe(+)terminaloftheinputcapacitor(s),C ,as
IN
closeaspossibletothePV pin.Thiscapacitorprovides
IN
the AC current into the internal power MOSFETs.
⎛
⎞
VOUT
⎜
⎜
⎟
R2=R1
–1 = 472.5k
3. Keep the switching node, SW, away from all sensitive
small signal nodes.
⎟
0.6V
⎝
⎠
4.Floodallunusedareasonalllayerswithcopper.Flooding
with copper will reduce the temperature rise of power
components. You can connect the copper areas to any
DC net (PV , INTV , V , PGND, SGND, or any other
Choose a standard value of R2 = 475k. The voltage on
the MODE pin will be set to 0.6V by tying the MODE pin
to the FB pin. This will set the burst current equal to ap-
proximately 1A. Figure 6 shows a complete schematic for
this design example.
IN
CC OUT
DC rail in your system).
V
IN
8.4V
C
VCC
C
IN
1μF
22μF
R
PG
SYNC/MODE
PGOOD
INTV
CC
200k
PGOOD
PV
IN
R
OSC
D1
C
105k
R
I
BOOST
T
C
ITH
R
4.32k
BST
ITH
1nF
0.22μF
LTC3602
SW
SW
TH
V
L1
2.2μH
FB
V
3.3V
2.5A
R1
105k
OUT
RUN
SW
TRACK/SS
PGND
PGND
PGND
R2
475k
C
FB
22pF
C
OUT
100μF
3602 F06
L1: VISHAY IHLP2525CZER2R2MO1
C
C
: TAIYO YUDEN TMK325BJ226MM-T
OUT:
IN
TDK C3225X5ROJ107M
Figure 6. 8.4V to 3.3V, 2.5A Regulator at 1MHz, Burst Mode Operation
3602fb
15
LTC3602
TYPICAL APPLICATIONS
1.8V, 2.5A Regulator at 1MHz, Burst Mode Operation
V
IN
5V to 10V
C
VCC
C
IN
R3
845k
R
PG
200k
1μF
22μF
SYNC/MODE
PGOOD
INTV
CC
PGOOD
R4
137k
PV
IN
R
OSC
D1
105k
R
I
BOOST
T
C
ITH
C
R
BST
ITH
1nF
0.22μF
4.32k
LTC3602
SW
SW
TH
V
L1
1μH
FB
V
1.8V
2.5A
R1
105k
OUT
RUN
SW
TRACK/SS
PGND
PGND
PGND
C
R2
210k
FB
C
OUT
22pF
100μF
s 2
L1: VISHAY IHLP2525CZER1R0MO1
3602 TA02
C
C
: TAIYO YUDEN TMK325BJ226MM-T
IN
OUT:
TAIYO YUDEN AMK316BJ107ML
Efficinecy vs Load Current
100
95
90
85
80
75
V
V
= 5V
IN
= 8.4V
IN
V
= 10V
IN
70
0.01
0.1
1
10
LOAD CURRENT (A)
3602 TA02b
3602fb
16
LTC3602
TYPICAL APPLICATIONS
3.3V, 2.5A Regulator at 2MHz, Forced Continuous, Small Size
V
IN
10V
C
VCC
C
IN
1μF
22μF
R
PG
SYNC/MODE
PGOOD
INTV
CC
200k
PGOOD
PV
IN
R
OSC
D1
C
47.5k
R
I
BOOST
T
C
ITH
R
2.94k
BST
ITH
470pF
0.22μF
LTC3602
SW
SW
TH
V
L1
1μH
FB
V
3.3V
2.5A
R1
105k
OUT
RUN
SW
TRACK/SS
PGND
PGND
PGND
C
FB
R2
475k
10pF
C
OUT
47μF
L1: VISHAY IHLP1616ABER1R0M01
3602 TA04
C
C
: TAIYO YUDEN EMK316BJ226ML-T
IN
OUT:
MURATA GRM3ICR60J476ME19
2.5V, 2.5A Regulator, Synchronized to 1.8MHz
1.8MHz
V
IN
EXT. CLK
8.4V
C
VCC
C
IN
1μF
22μF
R
200k
PG
SYNC/MODE
PGOOD
INTV
CC
PGOOD
PV
IN
R
OSC
D1
C
69.8k
R
I
BOOST
T
C
ITH
R
2.94k
BST
ITH
470pF
0.22μF
LTC3602
SW
SW
TH
V
L1
1μH
FB
R1
105k
V
2.5V
2.5A
OUT
RUN
SW
TRACK/SS
PGND
PGND
PGND
C
FB
R2
332k
22pF
C
OUT
100μF
L1: VISHAY IHLP2525CZER1R0M01
3602 TA05
C
C
: TAIYO YUDEN TMK325BJ226MM-T
IN
OUT:
TDK C3225X5ROJ107M
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17
LTC3602
PACKAGE DESCRIPTION
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BA
4.90 – 5.10*
(.193 – .201)
2.74
(.108)
2.74
(.108)
16 1514 13 12 1110
9
6.60 p 0.10
2.74
(.108)
4.50 p 0.10
6.40
(.252)
BSC
SEE NOTE 4
2.74
(.108)
0.45 p 0.05
1.05 p0.10
0.65 BSC
5
7
8
1
2
3
4
6
RECOMMENDED SOLDER PAD LAYOUT
1.10
(.0433)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0o – 8o
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
0.195 – 0.30
FE16 (BA) TSSOP 0204
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
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18
LTC3602
PACKAGE DESCRIPTION
UF Package
20-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1710 Rev A)
0.70 p 0.05
4.50 p 0.05
3.10 p 0.05
2.45 p 0.05
2.00 REF
2.45 p 0.05
PACKAGE OUTLINE
0.25 p 0.05
0.50 BSC
PIN 1 NOTCH
R = 0.20 TYP
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
BOTTOM VIEW—EXPOSED PAD
OR 0.35 s 45o
CHAMFER
R = 0.05
TYP
R = 0.115
TYP
0.75 p 0.05
4.00 p 0.10
19 20
0.40 p 0.10
PIN 1
TOP MARK
(NOTE 6)
1
2
2.45 p 0.10
2.00 REF
4.00 p 0.10
2.45 p 0.10
(UF20) QFN 01-07 REV A
0.200 REF
0.25 p 0.05
0.50 BSC
0.00 – 0.05
NOTE:
1. DRAWING IS PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220
VARIATION (WGGD-1)—TO BE APPROVED
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3602fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC3602
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
96ꢀ Efficiency, V : 2.7V to 10V, V
LTC1877
600mA (I ), 550kHz, Synchronous Step-Down DC/DC Converter
= 0.8V,
= 0.8V,
OUT
IN
OUT(MIN)
I = 10μA, I <1μA, MS8 Package
Q
SD
LTC1879
LTC3404
1.2A (I ), 550kHz, Synchronous Step-Down DC/DC Converter
95ꢀ Efficiency, V : 2.7V to 10V, V
IN
OUT
OUT(MIN)
I = 15μA, I <1μA, TTSOP-16 Package
Q
SD
600mA (I ), 1.4MHz, Synchronous Step-Down DC/DC Converter
95ꢀ Efficiency, V : 2.7V to 6V, V
SD
= 0.8V, I = 10μA,
OUT(MIN) Q
OUT
IN
I
<1μA, MS8 Package
LTC3405/LTC3405A 300mA (I ), 1.5MHz, Synchronous Step-Down DC/DC Converter
95ꢀ Efficiency, V : 2.5V to 5.5V, V
OUT(MIN)
= 0.8V,
= 0.6V,
= 0.6V,
OUT
IN
I = 20μA, I <1μA, ThinSOTTM Package
Q
SD
LTC3406/LTC3406B 600mA (I ), 1.5MHz, Synchronous Step-Down DC/DC Converter
96ꢀ Efficiency, V : 2.5V to 5.5V, V
IN OUT(MIN)
OUT
I = 20μA, I <1μA, ThinSOT Package
Q
SD
LTC3407/LTC3407-2 Dual 600mA/810mA (I ), 1.5MHz, Synchronous Step-Down DC/DC 95ꢀ Efficiency, V : 2.5V to 5.5V, V
OUT(MIN)
OUT
IN
Converter
I = 40μA, I <1μA, MS10E and 3mm × 3mm DFN Packages
Q SD
LTC3409
LTC3411
LTC3412
LTC3413
LTC3414
LTC3416
LTC3418
LTC3430
LTC3441
LTC3533
LTC3548
LTC3610
600mA, 2.6MHz, Low (V Synchronous Step-Down DC/DC
95ꢀ Efficiency, V : 1.6V to 5.5V, I = 65μA,
IN Q
IN)
Converter
I
<1μA, 3mm × 3mm DFN Package
SD
1.25A (I ), 4MHz, Synchronous Step-Down DC/DC Converter
95ꢀ Efficiency, V : 2.5V to 5.5V, V
= 0.8V,
OUT
IN
OUT(MIN)
I = 60μA, I <1μA, MS10 and 3mm × 3mm DFN Packages
Q
SD
2.5A (I ), 4MHz, Synchronous Step-Down DC/DC Converter
95ꢀ Efficiency, V : 2.5V to 5.5V, V
= 0.8V,
OUT
IN
OUT(MIN)
I = 60μA, I <1μA, TSSOP-16E Package
Q
SD
3A (I
Sink/Source), 2MHz, Monolithic Synchronous Regulator for 90ꢀ Efficiency, V : 2.25V to 5.5V, V
= V
,
REF/2
OUT
IN
OUT(MIN)
DDR/QDR Memory Termination
I = 280μA, I <1μA, TSSOP-16E Package
Q SD
4A (I ), 4MHz, Synchronous Step-Down DC/DC Converter
95ꢀ Efficiency, V : 2.5V to 5.5V, V = 0.8V,
OUT(MIN)
OUT
IN
I = 64μA, I <1μA, TSSOP-20E Package
Q
SD
4A (I ), 4MHz, Synchronous Step-Down DC/DC Converter
95ꢀ Efficiency, V : 2.25V to 5.5V, V
OUT(MIN)
= 0.8V,
= 0.8V,
OUT
IN
I = 64μA, I <1μA, TSSOP-20E Package
Q
SD
8A (I ), 4MHz, Synchronous Step-Down DC/DC Converter
95ꢀ Efficiency, V : 2.25V to 5.5V, V
IN OUT(MIN)
OUT
I = 380μA, I <1μA, QFN Package
Q
SD
60V, 2.75A (I ), 200kHz, High Efficiency Step-Down DC/DC
90ꢀ Efficiency, V : 5.5V to 60V, V
= 1.2V,
OUT
IN
OUT(MIN)
Converter
I = 2.5mA, I = 25μA, TSSOP-16E Package
Q SD
1.2A (I ), 1MHz, Synchronous Buck-Boost DC/DC Converter
95ꢀ Efficiency, V : 2.5V to 5.5V, V : 2.5V to 5.5V,
IN OUT
OUT
I = 25μA, I <1μA, DFN Package
Q
SD
2A, 2MHz, Wide Input Voltage Synchronous Buck-Boost DC/DC
Converter
96ꢀ Efficiency, V : 1.8V to 5.5V, I = 40μA, I <1μA,
IN
Q
SD
3mm × 4mm DFN Package
400mA/800mA Dual Synchronous Buck-Boost DC/DC Converter
95ꢀ Efficiency, V : 2.5V to 5.5V, V
= 0.6V,
IN
OUT(MIN)
I = 40μA, I <1μA, MS8E and DFN Packages
Q
SD
12A, 24V, Synchronous Step-Down DC/DC Converter
95ꢀ Efficiency, V : 4V to 24V, V
= 0.6V, Fast
IN
OUT(MIN)
SD
Transient Response, I = 900μA, I <15μA, 9mm × 9mm
Q
QFN Package
LTC3611
10A, 36V, Synchronous Step-Down DC/DC Converter
V : 4V to 32V, Fast Transient Response, I = 900μA,
SD
IN
Q
I
<15μA, 9mm × 9mm QFN Package
ThinSOT is a trademark of Linear Technology Corporation.
3602fb
LT 0408 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
© LINEAR TECHNOLOGY CORPORATION 2008
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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