LTC3409EDD [Linear]
600mA Low Vin Buck Regulator in 3mm x 3mm DFN; 600毫安低输入电压降压型稳压器采用3mm x 3mm DFN
| 型号： | LTC3409EDD |
| 厂家： | 
Linear |
| 描述： | 600mA Low Vin Buck Regulator in 3mm x 3mm DFN |
| 文件： | 总16页 (文件大小：246K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3409
600mA Low V Buck
IN
Regulator in 3mm × 3mm DFN
U
FEATURES
DESCRIPTIO
The LTC®3409 is a high efficiency, monolithic synchro-
nous buck regulator using a constant frequency, current
mode architecture. The output voltage is adjusted via an
external resistor divider.
■
1.6V to 5.5V Input Voltage Range
■
Internal Soft-Start
■
Selectable 1.7MHz or 2.6MHz Constant Frequency
Operation
■
Internal Oscillator can be Synchronizable to an
Fixed switching frequencies of 1.7MHz and 2.6MHz are
supported. Alternatively, an internal PLL will synchronize
to an external clock in the frequency range of 1MHz to
3MHz. This range of switching frequencies allows the use
of small surface mount inductors and capacitors, includ-
ing ceramics.
External Clock, 1MHz to 3MHz Range
■
High Efficiency: Up to 95%
■
Very Low Quiescent Current: Only 65µA During
Burst Mode® Operation
■
600mA Output Current (VIN = 1.8V, VOUT = 1.2V)
■
750mA Peak Inductor Current
■
No Schottky Diode Required
Supply current during Burst Mode operation is only 65µA
dropping to <1µA in shutdown. The 1.6V to 5.5V input
voltage range makes the LTC3409 ideally suited for single
cell Li-Ion, Li-Metal and 2-cell alkaline, NiCd or NiMH
battery-powered applications. 100% duty cycle capability
provides low dropout operation, extending battery life in
portable systems. Burst Mode operation can be user-
enabled, increasing efficiency at light loads, further ex-
tending battery life.
■
Low Dropout Operation: 100% Duty Cycle
■
0.613V Reference Voltage
■
Stable with Ceramic Capacitors
■
Shutdown Mode Draws <1µA Supply Current
■
Current Mode Operation for Excellent Line and Load
Transient Response
Overtemperature Protection
■
■
Available in a Low Profile (0.75mm) 8-Lead
(3mm × 3mm) DFN Package
U
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode. Inter-
nal soft-start offers controlled output voltage rise time at
start-up without the need for external components.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5481178, 6580258, 6304066, 6127815,
6498466, 6611131.
APPLICATIO S
■
Cellular Phones
■
Digital Cameras
■
MP3 Players
U
Burst Mode Efficiency, 1.8VOUT
TYPICAL APPLICATIO
100
90
80
70
60
50
40
30
20
10
0
1.0
0.1
0
2.5V , BURST
IN
High Efficiency Step-Down Converter
4.2V , BURST
IN
3.6V , BURST
IN
LTC3409
SW
2.2µH*
10pF
V
V
OUT
1.8V
IN
1.8V TO 5.5V
V
IN
4.7µF
CER
10µF
CER
RUN
MODE
V
FB
POWER LOST
3.6V , BURST
255k
133k
IN
SYNC GND
*SUMIDA CDRH2D18/LD
3409 TA01
0.1
1
10
100
1000
3409 TA01b
LOAD CURRENT (mA)
3409f
1
LTC3409
W W U W
U W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
Input Supply Voltage .................................. –0.3V to 6V
RUN, VFB, MODE, SYNC Voltages. –0.3V to (VIN + 0.3V)
SW Voltage ................................... –0.3V to (VIN + 0.3V)
Operating Temperature Range (Note 2) .. –40°C to 85°C
Junction Temperature (Note 3)............................ 125°C
Storage Temperature Range ................ –65°C to 125°C
ORDER PART
TOP VIEW
NUMBER
V
1
2
3
4
8
7
6
5
SYNC
RUN
SW
FB
LTC3409EDD
GND
9
V
IN
V
MODE
IN
DD PART MARKING
LBNM
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 43°C/ W
EXPOSED PAD (PIN 9) IS GND
MUST BE SOLDERED TO PCB
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
VIN = 2.2V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
0.65
0.01
0.65
0.01
0.65
0.01
MAX
1.1
1
UNITS
V
V
RUN Threshold
●
●
●
0.3
RUN
RUN
I
RUN Leakage Current
MODE Threshold
µA
V
V
0.3
0.3
1.1
1
MODE
I
MODE Leakage Current
SYNC Threshold
µA
V
MODE
V
1.1
1
SYNCTH
I
SYNC Leakage Current
Regulated Feedback Voltage
µA
SYNC
V
(Note 4) T = 25°C
0.6007 0.6130 0.6252
0.5992 0.6130 0.6268
0.5977 0.6130 0.6283
V
V
V
FB
A
(Note 4) 0°C ≤ T ≤ 85°C
(Note 4) –40°C ≤ T ≤ 85°C
A
●
●
A
I
Feedback Current
±30
nA
mV
%/V
%/V
A
VFB
∆V
∆V
∆V
∆V
Overvoltage Lockout
∆V
= ∆V
– V (Note 6)
35
61
0.04
0.04
1
85
0.4
0.4
1.3
OVL
FB
FBOVL
OVL
FBOVL
FB
Reference Voltage Line Regulation
Output Voltage Line Regulation
Peak Inductor Current
(Note 4)
= 100mA, 1.6V < V < 5.5V
I
OUT
OUT
IN
I
V
IN
= 2.2V, V = 0.5V or V = 90%,
OUT
0.75
1.6
PK
FB
Duty Cycle < 35%
V
V
Output Voltage Load Regulation
Input Voltage Range
0.5
%
V
LOADREG
IN
●
5.5
I
Input DC Bias Current
Active Mode
Sleep Mode
(Note 5)
S
V
OUT
V
OUT
V
RUN
= 90%, I
= 103%, I
= 0V, V = 5.5V
= 0A
LOAD
350
65
0.1
475
120
5
µA
µA
µA
= 0A
LOAD
Shutdown
IN
f
Nominal Oscillator Frequency
SYNC = GND
SYNC = V
●
●
0.9
1.8
1.7
2.6
2.1
3.0
MHz
MHz
OSC
IN
SYNC TH
SYNC Threshold
When SYNC Input is Toggling (Note 7)
0.63
1
V
MHz
MHz
ns
SYNC f
SYNC f
Minimum SYNC Pin Frequency
Maximum SYNC Pin Frequency
Minimum SYNC Pulse Width
Soft-Start Period
MIN
3
MAX
SYNC PW
100
1
t
RUN↑
ms
SS
3409f
2
LTC3409
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
VIN = 2.2V unless otherwise specified.
SYMBOL
SYNC t
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SYNC Timeout
Delay from Removal of EXT CLK Until Fixed
Frequency Operation Begins (Note 7)
30
µs
O
R
R
R
R
of P-Channel FET
of N-Channel FET
I
I
= 100mA, Wafer Level
= 100mA, DD Package
0.33
0.35
Ω
Ω
PFET
NFET
LSW
DS(ON)
SW
SW
I
I
= 100mA, Wafer Level
= 100mA, DD Package
0.22
0.25
Ω
Ω
DS(ON)
SW
SW
I
SW Leakage
V
= 0V, V = 0V or 5V, V = 5V
±0.1
±3
µA
RUN
SW
IN
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 4: The LTC3409 is tested in a proprietary test mode that connects
V to the output of the error amplifier.
FB
Note 2: The LTC3409E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 6: ∆V
is the amount V must exceed the regulated feedback
FB
OVL
voltage.
Note 3: T is calculated from the ambient temperature T and power
J
A
Note 7: Determined by design, not production tested.
dissipation P according to the following formula:
D
LTC3409: T = T + (P )(43°C/W)
J
A
D
This IC includes overtemperature protection that is intended to protect the
device during momentary overload conditions. Overtemperature protection
becomes active at a junction temperature greater than the maximum
operating junction temperature. Continuous operation above the specified
maximum operating junction temperature may impair device reliability.
3409f
3
LTC3409
TYPICAL PERFOR A CE CHARACTERISTICS
U W
(From Typical Application on the front page except for the resistive divider resistor values)
Efficiency/Power Lost
vs Load Current, VOUT = 1.8V
Efficiency vs Input Voltage
Efficiency vs Input Voltage
VOUT = 1.2V, Pulse Skip
V
OUT = 1.2V, Burst Mode Operation
100
90
80
70
60
50
40
30
20
10
0
1.0
0.1
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
1
2
I
= 600mA
OUT
I
= 800mA
OUT
5
4
6
3
I
= 100mA
OUT
8
I
= 10mA
OUT
10
7
I
= 1mA
12
OUT
11
9
I
I
I
= 0.1mA
= 1mA
I
I
I
= 100mA
= 600mA
= 800mA
OUT
OUT
OUT
OUT
OUT
OUT
I
= 0.1mA
OUT
= 10mA
0.1
1
10
100
1000
1.5
3.5
INPUT VOLTAGE (V)
4.5
2.5
5.5
1.5
2.5
3.5
INPUT VOLTAGE (V)
4.5
5.5
3409 G01
LOAD CURRENT (mA)
3409 G02
3409 G03
1: 2.5V , BURST
7: POWER LOST, 2.5V , BURST
IN
IN
2: 3.6V , BURST
8: POWER LOST, 2.5V , PULSE SKIP
IN
IN
3: 4.2V , BURST
9: POWER LOST, 3.6V , BURST
IN
IN
4: 2.5V , PULSE SKIP 10: POWER LOST, 3.6V , PULSE SKIP
IN
IN
IN
IN
5: 3.6V , PULSE SKIP 11: POWER LOST, 4.2V , BURST
IN
6: 4.2V , PULSE SKIP 12: POWER LOST, 4.2V , PULSE SKIP
IN
Efficiency vs Load Current
VOUT = 2.5V
Efficiency vs Load Current
VOUT = 1.2V
Reference Voltage
vs Temperature
100
90
80
70
60
50
40
30
20
10
0
0.618
0.617
0.616
0.615
0.614
0.613
0.612
0.611
0.610
0.609
0.608
100
90
80
70
60
50
40
30
20
10
0
BURST
BURST
1.6V
IN
2.5V
IN
2.7V
IN
4.2V
IN
3.1V
2.5V
3.6V
IN
IN
3.1V
IN
3.6V
IN
IN
4.2V
2.7V
IN
IN
1.6V
IN
PULSE SKIP
PULSE SKIP
–50 –30 –10 10 30 50 70 90 110 130 150
0.1
1
10
100
1000
0.1
1
10
100
1000
LOAD CURRENT (mA)
TEMPERATURE (°C)
LOAD CURRENT (mA)
3409 G05
3409 G04
1011 G06
3409f
4
LTC3409
U W
TYPICAL PERFOR A CE CHARACTERISTICS
(From Typical Application on the front page except for the resistive divider resistor values)
Oscillator Frequency
vs Temperature
Oscillator Frequency Shift
vs Input Voltage
Output Voltage vs Load Current
VIN = 1.6V
6
4
1.22
1.21
1.20
1.19
2.70
2.60
2.50
2.40
2.30
2.20
2.10
2.00
1.90
1.80
1.70
1.60
1.50
1.40
1.30
1.20
V
= 2.7V
IN
f
LOW
1.7MHz
V
= 1.6V
IN
2
V
= 4.2V
IN
1.2V
OUT
OSC 2.6MHz
0
BURST
f
HIGH
2.6MHz
–2
–4
–6
–8
–10
OSC 1.7MHz
1.2V
PULSE
SKIP
OUT
V
= 4.2V
= 1.6V
25
IN
V
= 2.7V
IN
V
IN
1.18
50
–50 –25
0
75 100 125
3.5
2.5
INPUT VOLTAGE (V)
1.5
4.5
5.5
0
100 200 300 400 500 600 700 800 900
LOAD CURRENT (mA)
TEMPERATURE (°C)
3409 G07
3409 G08
3409 G09
Dynamic Supply Current
vs Input Voltage
R
DS(ON) vs Input Voltage
RDS(ON) vs Input Temperature
0.450
0.400
0.350
0.300
0.250
0.200
0.150
0.100
0.050
0
6000
5000
4000
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
120
100
MAIN SWITCH
1.6V
BURST/SLEEP
= 1.5V
MAIN
SWITCH
V
OUT
I
= 0
OUT
4.2V
80
2.7V
1.6V
V
= V
IN
FB
3000
2000
60
40
2.7V
SYNCHRONOUS
SWITCH
V
= 1.5V
= 0
OUT
OUT
4.2V
PULSE
SKIP
I
1000
0
20
0
V
= 0
FB
SYNCHRONOUS SWITCH
50 100 125
TEMPERATURE (°C)
1.5
5.5
2.5
3.5
4.5
–50 –25
0
25
75
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
3409 G10
3409 G11
3409 G12
Dynamic Supply Current vs
Temperature, VIN = 3.6V,
VOUT = 1.5V, 0 Load
Switch Leakage vs Temperature
VIN = 5.5V
Switch Leakage vs Input Voltage
6000
500
450
400
350
300
250
200
150
100
50
45
40
35
30
25
20
15
10
5
V
= 5.5V
IN
5000
4000
3000
PULSE SKIP
MAIN SWITCH
MAIN SWITCH
2000
1000
0
SYNCHRONOUS SWITCH
BURST
SYNCHRONOUS
SWITCH
0
0
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
–50
0
25 50
75 100 125
–25
0
4
8
2
6
TEMPERATURE (°C)
INPUT VOLTAGE (V)
3409 G14
3409 G13
3409 G15
3409f
5
LTC3409
TYPICAL PERFOR A CE CHARACTERISTICS
U W
(From Typical Application on the front page except for the resistive divider resistor values)
Load Step 0mA to 600mA
Pulse Skip
Start-Up from Shutdown
RUN
2V/DIV
V
OUT
100mV/DIV
V
OUT
I
LOAD
1V/DIV
500mA/DIV
INDUCTOR
CURRENT
500mA/DIV
INDUCTOR
CURRENT
500mA/DIV
3409 G16
3409 G17
3409 G19
3409 G21
20µs/DIV
200µs/DIV
Burst Mode Operation
ILOAD = 35mA
Load Step 50mA to 600mA
Pulse Skip
V
OUT
20mV/DIV
V
OUT
100mV/DIV
V
SWITCH
2V/DIV
I
LOAD
500mA/DIV
INDUCTOR
CURRENT
200mA/DIV
INDUCTOR
CURRENT
500mA/DIV
3409 G18
2µs/DIV
20µs/DIV
Load Step 0mA to 600mA
Burst Mode Operation
Load Step 50mA to 600mA
Burst Mode Operation
V
OUT
V
OUT
100mV/DIV
100mV/DIV
I
I
LOAD
500mA/DIV
LOAD
500mA/DIV
INDUCTOR
CURRENT
500mA/DIV
INDUCTOR
CURRENT
500mA/DIV
3409 G20
20µs/DIV
20µs/DIV
3409f
6
LTC3409
U
U
U
PI FU CTIO S
SYNC (Pin 8): External CLK Input/Fixed Switching Fre-
quency Selection. Forcing this pin above 1.1V for greater
than 30µs selects 2.6MHz switching frequency. Forcing
this pin below 0.3V for greater than 30µs selects 1.7MHz
switching frequency.
VFB (Pin 1): Feedback Pin. Receives the feedback voltage
from an external resistive divider across the output.
GND (Pin 2): Ground Pin.
VIN (Pins 3, 4): Main Supply Pins. Must be closely
decoupled to GND, Pin 2 and Pin 9, with a 4.7µF or greater
ceramic capacitor.
External clock input, 1MHz to 3MHz frequency range.
When the SYNC pin is clocked in this frequency range the
SYNC threshold is nominally 0.63V. To allow for good
noise immunity, SYNC signal should swing at least 0.3V
below and above this nominal value (0.33V to 0.93V). Do
not leave SYNC floating.
MODE(Pin5):ModeSelectInput.Toselectpulseskipping
mode, force this pin above 1.1V. Forcing this pin below
0.3V selects Burst Mode operation. Do not leave MODE
floating.
SW (Pin 6): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchro-
nous power MOSFET switches.
GND (Pin 9): Exposed Pad. The Exposed Pad is ground. It
must be soldered to PCB ground to provide both electrical
contact and optimum thermal performance.
RUN (Pin 7): Run Control Input. Forcing this pin above
1.1V enables the part. Forcing this pin below 0.3V shuts
down the device. In shutdown, all functions are disabled
drawing <1µA supply current. Do not leave RUN floating.
3409f
7
LTC3409
U
U
W
FU CTIO AL DIAGRA
MODE
5
SLOPE
COMP
SYNC
8
0.65V
PLL
OSC
V
IN
–
+
3, 4
V
FB
EN
–
+
1
SLEEP
+
–
5Ω
0.613V
+
–
0.4V
I
COMP
EA
BURST
Q
Q
S
SOFT-
START
R
SWITCHING
LOGIC
AND
RS LATCH
V
ANTI-
SHOOT-
THRU
IN
BLANKING
CIRCUIT
SW
6
RUN
7
+
OV
REFERENCE
OVDET
0.675
–
+
–
SHUTDOWN
I
RCMP
2
GND
3409 FD
U
OPERATIO
Main Control Loop
starts to reverse, as indicated by the current reversal
comparator IRCMP, or the beginning of the next clock
cycle.
The LTC3409 uses a constant frequency, current mode
step-down architecture. Both the main (P-channel
MOSFET)andsynchronous(N-channelMOSFET)switches
are internal. During normal operation, the internal top
powerMOSFETisturnedoneachcyclewhentheoscillator
sets the RS latch, and turned off when the current com-
parator, ICOMP, resets the RS latch. The peak inductor
current at which ICOMP resets the RS latch is controlled by
the output of error amplifier EA. The VFB pin, described in
the Pin Functions section, allows EA to receive an output
feedback voltage from an external resistive divider. When
the load current increases, it causes a slight decrease in
the feedback voltage relative to the 0.613V reference,
which in turn, causes the EA amplifier’s output voltage to
increase until the average inductor current matches the
new load current. While the top MOSFET is off, the bottom
MOSFET is turned on until either the inductor current
Comparator OVDET guards against transient overshoots
>10%byturningthemainswitchoffandkeepingitoffuntil
the transient has ended.
Burst Mode Operation
The LTC3409 is capable of Burst Mode operation in which
the internal power MOSFETs operate intermittently based
on load demand. To enable Burst Mode operation, simply
connect the MODE pin to GND. To disable Burst Mode
operation and enable PWM pulse skipping mode, connect
the MODE pin to VIN or drive it with a logic high (VMODE
>1.1V). In this mode, the efficiency is lower at light loads,
but becomes comparable to Burst Mode operation when
the output load exceeds 30mA. The advantage of pulse
3409f
8
LTC3409
U
OPERATIO
skipping mode is lower output ripple and less interference
to audio circuitry. When the converter is in Burst Mode
operation, the minimum peak current of the inductor is set
to approximately 200mA regardless of the output load.
Each burst event can last from a few cycles at light loads
to almost continuously cycling with short sleep intervals
at moderate loads. In between these burst events, the
power MOSFETs and any unneeded circuitry are turned
off, reducing the quiescent current to 65µA. In this sleep
state, the load current is being supplied solely from the
output capacitor. As the output voltage droops, the EA
amplifier’s output rises above the sleep threshold signal-
ingtheBURSTcomparatortotripandturnthetopMOSFET
on. This process repeats at a rate that is dependent on the
load demand.
Slope Compensation
Slope compensation provides stability in constant fre-
quency architectures by preventing subharmonic oscilla-
tions at high duty cycles. It is accomplished internally by
adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%.
User Controlled Switching Frequency
TheinternaloscillatoroftheLTC3409canbesynchronized
to a user-supplied external clock applied to the SYNC pin.
Alternately, when this pin is held at a fixed High or Low
level for more than 30µs, the internal oscillator will revert
to fixed-frequency operation; where the frequency may be
selected as 1.7MHz (SYNC Low) or 2.6MHz (SYNC High).
Internal Soft-Start
Short-Circuit Protection
At start-up when the RUN pin is brought high, the internal
referenceislinearlyrampedfrom0Vto0.613Vin1ms.The
regulated feedback voltage will follow this ramp resulting
in the output voltage ramping from 0% to 100% in 1ms.
Thecurrentintheinductorduringsoft-startwillbedefined
by the combination of the current needed to charge the
output capacitance and the current provided to the load as
the output voltage ramps up. The start-up waveform,
shown in the Typical Performance Characteristics, shows
the output voltage start-up from 0V to 1.5V with a 2.5Ω
load and VIN = 2.2V. The 2.5Ω load results in an output of
600mA at 1.5V.
When the output is shorted to ground the LTC3409 limits
the synchronous switch current to 1.5A. If this limit is
exceeded, the top power MOSFET is inhibited from turn-
ing on until the current in the synchronous switch falls
below 1.5A.
Dropout Operation
As the input supply voltage decreases to a value ap-
proaching the output voltage, the duty cycle increases
toward the maximum on-time. Further reduction of the
supply voltage forces the main switch to remain on for
more than one cycle.
3409f
9
LTC3409
W U U
U
APPLICATIO S I FOR ATIO
Table 1. Representative Surface Mount Inductors
ThebasicLTC3409applicationcircuitisshownonthefirst
page of this data sheet. External component selection is
driven by the load requirement and begins with the selec-
PART
NUMBER
VALUE
(µH)
DCR
MAX DC
SIZE
3
(Ω MAX) CURRENT (A) W × L × H (mm )
Sumida
CDRH3D18/LD
2.2
3.3
0.041
0.054
0.85
0.75
3.2 × 3.2 × 2.0
3.2 × 3.2 × 1.2
4.4 × 5.8 × 1.2
2.5 × 3.2 × 2.0
2.5 × 3.2 × 2.0
4.5 × 5.4 × 1.2
tion of L followed by CIN and COUT
.
Sumida
CDRH2D11
1.5
2.2
0.068
0.170
0.90
0.78
Inductor Selection
For most applications, the value of the inductor will fall in
the range of 1µH to 10µH. Its value is chosen based on the
desired ripple current. Large value inductors lower ripple
current and small value inductors result in higher ripple
currents. Higher VIN or VOUT also increases the ripple
current as shown in Equation 1. A reasonable starting
point for setting ripple current is ∆IL = 240mA (40% of
600mA).
Sumida
CMD4D11
2.2
3.3
0.116
0.174
0.950
0.770
Murata
LQH32CN
1.0
2.2
0.060
0.097
1.00
0.79
Toko
D312F
2.2
3.3
0.060
0.260
1.08
0.92
Panasonic
ELT5KT
3.3
4.7
0.17
0.20
1.00
0.95
1
f •L
⎛
VOUT
V
IN
⎞
CIN and COUT Selection
∆IL =
VOUT 1–
⎜
⎟
(1)
⎝
⎠
In continuous mode, the source current of the top MOS-
FET is a square wave of duty cycle VOUT/VIN. To prevent
large voltage transients, a low ESR input capacitor sized
for the maximum RMS current must be used. The maxi-
mum RMS capacitor current is given by:
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 720mA rated
inductor should be enough for most applications (600mA
+ 120mA). For better efficiency, choose a low DC resis-
tance inductor. The inductor value also has an effect on
BurstModeoperation.Thetransitiontolowcurrentopera-
tion begins when the inductor current peaks fall to ap-
proximately 200mA. Lower inductor values (higher ∆IL)
will cause this to occur at lower load currents, which can
cause a dip in efficiency in the upper range of low current
operation. In Burst Mode operation, lower inductance
values will cause the burst frequency to increase.
1/2
]
V
V – V
OUT
(
)
[
OUT IN
CIN RequiredIRMS ≅ IOUT(MAX)
V
IN
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
usedfordesignbecauseevensignificantdeviationsdonot
offer much relief. Note that the capacitor manufacturer’s
ripplecurrentratingsareoftenbasedon2000hoursoflife.
This makes it advisable to further derate the capacitor, or
choose a capacitor rated at a higher temperature than
required. Always consult the manufacturer if there is any
question. The selection of COUT is driven by the required
effective series resistance (ESR). Typically, once the ESR
requirement for COUT has been met, the RMS current
rating generally far exceeds the IRIPPLE(P-P) requirement.
The output ripple DVOUT is determined by:
Inductor Core Selection
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy mate-
rials are small and don’t radiate much energy, but gener-
ally cost more than powdered iron core inductors with
similarelectricalcharacteristics. Thechoiceofwhichstyle
inductor to use often depends more on the price vs size
requirements and any radiated field/EMI requirements
than on what the LTC3409 requires to operate. Table 1
shows some typical surface mount inductors that work
well in LTC3409 applications.
⎛
1
⎞
∆VOUT = ∆I ESR +
⎜
⎟
L
⎝
8 • f •COUT
⎠
3409f
10
LTC3409
W U U
APPLICATIO S I FOR ATIO
U
where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. For a fixed output
voltage, the output ripple is highest at maximum input
voltage since ∆IL increases with input voltage. Aluminum
electrolytic and dry tantalum capacitors are both available
in surface mount configurations. In the case of tantalum,
it is critical that the capacitors are surge tested for use in
switching power supplies. An excellent choice is the AVX
TPS series of surface mount tantalum. These are specially
constructedandtestedforlowESRsotheygivethelowest
ESR for a given volume. Other capacitor types include
SanyoPOSCAP,KemetT510andT495series,andSprague
593Dand595Dseries. Consultthemanufacturerforother
specific recommendations.
Output Voltage Programming
The output voltage is set by a resistive divider according
to the following formula:
R1
R2
⎛
⎝
⎞
⎟
⎠
VOUT = 0.613V 1+
⎜
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 1.
V
OUT
R1
V
FB
R2
LTC3409
GND
3409 F01
Using Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now
available in smaller case sizes. Their high ripple current,
high voltage rating and low ESR make them ideal for
switching regulator applications. Because the LTC3409’s
control loop does not depend on the output capacitor’s
ESR for stable operation, ceramic capacitors can be used
to achieve very low output ripple and small circuit size.
Figure 1
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
oftenusefultoanalyzeindividuallossestodeterminewhat
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
However, care must be taken when these capacitors are
usedattheinputandtheoutput.Whenaceramiccapacitor
is used at the input and the power is supplied by a wall
adapter through long wires, a load step at the output can
induce ringing at the input, VIN. At best, this ringing can
couple to the output and be mistaken as loop instability. At
worst, a sudden inrush of current through the long wires
can potentially cause a voltage spike at VIN, large enough
to damage the part.
Efficiency = 100% – (L1 + L2 + L3 + ...)
whereL1, L2, etc. aretheindividuallossesasapercentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3409 circuits: VIN quiescent current and I2R
losses. The VIN quiescent current loss dominates the
efficiency loss at very low load currents whereas the I2R
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence as illustrated in Figure 2.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
3409f
11
LTC3409
W U U
U
APPLICATIO S I FOR ATIO
1
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
BURST
PULSE SKIP
0.1
Thermal Considerations
2.5V
IN
0.01
3.6V
IN
In most applications the LTC3409 does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3409 is running at high ambient tempera-
ture with low supply voltage and high duty cycles, such as
in dropout, the heat dissipated may exceed the maximum
junction temperature of the part. If the junction tempera-
ture reaches approximately 150°C, both power switches
will be turned off and the SW node will become high
impedance.
4.2V
IN
0.001
4.2V
IN
3.6V
IN
2.5V
IN
0.0001
0.1
1
10
100
1000
LOAD CURRENT (mA)
3409 F02
Figure 2
1. TheVIN quiescentcurrentisduetotwocomponents:the
DCbiascurrentasgivenintheElectricalCharacteristics
and the internal main switch and synchronous switch
gate charge currents. The gate charge current results
fromswitchingthegatecapacitanceoftheinternalpower
MOSFET switches. Each time the gate is switched from
hightolowtohighagain, apacketofcharge, dQ, moves
from VIN to ground. The resulting dQ/dt is the current
out of VIN that is typically larger than the DC bias cur-
rent. In continuous mode, IGATECHG = (QT + QB) where
QT and QB are the gate charges of the internal top and
bottomswitches.BoththeDCbiasandgatechargelosses
areproportionaltoVIN andthustheireffectswillbemore
pronounced at higher supply voltages.
2. I2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor RL. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET RDS(ON) and the duty cycle
(DC) as follows:
To avoid the LTC3409 from exceeding the maximum
junction temperature, the user will need to do a thermal
analysis. The goal of the thermal analysis is to determine
whether the operating conditions exceed the maximum
junction temperature of the part. The temperature rise is
given by:
TR = (PD)(θJA)
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to the
ambient temperature.
The junction temperature, TJ, is given by:
TJ = TA + TR
where TA is the ambient temperature.
As an example, consider the LTC3409 in dropout at an
input voltage of 1.6V, a load current of 600mA and an
ambient temperature of 75°C. From the typical perfor-
mance graph of switch resistance, the RDS(ON) of the
P-channel switch at 75°C is approximately 0.48Ω. There-
fore, power dissipated by the part is:
PD = ILOAD2 • RDS(ON) = 172.8mW
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteris-
tics. Thus, to obtain I2R losses, simply add RSW to RL
and multiply the result by the square of the average
output current.
FortheDD8package,theθJA is43°C/W.Thus,thejunction
temperature of the regulator is:
TJ = 75°C + (0.1728)(43) = 82.4°C
which is well below the maximum junction temperature of
125°C.
3409f
12
LTC3409
W U U
APPLICATIO S I FOR ATIO
U
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance (RDS(ON)).
2. Are the COUT and L1 closely connected? The (–) plate of
OUT returns current to GND and the (–) plate of CIN.
C
3. The resistor divider, R1 and R2, must be connected
between the (+) plate of COUT and a ground sense line
terminated near GND (Exposed Pad). The feedback
signals VFB should be routed away from noisy compo-
nents and traces, such as the SW line (Pins 6), and its
trace should be minimized.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (∆ILOAD • ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or
discharge COUT, which generates a feedback error signal.
The regulator loop then acts to return VOUT to its steady
state value. During this recovery time VOUT can be moni-
tored for overshoot or ringing that would indicate a stabil-
ityproblem.Foradetailedexplanationofswitchingcontrol
loop theory, see Application Note 76.
4. Keep sensitive components away from the SW pins.
The input capacitor CIN and the resistors R1 and R2
should be routed away from the SW traces and the
inductors.
5. Agroundplaneispreferred,butifnotavailable,keepthe
signal and power grounds segregated with small signal
componentsreturningtotheGNDpinatonepoint.They
should not share the high current path of CIN or COUT
.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
dischargedbypasscapacitorsareeffectivelyputinparallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 • CLOAD).
Thus, a 10µF capacitor charging to 3.3V would require a
250µs rise time, limiting the charging current to about
130mA.
6. Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of
power components. These copper areas should be
connected to VIN or GND.
V
IN
C
IN
V
IN
V
IN
LTC3409
RUN SYNC
Board Layout Considerations
V
MODE
SW
FB
L1
C1
V
OUT
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3409. These items are also illustrated graphically in
the layout diagram of Figure 3. Check the following in your
layout.
SGND GND
C
OUT
R1
R2
3409 F03
1. Does the capacitor CIN connect to the power VIN
(Pins 3, 4) and GND (Exposed Pad) as close as pos-
sible? This capacitor provides the AC current to the
internal power MOSFETs and their drivers.
Figure 3
3409f
13
LTC3409
W U U
U
APPLICATIO S I FOR ATIO
Design Example
For best efficiency choose a 750mA or greater inductor
with less than 0.3Ω series resistance. CIN will require an
RMS current rating of at least 0.3A ≅ ILOAD(MAX)/2 at
temperature.
As a design example, assume the LTC3409 is used in a
2-alkalinecellbattery-poweredapplication. TheVIN willbe
operating from a maximum of 3.2V down to about 1.8V.
The load current requirement is a maximum of 600mA but
most of the time it will be in standby mode, requiring only
2mA. Efficiency at both low and high load currents is
important. Output voltage is 1.5V. With this information
we can calculate L using Equation 2:
Forthefeedbackresistors, chooseR2= 133k. R1canthen
be calculated from Equation 2 at 191K. Figure 4 shows the
complete circuit along with its efficiency curve.
Table 2 below gives 1% resistor values for selected output
voltages.
1
⎛
VOUT
V
IN
⎞
V
R1
R2
OUT
L =
VOUT 1–
⎜
⎟
(2)
0.85V
1.2V
1.5V
1.8V
51.1k
127k
191k
255k
133k
133k
133k
133k
f • ∆IL
⎝
⎠
Substituting VOUT = 1.5V, VIN = 3.2V, ∆IL = 240mA and
f = 1.7MHz in Equation 2 gives:
1
1.5
3.2
⎛
⎝
⎞
⎟
⎠
L =
1.5 1–
≅ 2.2µH
⎜
1.7MHz • 240mA
Burst Mode Efficiency, 1.5VOUT
100
90
80
70
60
50
40
30
20
10
0
V
IN
1.8V
IN
1.6V TO 5.5V
R2
133k
C
IN
4.7µF
LTC3409
SYNC
3.2V
IN
V
FB
2.5V
IN
L1
2.2µH
GND
RUN
SW
V
OUT
1.5V
V
IN
C
0.6A
OUT
V
MODE
IN
10µF
CER
R1
191k
3409 F04
L1: SUMIDA CDRH2D18/LD
C1
0.1
1
10
100
1000
10pF
LOAD CURRENT (mA)
3409 F04b
Figure 4
3409f
14
LTC3409
U
PACKAGE DESCRIPTIO
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
0.675 ±0.05
3.5 ±0.05
2.15 ±0.05 (2 SIDES)
1.65 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
0.38 ± 0.10
TYP
5
8
3.00 ±0.10
(4 SIDES)
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
(DD8) DFN 1203
4
1
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.38 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
3409f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LTC3409
U
TYPICAL APPLICATIO
2-Cell to 1.2V/600mA Regulator for High Efficiency and Low Profile
LTC3409
SW
2.2µH*
22pF
3, 4
7
6
1
V
V
OUT
1.2V
IN
1.8V TO 3V
V
IN
C
C
OUT
IN
RUN
10µF
4.7µF
5
CER
CER
MODE
SYNC
V
FB
287k
8
301k
GND SGND
9
2
C
OUT
: TDK C1608X5R0J475M
IN
C
: TDK C1608X5R0G106M
*SUMIDA CDRH2D09NP-2R2NC
3409 TA02a
Efficiency
Load Step
95
90
85
80
75
70
65
60
55
50
V
V
= 1.8V
IN
OUT
V
OUT
= 1.2V
100mV/DIV
AC COUPLED
f = 1.7MHz
f = 2.6MHz
I
L
500mA/DIV
I
LOAD
500mA/DIV
3409 TA02c
V
V
LOAD
= 1.8V
20µs/DIV
IN
= 1.2V
OUT
I
= 200mA TO 600mA
0.01
0.001
OUTPUT CURRENT (mA)
0.0001
0.1
1
3409 TA02b
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
96% Efficiency, V : 2.7V to 6V, V
LTC1878
600mA (I ), 550kHz, Synchronous Step-Down
= 0.8V, I = 10µA,
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SD
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OUT(MIN)
IN
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100mA, Low Voltage VLDO
V : 0.9V to 5.5V, V
= 0.40V, Dropout Voltage = 0.05V,
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96% Efficiency, V : 2.7V to 6V, V
= 0.8V, I = 10µA,
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< 1µA, MS8 Package
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LTC3405/LTC3405A 300mA (I ), 1.5MHz, Synchronous Step-Down
95% Efficiency, V : 2.5V to 5.5V, V
I
= 0.8V, I = 20µA,
Q
OUT
IN
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
DC/DC Converter
< 1µA, ThinSOTTM Package
SD
LTC3406/LTC3406B 600mA (I ), 1.5MHz, Synchronous Step-Down
96% Efficiency, V : 2.5V to 5.5V, V
= 0.6V, I = 20µA,
Q
OUT
IN
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I
< 1µA, ThinSOT Package
SD
LTC3407
LTC3411
Dual, 600mA (I ), 1.5MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, V : 2.5V to 5.5V, V
= 0.6V, I = 40µA,
Q
OUT
IN
I
< 1µA, 10-Lead MSE Package
SD
1.25A (I ), 4MHz, Synchronous Step-Down
95% Efficiency, V : 2.5V to 5.5V, V
= 0.8V, I = 60µA,
Q
OUT
IN
DC/DC Converter
I
< 1µA, 10-Lead MS Package
SD
VLDO and ThinSOT are trademarks of Linear Technology Corporation.
3409f
LT/TP 0205 1K • PRINTED IN THE USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
©LINEAR TECHNOLOGY CORPORATION 2005
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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