LTC3422EDD [Linear]
1.5A, 3MHz Synchronous Step-Up DC/DC Converter with Output Disconnect; 1.5A ， 3MHz的同步升压型DC / DC转换器输出断接
| 型号： | LTC3422EDD |
| 厂家： | 
Linear |
| 描述： | 1.5A, 3MHz Synchronous Step-Up DC/DC Converter with Output Disconnect |
| 文件： | 总16页 (文件大小：256K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3422
1.5A, 3MHz Synchronous
Step-Up DC/DC Converter
with Output Disconnect
U
FEATURES
DESCRIPTIO
■
700mA Continuous/1A Pulsed Output Current
The LTC®3422 is a high efficiency, current mode, fixed
frequency, step-up DC/DC converter with true output
disconnectandinrushcurrentlimiting. Thepartisguaran-
teed to start up from an input voltage of 1V. The device
includes a 0.20Ω N-channel MOSFET switch and a 0.24Ω
P-channel MOSFET synchronous rectifier. The output
voltage, switching frequency, soft-start time, Burst Mode
threshold and loop compensation are all simply pro-
grammed using tiny external passive components.
for Li-Ion to 5V Applications
■
Synchronous Rectification: Up to 96% Efficiency
■
True Output Disconnect
■
Inrush Current Limiting
Adjustable Automatic Burst Mode® Operation
■
■
Low Noise, Fixed Frequency Operation from
100kHz to 3MHz
0.5V to 4.5V Input Range
■
■
2.25V to 5.25V Adjustable Output Voltage
Quiescent current is only 25µA during Burst Mode opera-
tion, maximizing battery life in portable applications. The
oscillator frequency can be programmed up to 3MHz and
can be synchronized to an external clock applied to the
SYNC pin.
■
Guaranteed 1V Start-Up
■
Programmable Soft-Start
■
Synchronizable Oscillator
■
Low Quiescent Current: 25µA
■
<1µA Shutdown Current
■
■
Otherfeaturesinclude1µAshutdown,short-circuitprotec-
tion, anti-ringing control, thermal shutdown and current
limit.TheLTC3422isavailableina(3mm× 3mm× 0.75mm)
10-pin DFN package.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Anti-Ringing Control
Small (3mm × 3mm × 0.75mm) Thermally Enhanced
10-Pin DFN PackUage
APPLICATIO S
■
Wireless Handsets
■
Handheld Computers
■
GPS Receivers
MP3 Players
■
U
TYPICAL APPLICATIO
2.4V to 3.3V Efficiency and Power Loss
100
90
80
70
60
50
40
30
20
10
0
10000
1000
100
10
BURST
4.7µH
V
IN
EFFICIENCY
1.8V TO 3.2V
+
4.7µF
2 CELLS
V
SW
IN
PWM
V
OUT
EFFICIENCY
SYNC
V
3.3V
OUT
FB
600mA
22µF
931k
549k
LTC3422
SHDN
OFF ON
PWM
POWER
LOSSES
V
C
BURST
GND
SS
R
T
1
1nF
15k
BURST
POWER
LOSSES
22pF
0.1µF
28k
2.2nF
301k
f
= 1MHz
OSC
0
0.1
1
10
100
1000
3422 TA01a
LOAD CURRENT (mA)
3422 TA01b
3422fa
1
LTC3422
W W U W
U
W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
TOP VIEW
VIN, VOUT, SYNC Voltages........................... –0.3V to 6V
FB, SS, BURST, SHDN Voltages ................ –0.3V to 6V
SW Voltage
DC .......................................................... –0.3V to 6V
Pulsed < 100ns ...................................... –0.3V to 7V
Operating Temperature Range
SW
1
2
3
4
5
10
9
V
OUT
V
IN
SYNC
11
BURST
SS
8
R
T
7
V
C
SHDN
6
FB
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
(Notes 2, 5)............................................. –40°C to 85°C
Storage Temperature Range ................. –65°C to 125°C
TJMAX = 125°C, θJA = 43°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER
LTC3422EDD
DD PART MARKING
LBRN
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T = 25°C. V = 1.2V, V
= 3.3V, R = 28k, unless otherwise noted. (Note 2)
T
A
IN
OUT
PARAMETER
Minimum V Start-Up Voltage
CONDITIONS
MIN
TYP
MAX
1
UNITS
I
< 1mA
LOAD
0.88
V
V
IN
Minimum V Operating Voltage
(Note 3)
●
0.5
IN
Output Voltage Adjust Range
2.25
2.40
5.25
5.25
V
V
●
●
Feedback Voltage
1.192
1.216
1
1.240
50
42
1
V
nA
µA
µA
mA
µA
µA
Ω
Feedback Input Current
V
= 1.216V
FB
Quiescent Current—Burst Mode Operation
Quiescent Current—Shutdown
Quiescent Current—Active
NMOS Switch Leakage
V = 0V (Note 4)
25
C
SHDN = 0V, V
= 0V
0.1
OUT
V = 0V (Note 4)
0.75
0.1
1.1
5
C
PMOS Switch Leakage
V
V
V
= 2V
0.1
10
OUT
OUT
OUT
NMOS Switch On Resistance
PMOS Switch On Resistance
= 3.3V
= 3.3V
0.20
0.24
Ω
NMOS Current Limit—Steady State
NMOS Current Limit—Pulsed
NMOS Current Limit—Short Circuit
●
1.5
2
A
A
A
Duty Cycle Not to Exceed 5%
= 500mV, V = 2.5V
2.5
0.75
V
1.5
OUT
IN
NMOS Burst Current Limit
Maximum Duty Cycle
Minimum Duty Cycle
Frequency
600
91
mA
%
●
●
●
●
●
84
0
%
0.85
2.2
1
1.15
MHz
V
SYNC Input High
SYNC Input Low
0.8
1
V
SYNC Input Current
0.01
µA
3422fa
2
LTC3422
ELECTRICAL CHARACTERISTICS
The
●
denotes the specifications which apply over the full operating
= 3.3V, R = 28k, unless otherwise noted. (Note 2)
temperature range, otherwise specifications are at T = 25°C. V = 1.2V, V
A
IN
OUT
T
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SHDN Input High
V
V
= 0V (Turn-On Threshold, Initial Start-Up)
> 2.4V (Stay-On Threshold)
1
0.65
V
V
OUT
OUT
SHDN Input Low
Turn-Off Threshold
0.25
1
V
µA
µS
µA
V
SHDN Input Current
V
= 3.3V
●
0.01
50
SHDN
Error Amp Transconductance
Soft-Start Current Source
BURST Threshold Voltage
V
= 1V
–5
–2.4
0.88
–1.2
0.97
SS
Falling Edge, Sensed at the BURST Pin
0.79
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliabilty and lifetime.
Note 3: Once V
is greater than 2.4V, the LTC3422 is not dependent on
OUT
the V supply.
IN
Note 4: Current is measured into the V
bootstrapped to the output. The current will reflect to the input supply by
pin since the supply current is
OUT
Note 2: The LTC3422E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
(V /V ) • Efficiency. The outputs are not switching.
OUT IN
Note 5: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
3422fa
3
LTC3422
U W
TYPICAL PERFOR A CE CHARACTERISTICS (T = 25°C, unless otherwise specified)
A
Single Cell to 3.3V Efficiency
2-Cell to 3.3V Efficiency
Li-Ion to 5V Efficiency
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
BURST
EFFICIENCY
BURST
EFFICIENCY
PWM
V
V
V
= 3V
= 2.4V
= 1.8V
IN
IN
IN
V
V
V
= 4.2V
= 3.6V
= 3.1V
IN
IN
IN
EFFICIENCY
BURST
V
= 1.6V
= 1.25V
= 0.9V
IN
IN
EFFICIENCY
V
IN
V
= 1.6V
= 1.25V
= 0.9V
IN
IN
PWM
EFFICIENCY
V
V
V
IN
PWM
EFFICIENCY
V
= 3V
= 2.4V
= 1.8V
IN
V
V
V
V
= 4.2V
= 3.6V
= 3.1V
IN
IN
IN
IN
IN
V
f
= 1MHz
1
f
= 1MHz
f
= 1MHz
OSC
OSC
OSC
0.1
10
100
1000
0.1
1
10
100
1000
0.1
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3422 G02
3422 G03
3422 G01
Burst Mode Operation
Load Transient Response
Inrush Current Control
V
V
OUT
OUT
V
OUT
100mV/DIV
50mV/DIV
1V/DIV
AC COUPLED
AC COUPLED
300mA
50mA
SW
INDUCTOR
CURRENT
100mA/DIV
2V/DIV
I
OUT
100mA/DIV
INDUCTOR
CURRENT
0.5A/DIV
3422 G05
3422 G06
3422 G04
V
V
C
= 2.4V
200µs/DIV
V
V
C
= 0V TO 2.4V 500µs/DIV
V
I
= 2.4V
LOAD
2µs/DIV
IN
IN
IN
= 3.3V
= 3.3V
= 20mA
OUT
OUT
OUT
OUT
= 22µF
= 22µF
100mA LOAD CURRENT
Efficiency vs Frequency
Efficiency vs V
Start-Up Voltage vs Output Current
IN
100
90
100
90
80
70
60
50
40
1.25
f
= 300kHz
OSC
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
80
f
= 3MHz
OSC
70
f
= 1MHz
OSC
60
50
40
30
20
10
0
f
= 1MHz
V = 3.3V
OUT
OSC
V
OUT
= 2.4V
IN
PWM AT 200mA LOAD
V
= 3.3V
1
10
100
1000
1
3
4
4.5
1.5
2
2.5
3.5
5
100
OUTPUT CURRENT (mA)
0
50
150
200
INPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
3422 G07
3422 G08
3422 G09
3422fa
4
LTC3422
U W
TYPICAL PERFOR A CE CHARACTERISTICS (T = 25°C, unless otherwise specified)
A
Burst Mode Output Current
Threshold vs R (3.3V Output)
Burst Mode Output Current
FB Voltage vs Temperature
Threshold vs R
(5V Output)
BURST
BURST
1.217
1.216
1.215
1.214
V
V
= 1.25V TO 2.9V
V
V
= 1.8V TO 4.2V
IN
IN
140
120
100
80
140
120
100
80
= 3.3V
= 5V
OUT
OSC
OUT
OSC
f
= 1MHz
f
= 1MHz
ENTERS BURST (MIN)
EXITS BURST (AVE)
60
60
ENTERS BURST (MIN)
EXITS BURST (AVE)
40
40
20
20
0
0
1.213
450
50 125 200 275 350 425 500 575 650
50 150 250 350
550 650 750 850
(kΩ)
–45 –30 –15
0
15 30 45 60 75 90
TEMPERATURE (°C)
R
R
(kΩ)
BURST
BURST
3422 G10
3422 G11
3422 G12
Frequency vs Temperature
(Normalized About 1MHz)
Burst Mode Quiescent Current
vs Temperature
Current Limit vs Temperature
30
28
26
24
2.55
2.50
2.45
2.40
1.02
1.01
1.00
0.99
22
2.35
0.98
–45 –30 –15
0
15 30 45 60 75 90
–45 –30 –15
0
15 30 45 60 75 90
–45 –30 –15
0
15 30 45 60 75 90
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3422 G14
3422 G15
3422 G13
R
vs Temperature
No-Load Input Current vs VIN
Maximum Output Current vs V
DS(ON)
IN
280
260
240
220
200
180
160
2000
1800
1600
1400
1200
1000
800
170
160
150
140
130
120
110
100
90
f
= 1MHz
CHIP ENTERS
OSC
Burst Mode OPERATION
V
= 3.3V
V
= 5V
OUT
OUT
PMOS R
DS(ON)
5V DIODE
RECTIFICATION
NMOS R
V
OUT
= 5V
DS(ON)
3.3V DIODE
RECTIFICATION
80
V
OUT
= 3.3V
70
600
60
50
400
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
4
4.4 4.8
–45 –30 –15
0
15 30 45 60 75 90
2.40 3.00
4.20 4.80
5.40
1.80
3.60
INPUT VOLTAGE (V)
TEMPERATURE (°C)
INPUT VOLTAGE (V)
3422 G17
3422 G16
3422 G18
3422fa
5
LTC3422
U
U
U
PI FU CTIO S
SW (Pin 1): Switch Pin for the Inductor Connection.
Minimize trace length between SW and inductor. For
discontinuousinductorcurrent, acontrolledimpedanceis
internally connected from SW to VIN to eliminate high
frequency ringing, reducing EMI radiation.
The nominal soft-start charging current is 2.4µA. The active
range of SS is from 0.8V to 1.6V.
SHDN (Pin 5): Shutdown Input. Less than 250mV on SHDN
shutsdowntheLTC3422. Placing1VormoreonSHDNenables
the LTC3422. Once VOUT exceeds 2.2V, hysteresis is applied
to this pin (500nA exits the pin) allowing it to operate at a logic
high while the battery can drop to 500mV.
VIN (Pin 2): Input Supply Voltage. Connect VIN to the input
supply and decouple with a 4.7µF or larger ceramic
capacitor as close to VIN as possible.
FB (Pin 6): Feedback Input to Error Amplifier. Connect the VOUT
to ground resistor divider tap here. The output voltage can be
adjusted from 2.25V to 5.25V according to the formula:
BURST (Pin 3): Burst Mode Threshold Adjust. Automatic
Burst Mode Operation: A resistor/capacitor combination
fromBURSTtogroundprogramstheaverageloadcurrent
at which automatic Burst Mode operation is exited, ac-
cording to the formula:
R1+ R2
VOUT = 1.216 •
R2
VC (Pin 7): Error Amp Output. A frequency compensation
network is connected from VC to ground to compensate the
loop. See the section “Closing the Feedback Loop” for guide-
lines.
12
RB =
IEXITBURST
where RB is in kΩ and IEXITBURST is in amps
RT(Pin8):FrequencyAdjustInput.Connectaresistortoground
to program the oscillator frequency according to the formula:
COUT • VOUT
CB ≥
64,000
28
RT
where CB(MIN) and COUT are in µF.
fOSC
=
Please refer to the Burst Mode Output Current Threshold
vs RBURST Typical Performance Chacteristic curves.
where fOSC is in MHz and RT is in kΩ.
SYNC (Pin 9): Oscillator Synchronization Input. A clock pulse
width of 100ns to 2µs is required to synchronize the internal
oscillator. If not used, SYNC should be grounded.
Note that during Burst Mode operation the peak inductor
current will be approximately 600mA and return to zero on each
cycle. In Burst Mode operation the frequency is variable,
providing a significant efficiency improvement at light loads.
The LTC3422 only allows Burst Mode operation to be entered
once VOUT exceeds approximately 2.2V.
VOUT (Pin 10): Output of the synchronous rectifier and
bootstrappedpowersourcefortheLTC3422. Aceramiccapaci-
tor of at least 10µF is required and should be located as close to
VOUT and the power ground plane as possible.
Manually Implementing Burst Mode Operation: Ground
BURSTtoforceBurstMode operationorconnectittoVOUT to
forcefixedfrequencyPWMmode. NotethatBURSTmustnot
Exposed Pad (Pin 11): Signal and Power Ground for the
LTC3422. This pin MUST be soldered to the PCB ground plane
for electrical contact and rated thermal performance.
be pulled higher than VOUT
.
SS(Pin4):Soft-Start. ConnectacapacitorfromSStogroundto
set the soft-start time according to the formula:
t(ms) = CSS(µF) • 320
3422fa
6
LTC3422
W
BLOCK DIAGRA
L1
4.7µH
OPTIONAL
V
IN
1V TO 4.5V
+
C
IN
10µF
5
2
1
V
SW
SHDN
IN
BULK
CONTROL
SIGNALS
V
IN
CURRENT
SENSE
ANTIRING
SHUTDOWN
AND
SHDN
V
OUT
V
V
OUT
BIAS
10
2.25V TO 5.25
PWM
LOGIC
AND
–
+
DRIVERS
I
ZERO
COMP
CURRENT
SENSE
BURST SLEEP
BURST
COMP
–
+
1.216V
0.88V
REFERENCE
0.88V
THERMAL
BURST
MODE
CONTROL
SHUTDOWN
PWM
AWAKEN
COMP
COMP
–
+
–
–
+
g
ERROR
m
R1
–2%
AMPLIFIER
–
+
FB
C
OUT
6
7
22µF
R2
1.216V
V
+
C
+
I
MAX
COMP
Σ
1.5A
C
C1
1nF
+
–
START-UP
CURRENT
RAMP
C
R
C2
Z
22pF
15k
SLOPE
COMPENSATION
START-UP
SOFT-START
AND
THERMAL
REG
OSCILLATOR
EXPOSED
PAD
R
T
SYNC
BURST
SS
4
11
8
9
3
3422 BD
R
T
R
C
C
B
B
SS
0.1µF
28k
301k
2.2nF
U
OPERATIO
increasedinconjunctionwiththesoft-startramp. Switch-
ingfrequencyisalsointernallycontrolledduringstart-up.
The device can start up under some load (see graph of
Start-Up Voltage versus Output Current). Soft-start and
3422fa
LOW VOLTAGE START-UP
The LTC3422 includes an independent start-up oscillator
designed to start up at input voltages of 0.88V typical.
During start-up, the peak current limit is gradually
7
LTC3422
U
OPERATIO
inrush current limiting are provided during start-up as oscillator, the free running frequency must be set at least
well as normal switching mode. The same soft-start 20% lower than the desired synchronized frequency.
capacitor is used for each operating mode.
28
fOSC
=
When either VIN or VOUT exceeds 2.25V, the LTC3422
enters normal operating mode. Once the output voltage
exceeds the input by 0.3V typical, the LTC3422 powers
itself from VOUT instead of VIN. At this point the internal
circuitry has no dependency on the VIN input voltage,
eliminating the requirement for a large input capacitor.
Theinputvoltagecandropaslowas0.5Vwithoutaffecting
circuit operation. The limiting factor for the application
becomes the availability of the power source to supply
sufficient energy to the output at the low voltages and the
maximum duty cycle, which is clamped at 91% typical.
RT
where fOSC is in MHz and RT is in kΩ.
Current Sensing
Lossless current sensing converts the peak current signal
to a voltage to sum in with the internal slope compensa-
tion. This summed signal is compared to the error ampli-
fier output to provide a peak current control command for
thePWM. TheLTC3422incorporatesslopecompensation
which is adaptive to the input and output voltages. There-
fore, the converter provides the proper amount of slope
compensation to ensure stability, but not an excess which
would cause a loss of phase margin in the converter.
LOW NOISE FIXED FREQUENCY OPERATION
Shutdown
Error Amplifier
The part is shutdown by pulling SHDN below 0.25V, and
activated by pulling the pin initially above 1V. Once VOUT
exceeds 2.2V typical, hysteresis is applied to this pin
allowing it to maintain a logic high state down to 0.65V.
Note that SHDN can be driven above VIN or VOUT as long
as it is limited to less than the absolute maximum rating.
The error amplifier is a transconductance amplifier, with
its positive input internally connected to the 1.216V refer-
ence and its negative input connected to FB. A simple
compensation network is placed from VC to ground.
Internal clamps limit the minimum and maximum error
amplifier output voltage for improved large-signal tran-
sient response.
Soft-Start
Thesoft-starttimeisprogrammedwithanexternalcapaci-
tor from SS to ground. An internal current source charges
it with a nominal 2.4µA. The ramping voltage on SS
dictates the gradually increasing peak current limit until
the voltage on the capacitor exceeds 1.6V, after which the
internally set peak current limit is maintained. In the event
of a commanded shutdown or a thermal shutdown, the
capacitor on SS is discharged to ground automatically.
Note that Burst Mode operation is inhibited during the
soft-start time.
Current Limit
The current limit circuitry shuts off the internal N-channel
MOSFETswitchwhenthecurrentlimitthresholdisreached.
In Burst Mode operation, the current limit is reduced to
approximately 600mA.
Zero Current Amplifier
Thezerocurrentamplifiermonitorstheinductorcurrentto
theoutputandshutsoffthesynchronousrectifieroncethe
current falls below 50mA typical, preventing negative
inductor current.
t (ms) = CSS (µF) • 320
Oscillator
Anti-Ringing Control
The frequency of operation is set through a resistor from
RT to ground. A precision timing capacitor resides inside
the LTC3422. The oscillator can be synchronized with an
external clock applied to SYNC. When synchronizing the
The anti-ringing control connects a resistor across the
inductor to dampen the ringing on SW during discontinu-
ous conduction mode. The LCSW ringing (L = inductor,
3422fa
8
LTC3422
U
OPERATIO
CSW = SW Capacitance) is low energy, but can cause EMI
radiation.
Automatic Burst Mode Operation Control
For automatic operation, an RC network should be con-
nected from BURST to ground. The value of the resistor
will control the average load current (IBURST) at which
Burst Mode operation will be entered and exited (there is
hysteresis to prevent oscillation between modes). The
equationgivenforthecapacitoronBURSTistheminimum
value to prevent ripple on BURST from causing the part to
oscillate in and out of Burst Mode operation at the current
where the mode transition occurs. The equation given for
the resistor on BURST is the typical average load current
at which automatic Burst Mode operation is exited.
Burst Mode OPERATION
BurstModeoperationcanbeautomaticorusercontrolled.
In automatic operation, the LTC3422 will automatically
enterBurstModeoperationatlightloadandreturntofixed
frequency PWM mode for heavier loads. The user can
program the average load current at which the mode
transition occurs using a single resistor connected from
BURST to GND.
The oscillator is shut down during Burst Mode operation,
since the on time is determined by the time it takes the
inductor current to reach a fixed 600mA peak current and
the off time is determined by the time it takes for the
inductor current to return to zero.
12
RB =
IEXITBURST
where RB is in kΩ and IEXITBURST is in amps.
In Burst Mode operation, the LTC3422 delivers energy to
theoutputuntilitisregulatedandthenentersasleepstate,
where the switches are kept off while the LTC3422 con-
sumes only 25µA of quiescent current. In this mode the
output ripple has a variable frequency component with
load current and will be typically 2% peak-peak. This
maximizes efficiency at very light loads by minimizing
switching and quiescent losses. Burst Mode operation
ripple can be reduced slightly by increasing the output
capacitance (47µF or greater). This additional capacitance
doesnotneedtobealowESRtypeiflowESRceramicsare
alsoused. AnothermethodofreducingBurstModeopera-
tion ripple is to place a small feed-forward capacitor (10pF
to 100pF) across the upper resistor in the VOUT feedback
divider network.
COUT • VOUT
CB ≥
64,000
where CB(MIN) and COUT are in µF.
Please refer to the Burst Mode Output Current Threshold
vs RBURST Typical Performance Chacteristic curves.
IntheeventthataloadtransientcausesFBtodropbymore
than 4% from the regulation value while in Burst Mode
operation, the LTC3422 will immediately switch to fixed
frequency operation and an internal pull-up will be mo-
mentarily applied to BURST, rapidly charging the BURST
capacitor. This prevents the LTC3422 from immediately
re-enteringBurstModeoperationoncetheoutputachieves
regulation.
InBurstModeoperation, thecompensationnetworkisnot
used and VC is disconnected from the error amplifier.
During long periods of Burst Mode operation, leakage
currents in the external components or on the PC board
could cause the compensation capacitor to charge (or
discharge), which could result in a large output transient
whenreturningtofixedfrequencymodeofoperation,even
at the same load current. To prevent this, the LTC3422
incorporates an active clamp circuit that holds the voltage
on VC at an optimal voltage during Burst Mode operation.
This minimizes any output transient when returning to
fixed frequency mode operation.
Manual Burst Mode Operation
Foroptimumtransientresponsewithlargedynamicloads,
the operating mode should be controlled manually by the
host. By commanding fixed frequency PWM operation
prior to a sudden increase in load, output voltage droop
can be minimized. For manual control of Burst Mode
operation, the RC network connected to BURST can be
eliminated. To force fixed frequency PWM mode, BURST
should be connected to VOUT. To force Burst Mode opera-
tion, BURST should be grounded. When commanding
Burst Mode operation manually, the circuit connected to
3422fa
9
LTC3422
U
OPERATIO
Simplified Diagram of Automatic Burst Mode Control Circuit
V
CC
I
OUT
10,000
UVLO
COMP
2mA
V
– 4%
+
–
REF
BURST
COMP
–
+
880mV TO
1.16V
FB
6
SSDONE
0 = PWM MODE
1 = Burst Mode
OPERATION
ERROR AMP/
SLEEP COMP
BURST
SLEEP
–
+
V
±1%
REF
COMP CLAMP
500mV TO 1V
V
BURST
C
7
3
C
C1
C
R
B
B
R
Z
3422 AI01
BURST must be able to sink up to 4mA. Burst Mode
operation is inhibited during soft-start.
stillcommandingthisbygroundingBURST)andthecycle
will repeat, resulting in about 4% output ripple. The
maximum average current that can be supplied in Burst
Mode operation is given by:
If VIN is greater than VOUT – 300mV, the part will exit Burst
Mode operation and the synchronous rectifier will be
disabled.
275 • V
VOUT
IN
IOUT(MAX)
=
inmA
Note that if the load current applied during forced Burst
Modeoperation(BURSTisgrounded)exceedsthecurrent
that can be supplied, the output voltage will start to droop
and the LTC3422 will automatically come out of Burst
Mode operation and enter fixed frequency mode, raising
VOUT. Once regulation is achieved, the LTC3422 will then
enter Burst Mode operation once again (since the user is
Output Disconnect and Inrush Current Limiting
The LTC3422 is designed to allow true output disconnect
by eliminating body diode conduction of the internal
P-channelMOSFETrectifier.ThisallowsVOUT togotozero
volts during shutdown without drawing any current from
3422fa
10
LTC3422
U
OPERATIO
It should also be noted that the LTC3422 provides inrush
current limiting without reducing the maximum load cur-
rent capability during start-up. The internally set peak
current command of the LTC3422 is allowed to gradually
increase during the soft-start period until it reaches the
nominal maximum level.
the input source. It also allows for inrush current limiting
at turn-on, minimizing surge currents seen by the input
supply. Note that to obtain the advantages of output
disconnect, there must not be any external Schottky
diodes connected between the SW pin and VOUT
.
W U U
APPLICATIO S I FOR ATIO
U
Note:Boardlayoutisextremelycriticaltominimizevoltage where:
overshoot on SW due to stray inductance. Keep the output
f = Operating Frequency in MHz
Ripple = Allowable Inductor Current Ripple (Amps
Peak-Peak)
filter capacitors as close as possible to VOUT and use very
low ESR/ESL ceramic capacitors tied to a good ground
plane.
VIN(MIN) = Minimum Input Voltage
V
VOUT(MAX) = Maximum Output Voltage
OUT
LTC3422
1
2
10
9
The inductor current ripple is typically set 20% to 40% of
the maximum inductor current.
SW
V
OUT
V
IN
+
V
SYNC
IN
For high efficiency, choose an inductor with high fre-
quency core material, such as ferrite, to reduce core
losses. The inductor should have low ESR (equivalent
series resistance) to reduce the I2R losses and must be
able to handle the peak inductor current without saturat-
ing. Molded chokes or chip inductors usually do not have
enough core to support peak inductor currents in the 2A
to 3A region. To minimize radiated noise, use a toroidal or
shielded inductor. See Table 1 for suggested inductor
suppliers and Table 2 for a list of capacitor suppliers.
BURST
3
4
5
R
8
7
6
T
SS
V
C
SHDN
FB
3422 F01
MULTIPLE VIAS
TO GROUND PLANE
Figure 1. Recommended Component Placement. Traces
Carrying High Current are Direct (GND, SW, V , V ). Trace
IN OUT
Area at FB and V are Kept Low. Lead Length to Battery Should
C
IN
be Kept Short. V and V Ceramic Capacitors Should be as
OUT
Close to the LTC3422 Pins as Possible
COMPONENT SELECTION
Inductor Selection
Table 1. Inductor Vendor Information
SUPPLIER PHONE
FAX
WEB SITE
Coilcraft (847) 639-6400 (847) 639-1469 www.coilcraft.com
CoEv
Magnetics
(800) 277-7040 (650) 361-2508 www.circuitprotection.
com/magnetics.asp
The high frequency operation of the LTC3422 allows the
use of small surface mount inductors. The minimum
inductance value is proportional to the operating fre-
quency and is limited by the following constraints:
Murata
USA:
USA:
www.murata.com
(814) 237-1431 (814) 238-0490
(800) 831-9172
Sumida
USA:
(847) 956-0666 (847) 956-0702
Japan: Japan:
81-3-3607-5111 81-3-3607-5144
USA:
www.sumida.com
V
• VOUT(MAX) – V
(
)
3
IN(MIN)
IN(MIN)
L > and L >
TDK
(847) 803-6100 (847) 803-6296 www.component.tdk.com
(847) 297-0070 (847) 669-7864 www.toko.com
ƒ
ƒ •Ripple • VOUT(MAX)
TOKO
Wurth
(201) 785-8800 (201) 785-8810 www.we-online.com
3422fa
11
LTC3422
W U U
U
APPLICATIO S I FOR ATIO
Output Capacitor Selection
Anotherconsiderationisthephysicalsizeoftheconverter.
As the operating frequency goes up, the inductor and filter
capacitors go down in value and size. The trade off is in
efficiency since the switching losses due to gate charge
areproportionallyincreasingwithfrequency.Forexample,
as shown in Figure 2, for a 2.4V to 3.3V converter, the
efficiency at 160mA is 9% less at 3MHz versus 300kHz.
The output voltage ripple has two components to it. The
bulk value of the capacitor is set to reduce the ripple due
to charge into the capacitor each cycle. The maximum
ripple due to charge is given by:
IP • V
COUT • VOUT • ƒ
IN
VR(BULK)
=
100
f
= 300kHz
OSC
90
80
70
where IP = peak inductor current
f
= 3MHz
OSC
The ESR (equivalent series resistance) is usually the most
dominant factor for ripple in most power converters. The
ripple due to capacitor ESR is simply given by:
60
50
40
30
20
10
0
V
RCESR = IP • CESR
where CESR = capacitor equivalent series resistance.
V
OUT
= 2.4V
IN
V
= 3.3V
Low ESR capacitors should be used to minimize output
voltage ripple. For most applications, Murata or Taiyo
Yuden X5R ceramic capacitors are recommended.
1
10
100
1000
OUTPUT CURRENT (mA)
3422 F02
Figure 2. 2.4V to 3.3V Efficiency vs Frequency of Operation
Input Capacitor Selection
The input filter capacitor reduces peak currents drawn
from the input source and reduces input switching noise.
Since the LTC3422 can operate at voltages below 0.5V
once the output is regulated, the demand on the input
capacitor is much less. In most applications 1µF per Amp
ofpeakinputcurrentisrecommended. TaiyoYudenoffers
very low ESR ceramic capacitors, for example the 1µF in
a 0603 case (JMK107BJ105MA).
The final consideration is whether the application can
allow“pulseskipping.”Inthismode,theminimumontime
of the converter cannot support the duty cycle, so the
converterripplewillgoupandtherewillbealowfrequency
component of the output ripple. In many applications
where physical size is the main criterion, running the
converterinthismodeisacceptable.Inapplicationswhere
it is preferred not to enter this mode, the maximum
operating frequency is given by:
Table 2. Capacitor Vendor Information
SUPPLIER PHONE
FAX
WEB SITE
VOUT – V
VOUT • tON(MIN)
IN
AVX
(803) 448-9411 (803) 448-1943 www.avxcorp.com
(619) 661-6322 (619) 661-1055 www.sanyovideo.com
(847) 803-6100 (847) 803-6296 www.component.tdk.com
ƒMAX_NOSKIP
=
Hz
Sanyo
TDK
where tON(MIN) = minimum on time = 120ns.
Murata
USA:
USA:
www.murata.com
(814) 237-1431 (814) 238-0490
(800) 831-9172
Thermal Considerations
Taiyo Yuden (408) 573-4150 (408) 573-4159 www.t-yuden.com
To deliver the power that the LTC3422 is capable of it is
imperative that a good thermal path be provided to dissi-
pate the heat generated within the package. This can be
accomplished by taking advantage of the large thermal
pad on the underside of the LTC3422. It is recommended
that multiple vias in the printed circuit board be used to
Operating Frequency Selection
Thereareseveralconsiderationsinselectingtheoperating
frequency of the converter, such as, what are the sensitive
frequency bands that cannot tolerate any spectral noise.
3422fa
12
LTC3422
W U U
APPLICATIO S I FOR ATIO
U
conduct heat away from the LTC3422 and into the copper
plane with as much area as possible. In the event that the
junction temperature gets too high, the peak current limit
will automatically be decreased. If the junction tempera-
ture continues to rise, the LTC3422 will go into thermal
shutdown and all switching will stop until the internal
temperature drops.
capacitor exhibited in voltage mode controllers, thus
simplifying it to a single pole filter response. The product
of ‘the modulator control to output DC gain’ and ‘the error
amp open-loop gain’ gives the DC gain of the system:
VREF
GDC = GCONTROL_OUTPUT •GEA
•
VOUT
2 • V
IOUT
VIN > VOUT Operation
GCONTROL_OUTPUT
=
IN ; GEA ≈ 2000
The LTC3422 will maintain voltage regulation when the
input voltage is above the output voltage. This is achieved
by terminating the switching of the synchronous P-chan-
nel MOSFET and applying VIN statically on the gate. This
will ensure the volt • seconds of the inductor will reverse
during the time current is flowing to the output. Since this
mode will dissipate more power in the LTC3422, the
maximum output current is limited in order to maintain an
acceptable junction temperature and is given by:
The output filter pole is given by:
IOUT
ƒFILTER_POLE
=
π • VOUT •COUT
where COUT is the output filter capacitor.
The output filter zero is given by:
1
ƒFILTER_ZERO
=
125 – TA
2 • π •RESR •COUT
IOUT(MAX)
=
43 • (V + 1.5)– V
(
)
IN
OUT
where RESR is the capacitor equivalent series resistance.
where TA = ambient temperature.
A troublesome feature of the boost regulator topology is
the right-half plane zero (RHP), given by:
For example at VIN = 4.5V, VOUT = 3.3V and TA = 85°C, the
maximum output current is 345mA.
2
V
IN
Short Circuit
ƒRHPZ
=
2 • π •IOUT •L • VOUT
The LTC3422 output disconnect feature allows output
short circuit while maintaining a maximum internally set
current limit. However, the LTC3422 also incorporates
internal features such as current limit foldback and ther-
mal shutdown for protection from an excessive overload
or short circuit. During a prolonged short circuit the
current limit folds back to 0.75A typical should VOUT drop
below approximately 666mV. This 0.75A current limit
remainsineffectuntilVOUT exceedsapproximately800mV,
at which time the steady-state current limit is restored.
At heavy loads this gain increase with phase lag can occur
at a relatively low frequency. The loop gain is typically
rolled off before the RHP zero frequency.
The typical error amplifier compensation is shown in
Figure 3. The equations for the loop dynamics are as
follows:
1
ƒPOLE1
ƒZERO1
ƒPOLE2
≈
≈
≈
which is extremely close to DC
2 • π • 20e6 •CC1
1
Closing the Feedback Loop
2 • π •RZ •CC1
1
2 • π •RZ •CC2
The LTC3422 utilizes current mode control with internal
adaptiveslopecompensation.Currentmodecontrolelimi-
nates the 2nd order filter due to the inductor and output
3422fa
13
LTC3422
W U U
U
APPLICATIO S I FOR ATIO
V
OUT
10
1.216V
+
g
ERROR
m
R1
FB
6
AMPLIFIER
–
V
C
7
R2
C
C1
C
C2
R
Z
3422 F03
Figure 3. Typical Error Amplifier Compensation
U
TYPICAL APPLICATIO S
2-Cell to 3.3V at 600mA Application
2-Cell to 3.3V Efficiency and Power Loss at 1MHz
100
90
80
70
60
50
40
30
20
10
0
10000
1000
100
10
L1
4.7µH
V
IN
1.8V TO 3.2V
+
C
*
IN
4.7µF
V
V
V
= 3V
= 2.4V
= 1.8V
2 CELLS
IN
IN
IN
V
SW
IN
V
V
= 3V
= 2.4V
= 1.8V
OUT
IN
SYNC
V
V
3.3V
OUT
FB
IN
IN
C
*
OUT
22µF
600mA
V
R1
LTC3422
931k
V
V
= 1.8V
= 2.4V
= 3V
IN
IN
IN
SHDN
OFF ON
V
R2
549k
V
BURST
GND
C
V
V
V
= 1.8V
= 2.4V
= 3V
C
IN
IN
IN
1
C1
1nF
SS
R
T
C
C2
22pF
R
R
Z
R
B
C
C
T
B
SS
0.1µF
28k
0
1000
15k
301k
2.2nF
0.1
1
10
100
LOAD CURRENT (mA)
3422 TA02a
*LOCATE COMPONENTS CLOSE TO PINS
3422 TA02b
C
C
: TAIYO YUDEN X5R JMK212BJ475MD
IN
OUT
BURST EFFICIENCY
PWM EFFICIENCY
PWM POWER LOSSES
BURST POWER LOSSES
: TAIYO YUDEN X5R JMK325BJ226MM
L1: TDK RLF7030T-4R7M3R4
1-Cell to 3.3V at 240mA Application
1-Cell to 3.3V Efficiency and Power Loss at 1MHz
100
90
80
70
60
50
40
30
20
10
0
10000
1000
100
10
L1
V
= 1.6V
= 1.25V
= 0.9V
IN
4.7µH
V
V
IN
IN
0.9V TO 1.6V
V
IN
+
C
*
IN
10µF
1 CELL
V
SW
IN
V
OUT
SYNC
V
3.3V
OUT
FB
C
*
OUT
240mA
R1
10µF
LTC3422
931k
SHDN
OFF ON
V
IN
V
IN
V
IN
= 0.9V
= 1.25V
= 1.6V
R2
549k
V
C
BURST
GND
C
C1
1nF
SS
R
T
1
C
C2
22pF
R
R
Z
R
B
C
C
T
B
SS
0.1µF
28k
15k
374k
2.2nF
0
1000
0.1
1
10
100
LOAD CURRENT (mA)
3422 TA03a
*LOCATE COMPONENTS CLOSE TO PINS
IN OUT
L1: TDK RLF7030T-4R7M3R4
C
, C : TAIYO YUDEN X5R JMK212BJ106MM
3422 TA03b
BURST EFFICIENCY
PWM EFFICIENCY
PWM POWER LOSSES
BURST POWER LOSSES
3422fa
14
LTC3422
U
TYPICAL APPLICATIO S
Li-Ion to 5V Efficiency and Power Loss at 1MHz
Li-Ion to 5V at 700mA Application
100
90
80
70
60
50
40
30
20
10
0
10000
1000
100
10
L1
3µH
V
IN
3.1V TO 4.2V
+
V
V
V
= 4.2V
= 3.6V
= 3.1V
C
*
IN
IN
IN
IN
Li-Ion
V
SW
IN
10µF
V
OUT
SYNC
V
5V
OUT
C
*
700mA
OUT
R1
LTC3422
22µF
1.13M
V
V
V
= 3.1V
= 3.6V
= 4.2V
IN
IN
IN
SHDN
FB
OFF ON
R2
365k
V
C
BURST
GND
C
C1
1
SS
R
T
1nF
C
22pF
C2
R
R
Z
R
B
C
C
SS
T
B
28k
15k
90.9k
0
2.2nF
0.1µF
0.1
1
10
100
1000
LOAD CURRENT (mA)
3422 TA05a
3422 TA05b
BURST EFFICIENCY
PWM EFFICIENCY
*LOCATE COMPONENTS CLOSE TO PINS
L1: SUMIDA CDRH6D28-3R0
C
C
: TAIYO YUDEN X5R JMK212BJ106MM
IN
OUT
BURST POWER LOSSES
PWM POWER LOSSES
: TAIYO YUDEN X5R JMK325BJ226MM
2-Cell to 5V at 375mA Application
2-Cell to 5V Efficiency and Power Loss at 1MHz
L1
100
90
80
70
60
50
40
30
20
10
0
10000
1000
100
10
3µH
V
IN
1.8V TO 3.2V
+
C
*
IN
10µF
V
SW
2 CELLS
IN
V
V
V
= 3.2V
= 2.4V
= 1.8V
IN
IN
IN
V
OUT
SYNC
V
5V
OUT
FB
C
*
375mA
OUT
22µF
R1
LTC3422
1.13M
V
V
V
= 1.8V
= 2.4V
= 3.2V
IN
IN
IN
SHDN
OFF ON
R2
365k
V
C
BURST
GND
C
C1
1nF
SS
R
T
1
C
C2
22pF
R
R
15k
R
C
C
T
Z
B
B
SS
0.1µF
28k
931k
2.2nF
0
1000
0.1
1
10
100
3422 TA06a
LOAD CURRENT (mA)
3422 TA06b
*LOCATE COMPONENTS CLOSE TO PINS L1: SUMIDA CDRH6D28-3R0
BURST EFFICIENCY
PWM EFFICIENCY
BURST POWER LOSSES
PWM POWER LOSSES
C : TAIYO YUDEN JMK212BJ106MM
IN
C : TAIYO YUDEN JMK325BJ226MM
OUT
3422fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LTC3422
U
PACKAGE DESCRIPTIO
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
R = 0.115
TYP
6
0.38 ± 0.10
10
0.675 ±0.05
3.50 ±0.05
2.15 ±0.05 (2 SIDES)
1.65 ±0.05
3.00 ±0.10
(4 SIDES)
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PACKAGE
OUTLINE
(DD10) DFN 1103
5
1
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
0.200 REF
0.25 ± 0.05
0.50
BSC
2.38 ±0.10
(2 SIDES)
2.38 ±0.05
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
92% Efficiency, V : 0.85V to 5V, V
I
LTC3400/LTC3400B 600mA (I ), 1.2MHz, Synchronous Step-Up DC/DC
= 5V, I = 19µA/300µA,
Q
SW
IN
OUT(MAX)
Converters
< 1µA, ThinSOTTM
SD
LTC3401
1A (I ), 3MHz, Synchronous Step-Up DC/DC Converter 97% Efficiency, V : 0.5V to 5V, V
= 5.5V, I = 38µA,
Q
SW
IN
OUT(MAX)
OUT(MAX)
I
< 1µA, MS10
SD
LTC3402
2A (I ), 3MHz, Synchronous Step-Up DC/DC Converter 97% Efficiency, V : 0.5V to 5V, V
= 5.5V, I = 38µA,
Q
SW
IN
I
< 1µA, MS10
SD
LTC3421
3A (I ), 3MHz, Synchronous Step-Up DC/DC Converter 95% Efficiency, V : 0.5V to 4.5V, V
= 5.25V, I = 12µA,
Q
SW
IN
OUT(MAX)
OUT(MAX)
OUT(MAX)
OUT(MAX)
with Output Disconnect
I
< 1µA, QFN24
SD
LTC3423/LTC3424
LTC3425
1A/2A (I ), 3MHz, Synchronous Step-Up DC/DC
Converter
95% Efficiency, V : 0.5V to 5.5V, V
= 5.5V, I = 38µA,
Q
SW
IN
I
< 1µA, MSOP10
SD
5A (I ), 8MHz, (Low Ripple), 4-Phase Synchronous
Step-Up DC/DC Converter with Output Disconnect
95% Efficiency, V : 0.5V to 4.5V, V
= 5.25V, I = 12µA,
Q
SW
IN
I
< 1µA, QFN32
SD
LTC3426
LTC3428
2A (I ), 1.2MHz, Step-Up DC/DC Converter
92% Efficiency, V : 1.6V to 4.3V, V
= 5V, I < 1µA, SOT-23
SD
SW
IN
500mA (I ), 1.25MHz/2.5MHz, Synchronous Step-Up
DC/DC Converter with Output Disconnect
92% Efficiency, V : 1.8V to 5V, V
2mm × 2mm DFN
= 5.25V, I < 1µA,
SW
IN
OUT(MAX) SD
LTC3429
600mA (I ), 500kHz, Synchronous Step-Up DC/DC
Converter with Output Disconnect and Soft-Start
96% Efficiency, V : 0.5V to 4.4V, V
= 5V, I = 20µA/300µA,
Q
SW
IN
OUT(MAX)
I
< 1µA, ThinSOT
SD
LTC3525-3.3/
LTC3525-5
400mA (I ), Synchronous Step-Up DC/DC
Converter in SC70 Package
94% Efficiency, V : 0.8V to 4.5V, V
= 5.25V, I = 7µA,
Q
SW
IN
OUT(MAX)
I
< 1µA, SC70
SD
ThinSOT is a trademark of Linear Technology Corporation.
3422fa
LT 0406 REV A PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005
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