LTC3444EDD#TRPBF_技术文档

LTC3444

Micropower Synchronous

Buck-Boost DC/DC Converter

for WCDMA Applications

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FEATURES

DESCRIPTIO

■

Optimized Features for WCDMA Handsets

The LTC^®3444 is a highly efficient, fixed frequency, buck-

boost DC/DC converter, which operates from input volt-

ages above, below, and equal to the output voltage. The

topology incorporated in the IC provides a continuous

transferfunctionthroughalloperatingmodes, makingthe

product ideal for a single Lithium-Ion or multi-cell

applicationswheretheoutputvoltagecanvaryoverawide

range.

■

Regulated Output with Input Voltages

Above, Below, or Equal to the Output

■

0.5V to 5V Output Range

■

Up to 400mA Continuous Output Current From

a Single Lithium-Ion Cell

■

Minimal External Components

■

1.5MHz Fixed Frequency Operation

■

Internal Loop Compensation for Fast Response

The LTC3444 has been optimized for use in 3G WCDMA

applications. A unique design yields high efficiency at

very low output voltages while also eliminating external

components. The high speed error amplifier provides the

fast transient response required to slew the RF power

amplifier from standby to transmit and transmit to stand

by power levels. Output overvoltage protection protects

the RF power amplifier.

<25μs Full Scale Output Slewing; C_OUT4.7μF

■

Output Disconnect in Shutdown

■

2.75V to 5.5V Input

■

<1μA Shutdown Current

■

Internal Soft-Start

■

Output Overvoltage Protection

■

Single Inductor, No Schottky Diodes Required

■

Small, Thermally Enhanced 8-Lead (3mm × 3mm)

DFN Package

Operating frequency is internally set to 1.5MHz to mini-

mizeexternalcomponentsizewhilemaximizingefficiency.

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Other features include <1μA shutdown current, internal

soft-start, peak current limit and thermal shutdown. The

LTC3444 is available in a small, thermally enhanced

8-lead (3mm × 3mm) DFN package.

APPLICATIO S

■

WCDMA Applications–3G Handsets with High Speed

Data Rate Capability

■

MP3 Players

Digital Cameras

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Protected by U.S. Patents including 6404251, 6166527.

■

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TYPICAL APPLICATIO

2.2μH

V

LTC3444 Dynamic Response

OUT

0.8V TO 4.2V

LTC3444

340k

SW1

SW2

3.1V TO 4.2V

V

IN

V

OUT

4.7μF

V

OUT

CONTROL

SHDN

GND

FB

V

4.7μF

+

V

C

205k

Li-Ion

267k

10μs/DIV

V

= 3.6V, V

CONTROL

= 0.8V TO 4.2V

OUT

IN

= 2.36V TO 0.28V, I

= 100mA

LOAD

V

CONTROL

DAC

3444 G16a

3444 TA01

3444fb

1

LTC3444

W W U W

U W

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ABSOLUTE AXI U RATI GS

PACKAGE/ORDER I FOR ATIO

(Note 1)

TOP VIEW

V_IN,V_OUTVoltages .......................................... –0.3 to 6V

SW1,SW2 Voltages DC .................................. –0.3 to 6V

Pulsed <100ns ............... –0.3 to 7V

SHDN Voltage ................................................ –0.3 to 6V

Operating Temperature (Note 2) .............. –40°C to 85°C

Maximum Junction Temperature (Note 4) ............ 125°C

Storage Temperature Range .................. –65°C to 125°C

ORDER PART

NUMBER

SHDN

SW1

GND

SW2

1

2

3

4

8

7

6

5

FB

V

C

LTC3444EDD

9

IN

OUT

DD PACKAGE

8-LEAD (3mm × 3mm) PLASTIC DFN

DD PART MARKING

LBVZ

T_JMAX= 125°C, θ_JA= 43°C/W,

4-LAYER BOARD θ_JC= 2.96°C/W

EXPOSED PAD IS GND (PIN 9)

MUST BE SOLDERED TO PCB

Order Options Tape and Reel: Add #TR

Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF

Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

The

●

denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25°C.

A

V

IN

= V

= 3.6V unless otherwise noted.

OUT

PARAMETER

CONDITIONS

MIN

2.55

0.5

TYP

MAX

2.75

5

UNITS

V

Input Start-Up Voltage

Output Voltage Adjust Range

Feedback Voltage

●

2.65

V

1.19

1.22

1

1.25

50

V

Feedback Input Current

Quiescent Current - Shutdown

Quiescent Current - Active

NMOS Switch Leakage

PMOS Switch Leakage

NMOS Switch On Resistance

PMOS Switch On Resistance

Input Current Limit

V

= 1.22V

nA

μA

Ω

FB

SD = 0V, V

(Note 3)

= 0V Not Including Switch Leakage

0.1

700

0.1

0.19

0.22

0.4

3.5

1

OUT

1100

7

Switches B and C

Switches A and D

Switches B and C

Switches A and D

10

Ω

Switch D V = 3.6, V

= 1V

OUT

Ω

IN

●

2.5

3

A

Reverse Current Limit

Max Duty Cycle

A

Boost (%Switch C On)

Buck (% Switch A On)

●

70

100

82

%

Min Duty Cycle

●

0

%

MHz

dB

Frequency Accuracy

1.2

1.5

65

1.8

Error Amp A

VOL

Error Amp Source Current

Error Amp Sink Current

Internal Soft-Start Time

Output OV Threshold

V = 1.5V, FB = 0V

8

μA

C

V = 1.5V, FB = 1.5V

C

230

250

5.3

μA

SHDN Going High

μs

●

5.1

5.5

V

3444fb

2

LTC3444

ELECTRICAL CHARACTERISTICS

The

●

denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25°C.

A

V

IN

= V

= 3.6V unless otherwise noted.

OUT

PARAMETER

CONDITIONS

IC is Enabled

IC is Disabled

MIN

TYP

MAX

UNITS

V

SHDN Threshold (On)

SHDN Threshold (Off)

SHDN Input Current

●

1.4

0.4

1

V

= 3.6V

0.01

0.5

μA

SHDN

V Output Current

C

V = GND

C

2

μA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC3444E is guaranteed to meet performance specifications

from 0°C to 85°C. Specifications over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls.

Note 3: Current measurements are performed when the outputs are not

switching.

Note 4: This IC includes overtemperature protection that is intended to

protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature is active.

Continuous operation above the specified maximum operating junction

temperature may result in device degradation or failure.

U W

TYPICAL PERFOR A CE CHARACTERISTICS

(T = 25°C unless otherwise specified)

A

Efficiency vs V

Li-Ion to 1V Efficiency

Li-Ion to 3.3V Efficiency

IN

85

80

75

70

65

60

100

90

80

70

60

50

40

30

20

10

0

0.25

0.20

0.15

0.10

0.05

0

90

80

70

60

50

40

30

20

10

0

0.18

0.16

0.14

0.12

0.10

0.08

0.06

0.04

0.02

0

V

= 1.0V

OUT

V

= 3.1V

IN

I

= 100mA

OUT

V

= 3.6V

IN

V

= 3.1V

IN

V

= 4.4V

IN

V

= 4.4V

IN

I

= 65mA

OUT

I

= 50mA

OUT

V

IN

= 3.6V

PLOSS

V

IN

= 4.4V

V

= 3.6V

IN

PLOSS

V

= 3.1V

IN

V

IN

= 3.1V

10

3.1 3.3 3.5 3.7 3.9

(V)

4.1 4.3 4.5

1

10

100

1000

1

100

1000

V

IN

OUTPUT CURRENT (mA)

3444 G05

3444 G03

3444 G06

Li-Ion to 4.2V Efficiency

Error Amp Source Current

Operating Frequency

100

90

80

70

60

50

40

30

20

10

0

0.50

19

17

15

13

11

9

1.8

1.7

1.6

1.5

1.4

1.3

1.2

V

= 3.6V

IN

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

0

V

= 3.1V

IN

V

= 4.4V

IN

V

IN

= 4.4V

PLOSS

7

V

= 1V

C

V

= 3.1V

IN

FB = 0V

5

–55 –25

35

65

95

125

5

1

10

100

1000

–55

0

35

65

95

125

–25

TEMPERATURE (°C)

OUTPUT CURRENT (mA)

TEMPERATURE (°C)

3444 G04

3444 G07

3444 G08

3444fb

3

LTC3444

TYPICAL PERFOR A CE CHARACTERISTICS

U W

(T = 25°C unless otherwise specified)

A

Boost Maximum Duty Cycle

PMOS R

NMOS R

DS(ON)

90

0.30

0.25

0.20

0.15

0.30

0.25

0.20

0.15

SWITCH B

85

80

75

SWITCH C

70

0.10

–55

–25

5

35

65

95

125

–55 –25

5

35

65

95

125

–55 –25

5

35

65

95

125

TEMPERATURE (°C)

3444 G11

3444 G09

3444 G10

Error Amp Sink Current

Active Quiescent Current

Feedback Voltage

400

390

380

370

800

750

700

650

600

550

500

1.25

1.24

1.23

1.22

1.21

1.20

1.19

V

= V = 3.6V

OUT

V

= V

= 3.6V

OUT

IN

C

= 2V, FB = 3.6V

360

350

–55

5

35

65

95

125

–25

5

65

–55

95

125

35

–55

5

35

65

95

125

–25

TEMPERATURE (°C)

TEMERATURE (°C)

3444 G12

3444 G13

3444 G14

Minimum Start Voltage

2.85

2.80

2.75

2.70

2.65

2.60

2.55

2.50

2.45

2.40

–55

–25

5

35

125

65

95

TEMPERATURE (°C)

3444 G15

3444fb

4

LTC3444

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PI FU CTIO S

SHDN(Pin1): ShutdownFunction.Alogiclowinputshuts

down the IC. A logic high input enables the IC and starts

the internal soft-start function by limiting the rise time of

the internal PWM command.

V_OUT(Pin 5): Output of the Synchronous Rectifier. A filter

capacitor is placed from V_OUTto GND. A ceramic bypass

capacitor is recommended as close to the V_OUTand GND

pins as possible.

SW1 (Pin 2): Switch Pin Where the Internal Switches A

andBareConnected. ConnectinductorfromSW1toSW2.

AnoptionalSchottkydiodecanbeconnectedfrom ground

to SW1 for a moderate efficiency improvement. Minimize

trace length to minimize EMI.

V_IN(Pin 6): Input Supply Pin. Internal V_CCfor the IC. A

4.7μF ceramic capacitor is recommended as close to V_IN

and GND as possible.

V_C(Pin 7): Error Amp Output. Pull V_Cto ground to select

internal loop compensation. External compensation may

be connected from V_Cto FB. Internal compensation will be

disabled if V_Cis tied to an external compensation network.

GND (Pin 3): Ground Pin for the IC.

SW2 (Pin 4): Switch Pin Where the Internal Switches C

and D are Connected. An optional Schottky diode can be

connected from SW2 to V_OUTfor a moderate efficiency

improvement. Minimize trace length to keep EMI down.

FB (Pin 8): Feedback Pin. Connect resistive divider tap

here. The output voltage can be adjusted from 0.5V to 5V.

The feedback reference voltage is typically 1.22V.

GND (Pin 9, Exposed Pad): Solder to Board GND.

3444fb

5

LTC3444

W

BLOCK DIAGRA

SW1

SW2

2

4

2.75V TO 5.5V

V

OUT

V

A

IN

D

V

OUT

6

5

3A

GATE DRIVERS

AND

ANTI-CROSS

CONDUCTION

B

C

PEAK

REVERSE

CURRENT

LIMIT

–

+

OUTLOW

INPUT

CURRENT

LIMIT

1.8V

335k

+

–

2.5A

OUTPUT OV

+

–

1.22V

100k

PEAK

CURRENT

LIMIT

PWM LOGIC

AND

OUTPUT PHASING

–

+

–

3.5A

1.22V

+

–

PWM

COMPARATORS

FB

EA

–

+

8

+

–

UVLO

2.65V

INTERNAL

COMPENSATION

THERMAL

SHUTDOWN

GND = INTERNAL COMP

V

C

FLOAT = EXTERNAL COMP

7

1

OSC

SOFTSTART

THERMAL

V

IN

INTERNAL

SOFTSTART

SHDN

SHUTDOWN

GND

3

UVLO

3444 BD

3444fb

6

LTC3444

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OPERATIO

The LTC3444 is a highly efficient, fixed frequency, buck-

boost DC/DC converter, which operates from input volt-

ages above, below, and equal to the output voltage. The

topology incorporated in the IC provides a continuous

transfer function through all operating modes, making the

product ideal for single Lithium-Ion or multi-cell applica-

tions where the output voltage can vary over a wide range.

MOSFET in parallel to P-channel MOSFET switch D.

This parallel MOSFET eliminates the need for an external

Schottky. Output overvoltage protection protects the RF

power amplifier from voltages greater than 5.5V.

When used with the proper inductance and output capaci-

tance, the LTC3444 internal compensation is designed to

be consistent with the transient requirements of a typical

WCDMA application. External compensation can be used

with other combinations of inductance and output capaci-

tance, however, the transient response may not be

consistent with typical WCDMA requirements.

The LTC3444 is designed to provide dynamic voltage

control in space constrained 3G WCDMA applications.

Due to the high operating frequency and integrated loop

compensation a complete WCDMA application requires

only six additional components; input and output capaci-

tors (ceramic), an inductor, and three resistors. The high

speed error amplifier and integrated loop compensation

providethefasttransientresponserequiredtoslewtheRF

power amplifier’s voltage rail from standby to transmit

and transmit to standby levels in < 25μs while minimizing

output overshoot or undershoot.

Output voltage programming is accomplished via a sum-

mingresistorinputtothefeedbackresistivedividerstring.

The output voltage varies inversely with the command

voltage. When using the internal loop compensation,

resistor R1 in the feedback resistive divider string must be

340k. There are no constraints on R1 when using external

compensation. However, lower value resistors will de-

crease the resistance value required for programming the

output voltage. Care must be taken not to load down the

control voltage source.

Efficiency under low output voltage conditions

(standby mode) is improved by using an N-channel

3444fb

7

LTC3444

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OPERATIO

Error Amp

Internal Current Limit

The LTC3444 error amplifier is a voltage mode amplifier.

The internal loop compensation is designed to optimize

transient response to control input change when the

proper output L-C and R1 values are used. Refer to

Figure 1.

TherearetwodifferentcurrentlimitcircuitsintheLTC3444.

The two circuits have internally fixed thresholds.

The first circuit sources current out of the FB pin to drop

the output voltage once the peak input current exceeds

2.5A minimum. During conditions where V_OUTis near

ground, such as during a short circuit or during startup,

this threshold is cut in half, providing current foldback

protection.

Internal loop compensation is selected by grounding the

V_Cpin. The loop is designed to exhibit a single pole roll-off

(–20dB/dec) with a crossover frequency of ~100KHz.

External compensation can be used by connecting the

compensation components from FB to V_C. The V_Cpin

must be allowed to float when using external compensa-

tion. If external compensation is used the internal com-

pensation is automatically disabled. A Type III compensa-

tion network is typically required to meet the output

transient requirements of WCDMA.

The second circuit is a high-speed peak current limit

amplifier that shuts off P-channel MOSFET switch A if the

input current exceeds 3.5A typical. The delay to output for

this amplifier is typically 50ns.

During start-up, the ramp rate of the error amp output is

controlled to provide a soft-start function. Refer to

Figure 2.

V

OUT

ERROR AMP

20μA

R1

+

–

1.22V

FB

8

R3

V

C

TO PWM

COMPARATORS

V

CONTROL

R2

INTERNAL

COMPENSATION

NETWORK

V

OUT

INT

ON

V

IN

0.5μA

GND = INTERNAL

OPEN = EXTERNAL

V

C

7

3444 F01

Figure 1. Error Amplifier with Compensation Select Function

3444fb

8

LTC3444

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OPERATIO

Reverse Current Limit

resume once the output voltage drops below ~5.1V. If the

condition which caused the output overvoltage is still

present the output will charge up to 5.3V again and the

overvoltage cycle will be repeat. Normal output regulation

will resume once the condition responsible for the output

overvoltage is removed.

The LTC3444 always operates in forced continuous con-

duction mode. The reverse current limit amplifier moni-

tors the inductor current from the output through switch

D. Once the negative inductor current exceeds 3A mini-

mum, theLTC3444willshutoffswitchD. Thehighreverse

current is required to meet the transient slew require-

ments for WCDMA power amplifiers.

Soft-Start

The soft-start function is initiated when the SHDN pin is

brought above 1.4V and the LTC3444 is out of UVLO

(above minimum input operating specs). The LTC3444 is

enabled but the PWM duty cycle is clamped via the error

amp output. The soft-start time is internally set to 250μs

to minimize output overshoot. A detailed diagram of this

function is shown in Figure 2.

Output Overvoltage Protection

The LTC3444 provides output overvoltage protection. If

theoutputvoltageexceeds5.3Vtypical,P-channelMOSFET

switches A and D are turned off and N-channel MOSFET

switches B and C are turned on. Normal switching will

ERROR AMP

20μA

V

IN

SOFT-START

CLAMP

+

–

1.22V

FB

8

7

V

C

V

CI

TO PWM

COMPARATORS

I

SS

–

SHDN

1

+

C

SS

1V

3444 F02

Figure 2. Soft-Start Circuitry

3444fb

9

LTC3444

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OPERATIO

Buck-Boost Four-Switch Control

voltage is a level shifted voltage from the output of the

erroramp(V_Cpin)(seeFigure2). Thefourpowerswitches

are properly phased so the transfer between operating

modes is continuous, smooth and transparent to the user.

The buck-boost region is reached when V_INapproaches

V_OUT. The conduction time of the four switch region is

typically 125ns. The three operating modes of the four

switch buck-boost converter are described below. Please

refer to Figures 3 and 4.

Figure 3 shows a simplified diagram of how the four

internal switches are connected to the inductor, V_IN, V_OUT

and GND. Figure 4 shows the regions of operation for the

LTC3444 as a function of the internal control voltage, V_CI.

Depending on the control voltage, the LTC3444 will oper-

ate in either buck, buck-boost or boost mode. The V_CI

88% D

MAX

V4 (~1.16V)

V

IN

OUT

5

BOOST

A ON, B OFF

PWM CD

SWITCHES

6

BOOST REGION

D

MIN

V3 (~0.73V)

V2 (~0.49V)

PMOS A

PMOS D

BOOST

BUCK-BOOST

REGION

FOUR SWITCH PWM

SW1

2

SW2

4

D

MAX

BUCK

D ON, C OFF

PWM AB

SWITCHES

BUCK REGION

NMOS B

NMOS C

V1 (OV)

0%

DUTY

CYCLE

INTERNAL

CONTROL

VOLTAGE, V

3444 F03

CI

3444 F04

Figure 3. Simplified Diagram of Output Switches

Figure 4. Switch Control vs Internal Control Voltage, V

CI

3444fb

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LTC3444

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OPERATIO

Buck-Boost or Four Switch (V_IN~ V_OUT

)

Buck Region (V_IN> V_OUT

)

Whentheinternalcontrolvoltage,V_CI,isabovevoltageV2,

but below V3, switch pair AD remain on for duty cycle

DMAX_BUCK, and the switch pair AC begins to phase in.

As switch pair AC phases in, switch pair BD phases out

accordingly. When the V_CIvoltage reaches the edge of the

buck-boost range, at voltage V3, the AC switch pair

completely phase out the BD pair, and the boost phase

begins at duty cycle D4_SW. The input voltage, V_IN, where

the four switch region begins is given by:

SwitchDisalwaysonandswitchCisalwaysoffduringthis

mode. When the internal control voltage, V_CI, is above

voltage V1, Switch A is on. During the off time of switch A,

synchronous switch B turns on for the remainder of the

time. Switches A and B will alternate similar to a typical

synchronous buck regulator. As the control voltage in-

creases, the duty cycle of switch A increases until the

maximum duty cycle of the converter in buck mode

reaches DMAX_BUCK, given by:

DMAX_BUCK = 100% – D4_SW

where D4_SW= duty cycle % of the four switch range.

D4_SW= (125ns • f) • 100 %

V_OUT

1–(125ns• f)

V

=

V

IN

where f = operating frequency, Hz.

Beyond this point the “four switch,” or Buck-Boost region

is reached.

The point at which the four switch region ends is given by:

V_IN= V_OUT(1–D) = V_OUT(1–125ns • f) V

3444fb

11

LTC3444

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OPERATIO

Boost Region (V_IN< V_OUT

)

control voltage range. When using the internal loop com-

pensation, V_C= GND, R1 must be 340k. For external

compensation R1 should be chosen first and R2 and R3

calculated from the following equations.

SwitchAisalwaysonandswitchBisalwaysoffduringthis

mode. When the internal control voltage, V_CI, is above

voltage V3, switch pair CD will alternately switch to pro-

vide a boosted output voltage. This operation is typical to

a synchronous boost regulator. The maximum duty cycle

of the converter is limited to 82% typical and is reached

when V_CIis above V4.

The resistor values are given by:

(V_CON(MAX)– V_CON(MIN)

)

R3=

R2=

• R1Ω

V_O(MAX)– V_O(MIN)

CONTROLLING THE OUTPUT VOLTAGE

1.22

The output voltage is controlled via a summing resistor

input at the feedback (FB) resistive divider string. Refer to

Figure 1. The output voltage has an inverse relation to the

control voltage as shown in Figure 5. The resistor values

are dependent on the desired output voltage range and the

Ω

(V_CON(MAX)–1.22) (1.22– V_O(MIN)

)

–

R3

R1

4.5

4

3.5

3

2.5

2

1.5

1

0.5

0

0.5

1

1.5

2

2.5

V

CONTROL

3444 G01

Figure 5. V

vs V

CONTROL

with R1 = 340k, R2 = 249k, and

CONTROL

OUT

R3 = 182k, V

= 0.5V to 2.5V

3444fb

12

LTC3444

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OPERATIO

Table 1. Shows some typical resistor value combinations

forseveral V_CONTROLvsV_OUTvoltageranges. Onepercent

(1%) resistor tolerances were assumed.

COMPONENT SELECTION

Recommended Component Placement

Figure 6. Shows a recommended component placement.

Traces carrying high current should be made short and

wide. Trace area at FB and V_Cpins should be minimized.

Lead lengths to the battery should be kept short. V_OUTand

Table 1. Typical Resistor Values for V

vs V

OUT

CONTROL

RESISTANCE (kΩ)

V

MIN

0.35

0.8

(V)

V

(V)

CONTROL

OUT

MAX

2.4

MIN

MAX

R1

340

R2

R3

0.8

0.5

0.8

0.5

4.2

5.0

4.2

271

210

200

249

205

162

154

182

V

_INceramic capacitors should be placed close to the IC

2.5

340

pins. Multiple vias should be used between layers.

2.35

2.5

0.5

V

CONTROL

LTC3444

V

IN

FB

8

7

1

2

SHDN

V

C

SW1

GND

SW2

V

IN

3

4

V

6

5

IN

V

OUT

3444 F06

MULTIPLE VIAS

Figure 6. Recommended Component Placement

3444fb

13

LTC3444

U

OPERATIO

Inductor Selection

V_OUT• (V_IN(MAX)– V_OUT

f • I_OUT(MAX)• ΔI_L• V

)

L_BUCK

>

H

The high frequency operation of the LTC3444 allows the

use of small surface mount inductors. The internal loop

compensation is designed to work with a 2.2μH inductor

(1.5μH for V_IN< 3.1V). The 2.2μH inductor was selected to

optimize the transient response to the control input. The

use of a 2.2μH inductor pushes out the right half plane

(RHP) zero frequency and allows the loop crossover to

occur at frequencies higher than the output L-C double

pole.

IN(MAX)

where f = operating frequency, Hz

ΔI_L= inductor ripple current, A

V_IN(MIN)= minimum input voltage, V

V

_IN(MAX)= maximum input voltage, V

_OUT= output voltage, V

For external compensation the inductor selection is based

on the desired inductor ripple current. The inductor ripple

current is typically set to 20% to 40% of the average

inductor current. Increased inductance results in lower

ripple current, however, higher inductance pulls in the

RHP zero frequency and limits the maximum crossover

frequency possible. Refer to Closing the Feedback Loop

for more information on the RHP zero. For a given ripple

the inductance terms are given as follows:

I_OUT(MAX)= maximum output load current

In most cases, the boost configuration will be used to

determine the minimum inductance allowed for a given

ripple current.

For high efficiency, choose a ferrite inductor with a high

frequencycorematerialtoreducecoreloses. Theinductor

should have low ESR (equivalent series resistance) to

reduce the I²R losses, and must be able to handle the peak

inductor current without saturating. To minimize radiated

noise, useashieldedinductor. SeeTable2forasuggested

list of inductor suppliers.

V

_IN(MIN)• (V_OUT– V

)

IN(MIN)

L_BOOST

>

H

f•I_OUT(MAX)• ΔI_L• V_OUT

Table 2. Inductor Vendor Information

SUPPLIER

PHONE

FAX

WEB SITE

Coilcraft

(847) 639-6400

(800) 227-7040

(636) 394-2877

(847) 639-1469

(650) 361-2508

1-800-544-2570

(814) 238-0490

www.coilcraft.com

CoEv Magnetics

COOPER Bussmann

Murata

www.circuitprotection.com/magnetics.asp

www.coooperET.com

(814) 237-1431

(800) 831-9172

www.murata.com

Sumida

USA: (847) 956-0666

Japan: 81(3) 3607-5111

USA: (847) 956-0702

Japan: 81(3) 3607-5144

www.sumida.com

TDK

(847) 803-6100

(847) 803-6296

(847) 699-7864

www.component.tdk.com

www.tokoam.com

TOKO

(847) 297-0070

3444fb

14

LTC3444

U

OPERATIO

In a typical application the output capacitance may be

many times larger than that calculated above in order to

handle the transient load response requirements of the

converter. For a rule of thumb, the ratio of the operating

frequency to the unity-gain bandwidth of the converter is

the amount the output capacitance will have to increase

from the above calculations in order to maintain the

desired transient response. However, in WCDMA applica-

tions the output capacitance should be kept at a minimum

to maximize the output slew rate. Refer to the Loop

Compensation Networks section of this datasheet.

Output Capacitor Selection

A 4.7μF, X5R or X7R type ceramic capacitor should be

used when using the internal loop compensation. When

using external compensation, larger values of output

capacitance can be used, however, larger output capaci-

tance will increase the time needed to slew the output

voltage as required in typical WCDMA applications. The

bulk value of the output filter capacitor is set to reduce the

ripple due to charge into the capacitor each cycle. The

steady state ripple due to charge is given by:

%RIPPLE_BOOST =

I_OUT• (V_OUT– V_IN(MIN))• 100

The other component of ripple is due to the ESR (equiva-

lent series resistance) of the output capacitor. Low ESR

capacitors should be used to minimize output voltage

ripple. For surface mount applications, Taiyo Yuden or

TDK ceramic capacitors, AVX TPS series tantalum capaci-

tors or Sanyo POSCAP are recommended. See Table 3 for

contact information.

%

C_OUT• V_OUT²• f

%RIPPLE_BUCK =

I_OUT(MAX)• (V_IN(MAX)– V_OUT)• 100

Ceramic output capacitors should use case size 1206 or

larger. Smaller case sizes have a larger voltage coefficient

that can greatly reduce the output capacitance value at

higher output voltages.

%

C_OUT• V_IN(MAX)• V_OUT• f

where C_OUT= output filter capacitor in farads

f = switching frequency in Hz.

Input Capacitor Selection

Since the V_INpin is the supply voltage for the LTC3444, as

well as the input to the power stage of the converter, it is

recommended to place at least a 4.7μF, X5R or X7R

ceramic bypass capacitor close to the V_INand GND pins.

It is also important to minimize any stray resistance from

the converter to the battery or other power source.

Table 3. Capacitor Vendor Information

SUPPLIER

AVX

PHONE

FAX

WEB SITE

(803) 448-9411

(619) 661-6322

(408) 573-4150

(847) 803-6100

(803) 448-1943

(619) 661-1055

(408) 573-4159

(847) 803-6296

www.avxcorp.com

Sanyo

www.sanyovideo.com

www.t-yuden.com

Taio Yuden

TDK

www.component.tdk.com

3444fb

15

LTC3444

U

OPERATIO

Optional Schottky Diodes

A troublesome problem when operating in boost mode is

dealing with the right-half plane zero (RHP), given by:

Schottky diodes across the synchronous switches B and

D are not required, but provide a lower drop during the

break-before-make time (typically 15ns) of the NMOS to

PMOS transition, improving efficiency. Use a surface

mount Schottky diode such as an MBRM120T3 or equiva-

lent. Do not use ordinary rectifier diodes, since the slow

recovery times will compromise efficiency.

2

V

IN

f_RHPZ

=

Hz

2• π • I_OUT• L• V_OUT

The RHP zero has a +20dB/dec gain typical of a zero but

the –90° phase lag of a pole. This causes the loop gain to

flattenoutwhilethephasemargindecreases.Theonlyway

to combat a RHP zero is to roll off the loop well before the

RHP zero frequency.

Closing the Feedback Loop

The LTC3444 incorporates voltage mode PWM control.

The control to output gain varies with operation region

(buck, boost, buck-boost), but is usually ~20dB. The

output filter exhibits a double pole response, as given by:

LOOP COMPENSATION NETWORKS

A simple Type I compensation network, refer to Figure 7,

can be incorporated to stabilize the loop, but at a cost of

reduced bandwidth and slower transient response. To

ensure proper phase margin using Type I compensation,

the loop must be crossed over at least a decade before the

output LC double pole frequency. The unity-gain fre-

quencyoftheerroramplifierwiththeTypeIcompensation

is given by:

1

f_{FILTER_POLE}

=

Hz

2• π • L• C_OUT

(inbuck mode)

V

IN

f_{FILTER_POLE}

=

Hz

2• V_OUT• π • L• C_OUT

(inboostmode)

1

f _UG=

Hz

2• π • R1• C2

WCDMA applications demand an improved transient re-

sponse to the input control voltage. In other applications,

the output capacitor can be increased to meet help meet

the load transient requirements.

where L is in Henries and C_OUTis in farads.

The output filter zero is given by:

1

f_{FILTER_ZERO}

=

Hz

2• π • R_ESR• C_OUT

where R_ESRis the equivalent series resistance of the

output cap.

C2

R1

FB

–

V

8

OUT

V

C

7

+

R2

V

REF

3444 F07

Figure 7. Error Amplifier with Type I Compensation

3444fb

16

LTC3444

U

OPERATIO

However, due to the output voltage slewing requirements

found in WCDMA applications the output filter capacitor

must be minimized. To maximize the transient response,

while minimizing the output capacitance, a higher band-

width, Type III compensation is required. A Type III

compensationnetwork,refertoFigure8,hasadoublezero

to cancel the double pole of the output LC filter and a

double pole to compensate for the ESR zero and RHP zero

of the boost topology. In addition to the double poles,

the Type III network also has a single pole at DC. The

Type III compensation provides a maximum 135° phase

boost and allows the loop crossover to occur at frequen-

cieshigherthantheoutputLC.RefertoFigure9. Referring

toFigure8,thelocationofthepolesandzerosaregivenby:

Assume C₂>> C₃, R₁>> R₄.

C3

C2

R5

C1

R4

R1

FB

–

+

V

8

OUT

V

C

7

R2

V

REF

3444 F08

Figure 8, Error Amplifier with Type III Compensation

1

80

60

360

270

180

90

f_POLE1

f_POLE2

f_ZERO1

f_ZERO2

≅

=

Hz

2• π • R5• C3

40

1

20

2• π • R4 • C1

f

UO

0

1

–20

–40

–90

–180

Hz

2• π • R1• C1

–60

–80

–270

–360

1

Hz

e

e1

e2

e3

e4

e5

e6

e7

e8

1

2• π • R5• C2

FREQUENCY (Hz)

3444 G02

Figure 9. Frequency Response for LTC3444 Error

Amplifier with a Typical Type III Compensation Network

And the unity gain frequency (f_UG) of the Type III compen-

sation is given by:

1

f_UG

=

Hz

2• π • R1• C2

where resistance is in ohms and capacitance is in farads.

Note: Bias resistor, R2, does not affect the Pole/Zero

placement.

3444fb

17

LTC3444

TYPICAL APPLICATIO S

U

Example of Internal Compensation Transient Response for a

Command Voltage Change

LTC3444 Dynamic Response

V

OUT

V

OUT

CONTROL

V

CONTROL

10μs/DIV

V

= 3.6V, V

CONTROL

= 0.8V TO 4.2V

OUT

IN

V

= 3.6V, V

CONTROL

= 4.2V TO 0.8V

OUT

IN

= 2.36V TO 0.28V, I

= 100mA

LOAD

= 0.28V TO 2.36V, I

= 100mA

LOAD

3444 G16a

Internally Compensated WCDMA Application. Singe Cell, 2.7V to

4.2V Input, 0.8V to 4.2V at 400mA Output.

1.5μH

L1

V

OUT

0.8V TO 4.2V

LTC3444

R1

340k

SW1

SW2

2.7V TO 4.2V

C

OUT

V

IN

V

OUT

4.7μF

SHDN

GND

FB

C

IN

4.7μF

+

V

C

R3

205k

Li-Ion

R2

267k

V

CONTROL

DAC

3444 TA02

C

OUT

= MURATA:GRM31CR61C475K

IN

C

L1 = COOPER BUSSMAN SD12-2R2

3444fb

18

LTC3444

U

TYPICAL APPLICATIO S

Single Li-Ion, 3.1V to 4.2V Input, 3.3V at 400mA

Output with Internal Compensation

2.2μH

L1

V

OUT

3.3V AT 400mA

LTC3444

R1

340k

SW1

SW2

3.1V TO 4.4V

C

OUT

V

IN

OUT

FB

4.7μF

SHDN

GND

C

IN

4.7μF

+

V

C

Li-Ion

R2

200k

3444 TA04

C

OUT

= MURATA:GRM31CR61C475K

IN

C

L1 = COOPER BUSSMAN SD12-2R2

U

PACKAGE DESCRIPTIO

DD Package

8-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1698)

R = 0.115

0.38 ± 0.10

TYP

5

8

0.675 ±0.05

3.5 ±0.05

2.15 ±0.05 (2 SIDES)

1.65 ±0.05

3.00 ±0.10

(4 SIDES)

1.65 ± 0.10

(2 SIDES)

PIN 1

TOP MARK

(NOTE 6)

PACKAGE

OUTLINE

(DD) DFN 1203

4

1

0.25 ± 0.05

0.75 ±0.05

0.200 REF

0.25 ± 0.05

0.50 BSC

0.50

BSC

2.38 ±0.05

(2 SIDES)

2.38 ±0.10

(2 SIDES)

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)

2. DRAWING NOT TO SCALE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON TOP AND BOTTOM OF PACKAGE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

3444fb

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

19

LTC3444

U

TYPICAL APPLICATIO

Externally Compensated WCDMA Application. Singe Cell,

3.1V to 4.2V Input, 0.8V to 4.2V at 400mA Output.

3.3μH

L1

V

OUT

0.8V TO 4.2V

LTC3444

R4

47.5k

R1

340k

SW1

SW2

3.1V TO 4.2V

C

C1

10pF

OUT

V

IN

V

OUT

4.7μF

SHDN

GND

FB

C

IN

R5

47.5k

C2

220pF

4.7μF

+

R3

205k

V

C

Li-Ion

R2

267k

C3

10pF

V

CONTROL

3444 TA03

DAC

C

OUT

= MURATA:GRM31CR61C475K

IN

C

L1 = COOPER BUSSMAN SD12-3R3

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PART NUMBER

DESCRIPTION

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3444fb

LT 0507 REV B • PRINTED IN THE USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

20

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3444EDD#TRPBF
厂家：	Linear
描述：	LTC3444 - Micropower Synchronous Buck-Boost DC/DC Converter for WCDMA Applications; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C CD 开关光电二极管
文件：	总20页 (文件大小：189K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC3444EDD#TRPBF [Linear]

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