LTC3446EDE#PBF [Linear]
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| 型号： | LTC3446EDE#PBF |
| 厂家： | 
Linear |
| 描述： | 暂无描述 稳压器 |
| 文件： | 总20页 (文件大小：251K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3446
Monolithic Buck Regulator
with Dual VLDO Regulators
FEATURES
DESCRIPTION
The LTC®3446 combines a synchronous buck DC/DC con-
verter with two very low dropout (VLDO) linear regulators
to provide up to three stepped-down output voltages from
a single input voltage. The input voltage range is ideally
suited for Li-Ion battery-powered applications, as well
as powering low voltage logic from 5V or 3.3V rails. The
output voltage range extends down to 0.4V for the VLDO
regulators and 0.8V for the buck.
n
High Efficiency Triple Step-Down Outputs from a
Single Input Supply
1A Synchronous Buck Regulator Provides Main
n
Step-Down Output and Powers Two 300mA
VLDO™ Linear Regulators
n
Output Voltages as Low as 400mV (VLDO Outputs)
n
Power Good Output
Input Voltage Range: 2.7V to 5.5V
n
n
Independent Internal Soft-Start for Each Supply
The 1A synchronous buck converter provides the main
output with high efficiency, typically 85%. The two 300mA
VLDO regulators can run off the main output to provide
two additional lower voltage outputs. A built-in supply
monitor provides a power good indication.
n
Independent Enable Pin for Each Supply
n
Low (140μA Typ) No-Load Quiescent Current with
all Outputs Enabled
n
Constant Frequency Current Mode Operation
n
2.25MHz Switching Frequency Uses Small
Inductors
The buck converter switches at 2.25MHz, allowing the use
ofsmallsurfacemountinductorsandcapacitors.Constant
frequency current mode operation produces controlled
output spectrum and fast transient response. A mode-
select pin allows automatic Burst Mode operation to be
enabled for higher efficiency at light load, or disabled for
lower noise operation down to very light loads. The two
VLDOregulatorsarestablewithceramicoutputcapacitors
as small as 1μF.
Defeatable Automatic Burst Mode® Operation for
n
High Efficiency at Light Loads
n
1.5% Reference Accuracy
n
Overtemperature Protection
n
Thermally Enhanced 4mm × 3mm 14-Pin DFN
Package
APPLICATIONS
L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation.
VLDO is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners. Protected by U.S. Patents including 5481178, 6611131, 6304066,
6498466, 6580258.
n
Low Power Handheld Devices
n
Low Voltage and Multivoltage Power for Digital
Logic, I/O, FPGAs, CPLDs, ASICs and CPUs
TYPICAL APPLICATION
L1
1.8μH
V
OUT
Buck Efficiency vs Buck Load Current
V
IN
2.9V TO 5.5V
V
SW
1.8V
IN
22μF
X7R
22μF
X7R
400mA MAX
100
59k
PWM
MODE
Burst Mode
OPERATION
BUCKFB
90
80
70
60
50
40
47.5k
LTC3446
LV
IN
V
1.5V
300mA MAX
OUT
PGOOD LV
MODESEL
ENBUCK
ENLDO1
ENLDO2
OUT1
2.2μF
X7R
DIGITAL
110k
CONTROL
1000pF
LV
FB1
40.2k
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
3.3k
V
OUT
1.2V
300mA MAX
I
TH
LV
OUT2
2.2μF
X7R
80.6k
40.2k
1
10
100
1000
LV
FB2
LOAD CURRENT (mA)
GND
3446 TA01b
L1: TOKO A960AW-1R8M
3446 TA01
3446fd
1
LTC3446
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
V , LV to GND ......................................... –0.3V to 6V
IN
IN
MODESEL
1
2
3
4
5
6
7
14 SW
MODESEL, ENBUCK, ENLDO1,
V
13 ENBUCK
12 BUCKFB
11 ENLDO1
IN
ENLDO2 to GND.......................................... –0.3V to 6V
BUCKFB to GND.......................................... –0.3V to 6V
LV , LV to GND.................................... –0.3V to 6V
I
TH
PGOOD
15
LV
10 LV
OUT1
FB1
FB2
FB1
FB2
LV
9
8
LV
IN
OUT2
I
to GND ..... –0.3V to the Lesser of (V + 0.3V) or 3V
TH
IN
IN
LV
ENLDO2
SW to GND......–0.3V to the Lesser of (V + 0.3V) or 6V
LV
, LV
DE PACKAGE
14-LEAD (4mm × 3mm) PLASTIC DFN
OUT1
OUT2
to GND.......... –0.3V to the Lesser of (LV + 0.3V) or 6V
PGOOD to GND............................................ –0.3V to 6V
IN
T
JMAX
= 125°C, θ = 35°C/W
JA
EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB
LV
, LV
Short-Circuit
OUT1
OUT2
to GND Duration............................................... Indefinite
Operating Temperature Range (Note 2)
LTC3446EDE ........................................ –40°C to 85°C
LTC3446IDE....................................... –40°C to 125°C
Junction Temperature (Note 1) ........................... 125°C
Storage Temperature Range.................. –65°C to 125°C
ORDER INFORMATION
LEAD FREE FINISH
LTC3446EDE#PBF
LTC3446IDE#PBF
TAPE AND REEL
PART MARKING*
3446
PACKAGE DESCRIPTION
14-Lead (4mm × 3mm) Plastic DFN
14-Lead (4mm × 3mm) Plastic DFN
TEMPERATURE RANGE
–40°C to 85°C
–40°C to 125°C
LTC3446EDE#TRPBF
LTC3446IDE#TRPBF
3446
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
The l denotes the specifications which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise specified. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
Input Voltage Range
(Note 3)
●
●
2.7
5.5
V
IN
V
IN
V
IN
Undervoltage Lockout Threshold
Undervoltage Lockout Hysteresis
V
IN
Rising
2.37
10
2.5
30
V
mV
UVLO
I
Q
V
Quiescent Current (Note 4)
IN
Buck Enabled Only, Not Sleeping
Buck Enabled Only, Sleeping
V
V
V
V
= 0V, I = 0mA
310
50
500
75
μA
μA
μA
μA
BUCKFB
BUCKFB
LVIN
SW
= 1V, I = 0mA
SW
One LDO Enabled Only
All Three Outputs Enabled, Buck Not Sleeping
= 1.5V, 10μA LDO Output Load
75
100
600
= 0V, I = 0mA, V
LVIN
= 1.5V,
400
BUCKFB
SW
10μA Output Load on Each LDO
All Three Outputs Enabled, Buck Sleeping
Shutdown
V
= 1V, I = 0mA, V
LVIN
= 1.5V,
140
210
1
μA
BUCKFB
SW
10μA Load on Each LDO
= 0V, V = 0V, V = 0V
ENLDO2
V
μA
ENBUCK
ENLDO1
3446fd
2
LTC3446
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise specified. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
8
MAX
10
UNITS
%
V
PGOOD Threshold (Note 8)
PGOOD Output Resistance
PGOOD Hi-Z Leakage Current
●
●
●
PG(THRESH)
R
PGOOD Low, Sinking 1mA
87
120
1
Ω
PGOOD
PGOOD
I
V
= 6V
μA
PGOOD
Synchronous Buck Converter
I
Feedback Current
(Note 5)
(Note 5)
●
●
●
30
0.812
0.5
nA
V
BUCKFB
V
Regulated Feedback Voltage
Feedback Voltage Line Regulation
Maximum Peak Inductor Current
NMOS Overcurrent Limit
0.788 0.800
0.3
BUCKFB
ΔV
V
V
= 2.7V to 5.5V (Note 5)
mV/V
A
BUCKFB
IN
I
I
= 0V, Duty Cycle < 35%
1.2
1.55
1.8
2.0
MAXP
BUCKFB
A
MAXN
Feedback Voltage Load Regulation
V
= 0.5V to 1V, V
= V (Note 5)
0.5
mV/V
ITH
MODESEL
IN
(with Respect to V
)
ITH
f
Oscillator Frequency
●
1.8
2.25
0.13
0.14
2.7
MHz
Ω
OSC
R
R
R
R
of P-Channel FET
of N-Channel FET
I
I
= 500mA
PFET
NFET
LSW
DS(ON)
DS(ON)
SW
SW
= –500mA
Ω
I
SW Leakage
V
= 0V, V = 0V or 5.5V, V = 5.5V
1
1
μA
V
ENBUCK
ENBUCK
MODESEL
SW
IN
V
Buck Enable Pin Threshold
Buck Enable Pin Leakage Current
Mode Select Pin Threshold
Mode Select Pin Leakage Current
Error Amplifier Transconductance
●
●
●
●
0.3
0.3
450
0.9
0.65
0.65
700
ENBUCK
ENBUCK
I
V
= 5.5V, All Other Pins Grounded
1
μA
V
V
1
MODESEL
I
V
V
= 5.5V, All Other Pins Grounded
1
μA
μA/V
MODESEL
g
= 0.6V
ITH
950
m
Each VLDO: V = 3.6V, V
= 1.5V, V = 1.2V, Unless Otherwise Specified
LVOUT
IN
LVIN
V
LV Pin Operating Voltage
IN
(Note 6)
●
●
5.5
20
2
V
μA
μA
LVIN
LVIN
I
LV Pin Operating Current
IN
I
= 10μA
3
OUT
LV Shutdown Current
IN
V
= 0V
ENLDO
1.5
V
Feedback Pin Regulation Voltage (Note 7)
1mA ≤ I
≤ 300mA, 1.5V ≤ V ≤ 5.5V
LVIN
0.395 0.400
0.392 0.400
0.405
0.408
V
V
LVFB
OUT
●
●
●
I
I
Feedback Pin Input Current
Continuous Output Current
Short-Circuit Output Current
LDO Enable Pin Threshold
V
LVFB
at Regulation
2
10
nA
mA
mA
V
LVFB
300
LVOUT(MAX)
760
V
●
●
0.3
0.65
1
1
ENLDOx
I
LDO Enable Pin Leakage Current
V
= 5.5V, All Other Pins Grounded
= 1mA to 300mA
μA
ENLDOx
ENLDOx
Output Voltage Load Regulation
ΔI
–1
7.5
0.44
68
mV/A
OUT
(Referred to the LV Pin)
FB
L
Line Regulation (with Respect to
VIN
V
= 1.5V to 5.5V, V = 3.6V, V
= 1.2V,
= 1.2V,
μV/V
mV/V
mV
VFB
LVIN
IN
LVOUT
the L Pin)
I
= 1mA
OUT
L
Line Regulation (with Respect to
IN
V
= 1.5V, V = 2.7V to 5.5V, V
LVIN IN LVOUT
VFB
the V Pin)
I
= 1mA
OUT
V
LV – LV
IN
Dropout Voltage
V
OUT
= 2.8V, V
= 1.5V, V = 0.37V,
LVFB
175
DO
OUT
IN
LVIN
I
= 300mA (Note 9)
3446fd
3
LTC3446
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 5: The LTC3446 is tested in a feedback loop that connects the
BUCKFB pin to the output of the buck converter’s error amplifier (i.e., the
I
pin).
TH
Note 6: Minimum operating LV voltage required for the VLDO regulators
IN
Note 2: The LTC3446E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3446I is guaranteed to
meet performance specifications over the –40°C to 125°C operating
temperature range.
to stay in regulation is:
LV ≥ L
+ 100mV and LV ≥ 0.9V
IN
IN
VOUT(MAX)
Note 7: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply
for all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 3: Minimum operating V voltage required for the VLDO regulators
IN
to stay in regulation is:
V
≥ LV
+ 1.4V and V ≥ 2.7V
OUT(MAX) IN
IN
Note 8: PGOOD assertion indicates that the feedback voltages of all
Note 4: Dynamic supply current is higher due to the internal gate charge
enabled supplies are within the specified percentage of their target values.
being delivered at the switching frequency.
Note 9: Dropout voltage in the DFN package is assured by design,
characterization and statistical process control.
3446fd
4
LTC3446
TYPICAL PERFORMANCE CHARACTERISTICS
Buck Regulated Feedback Voltage
vs Temperature
LDO1 Regulated Feedback
Voltage vs Temperature
808
806
804
802
800
798
796
794
792
408
406
404
402
400
398
396
394
392
V
V
V
V
= 2.7V
= 3.6V
= 4.2V
= 5.5V
V
V
V
V
= 2.7V
= 3.6V
= 4.2V
= 5.5V
IN
IN
IN
IN
IN
IN
IN
IN
30 50
–50 –30 –10 10
70 90 110 130
30 50
TEMPERATURE (°C)
–50 –30 –10 10
70 90 110 130
TEMPERATURE (°C)
3446 G01
3446 G02
LDO2 Regulated Feedback
Voltage vs Temperature
Undervoltage Lockout Threshold
vs Temperature
2.50
2.45
2.40
2.35
2.30
2.25
2.20
2.15
2.10
2.05
2.00
408
406
404
402
400
398
396
394
392
UVLO RISING
UVLO FALLING
V
V
V
V
= 2.7V
= 3.6V
= 4.2V
= 5.5V
IN
IN
IN
IN
30 50
90
110 130
–50 –30 –10 10
70 90 110 130
–50 –30 –10 10
50
30
70
TEMPERATURE (°C)
TEMPERATURE (°C)
3446 G03
3446 G04
Oscillator Frequency
vs Temperature
Maximum Peak Inductor Current
2.50
2.45
2.40
2.35
2.30
2.25
2.20
2.15
2.10
2.05
2.00
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
V
V
V
V
= 2.7V
= 3.6V
= 4.2V
= 5.5V
V
V
V
V
= 2.7V
= 3.6V
= 4.2V
= 5.5V
IN
IN
IN
IN
IN
IN
IN
IN
30
TEMPERATURE (°C)
90
110 130
–50 –30 –10 10
50 70 90 110 130
–50 –30 –10 10
50
30
70
TEMPERATURE (°C)
3446 G05
3446 G06
3446fd
5
LTC3446
TYPICAL PERFORMANCE CHARACTERISTICS
Peak Inductor Current
vs ITH Voltage
VLDO Current Limit
vs LVIN Voltage
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1800
1600
1400
1200
1000
800
V
V
= 3.6V
IN
MODESEL
V
= 3.6V
= 0V
IN
OUT
= 3.6V
LV
PULSED MEASUREMENT,
≈ T ≈ 27°C
T
J
A
600
400
200
0
1
1.25
1.5 1.75
0
0.25 0.5 0.75
2
0.00 1.00 2.00 3.00 4.00 5.00
6.00
I
PIN VOLTAGE (V)
LV PIN VOLTAGE (V)
IN
TH
3446 G07
3446 G08
VLDO Dropout Voltage
vs Load Current
VIN Bias Current
vs VLDO Load Current
450
400
350
300
250
200
150
100
50
100
90
80
70
60
50
40
30
20
10
0
V
= 2.8V
OUT
IN
LV
= 1.2V
–45°C
27°C
90°C
130°C
V
= 3.6V
IN
LV = 1.5V
IN
OUT
LV
= 1.2V
ONLY ONE VLDO
ENABLED
–45°C
27°C
90°C
130°C
0
0
50
150
200
250
300
0
50
100
150
300
100
200
250
LOAD CURRENT (mA)
VLDO OUTPUT CURRENT (mA)
3446 G09
3446 G10
LVIN No-Load Operating Current
Enable/MODESEL Thresholds
1000
900
800
700
600
500
400
300
200
100
0
20
18
16
14
12
10
8
V
= 5V
IN
BOTH VLDOS ON AND
REGULATING 0.8V
6
–45°C
27°C
90°C
130°C
–45°C
27°C
90°C
130°C
4
2
0
2.5
3
4
4.5
5
5.5
3.5
0
1
3
4
5
6
2
V
(V)
LV PIN VOLTAGE (V)
IN
IN
3446 G12
3446 G11
3446fd
6
LTC3446
TYPICAL PERFORMANCE CHARACTERISTICS
Buck PMOS Switch On-Resistance
Buck NMOS Switch On-Resistance
200
180
160
140
200
180
160
140
120
100
80
120
100
80
V
V
V
V
= 2.7V
= 3.6V
= 4.2V
= 5.5V
V
V
V
V
= 2.7V
= 3.6V
= 4.2V
= 5.5V
IN
IN
IN
IN
IN
IN
IN
IN
55
TEMPERATURE (°C)
105 130
55
TEMPERATURE (°C)
105 130
–45 –20
5
30
80
–45 –20
5
30
80
3446 G17
3446 G18
Buck Transient Response with
Burst Mode Defeated
Buck Transient Response with
Burst Mode Enabled
BUCK OUTPUT
VOLTAGE
BUCK OUTPUT
VOLTAGE
50mV/DIV
50mV/DIV
AC-COUPLED
AC-COUPLED
500mA
LOAD
CURRENT
500mA
LOAD
CURRENT
50mA
50mA
3446 G13
3446 G14
100μs/DIV
100μs/DIV
FRONT PAGE APPLICATION CIRCUIT
FRONT PAGE APPLICATION CIRCUIT
VLDO Rejection of Buck DC/DC
Burst Mode Ripple
VLDO Transient Response
V
=
LVIN
BUCK V
OUT
20mV/DIV
VLDO OUTPUT
VOLTAGE
AC-COUPLED
20mV/DIV
AC-COUPLED
V
LVOUT
10mV/DIV
300mA
AC-COUPLED
LOAD
3446 G16
2μs/DIV
= 1.8V
CURRENT
V
V
V
I
= BUCK V
OUT
LVIN
IN
30mA
= 4.2V
3446 G15
100μs/DIV
= 1.5V OR 1.2V
FRONT PAGE APPLICATION CIRCUIT
= 1.5V
= 50mA
= 2.2μF
LVOUT
LVOUT
LVOUT
LV
OUT
C
3446fd
7
LTC3446
PIN FUNCTIONS
MODESEL(Pin1):ChoosesBetweenBurstModeOperation
and Pulse Skipping Operation at Light Loads. Forcing this
pin below 0.3V allows the buck converter to automatically
enter Burst Mode operation at light loads. Forcing this pin
above 1V disallows entering Burst Mode operation; the
buck converter will cycle skip at light loads. Do not leave
this pin floating. This is a MOS gate input.
LV (Pin 10): Feedback Pin for the First VLDO Regulator.
FB1
AnoutputdividershouldbeconnectedfromLV
toLV
OUT1
FB1
to set the desired LV
regulated output voltage.
OUT1
ENLDO1/ENLDO2 (Pin 11/Pin 8): Enable Pin for the First
and Second VLDO Regulators, Respectively. Forcing this
pin above 1V enables the corresponding VLDO regulator
and forcing this pin below 0.3V shuts it down. Each VLDO
regulator draws <1μA of supply current in shutdown. Do
not leave this pin floating. This is a MOS gate input.
V
(Pin 2): Input Supply to the LTC3446. Must be
IN
closely decoupled to GND with a 10μF or greater ceramic
capacitor.
BUCKFB(Pin12):BuckConverter’sFeedbackPin.Receives
the feedback voltage from an external resistive divider
across the output. External resistance from this pin to
ground should be equal to or less than 50k.
I
(Pin 3): Buck Error Amplifier Output and Servo-Loop
TH
Compensation Point.
PGOOD (Pin 4): Supply Monitor Output, Open-Drain
NMOS.
ENBUCK (Pin 13): Enable Pin for the LTC3446’s Buck
Converter Circuit. Forcing this pin above 1V enables the
buckconverterandforcingthispinbelow0.3Vshutsdown
theconverter.Inshutdown,thebuckconverterdraws<1μA
of supply current. Do not leave this pin floating. This is a
MOS gate input.
LV
(Pin 5): Output of the First VLDO Regulator.
OUT1
LV (Pin6):InputSupplytotheLTC3446’sVLDOCircuits.
IN
Bypass LV to GND with at least a 1μF low ESR ceramic
IN
capacitor.TypicalLTC3446applicationcircuitswillconnect
this pin to the output of the buck converter but this is not
required.TheVLDOregulatorsmaybeusedindependently
of the buck converter.
SW (Pin 14): Switch Node Connection to Inductor. This
pin connects to the drains of the internal main and syn-
chronous power MOSFET switches.
LV
(Pin 7): Output of the Second VLDO Regulator.
OUT2
Exposed Pad (Pin 15): Ground. The Exposed Pad is the
only ground and must connect to the PCB ground for
electrical contact and rated thermal performance.
LV (Pin9):FeedbackPinfortheSecondVLDORegulator.
FB2
AnoutputdividershouldbeconnectedfromLV
toLV
OUT2
FB2
to set the desired LV
regulated output voltage.
OUT2
3446fd
8
LTC3446
BLOCK DIAGRAM
3
2
I
V
IN
TH
ENBUCK
SOFT-START
0.4V
0.8V
VOLTAGE
REFERENCE
I
TH
PARK
PMOS CURRENT
COMPARATOR
ERROR
AMPLIFIER
I
TH
LIMIT
+
–
BCLAMP
+
–
B
–
BUCKFB
12
+
+
V
B
BURST
COMPARATOR
SW
SLOPE
COMPENSATION
14
OSCILLATOR
+
–
PGOOD
4
LOGIC
POWER
GOOD
NMOS
OVERCURRENT
COMPARATOR
–
+
GND
ENBUCK
13
15
EXPOSED
PAD
REVERSE
CURRENT
COMPARATOR
MODESEL
1
V
IN
LV
IN
6
+
V
LDO1
SOFT-START
6μA
–
LV
OUT1
5
LV
FB1
10
ENLDO1
11
V
IN
+
–
V
LDO2
SOFT-START
6μA
LV
OUT2
7
9
LV
FB2
ENLDO2
8
3446 BD
3446fd
9
LTC3446
OPERATION
TheLTC3446combinesaconstantfrequency,currentmode
synchronous buck converter with two very low dropout
(VLDO) linear DC regulators to provide up to three high
efficiency,lowvoltageoutputsfromasinglehighervoltage
input source. Each output can be independently enabled
and disabled, and has its own independent soft-start cir-
cuit to help reduce inrush current. A power good circuit
monitors all three supplies. The LTC3446 incorporates
an undervoltage lockout circuit that shuts down the IC
when the input voltage drops below about 2.4V to prevent
unstable operation.
Overcurrent Protection
To help avert inductor current runaway in case the buck
output is accidentally shorted to ground, the LTC3446
features a bottom switch NMOS overcurrent limit, which
works as follows.
When the buck output is shorted to ground, inductor
current will rise to its maximum peak level, I
, such
MAXP
that on every oscillator cycle the PMOS top switch will
turn on for only its minimum duty cycle, and the bottom
switch NMOS turns on for the remainder of the cycle.
Temporarily ignoring inductor, switch and parasitic resis-
tance drops, which in most applications are designed to
be small in order to maximize buck converter efficiency,
SYNCHRONOUS BUCK OPERATION
A buck converter takes power from a high input voltage,
V ,anddeliversitataloweroutputvoltage,V .Thebuck
it is to first order true that when the PMOS is on, the V
IN
supply voltage is placed across the inductor, increasing
the inductor current, but when the NMOS is on, there is no
output voltage to be placed across the inductor to reduce
its current. Inductor current ratchets up each cycle and
could lead to the destruction of the buck IC.
IN
OUT
converter inside the LTC3446 achieves over 80% efficient
powerconversionunderawiderangeofV ,V andload
IN OUT
conditions,whereasalinearregulatorislimitedbyphysics
to a maximum efficiency of (V /V ) × 100%.
OUT IN
The NMOS overcurrent limit helps prevent this by sensing
the current through the NMOS bottom switch, and for as
long as this current exceeds the overcurrent limit level,
Main Control Loop
Duringnormaloperation,theinternaloscillatorproducesa
constant frequency 2.25MHz clock. The top power switch
(P-channel MOSFET) turns on at the beginning of a clock
cycle. Inductor current increases to a peak value which is
I
, it:
MAXN
1. KeepstheNMOSon,allowingthetinyvoltagedropsfrom
parasitic resistances to reduce the inductor current.
set by the voltage on the I pin. Then the top switch turns
TH
off and the energy stored in the inductor flows through
the bottom switch (N-channel MOSFET) into the load until
the next clock cycle.
2. Refuses to allow the PMOS to turn on, preventing any
additional energy from being fed into the system.
Low Current Operation
The peak inductor current is controlled by the voltage on
the I pin, which is the output of the error amplifier. This
TheMODESELpincontrolsthebuckconverter’sbehaviorat
lightloadcurrentstohelpoptimizeefficiency,outputripple
and noise. When the load is relatively light and MODESEL
is grounded, the buck converter automatically switches
into Burst Mode operation, which operates the PMOS
switch intermittently based on load demand rather than
at a constant frequency. Every switch cycle during Burst
Mode operation delivers more energy than would occur
in constant frequency operation, minimizing the switch-
ing loss per unit of energy delivered. Since the dominant
power loss at light loads is gate charge switching loss in
the power MOSFETs, operating in Burst Mode operation
TH
amplifier compares the BUCKFB pin to the 0.8V reference.
When the load current increases, the BUCKFB voltage de-
creasesslightlybelowthereference.Thisdecreasecauses
the error amplifier to increase the I voltage until the
TH
average inductor current matches the new load current.
ThemaincontrolloopisshutdownbypullingtheENBUCK
pin to ground. A soft-start is enabled whenever ENBUCK
is brought high. Soft-start limits the peak inductor current
from reaching maximum for the first millisecond after
ENBUCK is brought high.
3446fd
10
LTC3446
OPERATION
candramaticallyimprovelightloadefficiency.Thetradeoff
is higher output ripple than in constant frequency opera-
tion, as well as the presence of noise below the 2.25MHz
clock frequency.
As shown in the Block Diagram, the VIN input supplies
the internal reference and biases the VLDO circuitry while
all output current comes directly from the LVIN input for
high efficiency regulation. The low per-VLDO quiescent
supply currents ILVIN = 4μA, IVIN = 80μA drop to ILVIN
<
If MODESEL were instead tied to V , pulse skipping mode
IN
2μA, IVIN < 1μA in shutdown, are well-suited to battery-
powered systems.
is selected. In this mode, the buck converter continues to
switch at a constant frequency down to very light loads
where it will eventually begin skipping pulses. Because
constant frequency operation is extended down to light
loads, low output ripple is maintained and any coupled
or radiated noise is at or higher than the clock frequency.
The tradeoff is lower efficiency compared to Burst Mode
operation.
Each VLDO includes current limit protection. The fast
transientresponseofthefolloweroutputstageovercomes
thetraditionaltradeoffbetweendropoutvoltage,quiescent
current and load transient response inherent in most LDO
regulator architectures. Overshoot detection circuitry is
included to bring the output back into regulation when
going from heavy to light output loads (“load-dump”
handling).
Dropout Operation
When the input supply voltage decreases toward the
output voltage, the duty cycle increases to 100%, which
is known as the dropout condition. In dropout, the PMOS
switch is turned on continuously with the output voltage
equal to the input voltage minus any voltage drop across
the PMOS switch and the external inductor.
POWER GOOD CIRCUIT OPERATION
The LTC3446 has a built-in supply monitor. The feedback
voltage of each enabled supply is monitored by a window
comparator to determine whether it is within 8% of its
target value. If they all are, then the PGOOD pin becomes
high impedance. If no supply is enabled, or if any enabled
supply is more than 8% away from its target, then the
PGOOD pin is driven to ground by an internal open-drain
NMOS.
VLDO LINEAR REGULATOR OPERATION
The two micropower, VLDO (very low dropout) linear
regulators in the LTC3446 operate from input voltages as
lowas0.9V.EachVLDOregulatorprovidesahighaccuracy
output that is capable of supplying 300mA of output cur-
rent with a typical dropout voltage of only 70mV. A single
ceramic capacitor as small as 1μF is all that is required
for output bypassing. A low reference voltage of 400mV
allows the VLDO regulators to be programmed to much
lower voltages than available in common LDOs.
The PGOOD pin may be connected through a pull-up
resistor to a supply voltage of up to 5.5V, independent of
the V pin voltage.
IN
3446fd
11
LTC3446
APPLICATIONS INFORMATION
AgeneralLTC3446applicationcircuitisshowninFigure 1.
External component selection is driven by output voltage
and load requirements. The following text is divided into
two sections: the first covers Buck regulator design and
the second covers use of the linear VLDO regulators.
Accepting larger values of ΔI allows the use of low induc-
L
tances, but results in higher output voltage ripple, greater
core losses, and lower output current capability.
A reasonable starting point for setting ripple current is
ΔI = 0.3 • I
, where I
is the peak switch current
L
L
MAXP
MAXP
limit.ThelargestripplecurrentΔI occursatthemaximum
BUCK REGULATOR DESIGN
input voltage. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation:
Buck regulator design begins with the selection of the
L1 inductor based on desired ripple current. Once L1 is
ꢂ
ꢅ
chosen, C and C
can be selected based on output
VOUTB
fO• ꢀIL
VOUTB
VIN(MAX)
IN
OUTB
L =
• 1ꢁ
ꢄ
ꢇ
voltageripplerequirements.Outputvoltageisprogrammed
ꢃ
ꢆ
through R1 and R2, and loop response can be optimized
by choice of R and C
.
ITH
The inductor value will also have an effect on Burst Mode
operation. The transition from low current operation
begins when the peak inductor current falls below a level
set by the burst clamp. Lower inductor values result in
higher ripple current which causes this to occur at lower
load currents. This causes a dip in efficiency in the upper
range of low current operation. In Burst Mode operation,
lower inductance values will cause the burst frequency
to increase.
ITH
Inductor Selection
Although the inductor does not influence the operat-
ing frequency, the inductor value has a direct effect on
ripple current. The inductor ripple current ΔI decreases
L
with higher inductance and increases with higher V or
IN
V
:
OUTB
ꢂ
OUTB ꢅ
V
VOUTB
fO•L
ꢀIL =
• 1ꢁ
ꢄ
ꢇ
VIN
ꢃ
ꢆ
L1
V
IN
V
SW
V
OUTB
IN
2.7V TO 5.5V
D1
OPT
C
F
OPT
C
IN
C
OUTB
R2
R1
BUCKFB
LTC3446
LV
IN
PGOOD LV
MODESEL
ENBUCK
ENLDO1
ENLDO2
V
OUT1
OUT1
OUT2
DIGITAL
C
C
OUT1
R4
CONTROL
LV
FB1
R3
R6
R
TH
V
I
LV
OUT2
TH
C
ITH
OUT2
LV
FB2
GND
R5
3446 F01
Figure 1. General LTC3446 Application Circuit
3446fd
12
LTC3446
APPLICATIONS INFORMATION
Inductor Core Selection
current and average power dissipation so as not to exceed
the diode ratings. The main problem with Schottky diodes
is that their parasitic capacitance reduces the efficiency,
usuallynegatingthepossiblebenefitsforLTC3446circuits.
Another problem that a Schottky diode can introduce is
higher leakage current at high temperatures, which could
reduce the low current efficiency.
Different core materials and shapes will change the
size/current and price/current relationship of an induc-
tor. Toroid or shielded pot cores in ferrite or permalloy
materials are small and don’t radiate much energy, but
generally cost more than powdered iron core inductors
with similar electrical characteristics. The choice of which
style inductor to use often depends more on the price vs
sizerequirementsandanyradiatedfield/EMIrequirements
than on what the LTC3446 requires to operate. Table 1
shows some typical surface mount inductors that work
well in LTC3446 applications.
Remember to keep lead lengths short and observe proper
groundingtoavoidringingandincreaseddissipationwhen
using a catch diode.
Input Capacitor (C ) Selection
IN
In continuous mode, the input current of the converter is a
Table 1. Representative Surface Mount Inductors
squarewavewithadutycycleofapproximatelyV
/V .
OUTB IN
MANU-
FACTURER PART NUMBER
MAX DC
VALUE CURRENT
DCR
HEIGHT
Topreventlargevoltagetransients, alowequivalentseries
resistance (ESR) input capacitor sized for the maximum
RMS current must be used. The maximum RMS capacitor
current is given by:
Toko
Toko
A914BYW-2R2M- 2.2μH
2.05A
49mΩ
2mm
D52LC
A915AY-2ROM-
D53LC
2μH
3.3A
22mΩ
70mΩ
3mm
3mm
Coilcraft
Coilcraft
Sumida
Sumida
D01608C-222
LP01704-222M
CDRH4D282R2
CDC5D232R2
N06DB2R2M
2.2μH
2.2μH
2.2μH
2.2μH
2.2μH
2.3A
2.4A
VOUTB(V ꢁ VOUTB)
IN
IRMS ꢀIMAX
120mΩ 1mm
23mΩ 3mm
V
IN
2.04A
2.16A
3.2A
30mΩ 2.5mm
29mΩ 3.2mm
where the maximum average output current I
equals
MAX
Taiyo
Yuden
the peak current minus half the peak-to-peak ripple cur-
rent, I = I – ΔI /2.
MAX
MAXP
L
Taiyo
Yuden
N05DB2R2M
2.2μH
2.9A
32mΩ 2.8mm
This formula has a maximum at V = 2V
, where I
RMS
IN
OUTB
= I /2. This simple worst case is commonly used to
Murata
Würth
LQN6C2R2M04
744042001
2.2μH
1μH
3.2A
2.6A
24mΩ
20mΩ
5mm
2mm
OUT
design because even significant deviations do not offer
much relief. Note that capacitor manufacturer’s ripple cur-
rent ratings are often based on only 2000 hours lifetime.
This makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required.Severalcapacitorsmayalsobeparalleledtomeet
thesizeorheightrequirementsofthedesign.Anadditional
0.1μF to 1μF ceramic capacitor is also recommended on
Catch Diode Selection
Although unnecessary in most applications, a small
improvement in efficiency can be obtained in a few ap-
plications by including the optional diode D1 shown in
Figure 1, which conducts when the synchronous switch
is off. When using Burst Mode operation or pulse skip
mode,thesynchronousswitchisturnedoffatalowcurrent
and the remaining current will be carried by the optional
diode. It is important to adequately specify the diode peak
V for high frequency decoupling, when not using an all
IN
ceramic capacitor solution.
3446fd
13
LTC3446
APPLICATIONS INFORMATION
Output Capacitor (C
) Selection
withtraceinductancecanleadtosignificant ringing. Other
capacitor types include the Panasonic specialty polymer
(SP) capacitors.
OUTB
The selection of C
is driven by the required ESR to
OUTB
minimizevoltagerippleandloadsteptransients. Typically,
once the ESR requirement is satisfied, the capacitance
In most cases, 0.1μF to 1μF of ceramic capacitors should
also be placed close to the LTC3446 in parallel with the
main capacitors for high frequency decoupling.
is adequate for filtering. The output ripple (ΔV
) is
OUTB
determined by:
ꢂ
ꢄ
L ꢃ
ꢅ
ꢇ
ꢆ
1
Ceramic Input and Output Capacitors
ꢀVOUTB ꢁ ꢀI ESR+
8fOCOUTB
Higher value, lower cost ceramic capacitors are now be-
comingavailableinsmallercasesizes. Thesearetempting
for switching regulator use because of their very low ESR.
Unfortunately, the ESR is so low that it can cause loop
stability problems. Solid tantalum capacitor ESR gener-
ates a loop “zero” at 5kHz to 50kHz that is instrumental in
giving acceptable loop phase margin. Ceramic capacitors
remain capacitive to beyond 300kHz and usually resonate
withtheirESLbeforeESRbecomeseffective.Also,ceramic
caps are prone to temperature effects which requires the
designer to check loop stability over the operating tem-
perature range. To minimize their large temperature and
voltage coefficients, only X5R or X7R ceramic capacitors
should be used. A good selection of ceramic capacitors
is available from Taiyo Yuden, TDK and Murata.
where f = 2.25MHz, C
= output capacitance and ΔI =
L
OUTB
ripple current in the inductor. The output ripple is highest
at maximum input voltage since ΔI increases with input
voltage.
L
Once the ESR requirements for C
have been met, the
OUTB
RMS current rating generally far exceeds the I
RIPPLE(P-P)
requirement, except for an all ceramic solution.
In surface mount applications, multiple capacitors may
have to be paralleled to meet the capacitance, ESR or RMS
currenthandlingrequirementoftheapplication.Aluminum
electrolytic, special polymer, ceramic and dry tantulum
capacitorsareallavailableinsurfacemountpackages.The
OS-CONsemiconductordielectriccapacitoravailablefrom
Sanyo has the lowest ESR(size) product of any aluminum
electrolytic at a somewhat higher price. Special polymer
capacitors, such as Sanyo POSCAP, offer very low ESR,
but have a lower capacitance density than other types.
Tantalumcapacitorshavethehighestcapacitancedensity,
but have a larger ESR and it is critical that the capacitors
are surge tested for use in switching power supplies.
An excellent choice is the AVX TPS series of surface
mount tantalums, avalable in case heights ranging from
2mm to 4mm. Aluminum electrolytic capacitors have a
significantly larger ESR, and are often used in extremely
cost-sensitive applications provided that consideration is
given to ripple current ratings and long-term reliability.
Ceramic capacitors have the lowest ESR and cost but also
have the lowest capacitance density, a high voltage and
temperature coefficient and exhibit audible piezoelectric
effects. In addition, the high Q of ceramic capacitors along
Great care must be taken when using only ceramic input
and output capacitors. When a ceramic capacitor is used
at the input and the power is being supplied through long
wires, suchasfromawalladapter, aloadstepattheoutput
can induce ringing at the V pin. At best, this ringing can
IN
couple to the output and be mistaken as loop instability.
At worst, the ringing at the input can be large enough to
damage the part.
Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must instead fulfill a charge storage
requirement.Duringaloadstep,theoutputcapacitormust
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is dependent on the compensation com-
ponents and the output capacitor size. Typically, 3 to 4
cycles are required to respond to a load step, but only in
3446fd
14
LTC3446
APPLICATIONS INFORMATION
the first cycle does the output drop linearly. The output
Checking Buck Converter Transient Response
droop, V , is usually about 2 to 3 times the linear
DROOP
The OPTI-LOOP compensation allows the transient re-
sponse to be optimized for a wide range of loads and
drop of the first cycle. Thus, a good place to start is with
the output capacitor size of approximately:
output capacitors. The availability of the I pin not only
TH
allows optimization of the control loop behavior but also
providesaDCcoupledandACfilteredclosed-loopresponse
test point. The DC step, rise time and settling at this test
point truly reflects the closed-loop response. Assuming a
predominantlysecondordersystem,phasemarginand/or
damping factor can be estimated using the percentage of
overshoot seen at this pin. The bandwidth can also be
estimated by examining the rise time at the pin.
ꢁIOUT
fO • VDROOP
COUTB ꢀ2.5
More capacitance may be required depending on the duty
cycle and load step requirements.
Inmostapplications,theinputcapacitorismerelyrequired
to supply high frequency bypassing, since the impedance
to the supply is very low. A 10μF ceramic capacitor is
usually enough for these conditions.
The I external components shown in the front page
TH
TypicalApplicationcircuitwillprovideanadequatestarting
point for most applications. The series R-C filter sets the
dominant pole-zero loop compensation. The values can
be modified slightly (from 0.5 to 2 times their suggested
values) to optimize transient response once the final PC
layout is done and the particular output capacitor type and
valuehavebeendetermined.Theoutputcapacitorsneedto
beselectedbecausethevarioustypesandvaluesdetermine
theloopfeedbackfactorgainandphase. Anoutputcurrent
pulse of 20% to 100% of full load current having a rise
Setting the Buck Converter’s Output Voltage
The buck develops a 0.8V reference voltage between the
feedback pin, BUCKFB, and the signal ground as shown
in Figure 1. The output voltage is set by a resistive divider
according to the following formula:
R2
R1
ꢁ
ꢂ
ꢄ
ꢅ
VOUTB ꢀ0.8V 1+
ꢃ
ꢆ
Keep R1 at or less than 50k. Great care should be taken
to route the BUCKFB line away from noise sources, such
as the inductor or the SW line.
time of 1μs to 10μs will produce output voltage and I
TH
pin waveforms that will give a sense of the overall loop
stability without breaking the feedback loop.
To improve high frequency loop response, a feed forward
Switching regulators take several cycles to respond to a
capacitor, C , canbeaddedasshowninFigure1. Capacitor
F
step in load current. When a load step occurs, V
im-
OUTB
•ESR,where
C provides phase lead by creating a high frequency zero
F
mediatelyshiftsbyanamountequaltoΔI
LOAD
with R2, improving phase margin.
ESR is the effective series resistance of C . ΔI
also
OUT LOAD
beginstochargeordischargeC
generatingafeedback
OUTB
Buck Converter Shutdown and Soft-Start
error signal used by the regulator to return V
to its
can
OUTB
OUTB
steady-state value. During this recovery time, V
The ENBUCK pin enables and shuts down the LTC3446’s
buck converter. Do not leave this pin floating! Tying
ENBUCK to ground disables the buck converter. Bringing
ENBUCK more than 1V above ground enables the buck.
be monitored for overshoot or ringing that would indicate
a stability problem.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second
order overshoot/DC ratio cannot be used to determine
phase margin. The gain of the loop increases with R and
the bandwidth of the loop increases with decreasing C.
When the buck is brought out of shutdown, an internal
soft-start clamp reduces surge currents from V by
IN
gradually increasing the internal peak inductor current
limit over the course of a millisecond.
3446fd
15
LTC3446
APPLICATIONS INFORMATION
If R is increased by the same factor that C is decreased,
the zero frequency will be kept the same, thereby keeping
the phase the same in the most critical frequency range
of the feedback loop.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3446 circuits: 1) LTC3446 V current,
IN
2
2) switching losses, 3) I R losses, 4) other losses.
Theoutputvoltagesettlingbehaviorisrelatedtothestability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a
review of control loop theory, refer to Linear Technology
Application Note 76.
1) The V current is the DC supply current given in the
IN
electricalcharacteristicswhichexcludesMOSFETdriver
and control currents. V current results in a small
IN
(<0.1%) loss that increases with V , even at no load.
IN
2) The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current re-
sults from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
Although a buck regulator is capable of providing the full
output current in dropout, it should be noted that as the
inputvoltageV dropstowardV ,theloadstepcapability
IN
OUT
does decrease due to the decreasing voltage across the
inductor. Applications that require large load step capabil-
ity near dropout should use a different topology such as
SEPIC, Zeta or single inductor, positive buck/boost.
from V to ground. The resulting dQ/dt is a current
IN
out of V that is typically much larger than the DC bias
IN
current. In continuous mode, I
= f (QT + QB),
GATECHG
O
where QT and QB are the gate charges of the internal
top and bottom MOSFET switches. The gate charge
Insomeapplications,amoreseveretransientcanbecaused
by switching in loads with large (>1μF) input capacitors.
Thedischargedinputcapacitorsareeffectivelyputinparal-
losses are proportional to V and thus their effects
IN
will be more pronounced at higher supply voltages.
2
lel with C
, causing a rapid drop in V . No regulator
3) I R Losses are calculated from the DC resistances of
OUTB
OUT
can deliver enough current to prevent this problem, if the
switchconnectingtheloadhaslowresistanceandisdriven
quickly.Thesolutionistolimittheturn-onspeedoftheload
switchdriver.AHotSwapcontrollerisdesignedspecifically
for this purpose and usually incorporates current limiting,
short-circuit protection, and soft-starting.
the internal switches, R , and external inductor, RL. In
SW
continuous mode, the average output current flowing
through inductor L is “chopped” between the internal
top and bottom switches. Thus, the series resistance
looking into the SW pin is a function of both top and
bottom MOSFET R
follows:
and the duty cycle (DC) as
DS(ON)
Efficiency Considerations
R
SW
= (R
TOP)(DC) + (R BOT)(1 – DC)
DS(ON)
DS(ON)
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
4) Other“hidden”lossessuchascoppertraceandinternal
batteryresistancescanaccountforadditionalefficiency
degradations in portable systems. It is very important
to include these “system” level losses in the design of a
system. The internal battery and fuse resistance losses
can be minimized by making sure that C has adequate
IN
%Efficiency = 100% – (L1 + L2 + L3 + ...)
charge storage and very low ESR at the switching fre-
quency.Otherlossesincludingdiodeconductionlosses
during dead-time and inductor core losses generally
account for less than 2% total additional loss.
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Hot Swap is a trademark of Linear Technology Corporation.
3446fd
16
LTC3446
APPLICATIONS INFORMATION
VLDO LINEAR REGULATOR DESIGN
connect each LV pin to its resistor divider with a short
FB
PCB trace and minimize all other stray capacitance to the
Adjustable Output Voltage
LV pin.
FB
Each VLDO regulator’s output voltage is set by the ratio
of two external resistors as shown in Figure 2. The VLDO
VLDO Regulator Output Capacitance and Transient
Response
regulatorservostheoutputtomaintaintheLV pinvoltage
FB
at 0.4V (referenced to ground). Thus the current in R1 is
equalto0.4V/R1.Forgoodtransientresponse,stabilityand
accuracy, the current in R1 should be at least 8μA, thus
the value of R1 should be no greater than 50k. The current
The VLDO regulators are designed to be stable with a
wide range of ceramic output capacitors. The ESR of the
output capacitor affects stability, most notably with small
capacitors. A minimum output capacitor of 1μF with an
ESR of 0.05Ω or less is recommended to ensure stability.
The VLDO regulators are micropower devices and output
transientresponsewillbeafunctionofoutputcapacitance.
Larger values of output capacitance decrease the peak
deviations and provide improved transient response for
larger load current changes. Note that bypass capacitors
used to decouple individual components powered by a
VLDO regulator will increase the effective output capaci-
tor value. High ESR tantalum and electrolytic capacitors
may be used, but a low ESR ceramic capacitor must be
in parallel at the output. There is no minimum ESR or
maximum capacitor size requirements.
in R2 is the current in R1 plus the LV pin bias current.
FB
Since the LV pin bias current is typically <10nA, it can
FB
be ignored in the output voltage calculation. The output
voltage can be calculated using the formula in Figure 2.
Note that in shutdown, the output is turned off and the
divider current will be zero once C
is discharged.
OUT
Each VLDO regulator operates at a relatively high gain of
–0.7μV/mA referred to its LV input. Thus a load current
FB
change of 1mA to 300mA produces a –0.2mV drop at the
LV input. To calculate the change referred to the output,
FB
simply multiply by the gain of the feedback network (i.e.,
1 + R2/R1). For example, to program the output for 1.2V,
choose R2/R1 = 2. In this example, an output current
change of 1mA to 300mA produces –0.2mV • (1 + 2) =
0.6mV drop at the output.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common di-
electrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but exhibit large voltage and tem-
perature coefficients as shown in Figures 3 and 4. When
used with a 2V regulator, a 1μF Y5V capacitor can lose as
much as 75% of its intial capacitance over the operating
temperature range. The X5R and X7R dielectrics result
Because the LV pins are relatively high impedance (de-
FB
pending on the resistor dividers used), stray capacitance
at these pins should be minimized (<10pF) to prevent
phase shift in the error amplifier loop. Additionally, special
attention should be given to any stray capacitances that
can couple external signals onto the LV pins producing
FB
undesirable output ripple. For optimum performance,
R2
R1
LV
V
= 0.4V 1+
OUT
OUT
(
)
R2
R1
LTC3446
LV
C
FB
OUT
GND
3446 F02
Figure 2. Programming a VLDO Regulator’s Output Voltage
3446fd
17
LTC3446
APPLICATIONS INFORMATION
20
20
0
BOTH CAPACITORS ARE 1μF,
10V, 0603 CASE SIZE
0
X5R
X5R
–20
–40
–20
–40
–60
–80
–100
Y5V
Y5V
–60
–80
BOTH CAPACITORS ARE 1μF,
10V, 0603 CASE SIZE
–100
0
8
2
4
6
10
–50
0
25
50
75
–25
DC BIAS VOLTAGE (V)
TEMPERATURE (°C)
3446 F03
3446 F04
Figure 3. Ceramic Capacitor DC Bias Characteristics
Figure 4. Ceramic Capacitor Temperature Characteristics
in more stable characteristics and are usually more suit-
able for use as the output capacitor. The X7R type has
better stability across temperature, while the X5R is less
expensive and is available in higher values. In all cases,
the output capacitance should never drop below 0.4μF, or
instability or degraded performance may occur.
VLDO Regulator Soft-Start
Each VLDO regulator includes a soft-start feature to
prevent excessive current flow during start-up. When
the VLDO regulator is enabled, the soft-start circuitry
gradually increases the VLDO regulator reference voltage
from 0V to 0.4V over a period of about 600μs. There is a
short 700μs delay from the time the part is enabled until
the LDO output starts to rise. Figure 5 shows the start-up
output waveform.
VLDO Output Short-Circuit Protection
The VLDO regulators have built-in short-circuit limiting.
Duringshort-circuitconditions,internalcircuitryautomati-
cally limits the output current to approximately 760mA.
1.5V VLDO OUTPUT
1.2V VLDO OUTPUT
0.5V/DIV
BOTH VLDO
ENABLES
5V/DIV
3446 F05
V
V
= 1.8V
200μs/DIV
LVIN
IN
= 3.6V
FRONT PAGE APPLICATION CIRCUIT
WITH 10mA RESISTOR LOADS ON
EACH VLDO OUTPUT
Figure 5. VLDO Regulator Output Start-Up
3446fd
18
LTC3446
PACKAGE DESCRIPTION
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)
0.70 ±0.05
3.30 ±0.05
1.70 ± 0.05
3.60 ±0.05
2.20 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
3.00 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.115
TYP
0.40 ± 0.10
4.00 ±0.10
(2 SIDES)
8
14
R = 0.05
TYP
3.30 ±0.10
3.00 ±0.10
(2 SIDES)
1.70 ± 0.10
PIN 1 NOTCH
R = 0.20 OR
PIN 1
TOP MARK
(SEE NOTE 6)
0.35 × 45°
CHAMFER
(DE14) DFN 0806 REV B
7
1
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
3.00 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3446fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC3446
TYPICAL APPLICATION
L1
1.8μH
V
OUT
V
IN
2.9V TO 5.5V
V
SW
1.8V
IN
22μF
X7R
22μF
X7R
400mA MAX
59k
BUCKFB
47.5k
LTC3446
LV
IN
V
OUT
PGOOD LV
MODESEL
ENBUCK
ENLDO1
ENLDO2
1.5V
OUT1
2.2μF
X7R
300mA MAX
DIGITAL
CONTROL
110k
LV
FB1
40.2k
3.3k
V
OUT
I
LV
OUT2
1.2V
TH
2.2μF
X7R
300mA MAX
1000pF
80.6k
40.2k
LV
FB2
GND
L1: TOKO A960AW-1R8M
3446 TA01
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
V : 1.8V to 20V, V
LT3023
Dual, 2x100mA,
Low Noise Micropower LDO
= 1.22V, V = 0.30V, I = 40μA, I < 1μA,
IN
OUT(MIN)
DO
Q
SD
V
= ADJ, DFN, MS Packages, Low Noise < 20μV
, Stable with
OUT
RMS(P-P)
1μF Ceramic Capacitors
LT3024
Dual, 100mA/500mA,
Low Noise Micropower LDO
V : 1.8V to 20V, V
= 1.22V, V = 0.30V, I = 60μA, I < 1μA,
IN
OUT(MIN)
DO
Q
SD
V
= ADJ, DFN, TSSOP Packages, Low Noise < 20μV
, Stable with
OUT
RMS(P-P)
1μF Ceramic Capacitors
LTC3025
300mA, Micropower VLDO
Linear Regulator
V : 0.9V to 5.5V, V
= 0.4V, 2.7V to 5.5V Bias Voltage Required,
OUT(MIN)
IN
V
= 45mV, I = 50μA, I < 1μA, V
= ADJ, DFN Packages, Stable with
DO
Q
SD
OUT
1μF Ceramic Capacitors
LTC3407
LTC3407-2
LTC3445
Dual Synchronous 600mA
1.5MHz Constant Frequency Current Mode Operation, V from 2.5V to
IN
Synchronous Step-Down DC/DC Regulator 5.5V, V
Down to 0.6V, DFN, MS Packages
OUT
Dual Synchronous 800mA Synchronous
Step-Down DC/DC Regulator, 2.25MHz
2.25MHz Constant Frequency Current Mode Operation, V from 2.5V to
IN
5.5V, V
Down to 0.6V, DFN, MS Packages
OUT
2
2
I C Controllable Buck Regulator
600mA, 1.5MHz Current Mode Buck Regulator, I C Programmable V
from 0.85V to 1.55V, two 50mA LDOs, Backup Battery Input with
PowerPath™ Control, QFN Package
OUT
with Two LDOs and and
Backup Battery Input
LTC3555
LTC3557
High Efficiency USB Power Manager Plus
Triple Step-Down DC/DC
Maximizes Available Power from USB Port, Bat-Track™, “Instant On” Operation,
1.5A Maximum Charge Current, 180mΩ Ideal Diode with <50Ω Option, 3.3V/25mA
Always-On LDO, Three Synchronous Buck Regulators
(400mA/400mA/1A), 4mm × 5mm QFN28 Package
USB Power Manager with Li-Ion/Polymer
Charger and Triple Synchrounous
Buck Converter
Complete Multifunction ASSP: Linear Power Manager and Three Buck Regulators,
Charge Current Programmable Up to 1.5A from Wall Adapter Input,
Thermal Regulation, Synchronous Buck Efficiency: >95%, ADJ Outputs: 0.8V to 3.6V
at 400mA/400mA/600mA, Bat-Track Adaptive Output Control,
200mΩ Ideal Diode, 4mm × 4mm QFN28 Package
LTC3559
Linear USB Li-Ion Battery Charger with
Dual Buck Regulators
Charge Current Programmable Up to 950mA, USB Compatible, Dual Synchronous
400mA Buck Regulators, Efficiency >90%, 3mm × 3mm QFN16 Package
LTC3672B-1/
LTC3672B-2
Fixed-Output Monolithic 400mA Buck
Regulator with Dual 150mA LDOs in
a 2mm × 2mm DFN
>90% Efficiency, V : 2.9V to 5.5V, I = 260μA,
IN Q
LTC3672B-1: Buck = 1.8V, LDO1 = 1.2V, LDO2 = 2.8V
LTC3672B-2: Buck = 1.2V, LDO1 = 2.8V, LDO2 = 1.8V
Consult LTC Factory for Other Voltage Combinations
LTC3700
Step-Down DC/DC Controller with
LDO Regulator
V from 2.65V to 9.8V, Constant Frequency 550kHz Operation
IN
PowerPath and Bat-Track is a trademark of Linear Technology Corporation.
3446fd
LT 0108 REV D • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
© LINEAR TECHNOLOGY CORPORATION 2006
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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