LTC3448 [Linear]
1.5MHz/2.25MHz, 600mA Synchronous Step-Down Regulator with LDO Mode; 为1.5MHz / 2.25MHz的， 600mA同步降压型稳压器， LDO模式
| 型号： | LTC3448 |
| 厂家： | 
Linear |
| 描述： | 1.5MHz/2.25MHz, 600mA Synchronous Step-Down Regulator with LDO Mode |
| 文件： | 总20页 (文件大小：274K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3448
1.5MHz/2.25MHz, 600mA
Synchronous Step-Down
Regulator with LDO Mode
U
FEATURES
DESCRIPTIO
TheLTC®3448isahighefficiency,monolithic,synchronous
buck regulator using a constant frequency, current mode
architecture. Supplycurrentduringoperationisonly32µA
(linearregulatormode)anddropsto<1µAinshutdown.The
2.5V to 5.5V input voltage range makes the LTC3448 ide-
ally suited for single Li-Ion battery-powered applications.
100% duty cycle provides low dropout operation, extend-
ingbatterylifeinportablesystems.Atmoderateoutputload
levels, PWMpulseskippingmodeoperationprovidesvery
low output ripple voltage for noise sensitive applications.
■
High Efficiency: Up to 96%
■
Very Low Quiescent Supply Current: 32µA During
Linear Regulator Operation
600mA Output Current (Buck Converter)
Optionally Operates as Linear Regulator Below
3mA—External or Automatic ON/OFF
2.5V to 5.5V Input Voltage Range
1.5MHz or 2.25MHz Constant Frequency Operation
or External Synchronization
No Schottky Diode Required
■
■
■
■
■
■
■
■
■
Low Dropout Operation: 100% Duty Cycle
0.6V Reference Allows Low Output Voltages
Shutdown Mode Draws <1µA Supply Current
Current Mode Operation for Excellent Line and
Load Transient Response
The LTC3448 automatically switches into linear regulator
operation at very low load currents to maintain <5mVP-P
output voltage ripple. Supply current in this mode is
typically 32µA. The switch to linear regulator mode occurs
atathresholdof3mA.Linearregulatoroperationcanbeset
to on, off or automatic turn on/off.
■
■
Overtemperature Protected
Low Profile (3mm × 3mm) 8-Lead DFN and 8-Lead
MSOP PackagesU
Switching frequency is selectable at either 1.5MHz or
2.25MHz, allowing the use of small surface mount induc-
tors and capacitors.
APPLICATIO S
■
Cellular Telephones
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode. Low
output voltages are easily supported with the 0.6V feed-
back reference voltage. The LTC3448 is available in a low
profile 3mm × 3mm DFN package or thermally enhanced
8-lead MSOP.
■
Personal Information Appliances
■
Wireless and DSL Modems
■
Digital Still Cameras
■
MP3 Players
■
Portable Instruments
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 5481178, 6580258, 6304066, 6127815,
6498466, 6611131. Others pending.
U
Efficiency and Power Loss vs Load Current
TYPICAL APPLICATIO
100
90
80
70
60
50
40
30
20
10
0
1
V
V
A
= 3.6V
IN
OUT
= 1.5V
1.5V High Efficiency Regulator with Automatic LDO Mode
T
= 25°C
0.1
2.2µH
EFFICIENCY
V
V
OUT
1.5V
IN
2.5V TO 5.5V
V
SW
OUT
LTC3448
MODE
IN
RUN
POWER LOSS
C
0.01
0.001
0.0001
V
OUT
4.7µF
C
IN
4.7µF
474k
316k
22pF
FREQ
SYNC
V
FB
GND
0.0001
0.001
0.01
0.1
1
3448 TA01a
23448 TA01b
LOAD CURRENT (A)
3448f
1
LTC3448
W W
U W
ABSOLUTE AXI U RATI GS (Note 1)
VOUT (LDO) Source Current .................................. 25mA
Peak SW Sink and Source Current ........................ 1.3A
Operating Temperature Range (Note 2) .. –40°C to 85°C
Junction Temperature (Notes 3, 7) ...................... 125°C
Storage Temperature Range ................ –65°C to 125°C
Lead Temperature (Soldering, 10 sec)
Input Supply Voltage .................................. –0.3V to 6V
RUN, SYNC Voltages ................... –0.3V to (VIN + 0.3V)
MODE Voltage ............................. –0.3V to (VIN + 0.3V)
FREQ, VFB Voltages...................... –0.3V to (VIN + 0.3V)
SW Voltage .................................. –0.3V to (VIN + 0.3V)
V
OUT Voltage................................ –0.3V to (VIN + 0.3V)
MSOP Only ...................................................... 300°C
P-Channel Switch Source Current (DC) ............. 800mA
N-Channel Switch Sink Current (DC) ................. 800mA
U W
U
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
ORDER PART
TOP VIEW
NUMBER
TOP VIEW
V
1
2
3
4
8
7
6
5
RUN
SYNC
FREQ
SW
FB
V
1
2
3
4
8 RUN
7 SYNC
6 FREQ
5 SW
FB
LTC3448EMS8E
LTC3448EDD
V
OUT
V
OUT
MODE
V
9
9
MODE
IN
V
IN
MS8E PACKAGE
8-LEAD PLASTIC MSOP
DD PART MARKING
LBMJ
MS8 PART MARKING
LTBMK
DD PACKAGE
TJMAX = 125°C, θJA = 40°C/ W
EXPOSED PAD (PIN 9) IS GND
MUST BE SOLDERED TO PCB
8-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 43°C/ W
EXPOSED PAD (PIN 9) IS GND
MUST BE SOLDERED TO PCB
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 3.6V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Feedback Current
●
±30
nA
VFB
V
Regulated Feedback Voltage
(Note 4)
T = 25°C
0.5880
0.5865
0.5850
0.6
0.6
0.6
0.6120
0.6135
0.6150
V
V
V
FB
A
0°C ≤ T ≤ 85°C
A
–40°C ≤ T ≤ 85°C
●
●
A
∆V
∆V
Reference Voltage Line Regulation
Output Overvoltage Lockout
V
= 2.5V to 5.5V (Note 4)
IN
0.2
0.4
%/V
FB
∆V
∆V
= V
= (V
– V
FB
15
2.5
35
5.8
55
9.2
mV
%
OVL
OVL
OVL
OVL
– V ) • 100/V
OVL
OUT
OUT
∆V
Output Voltage Line Regulation
Peak Inductor Current
V
= 2.5V to 5.5V (LDO)
0.1
1
0.8
1.3
%/V
A
OUT
IN
I
V
= 0.5V or V = 90%,
OUT
0.7
PK
FB
Duty Cycle < 35%
LDO, 1mA to 10mA
(Note 9)
V
V
V
Output Voltage Load Regulation
Maximum Output Voltage
Input Voltage Range
0.5
%/V
V
LOADREG
OUT(MAX)
IN
V
– 0.7 V – 0.3
IN
IN
●
2.5
5.5
V
3448f
2
LTC3448
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 3.6V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Input DC Bias Current
Active Mode (Pulse Skip, No LRO)
V
V
V
= 3.6V (Note 5)
S
IN
FB
FB
= 0.5V or V
= 0.5V or V
= 90%, I
= 90%, I
= 0A, 1.5MHz
= 0A, 2.25MHz
250
275
375
400
µA
µA
OUT
OUT
LOAD
LOAD
Linear Regulator Operation (LRO)
Shutdown
I
≤ I
32
43
1
µA
µA
LOAD
LDO(ON)
V
= 0V, V = 5.5V
0.1
RUN
IN
f
f
Oscillator Frequency
FREQ = Low, V = 3.6V
FREQ = High
●
●
1.2
1.8
1.5
2.25
1.8
2.7
MHz
MHz
OSC
IN
Synchronization Frequency
(Note 6)
1.5
>4
MHz
V
SYNC
V
SYNC Activation Input Threshold
1
1.3
TH(SYNC)
R
R
R
R
of P-Channel FET
of N-Channel FET
I
I
= 100mA
0.4
Ω
PFET
NFET
LSW
DS(ON)
DS(ON)
SW
SW
= –150mA
0.35
±0.01
Ω
I
SW Leakage
V
= 0V, V = 0V or 5V, V = 5V
±1
µA
V
RUN
SW
IN
V
V
RUN Threshold High
RUN Threshold Low
●
●
●
●
●
●
●
●
●
●
1.5
RUNH
RUNL
RUN
0.3
V
I
RUN Leakage Current
FREQ Threshold High
FREQ Threshold Low
FREQ Leakage Current
MODE Threshold High
MODE Threshold Low
MODE Leakage Current
SYNC Leakage Current
LRO ON Load Current Threshold
LRO OFF Load Current Threhold
±0.01
±0.01
±1
µA
V
V
V
V – 1
IN
FREQH
FREQL
FREQ
1
V
I
±1
µA
V
V
V
V – 0.15
IN
MODEH
MODEL
MODE
0.12
±1
±1
5
V
I
I
I
I
±0.1
±0.01
3
µA
µA
mA
mA
SYNC
2.2mH Inductor (Note 8)
LDO(ON)
LDO(OFF)
8
11
17
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 6: 4MHz operation is guaranteed by design but is not production
tested and is subject to duty cycle limitations.
Note 2: The LTC3448E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 7: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature is active. Continu-
ous operation above the specified maximum operating junction tempera-
ture may impair device reliability.
Note 3: T is calculated from the ambient temperature T and power
J
A
dissipation P according to the following formula:
Note 8: The load current below which the switching regulator turns off and
the LDO turns on is, to first order, inversely proportional to the value of
the inductor. This effect is covered in more detail in the Operation section.
This parameter is not production tested but is guaranteed by design.
D
T = T + (P )(43°C/W)
J
A
D
Note 4: The LTC3448 is tested in a proprietary test mode that connects
to the output of the error amplifier.
V
FB
Note 9: For 2.5V < V < 2.7V the output voltage is limited to V – 0.7V
IN
IN
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. LRO is “linear regulator operation.”
to ensure regulation in linear regulator mode. This parameter is not
production tested but is guaranteed by design.
3448f
3
LTC3448
TYPICAL PERFOR A CE CHARACTERISTICS
U W
(From Figure1a Except for the Resistive Divider Resistor Values)
Efficiency vs Load Current
Efficiency vs Load Current
Efficiency vs Input Voltage
100
95
90
85
80
75
70
65
60
55
50
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
A
= 1.8V
V
A
= 1.2V
V
= 1.5V
OUT
= 25°C
OUT
OUT
T = 25°C
A
I
= 100mA
= 600mA
OUT
T
T
= 25°C
I
= 30mA
OUT
I
OUT
V
V
V
= 2.7V
= 3.6V
= 4.2V
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
IN
IN
IN
2
3
4
5
6
0.0001
0.001
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
LOAD CURRENT (A)
LOAD CURRENT (A)
INPUT VOLTAGE (V)
23448 G02
23448 G03
3448 G01
Efficiency vs Load Current
(Switcher Only)
Oscillator Frequency
vs Temperature
Reference Voltage
vs Temperature
100
90
80
70
60
50
40
30
20
10
0
0.615
0.610
0.605
0.600
1.70
V
= 3.6V
V
= 3.6V
V
V
A
= 2.7V
= 2.5V
= 25°C
IN
IN
IN
OUT
1.65
1.60
T
1.55
1.50
1.45
1.40
1.35
0.595
0.590
0.585
1.30
50
TEMPERATURE (°C)
100 125
–25
0
50
75 100 125
–50 –25
0
25
75
–50
25
0.0001
0.001
0.01
0.1
1
LOAD CURRENT (A)
TEMPERATURE (°C)
23448 G04
3448 G05
3448 G06
Oscillator Frequency
vs Supply Voltage
RDS(ON) vs Input Voltage
Output Voltage vs Load Current
1.525
1.520
1.515
1.510
1.505
1.500
1.495
1.490
1.485
1.480
1.475
0.40
0.38
0.36
0.34
0.32
0.30
0.28
0.26
0.24
0.22
0.20
1.8
1.7
V
A
= 3.6V
T
= 25°C
IN
= 25°C
T
= 25°C
A
A
T
MAIN
SWITCH
1.6
1.5
SYNCHRONOUS
SWITCH
1.4
1.3
1.2
0.0001
0.001
0.01
0.1
1
2
3
4
5
6
4
6
2
3
5
LOAD CURRENT (A)
SUPPLY VOLTAGE (V)
INPUT VOLTAGE (V)
3448 G08
3448 G07
3448 G09
3448f
4
LTC3448
U W
TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure1a Except for the Resistive Divider Resistor Values)
Dynamic Supply Current
vs Supply Voltage
Dynamic Supply Current
vs Temperature
RDS(ON) vs Temperature
0.6
0.5
0.4
0.3
340
320
300
320
300
280
260
I
= 0A
V
I
= 3.6V
= 0A
LOAD
A
IN
LOAD
T
= 25°C
2.25MHz
280
260
240
220
200
2.25MHz
1.5MHz
0.2
0.1
0
1.5MHz
240
220
200
MAIN SWITCH
2.5V
SYNCH SWITCH
2.5V
3.6V
4.2V
3.6V
4.2V
50
0
TEMPERATURE (°C)
100 125
–50 –25
25
75
3
4
6
2
5
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
SUPPLY VOLTAGE (V)
3448 G10
3448 G11
3448 G12
Start-Up from Shutdown
Switch Leakage vs Temperature
Switch Leakage vs Input Voltage
10
1
350
300
RUN = 0V
V
= 5.5V
IN
T
= 25°C
RUN = 0V
A
MAIN
SWITCH
RUN
5V/DIV
250
200
150
100
50
V
SYNCHRONOUS
SWITCH
OUT
1V/DIV
MAIN
0.1
0.01
SWITCH
I
L
500mA/DIV
SYNCHRONOUS
SWITCH
3448 G15
V
V
LOAD
= 3.6V
40µs/DIV
IN
= 1.5V
OUT
I
= 600mA
0.001
0
0
1
2
3
4
5
6
50
100 125
–50 –25
0
25
75
INPUT VOLTAGE (V)
TEMPERATURE (°C)
3448 G14
3448 G13
Load Step
Load Step
V
V
OUT
OUT
200mV/DIV
100mV/DIV
AC COUPLED
AC COUPLED
I
LOAD
I
LOAD
250mA/DIV
100mA/DIV
I
I
L
L
500mA/DIV
500mA/DIV
3448 G16
3448 G17
V
V
= 3.6V
10µs/DIV
V
V
= 3.6V
IN
10µs/DIV
IN
= 1.5V
= 1.5V
OUT
OUT
I
= 100µA TO 200mA
= 10µF
I
= 50mA TO 600mA
LOAD
C
LOAD
C
= 10µF
OUT
OUT
3448f
5
LTC3448
U W
TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1a Except for the Resistive Divider Resistor Values)
External Mode Control (Constant
1mA Load)
Load Step
V
OUT
V
OUT
LDO
20mV/DIV
100mV/DIV
AC COUPLED
AC COUPLED
I
LOAD
MODE PIN
2V/DIV
250mA/DIV
I
L
500mA/DIV
3448 G19
3448 G18
V
T
= 1.5V
OUT
A
200µs/DIV
V
V
LOAD
= 3.6V
10µs/DIV
IN
= 25°C
= 1.5V
OUT
I
= 100mA TO 600mA
U
U
U
PI FU CTIO S
VFB (Pin 1): Feedback Pin. This pin receives the feedback
voltage from an external resistive divider across the
output.
VIN (Pin 4): Main Supply Pin. This pin must be closely
decoupled to GND with a 2.2µF or greater ceramic
capacitor.
VOUT (Pin 2): Output Pin. This pin connects to an external
resistor divider and the linear regulator output. Connect
externally to the inductor and the output capacitor. The
internal linear regulator will supply current up to the
ILDO(OFF) current.Loadcurrentsabovethataresuppliedby
thebuckregulator.Internalcircuitryautomaticallyenables
the buck switching regulator at load currents higher than
the ILDO(OFF). The minimum required capacitance on this
pin is 2µF.
SW (Pin 5): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchro-
nous power MOSFET switches.
FREQ (Pin 6): Frequency Select. Switching frequency is
set to 1.5MHz when FREQ = 0V and to 2.25MHz when
FREQ = VIN. Do not float this pin.
SYNC (Pin 7): External Synchronization Pin. The oscilla-
tion frequency can be synchronized to an external oscilla-
tor applied to this pin. For external frequencies above
2.2MHz, pull FREQ high.
MODE (Pin 3): Linear Regulator Control. Grounding this
pin turns off the linear regulator. Setting this pin to VIN
turnsonthelinearregulatorregardlessoftheloadcurrent.
Tying this pin midrange (i.e., to VOUT) will place the linear
regulator in auto mode, where turn on/off is a function of
the load current. In applications where MODE is externally
driven high or low, this pin should be held low for 50µs
after the RUN pin is pulled high.
RUN (Pin 8): Run Control Input. Forcing this pin above
1.5V enables the part. Forcing this pin below 0.3V shuts
down the device. In shutdown, all functions are disabled
drawing <1µA supply current. Do not leave RUN floating.
Exposed Pad (Pin 9): Ground. This pin must be soldered
to PCB.
3448f
6
LTC3448
U
U
W
FU CTIO AL DIAGRA
SYNC
7
MODE
3
FREQ
6
SLOPE
COMP
LDO CONTROL
LOGIC
V
IN
OSC
V
OUT
LDO
DRIVE
V
4
2
IN
–
+
+
–
5Ω
0.6V
+
–
V
I
FB
COMP
EA
1
OSC
Q
Q
S
R
V
IN
SWITCHING
LOGIC
RS LATCH
ANTI-
SHOOT-
THRU
AND
RUN
8
BLANKING
CIRCUIT
0.6V REF
SW
5
–
OVDET
+
0.6V + ∆OVL
+
–
SHUTDOWN
I
RCMP
9
GND
3448 F01
Figure 1
U
OPERATIO
(Refer to Functional Diagram)
Main Control Loop
comparator OVDET guards against transient overshoots
5.8%byturningoffthemainswitchandkeepingitoffuntil
the fault is removed.
The LTC3448 uses a constant frequency, current mode,
step-down architecture. Both the main (P-channel MOS-
FET)andsynchronous(N-channelMOSFET)switchesare
internal. During normal operation, the internal top power
MOSFET is turned on each cycle when the oscillator sets
theRSlatch, andturnedoffwhenthecurrentcomparator,
ICOMP, resets the RS latch. The peak inductor current at
which ICOMP resets the RS latch, is controlled by the
output of error amplifier EA. When the load current
increases, it causes a slight decrease in the feedback
voltage FBINT relative to the 0.6V reference, which in turn,
causes the EA amplifier’s output voltage to increase until
the average inductor current matches the new load cur-
rent. While the top MOSFET is off, the bottom MOSFET is
turned on until either the inductor current starts to re-
verse, as indicated by the current reversal comparator
IRCMP, or the beginning of the next clock cycle. The
Pulse Skipping Mode Operation
At light loads, the inductor current may reach zero or
reverse on each pulse. The bottom MOSFET is turned off
by the current reversal comparator, IRCMP, and the switch
voltage will ring. This is discontinuous mode operation,
and is normal behavior for the switching regulator. At very
light loads, the LTC3448 will automatically skip pulses to
maintain output regulation.
Low Ripple LDO Mode Operation
At load currents below ILDO(ON), and when enabled, the
LTC3448 will switch into very low ripple, linear regulating
operation(LRO). Inthismode, thecurrentissourcedfrom
3448f
7
LTC3448
U
OPERATIO
(Refer to Functional Diagram)
theVOUT pinandboththemainandsynchronousswitches
are turned off. The control loop is stabilized by the load
capacitor and requires a minimum value of 2µF. The
LTC3448 will change back to switching mode and turn off
the LDO when the load current exceeds approximately
11mA.
Some applications may be able to anticipate the transition
from high to low and low to high load currents. In these
cases it may be desirable to switch between modes by
controlling the MODE pin with a processor signal. In these
applications it is important that the MODE pin is pulled
high no earlier than 50µs after the RUN pin is pulled high.
This will ensure proper start-up of internal reference
circuitry.
When MODE is connected to an intermediate voltage level
(i.e.,VOUT),thisswitchoverisautomatic.IfMODEispulled
high to VIN, the LDO remains on and the switcher off
regardless of the load current. The LDO is capable of
providing a maximum of approximately 15mA before the
load regulation will degrade to unacceptable levels. If
MODE is pulled to GND, the switcher remains on and the
LDO off regardless of the load current.
The load current ILDO(ON) below which the switcher will
automaticallyturnoffandtheLDOturnonisindependent
of the external capacitor, and to first order, independent
ofsupplyandoutputvoltage. Thereisaninverserelation-
ship between ILDO(ON) and the value of the inductor.
These dependencies are shown in Figures 2 and 3.
Automatic operation with inductor values below 1µH is
not recommended.
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 1.2V
OUT
At the low load currents at which the switcher to linear
regulator transition occurs, the switcher is operating in
pulse skipping mode. During each switching cycle in this
mode, while the synchronous switch (bottom MOSFET) is
on, the inductor current decays until the reverse current
comparator is triggered. At this occurrence, the bottom
MOSFET is turned off. Ideally, this occurs when the
inductorcurrentispreciselyzero.Inreality,becauseofon-
chip delays, this current will be negative at higher output
voltages.
V
= 1.5V
OUT
V
= 1.8V
OUT
T
= 25°C
A
L = 2.2µH
4
(V)
2
3
5
6
V
IN
3448 F02
The internal algorithm which controls the LDO turn-on
load current level makes certain assumptions about the
amount of charge transferred to the output on each
switching cycle. These assumptions are no longer met
when the inductor current begins to reverse. This causes
theloadcurrentatwhichthetransitiontakesplacetomove
to lower levels at higher output voltages. For this reason
use of the LDO auto mode is not recommended for output
levels above 2V. For output voltages above 2V, the MODE
pin should be driven externally.
Figure 2. ILDO(ON) vs VIN, VOUT
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
V
A
= 3.6V
= 1.5V
= 25°C
IN
OUT
T
Short-Circuit Protection
When the output is shorted to ground, the main switch
cycle will be skipped, and the synchronous switch will
remain on for a longer duration. This allows the inductor
current more time to decay, thereby preventing runaway.
0
2
6
8
10
12
4
INDUCTOR VALUE (µH)
3448 F03
Figure 3. ILDO(ON) vs LOUT
3448f
8
LTC3448
U
OPERATIO
(Refer to Functional Diagram)
1200
1000
800
600
400
200
0
(see Typical Performance Characteristics). Therefore, the
user should calculate the power dissipation when the
LTC3448isusedat100%dutycyclewithlowinputvoltage
(See Thermal Considerations in the Applications Informa-
tion section).
V
V
= 1.8V
= 1.5V
OUT
V
= 2.5V
OUT
OUT
Low Supply Operation
The LTC3448 will operate with input supply voltages as
low as 2.5V, but the maximum allowable output current is
reduced at this low voltage. Figure 4 shows the reduction
in the maximum output current as a function of input
voltage for various output voltages.
2.5
3.5
4.0
4.5
5.0
5.5
3.0
SUPPLY VOLTAGE (V)
3448 F04
Figure 4. Maximum Output Current vs Input Voltage
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant fre-
quencyarchitecturesbypreventingsub-harmonicoscilla-
tions at high duty cycles. It is accomplished internally by
adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%. This normally
results in a reduction of maximum inductor peak current
for duty cycles >40%. However, the LTC3448 uses a
patent-pending scheme that counteracts this compensat-
ing ramp, which allows the maximum inductor peak
current to remain unaffected throughout all duty cycles.
Dropout Operation
Astheinputsupplyvoltagedecreasestoavalueapproach-
ing the output voltage, the duty cycle increases toward the
maximumon-time.Furtherreductionofthesupplyvoltage
forcesthemainswitchtoremainonformorethanonecycle
untilitreaches100%dutycycle.Theoutputvoltagewillthen
be determined by the input voltage minus the voltage drop
across the P-channel MOSFET and the inductor.
Animportantdetailtorememberisthatatlowinputsupply
voltages, the RDS(ON) of the P-channel switch increases
W U U
U
APPLICATIO S I FOR ATIO
The basic LTC3448 application circuit is shown on the first
page of this data sheet. External component selection is
driven by the load requirement and begins with the selec-
⎛
⎞
VOUT
V
IN
1
∆IL =
VOUT 1−
⎜
⎟
(1)
⎝
⎠
f L
( )( )
tion of L followed by CIN and COUT
.
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 720mA rated
inductorshouldbeenoughformostapplications(600mA
+ 120mA). For better efficiency, choose a low DC-resis-
tance inductor.
Inductor Selection
For most applications, the value of the inductor will fall in
the range of 1µH to 4.7µH. Its value is chosen based on the
desired ripple current. Large value inductors lower ripple
current and small value inductors result in higher ripple
currents. Higher VIN or VOUT also increases the ripple
currentasshowninequation1. Areasonablestartingpoint
for setting ripple current is ∆IL = 240mA (40% of 600mA).
If the LTC3448 is to be used in auto LDO mode, inductor
values less than 1µH should not be used.
3448f
9
LTC3448
W U U
U
APPLICATIO S I FOR ATIO
Inductor Core Selection
temperature than required. Always consult the manufac-
turer if there is any question.
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy mate-
rials are small and don’t radiate much energy, but gener-
ally cost more than powdered iron core inductors with
similarelectricalcharacteristics. Thechoiceofwhichstyle
inductor to use often depends more on the price vs size
requirements and any radiated field/EMI requirements
than on what the LTC3448 requires to operate. Table 1
shows some typical surface mount inductors that work
well in LTC3448 applications.
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR require-
ment for COUT has been met, the RMS current rating
generally far exceeds the IRIPPLE(P-P) requirement. In any
case, if LDO mode is enabled, the value of COUT must have
a minimum value of 2µF to ensure loop stability. The
output ripple ∆VOUT is determined by:
⎛
⎞
1
∆VOUT ≅ ∆IL ESR +
⎜
⎟
8fCOUT
⎝
⎠
Table 1. Representative Surface Mount Inductors
where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. For a fixed output
voltage, the output ripple is highest at maximum input
voltage since ∆IL increases with input voltage.
PART
NUMBER
VALUE
(µH)
DCR
MAX DC
SIZE
3
(Ω MAX) CURRENT (A) W × L × H (mm )
Sumida
CDRH3D16
1.5
2.2
3.3
4.7
0.043
0.075
0.110
0.162
1.55
1.20
1.10
0.90
3.8 × 3.8 × 1.8
Aluminum electrolytic and dry tantalum capacitors are
bothavailableinsurfacemountconfigurations.Inthecase
oftantalum,itiscriticalthatthecapacitorsaresurgetested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalum. These are
specially constructed and tested for low ESR so they give
the lowest ESR for a given volume. Other capacitor types
include Sanyo POSCAP, Kemet T510 and T495 series, and
Sprague 593D and 595D series. Consult the manufacturer
for other specific recommendations.
Sumida
CMD4D06
2.2
3.3
4.7
0.116
0.174
0.216
0.950
0.770
0.750
3.5 × 4.3 × 0.8
2.5 × 3.2 × 2.0
2.5 × 3.2 × 2.0
Coilcraft
ME3220
2.2
3.3
4.7
0.104
0.138
0.190
1.8
1.3
1.2
Murata
LQH3C
1.0
2.2
4.7
0.060
0.097
0.150
1.00
0.79
0.65
CIN and COUT Selection
Using Ceramic Input and Output Capacitors
In continuous mode, the source current of the top MOS-
FET is a square wave of duty cycle VOUT/VIN. To prevent
large voltage transients, a low ESR input capacitor sized
for the maximum RMS current must be used. The maxi-
mum RMS capacitor current is given by:
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. Because the
LTC3448’s control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
1/2
VOUT V − VOUT
(
IN
)
]
[
CIN required IRMS ≅ IOMAX
V
IN
However, care must be taken when ceramic capacitors are
usedattheinputandtheoutput.Whenaceramiccapacitor
is used at the input and the power is supplied by a wall
adapter through long wires, a load step at the output can
induce ringing at the input, VIN. At best, this ringing can
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is com-
monly used for design. Note that the capacitor
manufacturer’s ripple current ratings are often based on
2000hoursoflife.Thismakesitadvisabletofurtherderate
the capacitor, or choose a capacitor rated at a higher
couple to the output and be mistaken as loop instability. At
3448f
10
LTC3448
W U U
APPLICATIO S I FOR ATIO
U
worst, a sudden inrush of current through the long wires loss dominates the efficiency loss at low load currents,
can potentially cause a voltage spike at VIN, large enough whereas the I2R loss dominates the efficiency loss at
to damage the part.
medium to high load currents. At very low load currents
with the part operating in LDO mode, efficiency can be
dominated by I2R losses in the pass transistor and is a
strong function of (VIN – VOUT). In a typical efficiency plot,
the efficiency curve at very low load currents can be
misleading since the actual power lost is of little conse-
quence as illustrated in Figure 6.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
Output Voltage Programming
1
The output voltage is set by tying VFB to a resistive divider
according to the following formula:
V
= 3.6V
IN
FREQ = 0V
LDOCNTRL = V
OUT(AUTO)
0.1
0.01
⎛
⎞
R2
R1
VOUT = 0.6V 1+
(2)
⎜
⎟
⎝
⎠
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 5.
0.001
0.0001
1.2V
1.5V
1.8V
0.6V ≤ V
≤ 5.5V
OUT
0.0001
0.001
0.01
0.1
1
R2
LOAD CURRENT (A)
V
FB
3448 F06
LTC3448
R1
Figure 6. Power Loss vs Load Current
GND
3448 F05
1. The VIN quiescent current is due to two components:
the DC bias current as given in the Electrical Character-
istics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge, dQ, moves from VIN to ground. The resulting
dQ/dtisthecurrentoutofVIN thatistypicallylargerthan
the DC bias current and proportional to frequency. Both
the DC bias and gate charge losses are proportional to
VIN and thus their effects will be more pronounced at
higher supply voltages.
2. I2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor RL. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
Figure 5. Setting the LTC3448 Output Voltage
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
oftenusefultoanalyzeindividuallossestodeterminewhat
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
whereL1, L2, etc. aretheindividuallossesasapercentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3448 circuits: VIN quiescent current and I2R
losses. When in switching mode, VIN quiescent current
3448f
11
LTC3448
W U U
U
APPLICATIO S I FOR ATIO
top and bottom MOSFET RDS(ON) and the duty cycle
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to the
ambient temperature.
(DC) as follows:
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The junction temperature, TJ, is given by:
TJ = TA + TR
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteris-
tics curves. Thus, to obtain I2R losses, simply add RSW
to RL and multiply the result by the square of the
average output current.
where TA is the ambient temperature.
As an example, consider the LTC3448 in dropout at an
input voltage of 2.7V, a load current of 600mA and an
ambient temperature of 70°C. From the typical perfor-
mance graph of switch resistance, the RDS(ON) of the
P-channel switch at 70°C is approximately 0.52Ω. There-
fore, power dissipated by the part is:
3. At load currents below the selected threshold the
LTC3448 will switch into low ripple LDO mode if en-
abled. In this case the losses are due to the DC bias
currents as given in the electrical characteristics and
I2R losses due to the (VIN – VOUT) voltage drop across
the internal pass transistor.
PD = ILOAD2 • RDS(ON) = 187.2mW
For the 3mm × 3mm DFN package, the θJA is 43°C/W.
Other losses when in switching operation, including CIN
andCOUTESRdissipativelossesandinductorcorelosses,
generally account for less than 2% total additional loss.
Thus, the junction temperature of the regulator is:
TJ = 85°C + (0.1872)(43) = 93°C
which is well below the maximum junction temperature of
125°C.
Thermal Considerations
The LTC3448 requires the package backplane metal (GND
pin)tobewellsolderedtothePCboard.ThisgivestheDFN
andMSOPpackagesexceptionalthermalproperties,mak-
ing it difficult in normal operation to exceed the maximum
junction temperature of the part. In most applications the
LTC3448 does not dissipate much heat due to its high
efficiency.InapplicationswheretheLTC3448isrunningat
highambienttemperaturewithlowsupplyvoltageandhigh
duty cycles, such as in dropout, the heat dissipated may
exceed the maximum junction temperature of the part if it
isnotwellthermallygrounded. Ifthejunctiontemperature
reachesapproximately150°C,bothpowerswitcheswillbe
turned off and the SW node will become high impedance.
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance RDS(ON).
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (∆ILOAD • ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or dis-
chargeCOUT, whichgeneratesafeedbackerrorsignal. The
regulator loop then acts to return VOUT to its steady-state
value.DuringthisrecoverytimeVOUT canbemonitoredfor
overshoot or ringing that would indicate a stability prob-
lem. For a detailed explanation of switching control loop
theory, see Application Note 76.
To avoid the LTC3448 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
dischargedbypasscapacitorsareeffectivelyputinparallel
TR = PDθJA
3448f
12
LTC3448
W U U
APPLICATIO S I FOR ATIO
U
with COUT, causing a rapid drop in VOUT. No regulator can 2. Does the VFB pin connect directly to the feedback
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 • CLOAD).
Thus, a 10µF capacitor charging to 3.3V would require a
250µs rise time, limiting the charging current to about
130mA.
resistors? The resistive divider R1/R2 must be con-
nected between the (+) plate of COUT and ground.
3. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the switching node, SW, away from the sensitive
V
FB node.
PC Board Layout Checklist
5. Keepthe(–)platesofCIN andCOUT ascloseaspossible.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3448. These items are also illustrated graphically in
Figures 7 and 8. Check the following in your layout:
Design Example
As a design example, assume the LTC3448 is used in a
single lithium-ion battery-powered cellular phone
application. The VIN will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.6A but most of the time it will be in
standbymode, requiringonly2mA. Efficiencyatbothlow
1. The power traces, consisting of the GND trace, the SW
trace and the VIN trace should be kept short, direct and
wide.
L
5
2
3
4
8
V
V
V
SW
OUT
IN
OUT
IN
RUN
V
C
OUT
C
IN
MODE
LTC3448
R
FB2
R
FB1
C
FF
6
7
1
FREQ
SYNC
V
FB
GND
3448 F07
9
Figure 7. LTC3448 Layout Design
3448 F08
Figure 8. LTC3448 Layout
3448f
13
LTC3448
W U U
U
APPLICATIO S I FOR ATIO
and high load currents is important. Output voltage is
1.8V. With this information we can calculate L using
Equation (1),
CIN will require an RMS current rating of at least 0.3A ≅
ILOAD(MAX)/2 at temperature and COUT will require an ESR
of less than 0.25Ω. In most cases, a ceramic capacitor will
satisfy this requirement.
⎛
⎞
1
VOUT
V
IN
L =
VOUT 1−
For the feedback resistors, choose R1 = 316k. R2 can
then be calculated from Equation (2) to be:
⎜
⎟
(3)
⎝
⎠
f ∆IL
( )(
)
Substituting VOUT = 1.8V, VIN = 4.2V, ∆IL = 240mA and
V
0.6
⎛
⎜
⎝
⎞
⎠
OUT
R2 =
− 1 R1= 632k
⎟
f = 1.5MHz in Equation (3) gives:
Figure 9 shows the complete circuit along with its effi-
ciency curve.
1.8V
1.5MHz(240mA)
1.8V
4.2V
⎛
⎜
⎝
⎞
⎟
⎠
L =
1−
= 2.86µH
A 2.2µH inductor works well for this application. For best
efficiency choose a 720mA or greater inductor with less
than 0.2Ω series resistance.
100
V
V
A
= 3.6V
= 1.8V
= 25°C
IN
OUT
90
80
70
60
50
40
30
20
10
0
T
2.2µH*
V
IN
V
OUT
1.8V
5
2
4
8
2.7V
V
SW
OUT
LTC3448
MODE
IN
RUN
C
OUT
TO 5.5V
C
IN
V
15µF
4.7µF
CER
CER
3
1
22pF 632k
316k
6
7
FREQ
SYNC
V
FB
GND
9
3448 F09a
C
C
: TAIYO YUDEN JMK212BJ475MG
0.0001
0.001
0.01
0.1
1
IN
: TAIYO YUDEN JMK212BJ475MG
OUT
LOAD CURRENT (A)
*MURATA LQH32CN2R2M11
3448 F09b
Figure 9b
Figure 9a
V
OUT
V
OUT
100mV/DIV
100mV/DIV
AC COUPLED
AC COUPLED
I
LOAD
250mA/DIV
I
LOAD
100mA/DIV
I
I
L
L
500mA/DIV
500mA/DIV
3448 F09c
3448 F09d
V
= 3.6V
20µs/DIV
V
= 3.6V
20µs/DIV
IN
IN
V
I
= 1.8V
V
OUT
I
= 1.8V
OUT
= 100µA TO 200mA
= 50mA TO 600mA
LOAD
LOAD
Figure 9d
Figure 9c
3448f
14
LTC3448
U
TYPICAL APPLICATIO S
Single Li-Ion 1.5V/600mA Regulator for
High Efficiency and Small Footprint
Efficiency vs Output Current
100
90
80
70
60
50
40
30
20
10
0
V
A
= 1.5V
OUT
= 25°C
T
2.2µH*
V
IN
5
2
V
OUT
1.5V
4
8
2.7V
V
SW
OUT
LTC3448
MODE
IN
TO 5.5V
C
IN
C
RUN
V
OUT
4.7µF
15µF
CER
474k
216k
3
1
22pF
6
7
FREQ
SYNC
V
FB
GND
9
V
IN
V
IN
V
IN
= 2.7V
= 3.6V
= 4.2V
3448 TA03
C
C
: TAIYO YUDEN CERAMIC JMK212BJ475MG
IN
: TAIYO YUDEN CERAMIC JMK212BJ475MG
OUT
0.0001
0.001
0.01
0.1
1
*MURATA LQH32CN2R2M33
LOAD CURRENT (A)
23448 G03
Load Step
Load Step
V
OUT
V
OUT
100mV/DIV
100mV/DIV
AC COUPLED
AC COUPLED
I
LOAD
250mA/DIV
I
LOAD
100mA/DIV
I
L
I
L
500mA/DIV
500mA/DIV
3448 TA06
3448 TA05
V
= 3.6V
20µs/DIV
V
= 3.6V
20µs/DIV
IN
IN
V
I
= 1.5V
V
I
= 1.5V
OUT
OUT
= 50mA TO 600mA
= 100µA TO 200mA
LOAD
LOAD
Note: Performance data measured on the LTC3448 with external resistors
3448f
15
LTC3448
U
TYPICAL APPLICATIO S
Single Li-Ion 1.2V/600mA Regulator for
High Efficiency and Small Footprint
Efficiency vs Output Current
100
90
80
70
60
50
40
30
20
10
0
2.2µH*
V
IN
V
= 1.2V
OUT
5
2
4
8
V
OUT
2.7V
V
SW
OUT
LTC3448
MODE
IN
T
= 25°C
A
1.2V
C
OUT
TO 5.5V
C
IN
RUN
V
10µF
4.7µF
CER
CER
316k
316k
3
1
22pF
6
7
FREQ
SYNC
V
FB
GND
9
3448 TA07
C
C
: TAIYO YUDEN JMK212BJ475MG
: TAIYO YUDEN JMK212BJ475MG
*MURATA LQH32CN2R2M33
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
OUT
IN
IN
IN
0.0001
0.001
0.01
0.1
1
LOAD CURRENT (A)
23448 G02
Load Step
Load Step
V
V
OUT
OUT
100mV/DIV
100mV/DIV
AC COUPLED
AC COUPLED
I
LOAD
100mA/DIV
I
LOAD
250mA/DIV
I
L
I
L
500mA/DIV
500mA/DIV
3448 TA10
3448 TA09
V
= 3.6V
20µs/DIV
V
V
I
= 3.6V
20µs/DIV
IN
IN
V
OUT
I
= 1.2V
= 1.2V
OUT
= 50mA TO 600mA
= 100µA TO 200mA
LOAD
LOAD
3448f
16
LTC3448
U
TYPICAL APPLICATIO S
Single Li-Ion 2.5V/600mA Regulator with 1.8MHz External
Synchronization and External MODE
2.2µH
V
OUT
V
5
2
4
8
IN
2.5V
V
SW
OUT
LTC3448
IN
2.5V TO 5.5V
C
C
OUT 600mA
IN
RUN
V
4.7µF
10µF
CER
C
CER
FF
1.58M
500k
22pF
TO
3
6
7
µPROCESSOR
MODE
1
CONTROL
FREQ
SYNC
V
FB
TO 0V TO 1.3V
OR GREATER 1.8MHz
EXTERNAL CLOCK
GND
9
3448 TA12
Load Step
Load Step
V
V
OUT
OUT
100mV/DIV
100mV/DIV
AC COUPLED
AC COUPLED
LDOCNTRL
2V/DIV
LDOCNTRL
2V/DIV
I
LOAD
250mA/DIV
I
LOAD
250mA/DIV
3448 TA12c
3448 TA12b
V
V
I
= 3.6V
40µs/DIV
V
V
I
= 3.6V
40µs/DIV
IN
OUT
IN
OUT
= 2.5V
= 100µA TO 600mA
= 2.5V
= 100µA TO 300mA
LOAD
LOAD
Single Li-Ion 1.2V/600mA Regulator with 2.5MHz External Synchronization
2.2µH
V
OUT
V
5
2
4
8
IN
1.2V
V
SW
OUT
LTC3448
IN
2.5V TO 5.5V
C
C
OUT 600mA
IN
RUN
V
4.7µF
10µF
CER
C
CER
FF
316k
22pF
3
1
MODE
6
7
FREQ
SYNC
V
FB
TO 0V TO 1.3V OR
GREATER 2.5MHz
EXTERNAL CLOCK
316k
GND
9
3448 TA13
3448f
17
LTC3448
U
PACKAGE DESCRIPTIO
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
0.675 ±0.05
3.5 ±0.05
2.15 ±0.05 (2 SIDES)
1.65 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
0.38 ± 0.10
TYP
5
8
3.00 ±0.10
(4 SIDES)
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
(DD8) DFN 1203
4
1
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.38 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
3448f
18
LTC3448
U
PACKAGE DESCRIPTIO
MS8E Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1662)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.06 ± 0.102
(.081 ± .004)
1
1.83 ± 0.102
(.072 ± .004)
0.889 ± 0.127
(.035 ± .005)
2.794 ± 0.102
(.110 ± .004)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
2.083 ± 0.102
(.082 ± .004)
8
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.52
(.0205)
REF
0.65
(.0256)
BSC
0.42 ± 0.038
(.0165 ± .0015)
TYP
8
7 6 5
RECOMMENDED SOLDER PAD LAYOUT
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0.254
(.010)
0° – 6° TYP
GAUGE PLANE
1
2
3
4
0.53 ± 0.152
(.021 ± .006)
1.10
(.043)
MAX
0.86
(.034)
REF
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.127 ± 0.076
(.005 ± .003)
0.65
(.0256)
BSC
MSOP (MS8E) 0603
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3448f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LTC3448
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
90% Efficiency, V = 3.6V to 25V, V
LT1616
500mA (I ), 1.4MHz, High Efficiency Step-Down
≥ 1.25V, I = 1.9mA,
Q
OUT
IN
OUT
OUT
OUT
OUT
DC/DC Converter
I
= <1µA, ThinSOT Package
SD
LT1776
500mA (I ), 200kHz, High Efficiency Step-Down
90% Efficiency, V = 7.4V to 40V, V
I
≥ 1.24V, I = 3.2mA,
Q
OUT
IN
DC/DC Converter
= 30µA, N8, S8 Packages
SD
LTC1877
600mA (I ), 550kHz, Synchronous Step-Down
95% Efficiency, V = 2.7V to 10V, V
I
≥ 0.8V, I = 10µA,
Q
OUT
IN
DC/DC Converter
= <1µA, MS8 Package
SD
LTC1879
1.2A (I ), 550kHz, Synchronous Step-Down
95% Efficiency, V = 2.7V to 10V, V
I
≥ 0.8V, I = 15µA,
OUT
IN
Q
DC/DC Converter
= <1µA, TSSOP-16 Package
SD
LTC3403
600mA (I ), 1.5MHz, Synchronous Step-Down
DC/DC Converter with Bypass Transistor
96% Efficiency, V = 2.5V to 5.5V, V
I = 20µA, I = <1µA, DFN Package
Q SD
= Dynamically Adjustable,
OUT
IN
OUT
OUT
OUT
OUT
OUT
LTC3405/LTC3405A
LTC3406
300mA (I ), 1.5MHz, Synchronous Step-Down
96% Efficiency, V = 2.5V to 5.5V, V
≥ 0.8V, I = 20µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, ThinSOT Package
SD
600mA (I ), 1.5MHz, Synchronous Step-Down
96% Efficiency, V = 2.5V to 5.5V, V
≥ 0.6V, I = 20µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, ThinSOT Package
SD
LTC3406B-2
LTC3407/LTC3407-2
LTC3409
600mA (I ), 2.25MHz, Synchronous Step-Down
96% Efficiency, V = 2.5V to 5.5V, V
≥ 0.6V, I = 300µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, ThinSOT Package
SD
Dual 600mA/800mA (I ), 1.5MHz/2.25MHz,
96% Efficiency, V = 2.5V to 5.5V, V
≥ 0.6V, I = 40µA,
Q
OUT
IN
Synchronous Step-Down DC/DC Converter
I
= <1µA, MS10, DFN Packages
SD
600mA Low V Buck Regulator
95% Efficiency, V = 1.6V to 5.5V, I = 65µA
IN
IN
Q
I
= <1µA, DFN Package
SD
LTC3411
1.25A (I ), 4MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, V = 2.5V to 5.5V, V
≥ 0.8V, I = 60µA,
Q
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
I
= <1µA, MS Package
SD
LTC3412
2.5A (I ), 4MHz, Synchronous Step-Down
95% Efficiency, V = 2.5V to 5.5V, V
≥ 0.8V, I = 60µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, TSSOP-16E Package
SD
LTC3440
600mA (I ), 2MHz, Synchronous Buck-Boost
95% Efficiency, V = 2.5V to 5.5V, V
≥ 2.5V, I = 25µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, MS Package
SD
LTC3441
1.2A (I ), 1MHz, Synchronous Buck-Boost
95% Efficiency, V = 2.4V to 5.5V, V
≥ 2.4V to 5.25V, I = 25µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, DFN Package
SD
LTC3442
1.2A (I ), 2MHz, Synchronous Buck-Boost
95% Efficiency, V = 2.4V to 5.5V, V
≥ 2.4V to 5.25V, I = 35µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, DFN Package
SD
LTC3443
1.2A (I ), 600kHz, Synchronous Buck-Boost
95% Efficiency, V = 2.4V to 5.5V, V
≥ 2.4V to 5.25V, I = 28µA,
OUT
IN
Q
DC/DC Converter
I
= <1µA, DFN Package
SD
3448f
LT/TP 0505 500 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005
相关型号：
LTC3448EDD#PBF
LTC3448 - 1.5MHz/2.25MHz, 600mA Synchronous Step-Down Regulator with LDO Mode; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LTC3448EDD#TR
LTC3448 - 1.5MHz/2.25MHz, 600mA Synchronous Step-Down Regulator with LDO Mode; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LTC3448EDD#TRPBF
LTC3448 - 1.5MHz/2.25MHz, 600mA Synchronous Step-Down Regulator with LDO Mode; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LTC3448EMS8E#PBF
LTC3448 - 1.5MHz/2.25MHz, 600mA Synchronous Step-Down Regulator with LDO Mode; Package: MSOP; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LTC3448EMS8E#TR
LTC3448 - 1.5MHz/2.25MHz, 600mA Synchronous Step-Down Regulator with LDO Mode; Package: MSOP; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LTC3450EUD#TR
LTC3450 - Triple Output Power Supply for Small TFT-LCD Displays; Package: QFN; Pins: 16; Temperature Range: -40°C to 85°C
Linear
LTC3450EUD#TRPBF
LTC3450 - Triple Output Power Supply for Small TFT-LCD Displays; Package: QFN; Pins: 16; Temperature Range: -40°C to 85°C
Linear
©2020 ICPDF网 联系我们和版权申明