LTC3526EDC-2-PBF [Linear]
500mA 2MHz Synchronous Step-Up DC/DC Converters in 2mm × 2mm DFN; 500毫安为2MHz同步升压型DC / DC转换器，采用2mm × 2mm DFN封装
| 型号： | LTC3526EDC-2-PBF |
| 厂家： | 
Linear |
| 描述： | 500mA 2MHz Synchronous Step-Up DC/DC Converters in 2mm × 2mm DFN |
| 文件： | 总16页 (文件大小：259K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3526-2/LTC3526B-2
500mA 2MHz Synchronous
Step-Up DC/DC Converters
in 2mm × 2mm DFN
FEATURES
DESCRIPTION
The LTC®3526-2/LTC3526B-2 are synchronous, fixed
frequency step-up DC/DC converters with output discon-
nect. Synchronous rectification enables high efficiency
in the low profile 2mm × 2mm DFN package. Battery life
in single AA/AAA powered products is extended further
with an 850mV start-up voltage and operation down to
500mV once started.
n
Delivers 3.3V at 100mA from a Single Alkaline/
NiMH Cell or 3.3V at 200mA from Two Cells
IN
n
V Start-Up Voltage: 850mV
n
n
n
n
n
n
n
n
n
V Operating Range: 0.5V to 5V
IN
1.6V to 5.25V V
Range
OUT
Up to 94% Efficiency
Output Disconnect
2MHz Fixed Frequency Operation
A switching frequency of 2MHz minimizes solution foot-
print by allowing the use of tiny, low profile inductors
and ceramic capacitors. The current mode PWM design
is internally compensated, reducing external parts count.
TheLTC3526-2featuresBurstModeoperationatlightload
conditions, while the LTC3526B-2 features continuous
switching. Anti-ring circuitry eliminates EMI concerns by
damping the inductor in discontinuous mode. Additional
features include a low shutdown current of under 1μA and
thermal shutdown.
V > V
Operation
IN
OUT
Integrated Soft-Start
Current Mode Control with Internal Compensation
Burst Mode® Operation with 9μA Quiescent Current
(LTC3526-2)
n
n
n
n
n
Low Noise PWM Operation (LTC3526B-2)
Internal Synchronous Rectifier
Logic Controlled Shutdown (I < 1μA)
Q
Anti-Ringing Control
Low Profile (2mm × 2mm × 0.75mm) DFN-6 Package
The LTC3526-2/LTC3526B-2 are housed in a 6-pin
2mm × 2mm × 0.75mm DFN package.
APPLICATIONS
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst Mode
is a trademark of Linear Technology Corporation. All other trademarks are the property of their
respective owners. Patents pending.
n
Medical Instruments
n
Flash-Based MP3 Players
n
Noise Canceling Headphones
Wireless Mice
Bluetooth Headsets
n
n
TYPICAL APPLICATION
LTC3526-2 Efficiency and Power Loss vs Load Current
100
1000
100
10
2.2μH
V
= 2.4V
IN
90
EFFICIENCY
80
SW
V
OUT
70
V
IN
3.3V
V
IN
V
OUT
1.6V TO 3.2V
60
50
200mA
1μF
LTC3526-2
SHDN FB
GND
1.78M
1M
POWER LOSS
OFF ON
4.7μF
40
30
20
10
0
1
35262b2fA01a
0.1
0.01
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
35262b2f TA01b
35262b2fa
1
LTC3526-2/LTC3526B-2
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
V Voltage................................................... –0.3V to 6V
IN
SW Voltage
SW
1
2
3
6
5
4
V
OUT
DC............................................................ –0.3V to 6V
Pulsed <100ns......................................... –0.3V to 7V
SHDN, FB Voltage ........................................ –0.3V to 6V
GND
7
FB
V
IN
SHDN
V
OUT
............................................................. –0.3V to 6V
DC PACKAGE
6-LEAD (2mm × 2mm) PLASTIC DFN
= 125°C, θ = 60°C/W (NOTE 6)
JA
EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PC BOARD
Operating Temperature Range (Note 2).... –40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
T
JMAX
ORDER INFORMATION
LEAD FREE FINISH
LTC3526EDC-2#PBF
LTC3526BEDC-2#PBF
TAPE AND REEL
PART MARKING
LCNM
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3526EDC-2#TRPBF
LTC3526BEDC-2#TRPBF
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 85°C
–40°C to 85°C
LCNP
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
temperature range of –40°C to 85°C, otherwise specifications are at TA = 25°C. VIN = 1.2V, VOUT = 3.3V unless otherwise noted.
PARAMETER
CONDITIONS
= 1mA
MIN
TYP
MAX
UNITS
Minimum Start-Up Input Voltage
Output Voltage Adjust Range
I
0.85
1
V
LOAD
l
l
1.7
1.6
5.25
5.25
V
V
0°C to 85°C
Feedback Pin Voltage
1.165
1.195
1
1.225
50
V
nA
μA
μA
μA
μA
μA
Ω
Feedback Pin Input Current
V
V
= 1.30V
FB
Quiescent Current—Shutdown
Quiescent Current—Active
= 0V, Not Including Switch Leakage, V
= 0V
0.01
250
9
1
SHDN
OUT
Measured on V , Nonswitching
500
18
OUT
Quiescent Current—Burst
Measured on V , FB > 1.230V (LTC3526-2 Only)
OUT
N-Channel MOSFET Switch Leakage Current
P-Channel MOSFET Switch Leakage Current
N-Channel MOSFET Switch On Resistance
P-Channel MOSFET Switch On Resistance
N-Channel MOSFET Current Limit
Current Limit Delay to Output
Maximum Duty Cycle
V
V
V
V
= 5V
0.1
0.1
0.4
0.6
700
60
5
SW
= 5V, V
= 0V
10
SW
OUT
= 3.3V
= 3.3V
OUT
OUT
Ω
l
500
85
mA
ns
%
(Note 3)
l
l
l
V
FB
V
FB
= 1.15V, V
= 1.3V
= 5V
OUT
90
Minimum Duty Cycle
0
%
Switching Frequency
1.8
0.9
2
2.4
MHz
V
SHDN Pin Input High Voltage
SHDN Pin Input Low Voltage
SHDN Pin Input Current
0.3
V
V
SHDN
V
SHDN
= 1.2V
= 3.3V
0.3
1
1
2
μA
μA
35262b2fa
2
LTC3526-2/LTC3526B-2
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: Current measurements are made when the output is not switching.
Note 5: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
Note 6: Failure to solder the exposed backside of the package to the PC
board ground plane will result in a thermal resistance much higher than
60°C/W.
Note 2: The LTC3526E-2 is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: Specification is guaranteed by design and not 100% tested in
production.
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current and VIN
for VOUT = 1.8V (LTC3526-2)
Efficiency vs Load Current and VIN
for VOUT = 3.3V (LTC3526-2)
No-Load Input Current vs VIN
100
90
80
70
60
50
40
30
20
10
100
90
1000
100
10
100
90
1000
100
10
80
80
V = 5V
OUT
V
V
V
= 1.2V
= 2.4V
= 3.0V
IN
IN
IN
70
70
V
V
V
= 1.0V
= 1.2V
= 1.5V
IN
IN
IN
V
= 3.3V
OUT
V
60
50
60
50
= 2.5V
OUT
V
= 1.8V
40
30
20
10
0
1
40
30
20
10
0
1
OUT
PLOSS AT V = 1.2V
IN
0.1
0.01
0.1
0.01
PLOSS AT V = 1.0V
PLOSS AT V = 2.4V
IN
IN
PLOSS AT V = 1.2V
PLOSS AT V = 3.0V
IN
IN
PLOSS AT V = 1.5V
IN
2.5 3.0
(V)
0.5 1.0 1.5 2.0
3.5 4.0 4.5
0.01
0.1
1
10
100
1000
0.01
0.1
1
10
100
1000
V
IN
LOAD CURRENT (mA)
LOAD CURRENT (mA)
35262b2f G04
35262b2f G02
35262b2f G01
Minimum Load Resistance
During Start-Up vs VIN
Efficiency vs Load Current and VIN
for VOUT = 5V (LTC3526-2)
Maximum Output Current vs VIN
100
90
1000
100
10
400
350
300
250
200
150
100
50
1000
100
10
V
= 3.3V
OUT
V
= 2.5V
OUT
80
V
= 1.8V
OUT
70
60
50
V
V
V
V
= 1.2V
= 2.4V
= 3.6V
= 4.2V
IN
IN
IN
IN
V
= 5V
OUT
40
30
20
10
0
1
PLOSS AT V = 1.2V
IN
0.1
0.01
PLOSS AT V = 2.4V
IN
PLOSS AT V = 3.6V
IN
PLOSS AT V = 4.2V
IN
L = 2.2μH
0
2.5 3.0
0.5 1.0 1.5 2.0
3.5 4.0 4.5
0.01
0.1
1
10
100
1000
0.85
0.95
1.05
(V)
1.25
1.15
V
(V)
IN
LOAD CURRENT (mA)
V
IN
35262b2f
35262b2f G05
35262b2f
35262b2fa
3
LTC3526-2/LTC3526B-2
TYPICAL PERFORMANCE CHARACTERISTICS
Burst Mode Threshold Current
Burst Mode Threshold Current
vs VIN
Start-Up Delay Time vs VIN
vs VIN
40
35
30
25
30
25
100
90
80
70
60
50
40
30
20
10
0
V
C
= 2.5V
V
C
= 1.8V
OUT
OUT
OUT
OUT
= 10μF
= 10μF
L = 2.2μH
L = 2.2μH
20
15
LEAVE BURST
LEAVE BURST
ENTER BURST
20
15
10
5
ENTER BURST
10
5
0
0
1.25
1.5
1
1.75
1
1.25
(V)
1.5
1.0
2.0 2.5 3.0
(V)
3.5 4.0 4.5
1.5
V
(V)
V
V
IN
IN
IN
35262b2f
35262b2f G08a
35262b2f
Oscillator Frequency Change
vs VOUT
Burst Mode Threshold Current
vs VIN
Burst Mode Threshold Current
vs VIN
60
2
50
45
40
35
30
25
20
15
10
5
V
C
= 5V
= 10μF
NORMALIZED TO 3.3V
V
C
= 3.3V
= 10μF
OUT
OUT
OUT
OUT
1
0
50 L = 2.2μH
L = 2.2μH
40
LEAVE BURST
–1
–2
–3
–4
–5
LEAVE BURST
30
20
10
0
ENTER BURST
2.0 2.5
ENTER BURST
–6
0
3.0
(V)
4.0
4.5
2.0
2.5
3.5 4.0 4.5 5.0
1.0 1.5
3.5
1.5
3.0
V
1.0
1.5
2.0
(V)
2.5
3.0
V
(V)
V
IN
OUT
IN
35262b2f G08d
35262b2f
35262b2f
Oscillator Frequency Change
vs Temperature
RDS(ON) vs VOUT
RDS(ON) Change vs Temperature
1.3
1.2
1.1
1.0
0.9
0.8
0.7
10
8
0.90
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
NORMALIZED TO 25˚C
NORMALIZED TO 25˚C
6
4
2
PMOS
NMOS
0
–2
–4
–6
–8
–10
–50 –30 –10 10
30
50
70
90
–50 –30 –10 10
30
50
70
90
1.5
2.5 3.0 3.5
(V)
4.0 4.5 5.0
2.0
TEMPERATURE (˚C)
TEMPERATURE (˚C)
V
OUT
35262b2f G12
35262b2f G11
35262b2f
35262b2fa
4
LTC3526-2/LTC3526B-2
TYPICAL PERFORMANCE CHARACTERISTICS
Burst Mode Quiescent Current
vs VOUT
VFB vs Temperature
Start-Up Voltage vs Temperature
10.0
9.5
9.0
8.5
8.0
7.5
7.0
1.00
0.95
0.90
0.85
0.80
0.75
0.70
0.50
0.25
LOAD = 1mA
NORMALIZED TO 25˚C
0
–0.25
–0.50
–0.75
–1.00
3.5
(V)
5.0
1.5 2.0 2.5 3.0
V
4.0 4.5
–50 –30 –10 10
30 –50 70
90
40 60
TEMPERATURE (˚C)
–60 –40 –20
0
20
80 100
TEMPERATURE (°C)
OUT
35262b2f
35262b2f G14
35262b2f
Fixed Frequency Switching
Waveform and VOUT Ripple
VOUT and IIN During Soft-Start
Burst Mode Waveforms
V
OUT
1V/DIV
SW PIN
2V/DIV
SW PIN
2V/DIV
INPUT
CURRENT
0.2A/DIV
SHDN PIN
1V/DIV
V
OUT
10mV/DIV
V
OUT
AC COUPLED
50mV/DIV
AC COUPLED
35262b2f
V
C
= 3.3V
= 10μF
200μs/DIV
OUT
OUT
35262b2f
35262b2
200ns/DIV
20μs/DIV
= 3.3V AT 5mA
V
V
C
= 1.2V
V
V
C
= 1.2V
IN
IN
= 3.3V AT 50mA
OUT
OUT
OUT
OUT
= 10μF
= 4.7μF
Load Step Response (from Burst
Mode Operation)
Load Step Response
(Fixed Frequency)
V
V
OUT
OUT
100mV/DIV
100mV/DIV
AC COUPLED
AC COUPLED
LOAD
CURRENT
50mA/DIV
LOAD
CURRENT
50mA/DIV
35262b2f
35262b2f
V
V
= 3.6V
= 5V
100μs/DIV
V
V
= 3.6V
= 5V
100μs/DIV
IN
OUT
IN
OUT
20mA TO 170mA STEP
= 10μF
50mA TO 150mA STEP
= 10μF
C
C
OUT
OUT
35262b2fa
5
LTC3526-2/LTC3526B-2
TYPICAL PERFORMANCE CHARACTERISTICS
Load Step Response
(Fixed Frequency)
Load Step Response (from Burst
Mode Operation)
V
OUT
V
OUT
100mV/DIV
100mV/DIV
AC COUPLED
AC COUPLED
LOAD
CURRENT
50mA/DIV
LOAD
CURRENT
50mA/DIV
35262b2f
35262b2f
V
V
= 1.2V
100μs/DIV
V
V
= 1.2V
50μs/DIV
IN
OUT
IN
OUT
= 3.3V
= 3.3V
50mA TO 100mA STEP
= 10μF
5mA TO 100mA STEP
= 10μF
C
C
OUT
OUT
PIN FUNCTIONS
SW(Pin1):SwitchPin.ConnectinductorbetweenSWand
nect resistor divider tap to this pin. The top of the divider
connects to the output capacitor, the bottom of the divider
connectstoGND.ReferringtotheBlockDiagram,theoutput
voltage can be adjusted from 1.6V to 5.25V by:
V . Keep PCB trace lengths as short and wide as possible
IN
to reduce EMI. If the inductor current falls to zero or SHDN
is low, an internal anti-ringing switch is connected from
SW to V to minimize EMI.
IN
R2
R1
ꢀ
ꢁ
ꢃ
ꢄ
VOUT =1.195V • 1+
GND (Pin 2): Signal and Power Ground. Provide a short
direct PCB path between GND and the (–) side of the input
and output capacitors.
ꢂ
ꢅ
V
(Pin6):Outputvoltagesenseanddrainoftheinternal
OUT
synchronous rectifier. PCB trace from V
to the output
V (Pin 3): Input Supply Pin. Connect a minimum of 1μF
OUT
IN
filter capacitor (4.7μF minimum) should be as short and
wide as possible.
ceramic decoupling capacitor from this pin to ground
using short direct PCB traces.
Exposed Pad (Pin 7): The Exposed Pad must be soldered
to the PCB ground plane. It serves as an additional ground
connection and as a means of conducting heat away from
the package.
SHDN (Pin 4): Logic Controlled Shutdown Input. There
is an internal 4MΩ pull-down on this pin.
• SHDN = High: Normal operation
• SHDN = Low: Shutdown, quiescent current < 1μA
FB (Pin 5): Feedback Input to the g Error Amplifier. Con-
m
35262b2fa
6
LTC3526-2/LTC3526B-2
BLOCK DIAGRAM
L1
2.2μH
V
IN
0.85V
TO 5V
C
IN
2.2μF
3
1
V
IN
SW
V
OUT
V
SEL
WELL
SWITCH
V
BEST
V
B
V
OUT
V
OUT
1.6V
6
5
ANTI-RING
TO 5.25V
GATE DRIVERS
AND
R2
R1
ANTI-CROSS
CONDUCTION
FB
SHDN
4M
C
OUT
SHUTDOWN
1.195V
4
SHUTDOWN
+
–
4.7μF
I
ZERO
COMP
Σ
SLOPE
COMP
I
PK
COMP
V
REF
–
+
I
PK
UVLO
ERROR AMP
SLEEP COMP
I
ZERO
START-UP
V
+
–
REF
LOGIC
MODE
CLK
TSD
CONTROL
2MHz
OSC
CLAMP
WAKE
THERMAL
SHUTDOWN
C
SS
EXPOSED
PAD
GND
2
7
35262b2f
35262b2fa
7
LTC3526-2/LTC3526B-2
OPERATION
(Refer to Block Diagram)
TheLTC3526-2/LTC3526B-2are2MHzsynchronousboost
converters housed in a 6-lead 2mm × 2mm DFN package.
With the ability to start up and operate from inputs less
than 1V, these devices feature fixed frequency, current
mode PWM control for exceptional line and load regula-
tion. The current mode architecture with adaptive slope
compensation provides excellent transient load response,
requiring minimal output filtering. Internal soft-start and
internal loop compensation simplifies the design process
while minimizing the number of external components.
rampsthepeakinductorcurrentfromzerotoitspeakvalue
of700mA(typical)inapproximately0.5ms,allowingstart-
up into heavy loads. The soft-start circuitry is reset in the
event of a shutdown command or a thermal shutdown.
Oscillator
An internal oscillator sets the switching frequency to
2MHz.
Shutdown
With its low R
and low gate charge internal N-chan-
DS(ON)
Shutdown is accomplished by pulling the SHDN pin
below 0.3V and enabled by pulling the SHDN pin above
nel MOSFET switch and P-channel MOSFET synchronous
rectifier,theLTC3526-2achieveshighefficiencyoverawide
range of load currents. Automatic Burst Mode operation
maintains high efficiency at very light loads, reducing
the quiescent current to just 9μA. Operation can be best
understood by referring to the Block Diagram.
0.8V typical. Note that SHDN can be driven above V
IN
or V , as long as it is limited to less than the absolute
OUT
maximum rating.
Error Amplifier
The positive input of the transconductance error amplifier
is internally connected to the 1.195V reference and the
negative input is connected to FB. Clamps limit the mini-
mumandmaximumerrorampoutputvoltageforimproved
large-signal transient response. Power converter control
loop compensation is provided internally. An external
LOW VOLTAGE START-UP
TheLTC3526-2/LTC3526B-2includeanindependentstart-
up oscillator designed to start up at an input voltage of
0.85V (typical). Soft-start and inrush current limiting are
provided during start-up, as well as normal mode.
resistive voltage divider from V
to ground programs
OUT
When either V or V
exceeds 1.4V typical, the IC
IN
OUT
the output voltage via FB from 1.6V to 5.25V.
enters normal operating mode. When the output voltage
exceeds the input by 0.24V, the IC powers itself from
R2
R1
ꢀ
ꢁ
ꢃ
ꢄ
VOUT =1.195V • 1+
V
instead of V . At this point the internal circuitry has
IN
ꢂ
ꢅ
OUT
no dependency on the V input voltage, eliminating the
IN
requirement for a large input capacitor. The input voltage
can drop as low as 0.5V. The limiting factor for the ap-
plication becomes the availability of the power source to
supply sufficient energy to the output at low voltages, and
maximum duty cycle, which is clamped at 90% typical.
Note that at low input voltages, small voltage drops due
to series resistance become critical, and greatly limit the
power delivery capability of the converter.
Current Sensing
Losslesscurrentsensingconvertsthepeakcurrentsignalof
theN-channelMOSFETswitchintoavoltagethatissummed
with the internal slope compensation. The summed signal
is compared to the error amplifier output to provide a peak
current control command for the PWM.
Current Limit
The current limit comparator shuts off the N-channel
MOSFET switch once its threshold is reached. The cur-
rent limit comparator delay to output is typically 60ns.
Peak switch current is limited to approximately 700mA,
LOW NOISE FIXED FREQUENCY OPERATION
Soft-Start
The LTC3526-2/LTC3526B-2 contain internal circuitry to
providesoft-startoperation.Thesoft-startcircuitryslowly
independent of input or output voltage, unless V
falls
OUT
below 0.7V, in which case the current limit is cut in half.
35262b2fa
8
LTC3526-2/LTC3526B-2
OPERATION
Zero Current Comparator
(Refer to Block Diagram)
Burst Mode OPERATION
The zero current comparator monitors the inductor cur-
rent to the output and shuts off the synchronous rectifier
when this current reduces to approximately 30mA. This
prevents the inductor current from reversing in polarity,
improving efficiency at light loads.
TheLTC3526-2willautomaticallyenterBurstModeopera-
tion at light load and return to fixed frequency PWM mode
when the load increases. Refer to the Typical Performance
Characteristics to see the output load Burst Mode thresh-
old current vs V . The load current at which Burst Mode
IN
operation is entered can be changed by adjusting the
inductor value. Raising the inductor value will lower the
load current at which Burst Mode operation is entered.
Synchronous Rectifier
To control inrush current and to prevent the inductor
current from running away when V
is close to V , the
In Burst Mode operation, the LTC3526-2 still switches at
a fixed frequency of 2MHz, using the same error amplifier
and loop compensation for peak current mode control.
This control method eliminates any output transient when
switching between modes. In Burst Mode operation, en-
ergy is delivered to the output until it reaches the nominal
regulation value, then the LTC3526-2 transitions to sleep
mode where the outputs are off and the LTC3526-2 con-
OUT
IN
P-channel MOSFET synchronous rectifier is only enabled
when V > (V + 0.24V).
OUT
IN
Anti-Ringing Control
The anti-ringing control connects a resistor across the
inductor to prevent high frequency ringing on the SW pin
during discontinuous current mode operation. Although
sumes only 9μA of quiescent current from V . When the
the ringing of the resonant circuit formed by L and C
OUT
SW
output voltage droops slightly, switching resumes. This
maximizes efficiency at very light loads by minimizing
switchingandquiescentlosses.BurstModeoutputvoltage
ripple, which is typically 1% peak-to-peak, can be reduced
by using more output capacitance (10μF or greater), or
with a small capacitor (10pF to 50pF) connected between
(capacitance on SW pin) is low energy, it can cause EMI
radiation.
Output Disconnect
The LTC3526-2/LTC3526B-2 are designed to allow true
output disconnect by eliminating body diode conduction
of the internal P-channel MOSFET rectifier. This allows for
V
OUT
and FB.
V
OUT
to go to zero volts during shutdown, drawing no cur-
Astheloadcurrentincreases,theLTC3526-2willautomati-
cally leave Burst Mode operation. Note that larger output
capacitorvaluesmaycausethistransitiontooccuratlighter
loads. Once the LTC3526-2 has left Burst Mode operation
and returned to normal operation, it will remain there until
the output load is reduced below the burst threshold.
rentfromtheinputsource. Italsoallowsforinrushcurrent
limiting at turn-on, minimizing surge currents seen by the
input supply. Note that to obtain the advantages of output
disconnect, there must not be an external Schottky diode
connected between the SW pin and V . The output dis-
OUT
connectfeaturealsoallowsV
tobepulledhigh,without
any reverse current into a battery connected to V .
OUT
BurstModeoperationisinhibitedduringstart-upandsoft-
IN
start and until V
is at least 0.24V greater than V .
OUT
IN
Thermal Shutdown
The LTC3526B-2 features continuous PWM operation at
2MHz. At very light loads, the LTC3526B-2 will exhibit
pulse-skip operation.
If the die temperature exceeds 160°C, the LTC3526-2/
LTC3526B-2 will go into thermal shutdown. All switches
will be off and the soft-start capacitor will be discharged.
The device will be enabled again when the die temperature
drops by about 15°C.
35262b2fa
9
LTC3526-2/LTC3526B-2
APPLICATIONS INFORMATION
V > V
OPERATION
COMPONENT SELECTION
Inductor Selection
IN
OUT
The LTC3526-2/LTC3526B-2 will maintain voltage regula-
tionevenwhentheinputvoltageisabovethedesiredoutput
voltage.Notethattheefficiencyismuchlowerinthismode,
and the maximum output current capability will be less.
Refer to the Typical Performance Characteristics.
The LTC3526-2/LTC3526B-2 can utilize small surface
mount chip inductors due to their fast 2MHz switching
frequency. Inductor values between 1.5μH and 3.3μH are
suitableformostapplications.Largervaluesofinductance
will allow slightly greater output current capability (and
lower the Burst Mode threshold) by reducing the inductor
ripple current. Increasing the inductance above 10μH will
increase size while providing little improvement in output
current capability.
SHORT-CIRCUIT PROTECTION
The LTC3526-2/LTC3526B-2 output disconnect feature
allows output short circuit while maintaining a maximum
internally set current limit. To reduce power dissipation
under short-circuit conditions, the peak switch current
limit is reduced to 400mA (typical).
The minimum inductance value is given by:
V
• VOUT(MAX) ꢀ V
(
)
IN(MIN)
IN(MIN)
SCHOTTKY DIODE
L >
2 •RIPPLE • VOUT(MAX)
Although it is not required, adding a Schottky diode from
where:
SW to V
will improve efficiency by about 2%. Note
OUT
Ripple = Allowable inductor current ripple (amps peak-
peak)
that this defeats the output disconnect and short-circuit
protection features.
V
V
= Minimum input voltage
IN(MIN)
PCB LAYOUT GUIDELINES
= Maximum output voltage
OUT(MAX)
The high speed operation of the LTC3526-2/LTC3526B-2
demands careful attention to board layout. A careless
layout will result in reduced performance. Figure 1 shows
the recommended component placement. A large ground
pin copper area will help to lower the die temperature. A
multilayer board with a separate ground plane is ideal, but
not absolutely necessary.
The inductor current ripple is typically set for 20% to
40% of the maximum inductor current. High frequency
ferrite core inductor materials reduce frequency depen-
dent power losses compared to cheaper powdered iron
types, improving efficiency. The inductor should have
low ESR (series resistance of the windings) to reduce the
I2R power losses, and must be able to support the peak
LTC3526-2
SW
V
OUT
1
2
3
6
5
4
MINIMIZE
TRACE ON FB
AND SW
GND
FB
V
SHDN
IN
+
V
IN
MULTIPLE VIAS
TO GROUND PLANE
35262b2f
Figure 1. Recommended Component Placement for Single Layer Board
35262b2fa
10
LTC3526-2/LTC3526B-2
APPLICATIONS INFORMATION
inductor current without saturating. Molded chokes and
some chip inductors usually do not have enough core
area to support the peak inductor currents of 700mA
seenontheLTC3526-2/LTC3526B-2.Tominimizeradiated
noise, use a shielded inductor. See Table 1 for suggested
components and suppliers.
Output and Input Capacitor Selection
Low ESR (equivalent series resistance) capacitors should
be used to minimize the output voltage ripple. Multilayer
ceramic capacitors are an excellent choice as they have
extremely low ESR and are available in small footprints.
A 4.7μF to 10μF output capacitor is sufficient for most
applications. Larger values up to 22μF may be used to
obtain extremely low output voltage ripple and improve
transient response. X5R and X7R dielectric materials are
preferred for their ability to maintain capacitance over
wide voltage and temperature ranges. Y5V types should
not be used.
Table 1. Recommended Inductors
VENDOR
PART/STYLE
Coilcraft
(847) 639-6400
www.coilcraft.com
LPO4815
LPS4012, LPS4018
MSS5131
MSS4020
MOS6020
ME3220
DS1605, DO1608
The internal loop compensation of the LTC3526-2 is de-
signedtobestablewithoutputcapacitorvaluesof4.7μFor
greater (without the need for any external series resistor).
Although ceramic capacitors are recommended, low ESR
tantalum capacitors may be used as well.
Coiltronics
www.cooperet.com
SD10, SD12, SD14, SD18, SD20,
SD52, SD3114, SD3118
FDK
(408) 432-8331
www.fdk.com
MIP3226D4R7M, MIP3226D3R3M
MIPF2520D4R7
MIPWT3226D3R0
Murata
LQH43C
Asmallceramiccapacitorinparallelwithalargertantalum
capacitormaybeusedindemandingapplicationsthathave
large load transients. Another method of improving the
transientresponseistoaddasmallfeed-forwardcapacitor
(714) 852-2001
www.murata.com
LQH32C (-53 series)
301015
Sumida
(847) 956-0666
www.sumida.com
CDRH5D18
CDRH2D14
CDRH3D16
across the top resistor of the feedback divider (from V
to FB). A typical value of 22pF will generally suffice.
OUT
CDRH3D11
CR43
CMD4D06-4R7MC
CMD4D06-3R3MC
Low ESR input capacitors reduce input switching noise
and reduce the peak current drawn from the battery. It
follows that ceramic capacitors are also a good choice
for input decoupling and should be located as close as
possible to the device. A 2.2μF input capacitor is sufficient
for most applications, although larger values may be
used without limitations. Table 2 shows a list of several
ceramiccapacitormanufacturers.Consultthemanufactur-
ers directly for detailed information on their selection of
ceramic capacitors.
Taiyo-Yuden
www.t-yuden.com
NP03SB
NR3015T
NR3012T
TDK
VLP
VLF, VLCF
(847) 803-6100
www.component.tdk.com
Toko
(408) 432-8282
www.tokoam.com
D412C
D518LC
D52LC
D62LCB
Wurth
(201) 785-8800
www.we-online.com
WE-TPC type S, M
Table 2. Capacitor Vendor Information
SUPPLIER
AVX
PHONE
WEBSITE
(803) 448-9411
(714) 852-2001
(408) 573-4150
(847) 803-6100
(408) 544-5200
www.avxcorp.com
www.murata.com
www.t-yuden.com
www.component.tdk.com
www.sem.samsung.com
Murata
Taiyo-Yuden
TDK
Samsung
35262b2fa
11
LTC3526-2/LTC3526B-2
TYPICAL APPLICATIONS
1-Cell to 1.8V Converter with <1mm Maximum Height
for Low-Noise Applications
100
90
V
= 1.8V
OUT
2.2μH*
80
70
SW
V
OUT
V
IN
1.8V
V
IN
V
OUT
60
50
1V TO 1.6V
150mA
1μF
LTC3526B-2
SHDN FB
GND
511k
1M
40
30
20
10
0
OFF ON
4.7μF**
35262b2fA02a
V
V
V
= 1.5V
= 1.2V
= 0.9V
IN
IN
IN
*FDK MIPF2520D2R2
**MURATA GRM219R60J475KE19D
0.1
1
10
100
1000
LOAD CURRENT (mA)
35262b2f TA02b
1-Cell to 3.3V
100
90
V
= 3.3V
OUT
2.7μH*
80
70
SW
V
OUT
V
IN
3.3V
V
IN
V
OUT
60
50
1V TO 1.6V
75mA
1.78M
22pF
1μF
LTC3526-2
SHDN FB
GND
40
30
20
10
0
OFF ON
10μF
1M
35262b2fA04a
V
V
V
= 1.5V
= 1.2V
= 0.9V
IN
IN
IN
*TAIYO-YUDEN NP03SB2R7M
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
35262b2f TA04b
35262b2fa
12
LTC3526-2/LTC3526B-2
TYPICAL APPLICATIONS
2-Cell to 3.3V
100
V
= 3.3V
OUT
90
80
70
2.7μH*
SW
V
OUT
V
IN
3.3V
V
IN
V
OUT
60
50
2V TO 3.2V
200mA
1μF
LTC3526-2
SHDN FB
GND
1.78M
1M
40
30
20
10
0
OFF ON
4.7μF
35262b2fA05a
V
V
V
= 3.0V
= 2.4V
= 1.8V
IN
IN
IN
*TAIYO-YUDEN NP03SB2R7M
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
35262b2f TA05b
3.3V Converter with Output OR’d with 5V USB Input
MBR120ESFT
5V USB
2.2μH
V
OUT
LDO
3.3V/5V
USB
SW
V
BATT
V
IN
V
OUT
1.8V TO 3.2V
1.78M
1M
1μF
LTC3526-2
SHDN FB
GND
DC/DC
OFF ON
4.7μF
35262b2fA07a
35262b2fa
13
LTC3526-2/LTC3526B-2
TYPICAL APPLICATIONS
2-Cell to 5V
100
90
V
= 5V
OUT
3.3μH*
80
70
SW
V
OUT
V
60
50
IN
5V
V
IN
V
OUT
2V TO 3.2V
150mA
22pF
1μF
3.24M
1.02M
LTC3526-2
SHDN FB
GND
40
30
20
10
0
OFF ON
10μF
V
V
V
= 3.0V
= 2.4V
= 1.8V
35262b2fA06a
IN
IN
IN
*TAIYO-YUDEN NP03SB3R3M
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
35262b2f TA06b
Li-Ion to 5V
100
90
V
= 5V
OUT
3.3μH*
80
SW
70
V
OUT
V
IN
5V
V
IN
V
OUT
60
50
2.7V TO 4.3V
200mA
3.24M
22pF
1μF
LTC3526-2
SHDN FB
GND
OFF ON
10μF
40
30
20
10
0
1.02M
35262b2fA08a
V
V
V
= 4.2V
= 3.6V
= 3.0V
IN
IN
IN
*TAIYO-YUDEN NP03SB3R3M
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
35262b2f TA08b
35262b2fa
14
LTC3526-2/LTC3526B-2
PACKAGE DESCRIPTION
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703)
R = 0.115
TYP
0.56 0.05
(2 SIDES)
0.38 0.05
4
6
0.675 0.05
2.50 0.05
1.15 0.05
0.61 0.05
(2 SIDES)
2.00 0.10
(4 SIDES)
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
PIN 1
PACKAGE
OUTLINE
CHAMFER OF
EXPOSED PAD
(DC6) DFN 1103
3
1
0.25 0.05
0.25 0.05
0.50 BSC
0.50 BSC
0.75 0.05
0.200 REF
1.37 0.05
(2 SIDES)
1.42 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
35262b2fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC3526-2/LTC3526B-2
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ThinSOT is a trademark of Linear Technology Corporation.
35262b2fa
LT 0807 REV A • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
© LINEAR TECHNOLOGY CORPORATION 2006
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号：
LTC3526LBEDC-2#TRPBF
LTC3526L-2 - 550mA 2MHz Synchronous Step-Up DC/DC Converters in 2mm x 2mm DFN; Package: DFN; Pins: 6; Temperature Range: -40°C to 85°C
Linear
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