LTC3526LBEDC-2#TRPBF [Linear]
LTC3526L-2 - 550mA 2MHz Synchronous Step-Up DC/DC Converters in 2mm x 2mm DFN; Package: DFN; Pins: 6; Temperature Range: -40°C to 85°C;
| 型号： | LTC3526LBEDC-2#TRPBF |
| 厂家： | 
Linear |
| 描述： | LTC3526L-2 - 550mA 2MHz Synchronous Step-Up DC/DC Converters in 2mm x 2mm DFN; Package: DFN; Pins: 6; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总16页 (文件大小：328K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3526L-2/LTC3526LB-2
550mA 2MHz Synchronous
Step-Up DC/DC Converters
in 2mm × 2mm DFN
FeaTures
DescripTion
The LTC®3526L-2/LTC3526LB-2 are synchronous, fixed
frequency step-up DC/DC converters with output discon-
nect. Synchronous rectification enables high efficiency in
the low profile 2mm × 2mm DFN package. Battery life in
single AA/AAA powered products is extended further with
a 680mV start-up voltage and operation down to 500mV
once started.
n
Delivers 3.3V at 100mA from a Single Alkaline/
NiMH Cell or 3.3V at 200mA from Two Cells
IN
n
V Start-Up Voltage: 680mV
n
n
n
n
n
n
n
n
n
n
n
n
n
1.5V to 5.25V V
Range
OUT
Up to 94% Efficiency
Output Disconnect
2MHz Fixed Frequency Operation
V > V
Operation
IN
OUT
A switching frequency of 2MHz minimizes solution foot-
print by allowing the use of tiny, low profile inductors
and ceramic capacitors. The current mode PWM design
is internally compensated, reducing external parts count.
The LTC3526L-2 features Burst Mode operation at light
load conditions allowing it to maintain high efficiency over
a wide range of load. The LTC3526LB-2 features fixed
frequency operation for low noise applications. Anti-ring
circuitry reduces EMI by damping the inductor in discon-
tinuousmode. Additionalfeaturesincludealowshutdown
current of under 1µA and thermal shutdown.
Integrated Soft-Start
Current Mode Control with Internal Compensation
Burst Mode® Operation with 9µA I (LTC3526L-2)
Q
Low Noise PWM Operation (LTC3526LB-2)
Internal Synchronous Rectifier
Logic Controlled Shutdown (I < 1µA)
Q
Anti-Ring Control
Low Profile (2mm × 2mm × 0.75mm) 6-Lead
DFN Package
applicaTions
The LTC3526L-2/LTC3526LB-2 are housed in a 2mm ×
2mm × 0.75mm DFN package.
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Patents pending.
n
Medical Instruments
n
Noise Canceling Headphones
n
Wireless Mice
Bluetooth Headsets
n
Typical applicaTion
Efficiency and Power Loss vs Load Current
100
1000
100
10
V
= 2.4V
IN
2.2µH
90
EFFICIENCY
80
SW
V
70
OUT
V
IN
3.3V
V
IN
V
OUT
1.6V TO 3.2V
60
50
200mA
4.7µF
LTC3526L-2
SHDN FB
GND
1.78M
1M
33pF
POWER LOSS
4.7µF
OFF ON
40
30
20
10
0
1
3526lb2 TA01a
0.1
0.01
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
3526lb2 TA01b
3526lb2fa
ꢀ
LTC3526L-2/LTC3526LB-2
absoluTe MaxiMuM raTings
pin conFiguraTion
(Note 1)
TOP VIEW
V Voltage................................................... –0.3V to 6V
IN
SW Voltage
SW
1
2
3
6
5
4
V
OUT
DC............................................................ –0.3V to 6V
Pulsed <100ns......................................... –0.3V to 7V
SHDN, FB Voltage ........................................ –0.3V to 6V
GND
7
FB
V
SHDN
IN
V
............................................................. –0.3V to 6V
DC PACKAGE
6-LEAD (2mm s 2mm) PLASTIC DFN
OUT
Operating Temperature Range
T
= 125°C, θ = 102°C/W (NOTE 6)
JA
JMAX
(Notes 2, 5)..............................................–40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PC BOARD
orDer inForMaTion
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3526LEDC-2#PBF
LTC3526LBEDC-2#PBF
LTC3526LEDC-2#TRPBF LFFC
LTC3526LBEDC-2#TRPBF LFFD
–40°C to 85°C
–40°C to 85°C
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
temperature range of –40°C to 85°C, otherwise specifications are at TA = 25°C. VIN = 1.2V, VOUT = 3.3V unless otherwise noted.
PARAMETER
CONDITIONS
= 1mA
MIN
TYP
MAX
0.8
5
UNITS
V
Minimum Start-Up Input Voltage
Input Voltage Range
I
0.68
LOAD
l
l
l
After Start-Up. (Minimum Voltage is Load Dependent)
0.5
1.5
V
Output Voltage Adjust Range
Feedback Pin Voltage
5.25
1.225
50
V
1.165
1.195
1
V
Feedback Pin Input Current
Quiescent Current—Shutdown
Quiescent Current—Active
Quiescent Current—Burst
V
V
= 1.30V
nA
µA
µA
µA
µA
µA
Ω
FB
= 0V, Not Including Switch Leakage, V
= 0V
0.01
250
9
1
SHDN
OUT
Measured on V , Nonswitching
500
18
OUT
Measured on V , FB > 1.230V (LTC3526L-2 Only)
OUT
N-Channel MOSFET Switch Leakage Current
P-Channel MOSFET Switch Leakage Current
N-Channel MOSFET Switch On Resistance
P-Channel MOSFET Switch On Resistance
N-Channel MOSFET Current Limit
Current Limit Delay to Output
Maximum Duty Cycle
V
V
V
V
= 5V
0.1
0.1
0.4
0.6
750
60
5
SW
= 5V, V
= 0V
OUT
10
SW
= 3.3V
= 3.3V
OUT
OUT
Ω
l
550
87
mA
ns
%
(Note 3)
l
l
l
V
V
= 1.15V, V
= 1.3V
= 5V
OUT
90
FB
FB
Minimum Duty Cycle
0
%
Switching Frequency
1.8
0.8
2
2.4
MHz
V
SHDN Pin Input High Voltage
SHDN Pin Input Low Voltage
0.3
V
3526lb2fa
ꢁ
LTC3526L-2/LTC3526LB-2
elecTrical characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: Current measurements are made when the output is not switching.
Note 5: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
Note 6: Failure to solder the exposed backside of the package to the PC
board ground plane will result in a thermal resistance much higher than
102°C/W.
Note 2: The LTC3526LE-2/LTC3526LBE-2 are guaranteed to meet
performance specifications from 0°C to 85°C. Specifications over –40°C to
85°C operating temperature range are assured by design, characterization
and correlation with statistical process controls.
Note 3: Specification is guaranteed by design and not 100% tested in
production.
Typical perForMance characTerisTics TA = 25°C, unless otherwise noted.
No-Load Input Current vs VIN
(LTC3526L-2)
Efficiency vs Load Current and VIN
for VOUT = 1.8V (LTC3526L-2)
Efficiency vs Load Current and VIN
for VOUT = 3.3V (LTC3526L-2)
100
90
1000
100
10
100
90
1000
100
10
100
90
80
70
60
50
40
30
20
10
V
= 5V
OUT
80
80
70
70
V
V
V
= 0.9V
= 1.2V
= 1.5V
IN
IN
IN
V
= 3.3V
OUT
V
60
50
60
50
= 2.5V
OUT
V
IN
V
IN
V
IN
V
IN
= 1.2V
= 1.8V
= 2.4V
= 3.0V
V
= 1.8V
OUT
40
30
20
10
0
1
40
30
20
10
0
1
PLOSS AT V = 1.2V
IN
0.1
0.01
0.1
0.01
PLOSS AT V = 0.9V
PLOSS AT V = 1.8V
IN
IN
PLOSS AT V = 1.2V
IN
PLOSS AT V = 2.4V
IN
PLOSS AT V = 1.5V
IN
PLOSS AT V = 3.0V
IN
2.5 3.0
(V)
0.5 1.0 1.5 2.0
3.5 4.0 4.5
0.01
0.1
1
10
100
1000
0.01
0.1
1
10
100
1000
V
LOAD CURRENT (mA)
LOAD CURRENT (mA)
IN
3526lb2 G02
3526lb2 G03
3526lb2 G01
Minimum Load Resistance
During Start-Up vs VIN
Efficiency vs Load Current and VIN
for VOUT = 5V (LTC3526L-2)
Maximum Output Current vs VIN
100
90
1000
100
10
10000
1000
400
350
300
250
200
150
100
50
V
= 3.3V
OUT
V
OUT
= 3.3V
V
= 2.5V
OUT
80
V
= 1.8V
OUT
70
60
50
V
= 5V
OUT
40
30
20
10
0
100
1
L = 2.2µH
10
0.1
0
2.5 3.0
(V)
0.65
0.75
0.85
0.95
(V)
1.05
1.15
0.01
0.1
1
10
100
V
1000
0.5 1.0 1.5 2.0
3.5 4.0 4.5
LOAD CURRENT (mA)
V
IN
V
IN
3526lb2 G05
3526lb2 G06
= 1.2V
PLOSS AT V = 1.2V
IN
IN
V
IN
V
IN
V
IN
= 2.4V
= 3.6V
= 4.2V
3526lb2 G04
PLOSS AT V = 2.4V
IN
PLOSS AT V = 3.6V
IN
PLOSS AT V = 4.2V
IN
3526lb2fa
ꢂ
LTC3526L-2/LTC3526LB-2
Typical perForMance characTerisTics
Burst Mode Threshold Current
TA = 25°C, unless otherwise noted.
Burst Mode Threshold Current
vs VIN (LTC3526L-2)
Start-Up Delay Time vs VIN
vs VIN (LTC3526L-2)
100
90
80
70
60
50
40
30
20
10
0
35
30
25
20
15
10
5
40
35
30
25
V
C
= 1.8V
= 10µF
V
C
= 2.5V
= 10µF
OUT
OUT
LEAVE BURST
OUT
OUT
LEAVE BURST
L = 2.2µH
L = 2.2µH
ENTER BURST
ENTER BURST
20
15
10
5
0
0
1.0
1.1
1.2
1.3
(V)
1.4
1.5
1.6
1.0
2.0 2.5 3.0
(V)
3.5 4.0 4.5
1.0
1.2
1.4
1.6
(V)
1.8
2.0
2.2
1.5
V
V
V
IN
IN
IN
3526lb2 G08a
3526lb2 G07
3526lb2 G08b
Oscillator Frequency Change
vs VOUT
Burst Mode Threshold Current
vs VIN (LTC3526L-2)
Burst Mode Threshold Current
vs VIN (LTC3526L-2)
70
60
50
40
30
20
10
0
4
3
60
50
40
30
20
10
0
NORMALIZED TO V
= 3.3V
V
C
= 5V
V
C
= 3.3V
= 10µF
OUT
OUT
OUT
OUT
OUT
= 10µF
L = 2.2µH
L = 2.2µH
2
LEAVE BURST
LEAVE BURST
1
0
–1
–2
–3
–4
ENTER BURST
ENTER BURST
3.0
(V)
4.0
4.5
3.5
(V)
4.5
5.0
1.0 1.5
2.0 2.5
V
3.5
1.5
3.0
4.0
2.0
2.5
1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0
V
IN
(V)
V
OUT
IN
3526lb2 G08c
3526lb2 G08d
3526lb2 G09
Oscillator Frequency Change
vs Temperature
RDS(ON) vs VOUT
RDS(ON) Change vs Temperature
0.90
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
1.3
1.2
1.1
1.0
0.9
0.8
0.7
10
8
NORMALIZED TO 25°C
NORMALIZED TO 25°C
6
4
2
PMOS
NMOS
(V)
0
–2
–4
–6
–8
–10
–50 –30 –10 10
30
50
70
90
1.5
2.5 3.0 3.5
4.0 4.5 5.0
–50 –30 –10 10
30
50
70
90
2.0
V
TEMPERATURE (°C)
TEMPERATURE (°C)
OUT
3526lb2 G12
3526lb2 G10
3526lb2 G11
3526lb2fa
ꢃ
LTC3526L-2/LTC3526LB-2
TA = 25°C, unless otherwise noted.
Typical perForMance characTerisTics
Burst Mode Quiesent Current
vs VOUT (LTC3526L-2)
VFB vs Temperature
Start-Up Voltage vs Temperature
10.0
9.5
9.0
8.5
8.0
7.5
7.0
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.50
0.25
NORMALIZED TO 25°C
1mA LOAD
0
–0.25
–0.50
–0.75
–1.00
NO LOAD
40 60
TEMPERATURE (°C)
3.5
(V)
5.0
–60 –40 –20
0
20
80 100
–50
0
25
50
75
100
1.5 2.0 2.5 3.0
4.0 4.5
25
TEMPERATURE (°C)
V
OUT
3526lb2 G13
3526lb2 G14
3526lb2 G15
Load Regulation
Load Regulation
Load Regulation
0.5
0.4
0.5
0.4
0.5
0.4
V
= 1.8V
V
OUT
= 3.3V
V
= 5V
OUT
OUT
0.3
0.3
0.3
0.2
0.2
0.2
0.1
0.1
0.1
0
0
0
–0.1
–0.2
–0.3
–0.4
–0.5
–0.1
–0.2
–0.3
–0.4
–0.5
–0.1
–0.2
–0.3
–0.4
–0.5
V
V
V
V
= 1.2V
= 2.4V
= 3.6V
= 4.2V
IN
IN
IN
IN
V
V
V
= 0.9V
= 1.2V
= 1.5V
V
V
V
= 1.2V
= 1.8V
= 2.4V
IN
IN
IN
IN
IN
IN
0.01
0.1
1
10
100
1000
0.01
0.1
1
10
100
1000
0.01
0.1
1
10
100
1000
LOAD (mA)
LOAD (mA)
LOAD (mA)
3526lb2 G23
3526lb2 G24
3526lb2 G25
Fixed Frequency Switching
Waveform and VOUT Ripple
Burst Mode Waveforms
(LTC3526L-2)
V
OUT and IIN During Soft-Start
V
OUT
SW PIN
2V/DIV
1V/DIV
SW PIN
2V/DIV
INPUT
CURRENT
0.2A/DIV
SHDN PIN
1V/DIV
V
OUT
V
OUT
20mV/DIV
20mV/DIV
AC-COUPLED
AC-COUPLED
3526lb2 G16
3526lb2 G17
3526lb2 G18
V
V
C
= 1.2V
200ns/DIV
V
V
C
= 1.2V
20µs/DIV
V
C
= 3.3V
= 4.7µF
200µs/DIV
IN
IN
OUT
OUT
= 3.3V AT 100mA
= 3.3V AT 5mA
OUT
OUT
OUT
OUT
= 4.7µF
= 10µF
3526lb2fa
ꢄ
LTC3526L-2/LTC3526LB-2
TA = 25°C, unless otherwise noted.
Typical perForMance characTerisTics
Load Step Response (from Burst
Mode Operation) (LTC3526L-2)
Load Step Response
(Fixed Frequency)
V
V
OUT
OUT
100mV/DIV
100mV/DIV
AC-COUPLED
AC-COUPLED
LOAD
CURRENT
50mA/DIV
LOAD
CURRENT
50mA/DIV
3526lb2 G19
3526lb2 G20
V
V
= 3.6V
OUT
100µs/DIV
V
V
= 3.6V
OUT
100µs/DIV
IN
IN
= 5V
= 5V
20mA TO 170mA STEP
50mA TO 150mA STEP
C
= 10µF
C
= 4.7µF
OUT
OUT
Load Step Response
(Fixed Frequency)
Load Step Response (from Burst
Mode Operation) (LTC3526L-2)
V
OUT
V
OUT
100mV/DIV
100mV/DIV
AC-COUPLED
AC-COUPLED
LOAD
CURRENT
50mA/DIV
LOAD
CURRENT
50mA/DIV
3526lb2 G21
3526lb2 G22
V
V
= 1.2V
100µs/DIV
V
V
= 1.2V
50µs/DIV
IN
OUT
IN
OUT
= 3.3V
= 3.3V
50mA TO 100mA STEP
= 4.7µF
5mA TO 100mA STEP
= 10µF
C
C
OUT
OUT
pin FuncTions
SW(Pin1):SwitchPin.ConnectinductorbetweenSWand
SHDN (Pin 4): Logic Controlled Shutdown Input. There
is an internal 4MΩ pull-down on this pin.
V . Keep PCB trace lengths as short and wide as possible
IN
to reduce EMI. If the inductor current falls to zero or SHDN
• SHDN = High: Normal operation
• SHDN = Low: Shutdown, quiescent current < 1µA
is low, an internal anti-ringing switch is connected from
SW to V to minimize EMI.
IN
FB (Pin 5): Feedback Input to the g Error Amplifier. Con-
m
GND(Pin2,ExposedPadPin7):SignalandPowerGround.
Provide a short direct PCB path between GND and the
(–) side of the input and output capacitors. The Exposed
Pad must be soldered to the PCB ground plane. It serves
as an additional ground connection and as a means of
conducting heat away from the package.
nect resistor divider tap to this pin. The top of the divider
connects to the output capacitor, the bottom of the divider
connectstoGND.ReferringtotheBlockDiagram,theoutput
voltage can be adjusted from 1.5V to 5.25V by:
R2
R1
VOUT =1.195V • 1+
V (Pin 3): Input Supply Pin. Connect a minimum of 1µF
IN
ceramic decoupling capacitor from this pin to ground
V
(Pin6):Outputvoltagesenseanddrainoftheinternal
OUT
using short direct PCB traces.
synchronous rectifier. PCB trace from V
to the output
OUT
filter capacitor (4.7µF minimum) should be as short and
wide as possible.
3526lb2fa
ꢅ
LTC3526L-2/LTC3526LB-2
block DiagraM
L1
2.2µH
V
IN
0.8V
TO 5V
C
IN
2.2µF
3
1
V
IN
SW
V
OUT
V
SEL
WELL
SWITCH
V
BEST
V
B
V
OUT
V
OUT
FB
1.5V
6
5
ANTI-RING
TO 5.25V
GATE DRIVERS
AND
R2
R1
ANTI-CROSS
CONDUCTION
SHDN
C
OUT
SHUTDOWN
4
SHUTDOWN
+
–
4.7µF
I
ZERO
COMP
4M
3
SLOPE
COMP
I
PK
COMP
V
V
REF
REF
–
+
I
PK
UVLO
ERROR AMP
SLEEP COMP
I
ZERO
START-UP
V
REF
+
–
LOGIC
MODE
CLK
TSD
CONTROL
2MHz
OSC
CLAMP
WAKE
THERMAL
SHUTDOWN
C
SS
EXPOSED
PAD
GND
2
7
3526lb2 BD
operaTion
(Refer to Block Diagram)
The LTC3526L-2/LTC3526LB-2 are 2MHz synchronous
boost converters housed in a 6-lead 2mm × 2mm DFN
package. With a guaranteed ability to start up and oper-
ate from inputs less than 0.8V, this device features fixed
frequency, current mode PWM control for exceptional line
and load regulation. The current mode architecture with
adaptive slope compensation provides excellent transient
load response, requiring minimal output filtering. Internal
soft-start and internal loop compensation simplifies the
design process while minimizing the number of external
components.
range of load currents. Burst Mode operation maintains
high efficiency at very light loads, reducing the quiescent
current to just 9µA. Operation can be best understood by
referring to the Block Diagram.
LOW VOLTAGE START-UP
The LTC3526L-2/LTC3526LB-2 include an independent
start-up oscillator designed to start up at an input voltage
of 0.68V (typical). Soft-start and inrush current limiting
are provided during start-up, as well as normal mode.
When either V or V
exceeds 1.3V typical, the IC
IN
OUT
WithitslowR
andlowgatechargeinternalN-channel
DS(ON)
enters normal operating mode. When the output voltage
MOSFETswitchandP-channelMOSFETsynchronousrecti-
fier, the LTC3526L-2 achieves high efficiency over a wide
3526lb2fa
ꢆ
LTC3526L-2/LTC3526LB-2
operaTion
(Refer to Block Diagram)
exceeds the input by 0.24V, the IC powers itself from
LTC3526L-2/LTC3526LB-2
4M
LTC3526L-2/LTC3526LB-2
4M
V
IN
V
instead of V . At this point the internal circuitry has
OUT
IN
no dependency on the V input voltage, eliminating the
30ꢀ
30ꢀ
IN
SHDN
SHDN
requirement for a large input capacitor. The input voltage
can drop as low as 0.5V. The limiting factor for the ap-
plication becomes the availability of the power source to
supply sufficient energy to the output at low voltages, and
maximum duty cycle, which is clamped at 90% typical.
Note that at low input voltages, small voltage drops due
to series resistance become critical, and greatly limit the
power delivery capability of the converter.
V
CNTRL
R
ZETEX ZC2811E
1M
V
CNTRL
1M
R > (V
/(V + 0.4) – 1)MΩ
CNTRL IN
3526lb2 F01
Figure 1. Recommended Shutdown Circuits when Driving
SHDN above VIN
Error Amplifier
LOW NOISE FIXED FREQUENCY OPERATION
Soft-Start
The positive input of the transconductance error amplifier
is internally connected to the 1.195V reference and the
negative input is connected to FB. Clamps limit the mini-
mumandmaximumerrorampoutputvoltageforimproved
large-signal transient response. Power converter control
loop compensation is provided internally. An external
The LTC3526L-2/LTC3526LB-2 contain internal circuitry
to provide soft-start operation. The soft-start circuitry
slowly ramps the peak inductor current from zero to its
peak value of 750mA (typical) in approximately 0.5ms,
allowing start-up into heavy loads. The soft-start circuitry
is reset in the event of a shutdown command or a thermal
shutdown.
resistive voltage divider from V
the output voltage via FB from 1.5V to 5.25V.
to ground programs
OUT
R2
R1
VOUT =1.195V • 1+
Oscillator
Current Sensing
An internal oscillator sets the switching frequency to
2MHz.
Losslesscurrentsensingconvertsthepeakcurrentsignalof
theN-channelMOSFETswitchintoavoltagethatissummed
with the internal slope compensation. The summed signal
is compared to the error amplifier output to provide a peak
current control command for the PWM.
Shutdown
Shutdown is accomplished by pulling the SHDN pin
below 0.3V and enabled by pulling the SHDN pin above
0.8V. Although SHDN can be driven above V or V
IN
OUT
Current Limit
(up to the absolute maximum rating) without damage,
the LTC3526L-2/LTC3526LB-2 have a proprietary test
mode that may be engaged if SHDN is held in the range
The current limit comparator shuts off the N-channel
MOSFET switch once its threshold is reached. The cur-
rent limit comparator delay to output is typically 60ns.
Peak switch current is limited to approximately 750mA,
independent of input or output voltage, unless V
below 0.7V, in which case the current limit is cut in half.
of 0.5V to 1V higher than the greater of V or V . If
IN
OUT
the test mode is engaged, normal PWM switching action
is interrupted, which can cause undesirable operation
in some applications. Therefore, in applications where
falls
OUT
SHDN may be driven above V , a resistor divider or other
IN
meansmustbeemployedtokeeptheSHDNvoltagebelow
(V + 0.4V) to prevent the possibility of the test mode
IN
being engaged. Please refer to Figure 1 for two possible
implementations.
3526lb2fa
ꢇ
LTC3526L-2/LTC3526LB-2
operaTion
Zero Current Comparator
(Refer to Block Diagram)
Burst Mode OPERATION
The zero current comparator monitors the inductor cur-
rent to the output and shuts off the synchronous rectifier
when this current reduces to approximately 30mA. This
prevents the inductor current from reversing in polarity,
improving efficiency at light loads.
The LTC3526L-2 will enter Burst Mode operation at light
load current and return to fixed frequency PWM mode
when the load increases. Refer to the Typical Performance
Characteristics to see the output load Burst Mode thresh-
old current vs V . The load current at which Burst Mode
IN
operation is entered can be changed by adjusting the
inductor value. Raising the inductor value will lower the
load current at which Burst Mode operation is entered.
Synchronous Rectifier
To control inrush current and to prevent the inductor
current from running away when V
is close to V , the
In Burst Mode operation, the LTC3526L-2 still switches at
a fixed frequency of 2MHz, using the same error amplifier
and loop compensation for peak current mode control.
This control method eliminates any output transient
when switching between modes. In Burst Mode opera-
tion, energy is delivered to the output until it reaches the
nominal regulation value, then the LTC3526L-2 transi-
tions to sleep mode where the outputs are off and the
LTC3526L-2consumesonly9µAofquiescentcurrentfrom
OUT
IN
P-channel MOSFET synchronous rectifier is only enabled
when V > (V + 0.24V).
OUT
IN
Anti-Ringing Control
The anti-ring circuit connects a resistor across the in-
ductor to prevent high frequency ringing on the SW pin
during discontinuous current mode operation. Although
the ringing of the resonant circuit formed by L and C
SW
V
. When the output voltage droops slightly, switching
OUT
(capacitance on SW pin) is low energy, it can cause EMI
resumes. This maximizes efficiency at very light loads by
minimizing switching and quiescent losses. Burst Mode
output voltage ripple, which is typically 1% peak-to-peak,
can be reduced by using more output capacitance (10µF
or greater), or with a small capacitor (10pF to 50pF) con-
radiation.
Output Disconnect
The LTC3526L-2/LTC3526LB-2 are designed to allow true
output disconnect by eliminating body diode conduction
of the internal P-channel MOSFET rectifier. This allows for
nected between V
and FB.
OUT
V
OUT
to go to zero volts during shutdown, drawing no cur-
As the load current increases, the LTC3526L-2 will au-
tomatically leave Burst Mode operation. Note that larger
output capacitor values may cause this transition to oc-
cur at lighter loads. Once the LTC3526L-2 has left Burst
Mode operation and returned to normal operation, it will
remain there until the output load is reduced below the
burst threshold current.
rentfromtheinputsource. Italsoallowsforinrushcurrent
limiting at turn-on, minimizing surge currents seen by the
input supply. Note that to obtain the advantages of output
disconnect, there must not be an external Schottky diode
connected between SW and V . The output disconnect
OUT
feature also allows V
to be pulled high, without any
reverse current into a battery connected to V .
OUT
IN
BurstModeoperationisinhibitedduringstart-upandsoft-
start and until V
is at least 0.24V greater than V .
OUT
IN
Thermal Shutdown
The LTC3526LB-2 features continuous PWM operation at
2MHz. At very light loads, the LTC3526LB-2 will exhibit
pulse-skipping operation.
If the die temperature exceeds 160°C, the LTC3526L-2/
LTC3526LB-2 will go into thermal shutdown. All switches
will be off and the soft-start capacitor will be discharged.
The device will be enabled again when the die temperature
drops by about 15°C.
3526lb2fa
ꢈ
LTC3526L-2/LTC3526LB-2
applicaTions inForMaTion
V > V
OPERATION
COMPONENT SELECTION
Inductor Selection
IN
OUT
TheLTC3526L-2/LTC3526LB-2willmaintainvoltageregu-
lation even when the input voltage is above the desired
outputvoltage.Notethattheefficiencyismuchlowerinthis
mode, and the maximum output current capability will be
less. Refer to the Typical Performance Characteristics.
The LTC3526L-2/LTC3526LB-2 can utilize small surface
mount chip inductors due to their fast 2MHz switching
frequency. Inductor values between 1.5µH and 4.7µH are
suitableformostapplications.Largervaluesofinductance
will allow slightly greater output current capability (and
lower the Burst Mode threshold) by reducing the inductor
ripple current. Increasing the inductance above 6.8µH will
increasecomponentsizewhileprovidinglittleimprovement
in output current capability.
SHORT-CIRCUIT PROTECTION
The LTC3526L-2/LTC3526LB-2 output disconnect feature
allows output short circuit while maintaining a maximum
internally set current limit. To reduce power dissipation
under short-circuit conditions, the peak switch current
limit is reduced to 400mA (typical).
The minimum inductance value is given by:
V
• VOUT(MAX) – V
(
)
IN(MIN)
IN(MIN)
L >
SCHOTTKY DIODE
2•Ripple• VOUT(MAX)
Althoughnotrecommended,addingaSchottkydiodefrom
where:
SW to V
will improve efficiency by about 2%. Note
OUT
that this defeats the output disconnect and short-circuit
protection features.
Ripple = Allowable inductor current ripple (amps peak-
peak)
V
V
= Minimum input voltage
IN(MIN)
PCB LAYOUT GUIDELINES
= Maximum output voltage
OUT(MAX)
ThehighspeedoperationoftheLTC3526L-2/LTC3526LB-2
demands careful attention to board layout. A careless
layout will result in reduced performance. Figure 2 shows
the recommended component placement. A large ground
pin copper area will help to lower the die temperature. A
multilayer board with a separate ground plane is ideal, but
not absolutely necessary.
The inductor current ripple is typically set for 20% to
40% of the maximum inductor current. High frequency
ferrite core inductor materials reduce frequency depen-
dent power losses compared to cheaper powdered iron
types, improving efficiency. The inductor should have
low ESR (series resistance of the windings) to reduce the
I2R power losses, and must be able to support the peak
LTC3526L-2
SW
V
OUT
1
2
3
6
5
4
MINIMIZE
TRACE ON FB
AND SW
GND
FB
V
SHDN
IN
+
V
IN
MULTIPLE VIAS
TO GROUND PLANE
3526lb2 F02
Figure 2. Recommended Component Placement for Single Layer Board
3526lb2fa
ꢀ0
LTC3526L-2/LTC3526LB-2
applicaTions inForMaTion
extremely low ESR and are available in small footprints. A
4.7µF to 10µF output capacitor is sufficient for most ap-
plications. Larger values may be used to obtain extremely
low output voltage ripple and improve transient response.
X5R and X7R dielectric materials are preferred for their
ability to maintain capacitance over wide voltage and
temperature ranges. Y5V types should not be used.
inductor current without saturating. Molded chokes and
some chip inductors usually do not have enough core
area to support the peak inductor current of 750mA seen
on the LTC3526L-2/LTC3526LB-2. To minimize radiated
noise, use a shielded inductor. See Table 1 for suggested
components and suppliers.
Table 1. Recommended Inductors
The internal loop compensation of the LTC3526L-2/
LTC3526LB-2 are designed to be stable with output ca-
pacitor values of 4.7µF or greater (without the need for
any external series resistor). Although ceramic capacitors
are recommended, low ESR tantalum capacitors may be
used as well.
VENDOR
PART/STYLE
Coilcraft
(847) 639-6400
www.coilcraft.com
LPO4815
LPS4012,
LPS3314
MSS4020
ME3220
Coiltronics
www.cooperet.com
SD10, SD12, SD3114, SD3118
Asmallceramiccapacitorinparallelwithalargertantalum
capacitormaybeusedindemandingapplicationsthathave
large load transients. Another method of improving the
transientresponseistoaddasmallfeed-forwardcapacitor
FDK
(408) 432-8331
www.fdk.com
MIP3226D
MIPF2520D
MIPWT3226D
MIPSZ2012D
MIPS2520D
across the top resistor of the feedback divider (from V
to FB). A typical value of 22pF will generally suffice.
OUT
Murata
(714) 852-2001
www.murata.com
LQH3NP
LQH32P
LQM2MPN
Low ESR input capacitors reduce input switching noise
and reduce the peak current drawn from the battery. It
follows that ceramic capacitors are also a good choice
for input decoupling and should be located as close as
possible to the device. A 2.2µF input capacitor is sufficient
for most applications, although larger values may be
used without limitations. Table 2 shows a list of several
ceramiccapacitormanufacturers.Consultthemanufactur-
ers directly for detailed information on their selection of
ceramic capacitors.
Sumida
CDRH2D14
CDRH2D11
CDRH3D11
(847) 956-0666
www.sumida.com
Taiyo-Yuden
www.t-yuden.com
NR3010T
NR3015T
NR3012T
TDK
VLP
VLF, VLCF
(847) 803-6100
www.component.tdk.com
Toko
(408) 432-8282
www.tokoam.com
D412C
Würth
WE-TPC type S, M, TH, XS
Table 2. Capacitor Vendor Information
(201) 785-8800
www.we-online.com
SUPPLIER
AVX
PHONE
WEBSITE
(803) 448-9411
(714) 852-2001
(408) 573-4150
(847) 803-6100
(408) 544-5200
www.avxcorp.com
www.murata.com
www.t-yuden.com
www.component.tdk.com
www.sem.samsung.com
Murata
Output and Input Capacitor Selection
Taiyo-Yuden
TDK
Low ESR (equivalent series resistance) capacitors should
be used to minimize the output voltage ripple. Multilayer
ceramic capacitors are an excellent choice as they have
Samsung
3526lb2fa
ꢀꢀ
LTC3526L-2/LTC3526LB-2
Typical applicaTions
1-Cell to 1.8V Converter with <1mm Maximum Height
100
90
V
= 1.8V
OUT
2.2µH*
80
SW
V
70
OUT
V
IN
1.8V
V
IN
V
OUT
0.8V TO 1.6V
60
50
150mA
1µF
LTC3526L-2
SHDN FB
GND
68pF
511k
1M
10µF**
OFF ON
40
30
20
10
0
3526lb2 TA02a
V
V
V
= 1.5V
= 1.2V
= 0.9V
IN
IN
IN
*FDK MIPWT3226D2R2
**MURATA GRM219R60J106KE19D
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
3526lb2 TA02b
Fixed Frequency 1-Cell to 2.85V Low Noise Converter
100
V
= 2.85V
OUT
90
80
70
2.2µH*
SW
V
OUT
V
IN
2.85V
V
IN
V
OUT
60
50
0.8V TO 1.6V
100mA
1µF
LTC3526LB-2
SHDN FB
GND
1.4M
1M
40
30
20
10
0
4.7µF
OFF ON
3526lb2 TA03a
V
V
V
= 1.5V
= 1.2V
= 0.9V
IN
IN
IN
*SUMIDA CDRH2D11NP-2R2N
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
3526lb2 TA03b
1-Cell to 3.3V
100
V
= 3.3V
OUT
90
80
70
2.2µH*
SW
V
OUT
V
IN
3.3V
V
IN
V
OUT
60
50
0.8V TO 1.6V
75mA
1µF
LTC3526L-2
SHDN FB
GND
1.78M
33pF
40
30
20
10
0
10µF
OFF ON
1M
3526lb2 TA04a
V
V
V
= 1.5V
= 1.2V
= 0.9V
IN
IN
IN
*TAIYO-YUDEN NR3015T2R2M
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
3526lb2 TA04b
3526lb2fa
ꢀꢁ
LTC3526L-2/LTC3526LB-2
Typical applicaTions
2-Cell to 3.3V
100
V
= 3.3V
OUT
90
80
70
2.2µH*
SW
V
OUT
V
IN
3.3V
V
IN
V
OUT
60
50
1.6V TO 3.2V
200mA
1µF
LTC3526L-2
SHDN FB
GND
1.78M
1M
33pF
40
30
20
10
0
4.7µF
OFF ON
3526lb2 TA05a
V
V
V
= 3.0V
= 2.4V
= 1.8V
IN
IN
IN
*COILCRAFT LPS3314-222ML
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
3526lb2 TA05b
2-Cell to 5V
100
V
= 5V
OUT
90
80
70
3.3µH*
SW
V
OUT
V
IN
60
50
5V
V
IN
V
OUT
1.6V TO 3.2V
150mA
1µF
3.24M
1.02M
33pF
LTC3526L-2
SHDN FB
GND
40
30
20
10
0
10µF
OFF ON
3526lb2 TA06a
V
IN
V
IN
V
IN
= 3.0V
= 2.4V
= 1.8V
*COILCRAFT LPS4018-332ML
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
3526lb2 TA06b
Li-Ion to 5V
100
90
V
= 5V
OUT
3.6µH*
SW
80
70
V
OUT
V
IN
5V
V
IN
V
OUT
2.7V TO 4.3V
60
50
200mA
1µF
LTC3526L-2
SHDN FB
GND
3.24M
1.02M
22pF
10µF
OFF ON
40
30
20
10
0
3526lb2 TA08a
V
V
V
= 4.2V
= 3.6V
= 3.0V
IN
IN
IN
*WURTH 744031003
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
3526lb2 TA08b
3526lb2fa
ꢀꢂ
LTC3526L-2/LTC3526LB-2
package DescripTion
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703 Rev B)
0.70 p0.05
2.55 p0.05
1.15 p0.05
0.61 p0.05
(2 SIDES)
PACKAGE
OUTLINE
0.25 p 0.05
0.50 BSC
1.42 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.125
TYP
0.56 p 0.05
(2 SIDES)
0.40 p 0.10
4
6
2.00 p0.10
PIN 1 NOTCH
(4 SIDES)
R = 0.20 OR
0.25 s 45o
CHAMFER
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
(DC6) DFN REV B 1309
R = 0.05
TYP
3
1
0.25 p 0.05
0.50 BSC
0.75 p0.05
0.200 REF
1.37 p0.05
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3526lb2fa
ꢀꢃ
LTC3526L-2/LTC3526LB-2
revision hisTory
REV
DATE
DESCRIPTION
PAGE NUMBER
A
9/10
Changed 60°C/W to 102°C/W in Note 6
Updated Pin 2 text in Pin Functions
Updated Shutdown section
Updated Related Parts
3
6
8
16
3526lb2fa
Information furnished by Linear Technology ꢀorporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology ꢀorporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
ꢀꢄ
LTC3526L-2/LTC3526LB-2
Typical applicaTion
3.3V Converter with Output OR’d with 5V USB Input
MBR120ESFT
5V USB
2.2µH*
V
OUT
LDO
3.3V/5V
USB
SW
V
BATT
V
IN
V
OUT
1.8V TO 3.2V
1.78M
1M
1µF
LTC3526L-2
SHDN FB
GND
33pF
DC/DC
10µF
OFF ON
3526lb2 TA07a
*MURATA LQH3NPN2R2NM0
relaTeD parTs
PART NUMBER
DESCRIPTION
COMMENTS
94% Efficiency VIN: 0.85V to 5V, VOUT(MAX) = 5.25V, IQ = 9µA,
ISD < 1µA, 2mm × 2mm DFN-6 Package
LTC3526/LTC3526B
500mA, 1MHz/2.2MHz, Synchronous Step-Up DC/DC
Converters with Output Disconnect
LTC3526-2/LTC3526B-2
LTC3526L/LTC3526LB
LTC3525L-3
400mA Micropower Synchronous Step-Up DC/DC
Converter with Output Disconnect
93% Efficiency VIN: 0.88V to 4.5V, VOUT = 3V, IQ = 7µA,
SD < 1µA, SC-70 Package
I
LTC3525-3
LTC3525-3.3
LTC3525-5
400mA Micropower Synchronous Step-Up DC/DC
Converter with Output Disconnect
95% Efficiency VIN: 1V to 4.5V, VOUT(MAX) = 3.3V or 5V, IQ = 7µA,
SD < 1µA, SC-70 Package
I
LTC3427
500mA ISW, 1.2MHZ, Synchronous Step-Up Dꢀ/Dꢀ
ꢀonverter with Output Disconnect
93% Efficiency VIN: 1.8V to 4.5V, VOUT(MAX) = 5V,
2mm × 2mm DFN Package
LTC3400/LTC3400B
LTC3527/LTC3527-1
600mA ISW, 1.2MHz, Synchronous Step-Up
DC/DC Converters
92% Efficiency VIN: 1V to 5V, VOUT(MAX) = 5V, IQ = 19µA/300µA,
I
SD < 1µA, ThinSOT™ Package
Dual 600mA/400mA I , 1.2MHz/2.2MHz Synchronous 94% Efficiency VIN: 0.7V to 5V, VOUT(MAX) = 5.25V, IQ = 12µA,
SW
Step-Up DC/DC Converters
ISD < 1µA, 3mm × 3mm QFN-16 Package
3526lb2fa
LT 0910 REV A • PRINTED IN USA
Linear Technology Corporation
1630 Mcꢀarthy Blvd., Milpitas, ꢀA 95035-7417
ꢀꢅ
●
●
LINEAR TECHNOLOGY CORPORATION 2009
(408)432-1900 FAX: (408) 434-0507 www.linear.com
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