LTC3532EDD#PBF_技术文档

LTC3532

Micropower Synchronous

Buck-Boost DC/DC Converter

U

DESCRIPTIO

FEATURES

The LTC^®3532 is a high efﬁciency, ﬁxed frequency, buck-

boost DC/DC converter that operates from input voltages

above, below or equal to the output voltage. The topology

incorporated in the IC provides a continuous transfer

function through all operating modes, making the product

ideal for single lithium-ion, multicell alkaline or NiMH ap-

plications where the output voltage is within the battery

voltage range.

■

Single Inductor

■

Regulated Output with Input Voltages Above, Below

or Equal to the Output

■

Wide V Range: 2.4V to 5.5V

IN

■

V

OUT

Range: 2.4V to 5.25V

Up to 500mA Peak Output Current

Synchronous Rectiﬁcation: Up to 95% Efﬁciency

Manual or Programmable Automatic Burst Mode^®

Operation

Output Disconnect in Shutdown

Programmable Oscillator: 300kHz to 2MHz

Pin Compatible with LTC3440

The device includes two 0.36Ω N-channel MOSFET

switches and two 0.42Ω P-channel switches. Switching

frequencies up to 2MHz are programmed with an external

resistor. Quiescent current is only 35μA in Burst Mode

operation, maximizing battery life in portable applica-

tions. Automatic Burst Mode operation allows the user

to program the load current for Burst Mode operation or

to control it manually.

■

Small Thermally Enhanced 10-Lead (3mm × 3mm)

DFN and 10-Lead MSOP Packages

U

APPLICATIO S

Other features include a 1μA shutdown, soft-start control,

■

Miniature Hard Disk Drive Power Supply

thermal shutdown, and peak current limit. The LTC3532 is

available in a low proﬁle (0.75mm) 10-lead (3mm × 3mm)

DFN and 10-lead MSOP packages.

■

MP3 Players

■

Handheld Instruments

■

Digital Cameras

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

Burst Mode is a registered trademark of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

■

Handheld Terminals

U

TYPICAL APPLICATIO

Miniature Hard Disk Drive Power Supply

V

OUT

3.3V

4.7μH

V

OUT

100mA

TO 500mA

(PEAK)

200mV/DIV

340k

1k

SW2

SW1

V

IN

V

Li-Ion

V

OUT

FB

IN

2.5V TO 4.2V

SHDN/SS

BURST

LTC3532

33pF

I

12.1k

LOAD

100mA/DIV

V

C

220pF

R

GND

T

3532 TA01b

100μs/DIV

V

LOAD

= 3V

IN

200k

43.2k

200k

10μF

= 3.3V

OUT

I

= 50mA TO 300mA

4.7μF

0.01μF

3532 TA01

3532fc

1

LTC3532

W W U W

(Note 1)

ABSOLUTE AXI U RATI GS

Maximum Junction Temperature (Note 4)............. 125°C

Storage Temperature Range

BURST, V , V , V , FB –0.3V to 6V

...................................

IN OUT

C

R ..................................................................... 0V to 5V

T

DD ..................................................... –65°C to 125°C

MSOP ................................................ –65°C to 150°C

Lead Temperature (Soldering,10 sec)

SHDN/SS ..................................................... –0.3V to 6V

SW1, SW2

DC............................................................ –0.3V to 6V

Pulsed < 100ns........................................ –0.3V to 7V

Operating Temperature Range (Note 2).... –40°C to 85°C

MSOP ............................................................... 300°C

U

PI CO FIGURATIO

TOP VIEW

R

1

2

3

4

5

10

9

V

T

C

R

1

2

3

4

5

10

V

C

T

BURST

SW1

FB

BURST

SW1

9

8

7

6

FB

SHDN/SS

8

SHDN/SS

V

SW2

GND

7

6

11

IN

OUT

SW2

V

IN

MS PACKAGE

10-LEAD PLASTIC MSOP

= 125°C

= 130°C/W 1 LAYER BOARD

= 100°C/W 4 LAYER BOARD

GND

OUT

T

JMAX

DD PACKAGE

θ

JA

10-LEAD (3mm × 3mm) PLASTIC DFN

= 125°C, θ = 43°C/W

EXPOSED PAD (PIN 11) IS GND, MUST BE CONNECTED TO PCB

θ

T

JMAX

JA

θ

= 45°C/W

JC

U

W

U

ORDER I FOR ATIO

LEAD FREE FINISH

LTC3532EDD#PBF

LTC3532EMS#PBF

TAPE AND REEL

PART MARKING

LBXR

PACKAGE DESCRIPTION

TEMPERATURE RANGE

–40°C to 85°C

LTC3532EDD#TRPBF

LTC3532EMS#TRPBF

10-Lead (3mm × 3mm) Plastic DFN

10-Lead Plastic MSOP

LTBXS

–40°C to 85°C

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= V_OUT= 3.6V, R_T= 64.9k, unless otherwise speciﬁed.

PARAMETER

CONDITIONS

MIN

TYP

MAX

2.4

5.5

5.25

1.25

50

UNITS

V

●

Input Start-Up Voltage

Input Operating Range

Output Voltage Adjust Range

Feedback Voltage

2.3

2.4

V

1.19

1.22

1

V

Feedback Input Current

Quiescent Current, Burst Mode Operation

Quiescent Current, Shutdown

Quiescent Current, Active

NMOS Switch Leakage

V_FB= 1.22V

nA

μA

BURST = 0V

35

60

SHDN = 0V, Not Including Switch Leakage, V

= 0V

0.1

600

0.1

1

OUT

V = 0V, BURST = V (Note 3)

1000

5

IN

C

Switches B and C

μA

3532fc

2

LTC3532

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= V_OUT= 3.6V, R_T= 64.9k, unless otherwise speciﬁed.

PARAMETER

CONDITIONS

MIN

TYP

0.1

MAX

UNITS

μA

Ω

PMOS Switch Leakage

NMOS Switch On Resistance

PMOS Switch On Resistance

Input Current Limit

Switches A and D

Switches B and C

Switches A and D

10

0.36

0.42

1.1

Ω

0.8

1.45

A

●

Maximum Duty Cycle

Boost (% Switch C On)

Buck (% Switch A On)

70

100

88

%

●

Minimum Duty Cycle

Frequency Accuracy

Burst Threshold (Falling)

Burst Threshold (Rising)

Burst Current Ratio

0

%

kHz

V

575

740

0.88

1.12

8000

90

885

V

Ratio of I_OUTto I_BURST

Error Amp AVOL

dB

μA

Error Amp Source Current

Error Amp Sink Current

SHDN/SS Threshold

V = 1.4V

C

15

V = 2V

C

310

●

When IC is Enabled

When EA is at Maximum Boost Duty Cycle

0.4

1

2.2

1.5

1

V

SHDN/SS Input Current

V_SHDN= 5.5V

0.01

μA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC3532E is guaranteed to meet performance specifications

from 0°C to 85°C. Specifications over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlations

with statistical process controls.

Note 3: Current measurements are performed when the outputs are not

switching.

Note 4: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature protection is active.

Continuous operation above the specified maximum operating junction

temperature may result in device degradation or failure.

U W

TYPICAL PERFOR A CE CHARACTERISTICS ^T_A^{= 25°C, unless otherwise speciﬁed.}

Fixed Frequency and Burst Mode

Quiescent Current vs V_IN

Efﬁciency and Power Loss

vs Load Autoburst Mode

Efﬁciency and Power Loss

vs Load

100

1000

100

1000

100

10

80

3.0

2.5

75

70

65

60

55

50

45

40

EFFICIENCY

90 BURST EFFICIENCY

80

90

80

2000kHz

1500kHz

2.0

1.5

1000kHz

10

1

70

60

POWER LOSS

FIXED FREQUENCY

POWER LOSS

1

BURST

60

1.0

0.5

0

POWER LOSS

0.1

500kHz

3V

3.6V

4.2V

50

40

FIXED FREQUENCY

NOT SWITCHING

4.5

BURST MODE

2.5 3.5

V

= 3.3V

1

EFFICIENCY

OUT

40

0.1

1000

0.01

1000

1

10

100

5.5

0.1

10

100

LOAD CURRENT (mA)

V

(V)

IN

3532 G02

3532 G01

3532 G03

3532fc

3

LTC3532

U W

TYPICAL PERFOR A CE CHARACTERISTICS

T_A= 25°C, unless otherwise speciﬁed.

Peak Current Clamp and Limit

vs V_IN

Automatic Burst Threshold

vs R_BURST

Efﬁciency vs Frequency

70

60

100

98

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

96

94

92

I

LIMIT

50

40

I

CLAMP

90

88

LEAVE BURST

ENTER BURST

30

20

10

86

84

82

80

V

= 3.6V

V

= 3.3V

250

IN

OUT

IN

V

= 3.3V

= 3.6V

OUT

550

500

1500

1000

FREQUENCY (kHz)

2000

2.4

3.4

4.4

5.4

150

350

450

BURST RESISTOR (kΩ)

V

(V)

IN

3532 G06

3532 G04

3532 G05

Load Transient Response in

Fixed Frequency Mode

Frequency vs Temperature

Feedback Voltage vs Temperature

1200

1150

1100

1050

1000

950

1.241

1.236

1.231

1.226

1.221

1.216

1.211

1.206

1.201

V

OUT

200mV/DIV

I

LOAD

100mA/DIV

900

3535 G09

100μs/DIV

850

C

V

= 10μF

= 3.3V

OUT

V

= 3.6V

IN

= 3.6V

IN

800

1.196

OUT

–5

–55

45

95

–55

–5

TEMPERATURE (°C)

95

45

TEMPERATURE (°C)

3532 G07

3532 G08

Switch Pins Before Entering

Boost Mode

Burst Mode to Fixed Frequency

Transition

Switch Pins in Buck-Boost Mode

SW1

2V/DIV

V

SW1

2V/DIV

OUT

200mV/DIV

BURST PIN

2V/DIV

SW2

2V/DIV

SW2

2V/DIV

3532 G10

3532 G11

3532 G12

400μs/DIV

40ns/DIV

C

V

= 22μF

= 3.3V

V

I

= 3.3V

V

I

= 2.9V

OUT

IN

OUT

IN

OUT

IN

OUT

= 3.6V

= 3.3V

= 100mA

LOAD

3532fc

4

LTC3532

U W

TYPICAL PERFOR A CE CHARACTERISTICS

T_A= 25°C, unless otherwise speciﬁed.

Switch Pins Before Entering

Buck Mode

Output Ripple at 100mA Load

Burst Mode, Boost

SW1

2VDIV

V

= 2.4V

= 3.6V

IN

5V/DIV

V

OUT

50mV/DIV

SW2

5V/DIV

V

OUT

50mV/DIV

SW2

2VDIV

V

OUT

V

= 4.5V

100mV/DIV

IN

V

OUT

INDUCTOR

CURRENT

500mA/DIV

50mV/DIV

3535 G13

3535 G15

3535 G14

40ns/DIV

4μs/DIV

400ns/DIV

V

= 4V

V

I

= 2.4V

V

= 3.6V

= 100mA

= 10μF

IN

OUT

VOUT = 3.3V

= 100mA

= 3.3V

= 20mA

= 22μF

I

C

LOAD

OUT

C

OUT

Burst Mode, Buck-Boost

Burst Mode, Buck

SW1

5V/DIV

SW1

5V/DIV

SW2

5V/DIV

SW2

5V/DIV

V

OUT

V

100mV/DIV

OUT

100mV/DIV

INDUCTOR

CURRENT

500mA/DIV

INDUCTOR

CURRENT

500mA/DIV

3535 G17

340612 G16

4μs/DIV

V

I

= 4.2V

V

I

= 3.75V

= 3.3V

IN

OUT

IN

OUT

= 3.3V

= 20mA

= 22μF

= 20mA

= 22μF

LOAD

C

OUT

U

PI FU CTIO S

RT (Pin 1): Timing Resistor to Program the Oscillator

Frequency. The programming range is 300kHz to 2MHz.

An optional Schottky diode can be connected from SW1

to ground. Minimize trace length to minimize EMI.

SW2 (Pin 4): Switch Pin Where the Internal Switches C

48,000

f(kHz) =

andDareConnected.Forapplicationswithoutputvoltages

R_T(kΩ)

over 4.3V, a Schottky diode is required from SW2 to V

to ensure SW2 does not exhibit excess voltage.

OUT

BURST (Pin 2): Used to Set the Automatic Burst Mode Op-

erationThreshold. Placearesistorandcapacitorinparallel

from this pin to ground. See the Applications Information

sectionforcomponentvalueselection.Formanualcontrol,

ground the pin to force Burst Mode operation, connect to

GND (Pin 5): Signal and Power Ground for the IC.

V

(Pin 6): Output of the Synchronous Rectiﬁer. A ﬁlter

OUT

capacitor is placed from V

to GND.

OUT

V (Pin 7): Input Supply Pin. Supplies current to the

IN

V

to force ﬁxed frequency mode.

OUT

inductor through SW1 and supplies internal V for the

CC

SW1 (Pin 3): Switch Pin Where the Internal Switches A

and B are Connected. Connect inductor from SW1 to SW2.

IC. A ceramic bypass capacitor as close to the V pin and

IN

GND (Pin 5) is required.

3532fc

5

LTC3532

U

PI FU CTIO S

SHDN/SS (Pin 8): Combined Soft-Start and Shutdown.

Grounding this pin shuts down the IC. Tie to >1.5V to

enable the IC and >2.4V to ensure the error amp is not

clampedfromsoft-start.ForBurstModeoperation,thispin

1.22V • R1+ R2

(

)

V_OUT

=

R2

V (Pin10): Error Amp Output: A frequency compensa-

C

must be pulled up to within 0.5V of V . An RC from the

IN

tion network is connected from this pin to the FB pin to

compensatetheloop.RefertotheApplicationsInformation

section for component value selection.

shutdown command signal to this pin will provide a soft-

start function by limiting the rise time of the V pin.

C

FB (Pin 9): Feedback Pin. Connect resistor divider tap

Exposed Pad (Pin11): The exposed pad (DFN Package)

must be soldered to PCB ground for electrical contact and

rated thermal performance.

here. The output voltage can be adjusted from 2.4V to

5.25V. The feedback reference is typically 1.22V. Set V

according to the formula:

OUT

W

BLOCK DIAGRA

3

4

SW1

SW2

SW D

V

OUT

IN

SW A

7

6

GATE

DRIVERS

AND

ANTICROSS

CONDUCTION

SW B

SW C

–

+

REVERSE

AMP

+

g

= 1/60k

m

–

1A

1.22V

+

–

PEAK CURRENT

LIMIT

–

+

ERROR

AMP

+

–

FB

9

1.1A

V

C

PWM

LOGIC

PWM COMP

10

–

+

UVLO

+

–

V

IN

2.3V

AUTOMATIC

Burst Mode

SLEEP

CONTROL AND

HOLD

V

C

R

T

1

8

OSC

BURST

2

1.22V

REF

V

REF

V

CC

IN

V

SS

SHUTDOWN

SOFT-START

SHDN/SS

THERMAL

SHUTDOWN

GND

5

3532 BD

3532fc

6

LTC3532

U

OPERATIO

The LTC3532 provides high efﬁciency, low noise power

for applications such as portable instrumentation, digital

cameras, and MP3 players. The LTC proprietary topology

allows input voltages above, below or equal to the output

voltagebyproperlyphasingtheoutputswitches. Theerror

cally 50ns. A second ampliﬁer will begin to source current

into the FB pin to drop the output voltage once the peak

input current exceeds 1A typical. This method provides a

closed loop means of clamping the input current. During

conditions where V

is near ground, such as during a

OUT

ampoutputvoltageonV determinestheoutputdutycycle

short-circuit or during startup, this threshold is cut in half

providing a fold back feature. For this current limit feature

to be most effective, the Thevenin resistance from FB to

ground should be greater than 100k.

C

of the switches. Since V is a ﬁltered signal, it provides

rejectionoffrequencieswellbelowtheswitchingfrequency.

The low R , low gate charge synchronous switches

DS(ON)

provide high frequency pulse width modulation control at

high efﬁciency. Schottky diodes across the synchronous

switch D and synchronous switch B are not required, but

providealowervoltagedropduringthebreak-before-make

time (typically 15ns). Schottky diodes will improve peak

efﬁciencybytypically1%to2%.Highefﬁciencyisachieved

at light loads when Burst Mode operation is entered and

the IC’s quiescent current drops to a low 35μA.

Reverse Current Limit

Duringﬁxedfrequencyoperation,theLTC3532operatesin

forced continuous conduction mode. The reverse current

limit ampliﬁer monitors the inductor current from the out-

put through switch D. Once the negative inductor current

exceeds 340mA typical, the IC will shut off switch D.

4-Switch Control

LOW NOISE FIXED FREQUENCY OPERATION

Figure1showsasimpliﬁeddiagramofhowthefourinternal

switchesareconnectedtotheinductor,V ,V

andGND.

Oscillator

IN OUT

Figure2showstheregionsofoperationfortheLTC3532as

The frequency of operation is programmed by an external

a function of the internal control voltage, V . Depending

CI

resistor from R to ground, according to the following

T

on the control voltage, the IC will operate in either buck,

equation:

buck/boostorboostmode.TheV voltageisalevelshifted

CI

voltage from the output of the error amp (V ) (see Figure

C

48,000

f(kHz) =

5). The four power switches are properly phased so the

R_T(kΩ)

transfer between operating modes is continuous, smooth

and transparent to the user. When V approaches V

IN

OUT

Error Amp

the buck/boost region is reached where the conduction

time of the 4-switch region is typically 150ns. Referring

to Figures 1 and 2, the various regions of operation will

now be described.

The error ampliﬁer is a voltage mode ampliﬁer. The loop

compensation components are conﬁgured around the

ampliﬁer(fromFBtoV )toobtainstabilityoftheconverter.

C

For improved bandwidth, an additional RC feedforward

network can be placed across the upper feedback divider

resistor. The voltage on SHDN/SS clamps the error amp

V

IN

OUT

7

6

output, V , to provide a soft-start function.

C

PMOS A

PMOS D

SW1

3

SW2

4

Internal Current Limit

TherearetwodifferentcurrentlimitcircuitsintheLTC3532.

They have internally ﬁxed thresholds which vary inversely

NMOS B

NMOS C

with V . The ﬁrst circuit is a high speed peak current limit

IN

3532 F01

comparatorthatwillshutoffswitchAifthecurrentexceeds

1.1A typical. The delay to output of this ampliﬁer is typi-

Figure 1. Simpliﬁed Diagram of Output Switches

3532fc

7

LTC3532

U

OPERATIO

V_OUT

1– (150ns • f)

88%

MAX

BOOST

V =

D

V4 (≈2.05V)

IN

A ON, B OFF

PWM CD SWITCHES

BOOST REGION

D

MIN

The point at which the 4-switch region ends is given by:

V = V (1 – D) = V (1 – 150ns • f) V

V3 (≈1.65V)

V2 (≈1.55V)

BOOST

BUCK/BOOST REGION

FOUR SWITCH PWM

D

MAX

IN

OUT

BUCK

D ON, C OFF

PWM AB SWITCHES

BUCK REGION

Boost Region (V < V

)

OUT

IN

V1 (≈0.9V)

0%

Switch A is always on and switch B is always off dur-

ing this mode. When the internal control voltage, V , is

DUTY

CYCLE

INTERNAL

CONTROL

VOLTAGE, V

CI

3532 F02

above voltage V3, switch pair CD will alternately switch

to provide a boosted output voltage. This operation is like

a synchronous boost regulator. The maximum duty cycle

of the converter is limited to 88% typical and is reached

CI

Figure 2. Switch Control vs Internal Control Voltage, V_CI

Buck Region (V > V

)

IN

OUT

when V is above V4.

CI

Switch D is always on and switch C is always off dur-

Burst Mode OPERATION

ing this mode. When the internal control voltage, V , is

CI

above voltage V1, output A begins to switch. During the

off-time of switch A, synchronous switch B turns on for

the remainder of the time. Switches A and B will alternate

like a typical synchronous buck regulator. As the control

voltage increases, the duty cycle of switch A increases

until the maximum duty cycle of the converter in buck

Burst Mode operation occurs when the IC delivers energy

to the output until it is regulated and then goes into a sleep

mode where the outputs are off and the IC is consuming

only 35μA of quiescent current from V . In this mode the

IN

output ripple has a variable frequency component that

depends upon load current, and will typically be about

2% peak-to-peak. Burst Mode operation ripple can be

reduced slightly by using more output capacitance (47μF

or greater). Another method of reducing Burst Mode

operation ripple is to place a small feedforward capacitor

mode reaches D

, given by:

MAX_BUCK

D

= 100 – D4

%

MAX_BUCK

SW

where D4 = duty cycle % of the 4-switch range.

SW

across the upper resistor in the V

feedback divider

OUT

D4 = (150ns • f) • 100 %

SW

network (as in Type III compensation). During the period

where the device is delivering energy to the output, the

peak switch current will be equal to 250mA typical and

the inductor current will terminate at zero current for each

cycle. In this mode the typical maximum average output

current is given by:

where f = operating frequency, Hz.

Beyond this point the “4-switch,” or buck/boost region

is reached.

Buck/Boost or 4-Switch (V ~ V

)

OUT

IN

When the internal control voltage, V , is above voltage

CI

0.2 • V

V_OUT+ V

IN

I_{OUT(MAX)BURST}

≈

A

V2, switch pair AD remain on for duty cycle D

,

MAX_BUCK

IN

and the switch pair AC begins to phase in. As switch pair

AC phases in, switch pair BD phases out accordingly.

When the V voltage reaches the edge of the buck/boost

CI

range, at voltage V3, the AC switch pair completely phase

out the BD pair, and the boost phase begins at duty cycle

D4 . The input voltage, V , where the 4-switch region

SW

IN

begins is given by:

3532fc

8

LTC3532

U

OPERATIO

V

D

V

D

IN

OUT

IN

OUT

7

6

7

6

V

L

dI

dt

OUT

L

+

dI

dt

IN

A

≈ –

L

≈

L

+

–

250mA

0mA

250mA

0mA

3

4

3

4

SW1

SW2

SW1

SW2

B

C

3532 F04

3532 F03

T2

T1

5

GND

Figure 3. Inductor Charge Cycle During Burst Mode Operation

Figure 4. Inductor Disharge Cycle During Burst Mode Operation

Note that the peak efﬁciency during Burst Mode operation

is less than the peak efﬁciency during ﬁxed frequency

because the part enters full-time 4-switch mode (when

servicing the output) with discontinuous inductor cur-

rent as illustrated in Figures 3 and 4. During Burst Mode

operation, the control loop is nonlinear and cannot utilize

the control voltage from the error amp to determine the

controlmode,thereforefull-time4-switchmodeisrequired

to maintain the buck/boost function. The efﬁciency below

1mA becomes dominated primarily by the quiescent cur-

rent. The Burst Mode operation efﬁciency is given by:

where R

is in kΩ and I

is the load transition

BURST

current in Amps. For automatic operation, a ﬁlter capaci-

tor should also be connected from BURST to ground to

prevent ripple on BURST from causing the IC to oscillate

in and out of Burst Mode operation. The equation for the

minimum capacitor value is:

C_OUT• V_OUT

60,000V

C_BURST(MIN)

≥

where C

and C are in μF. In the event that

OUT

BURST(MIN)

a load transient causes the feedback pin to drop by more

than 4% from the regulation value while in Burst Mode

operation,theICwillimmediatelyswitchtoﬁxedfrequency

mode and an internal pull-up will be momentarily applied

to BURST, rapidly charging the BURST capacitor. This

prevents the IC from immediately reentering Burst Mode

operation once the output achieves regulation.

n •I_LOAD

EFFICIENCY ≅

35μA +I_LOAD

where n is typically 88% during Burst Mode operation.

Automatic Burst Mode Operation Control

Burst Mode operation can be automatic or manually con-

trolled with a single pin. In automatic mode, the IC will

enterBurstModeoperationatlightloadandreturntoﬁxed

frequency operation at heavier loads. The load current at

which the mode transition occurs is programmed using

a single external resistor from the BURST pin to ground,

according to the following equations:

Manual Burst Mode Operation

For manual control of Burst Mode operation, the RC net-

workconnectedtoBURSTcanbeeliminated.Toforceﬁxed

frequency mode, BURST should be connected to V . To

force Burst Mode operation, BURST should be grounded.

When commanding Burst Mode operation manually, the

circuit connected to BURST should be able to sink up to

2mA. For optimum transient response with large dynamic

loads, the operating mode should be controlled manually

by the host. By commanding ﬁxed frequency operation

priortoasuddenincreaseinload,outputvoltagedroopcan

OUT

10.5V

Enter Burst Mode Operation: I =

R_BURST

7V

R_BURST

Leave Burst Mode Operation: I =

3532fc

9

LTC3532

U

OPERATIO

be minimized. Note that if the load current applied during

forced Burst Mode operation (BURST pin is grounded)

exceedsthecurrentthatcanbesupplied,theoutputvoltage

will start to droop and the IC will automatically come out

of Burst Mode operation and enter ﬁxed frequency mode,

incorporates an active clamp circuit that holds the voltage

on V at an optimal voltage during Burst Mode operation.

C

This minimizes any output transient when returning to

ﬁxed frequency mode operation. For optimum transient

response, Type 3 compensation is also recommended

to broad band the control loop and roll off past the two

pole response of the output LC ﬁlter. (See Closing the

Feedback Loop.)

raising V . Once regulation is achieved, the IC will then

OUT

enter Burst Mode operation once again, and the cycle will

repeat,resultinginabout4%outputripple.NotethatBurst

Mode operation is inhibited during soft-start.

Soft-Start

Burst Mode Operation to Fixed Frequency Transient

Response

The soft-start function is combined with shutdown. When

the SHDN/SS pin is brought above 1V typical, the IC is

enabled but the EA duty cycle is clamped from V . A de-

C

In Burst Mode operation, the compensation network is

tailed diagram of this function is shown in Figure 5. The

not used and V is disconnected from the error ampliﬁer.

C

components R and C provide a slow ramping voltage

SS

During long periods of Burst Mode operation, leakage

currents in the external components or on the PC board

could cause the compensation capacitor to charge (or

discharge), which could result in a large output transient

whenreturningtoﬁxedfrequencymodeofoperation,even

at the same load current. To prevent this, the LTC3532

on SHDN/SS to provide a soft-start function. To ensure

that V is not being clamped, SHDN/SS must be raised

C

above 2.4V. To enable Burst Mode operation, SHDN/SS

must be raised to within 0.5V of V .

IN

V

IN

ERROR AMP

15μA

V

OUT

1.22V

+

–

R1

FB

9

C

P1

R2

V

C

SOFT-START

CLAMP

10

V

CI

TO PWM

COMPARATORS

SHDN/SS

R

SS

ENABLE SIGNAL

8

3532 F05

C

SS

+

–

CHIP

ENABLE

1V

Figure 5. Soft-Start Circuitry

3532fc

10

LTC3532

U

W U U

APPLICATIO S I FOR ATIO

peak inductor currents in the 1A to 2A region. To minimize

radiated noise, use a shielded inductor. See Table 1 for a

suggested list of inductor suppliers.

R

V

C

1

2

3

4

5

10

9

T

LTC3532

BURST

SW1

FB

SHDN/SS

8

Table 1. Inductor Vendor Information

SW2

V

7

IN

SUPPLIER

Coilcraft

Murata

Sumida

TDK

WEB SITE

www.coilcraft.com

www.murata.com

www.sumida.com

www.component.tdk.com

www.tokoam.com

6

GND

V

OUT

GND

3532 F06

TOKO

Figure 6. Recommended Component Placement. Traces Carrying

High Current are Direct. Trace area at FB and V_CPins are Kept

Low. Lead Length to Battery Should be Kept Short

Output Capacitor Selection

The bulk value of the output ﬁlter capacitor is set to reduce

the ripple due to charge into the capacitor each cycle. The

steady state ripple due to charge is given by:

Inductor Selection

The high frequency operation of the LTC3532 allows the

use of small surface mount inductors. The inductor ripple

current is typically set to 20% to 40% of the maximum

inductor current. For a given ripple the inductance terms

are given as follows:

% RIPPLE_BOOST =

I_OUT(MAX)•(V_OUT– V_IN(MIN)) • 100

%

2

C_OUT• V_OUT• f

% RIPPLE_BUCK =

V

_IN(MIN)•(V_OUT– V

)

IN(MIN)

L_BOOST

>

H

(V_IN(MAX)– V_OUT) • 100%

f • ΔI_L• V_OUT

1

•

8LCf²

V

IN(MAX)

V_OUT•(V_IN(MAX)– V_OUT

)

L_BUCK

>

H

f • ΔI_L• V

IN(MAX)

where C

= output ﬁlter capacitor in Farads and

OUT

f = switching frequency in Hz.

where f = Operating frequency, Hz

ΔIL = Maximum allowable inductor ripple current, A

The output capacitance is usually many times larger than

theminimumvalueinordertohandlethetransientresponse

requirements of the converter. As a rule of thumb, the ratio

of the operating frequency to the unity-gain bandwidth of

the converter is the amount the output capacitance will

have to increase from the above calculations in order to

maintain the desired transient response.

V

= Minimum input voltage

= Maximum input voltage

IN(MIN)

IN(MAX)

= Output voltage

OUT

I

= Maximum output load current

OUT(MAX)

The other component of ripple is due to the ESR (equiva-

lent series resistance) of the output capacitor. Low ESR

capacitors should be used to minimize output voltage

ripple. For surface mount applications, Taiyo Yuden or

TDK ceramic capacitors, AVX TPS series tantalum capaci-

tors or Sanyo POSCAP are recommended. See Table 2 for

contact information.

For high efﬁciency, choose a ferrite inductor with a high

frequency core material to reduce core losses. The induc-

tor should have low ESR (equivalent series resistance) to

reducetheI2Rlosses, andmustbeabletohandlethepeak

inductorcurrentwithoutsaturating.Moldedchokesorchip

inductors usually do not have enough core to support the

3532fc

11

LTC3532

U

W U U

APPLICATIO S I FOR ATIO

Table 2. Capacitor Vendor Information

Operating Frequency Selection

SUPPLIER

AVX

WEB SITE

Higher operating frequencies allow the use of a smaller

inductor and smaller input and output ﬁlter capacitors,

thus reducing board area and component height. How-

ever, higher operating frequencies also increase the IC’s

total quiescent current due to the gate charge of the four

switches, as given by:

www.avxcorp.com

www.murata.com

www.sanyovideo.com

www.t-yuden.com

www.component.tdk.com

Murata

Sanyo

Taiyo Yuden

TDK

Buck: I = (0.125 • V • f) mA

Input Capacitor Selection

Q

IN

Boost: I = [0.06 • (V + V ) • f] mA

Q

IN

OUT

Since V is the supply voltage for the IC, as well as the

IN

Buck/Boost: I = [f • (0.19 • V + 0.06 • V )] mA

Q

IN

OUT

inputtothepowerstageoftheconverter,itisrecommended

wheref=switchingfrequencyinMHz.Thereforefrequency

selection is a compromise between the optimal efﬁciency

and the smallest solution size.

to place at least a 4.7μF, low ESR ceramic bypass capaci-

tor close to the V and GND pins. It is also important to

IN

minimize any stray resistance from the converter to the

battery or other power source.

Closing the Feedback Loop

The LTC3532 incorporates voltage mode PWM control.

The control to output gain varies with operation region

(buck, boost, buck/boost), but is usually no greater than

15. The output ﬁlter exhibits a double pole response, as

given by:

Optional Schottky Diodes

The Schottky diodes across the synchronous switches

B and D are not required (V

< 4.3V), but provide a

OUT

lower drop during the break-before-make time (typically

15ns) improving efﬁciency. Use a surface mount Schottky

diode such as an MBRM120T3 or equivalent. Do not use

ordinary rectiﬁer diodes, since the slow recovery times

will compromise efﬁciency. For applications with an

output voltage above 4.3V, a Schottky diode is required

1

f_FILTER

=

Hz

POLE

—

2 • π • L • C_OUT

(in buck mode)

f_FILTER

from SW2 to V

.

OUT

V

IN

=

Hz

POLE

Output Voltage > 4.3V

—

2 • V_OUT• π • L • C_OUT

A Schottky diode from SW2 to V

is required for output

OUT

(in boost mode)

where L is in henrys and C

voltages over 4.3V. The diode must be located as close to

the pins as possible in order to reduce the peak voltage on

SW2 due to the parasitic lead and trace inductance.

is in farads.

OUT

The output ﬁlter zero is given by:

Input Voltage > 4.5V

1

f_FILTER

=

Hz

ZERO

—

2 • π •R_ESR• C_OUT

For applications with input voltages above 4.5V which

could exhibit an overload or short-circuit condition, a

2Ω/1nF series snubber is required between SW1 and

where R

is the equivalent series resistance of the

ESR

output capacitor.

GND. A Schottky diode from SW1 to V should also be

IN

added as close to the pins as possible. For the higher input

Atroublesomefeatureinboostmodeistheright-halfplane

zero (RHP), given by:

voltages, V bypassing becomes more critical; therefore,

IN

a ceramic bypass capacitor as close to the V and SGND

IN

2

V

pins as possible is also required.

IN

f_RHPZ

=

Hz

2 • π •I_OUT•L • V_OUT

3532fc

12

LTC3532

U

W U U

APPLICATIO S I FOR ATIO

The loop gain is typically rolled off before the RHP zero

frequency.

the output ﬁlter. Referring to Figure 8, the location of the

poles and zeros are given by:

A simple Type I compensation network can be incorpo-

rated to stabilize the loop, but at a cost of reduced band-

width and slower transient response. To ensure proper

phase margin using Type I compensation, the loop must

be crossed over a decade before the LC double pole.

The unity-gain frequency of the error ampliﬁer with the

Type I compensation is given by:

1

f_POLE1

≅

Hz

2 • π • 32e³•R1• CP1

(which is extremely close to DC)

1

f_ZERO1

f_ZERO2

f_POLE2

=

Hz

2 • π •R_Z• C_P1

1

f_UG

=

Hz

2 • π •R1• C_P1

2 • π •R1• C_Z1

1

referring to Figure 7.

2 • π •R_Z• C_P2

Mostapplicationsdemandanimprovedtransientresponse

toallowasmalleroutputﬁltercapacitor.Toachieveahigher

bandwidth, Type III compensation is required, providing

two zeros to compensate for the double-pole response of

where resistance is in ohms and capacitance is in far-

ads.

V

OUT

1.22V

+

–

C

Z1

R1

ERROR

AMP

V

OUT

FB

9

1.22V

+

–

ERROR

AMP

R1

FB

9

C

R2

P1

V

C

R

Z

10

C

P2

R2

P1

V

C

3532 F08

10

3532 F07

Figure 7. Error Ampliﬁer with Type l Compensation

Figure 8. Error Ampliﬁer with Type lll Compensation

3532fc

13

LTC3532

U

TYPICAL APPLICATIO S

Three Cell to 3.3V at 300mA Buck-Boost Converter

With Automatic Burst Mode Operation and Soft-Start

V

OUT

L1

4.7μH

3.3V

300mA

R1

340k

R9

1k

SW1

SW2

SW1

SW2

V

IN

2.7V TO 4.5V

V

IN

OUT

FB

SHDN

BURST

FB

SHDN/SS

LTC3532

R7

200k

C4

150pF

VC

BURST

VC

R6

12.1k

R

T

C2

150pF

R

GND

T

C3

22μF

C1

4.7μF

0.01μF

R2

200k

C5

4.7nF

200k

R4

86.6k

3532 TA02

Li-Ion to 5V Boost Converter with Output Disconnect

D1

L1

2.2μH

DMBRM 110LT3

V

OUT

5V

300mA

R1

412k

R9

1k

SW1

SW2

FB

SW1

SW2

V

IN

2.5V TO 4.2V

V

IN

V

OUT

FB

SHDN

SHDN/SS

LTC3532

R7

200k

C4

68pF

V

C

BURST

V

C

R6

12.1k

R

C2

220pF

T

R

GND

T

C3

10μF

C1

4.7μF

R4

28.7k

R2

133k

C5

4.7nF

SD

3532 TA03

3532fc

14

LTC3532

U

PACKAGE DESCRIPTIO

DD Package

10-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1699)

R = 0.115

0.38 ± 0.10

TYP

6

10

0.675 ±0.05

3.50 ±0.05

2.15 ±0.05 (2 SIDES)

1.65 ±0.05

3.00 ±0.10

(4 SIDES)

1.65 ± 0.10

(2 SIDES)

PIN 1

TOP MARK

(SEE NOTE 6)

PACKAGE

OUTLINE

(DD) DFN 1103

5

1

0.25 ± 0.05

0.50 BSC

0.75 ±0.05

0.200 REF

0.25 ± 0.05

0.50

BSC

2.38 ±0.10

(2 SIDES)

2.38 ±0.05

(2 SIDES)

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).

CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

MS Package

10-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1661 Rev E)

3.00 ± 0.102

(.118 ± .004)

(NOTE 3)

0.497 ± 0.076

(.0196 ± .003)

0.889 ± 0.127

(.035 ± .005)

10 9

8

7 6

REF

3.00 ± 0.102

(.118 ± .004)

(NOTE 4)

5.23

(.206)

MIN

4.90 ± 0.152

(.193 ± .006)

3.20 – 3.45

(.126 – .136)

DETAIL “A”

0° – 6° TYP

0.254

(.010)

GAUGE PLANE

0.50

(.0197)

BSC

0.305 ± 0.038

(.0120 ± .0015)

TYP

1

2

3

4 5

0.53 ± 0.152

(.021 ± .006)

0.86

(.034)

REF

1.10

(.043)

MAX

RECOMMENDED SOLDER PAD LAYOUT

DETAIL “A”

0.18

(.007)

SEATING

PLANE

0.17 – 0.27

(.007 – .011)

TYP

0.1016 ± 0.0508

(.004 ± .002)

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

0.50

(.0197)

BSC

MSOP (MS) 0307 REV E

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

3532fc

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

15

LTC3532

U

TYPICAL APPLICATIO

Low Proﬁle Li-Ion to 3.3V at 300mA Converter with Automatic Burst Mode Operation

V

OUT

L1

2.2μH

3.3V

300mA

R1

340k

R9

1k

SW1

SW2

FB

SW1

SW2

V

IN

2.5V TO 4.2V

V

IN

OUT

FB

SHDN/SS

LTC3532

C4

68pF

BURST

V

C

BURST

V

C

R6

12.1k

R

T

C2

220pF

R

GND

T

C3

10μF

R3

200k

R4

28.7k

R2

200k

C1

4.7μF

C5

0.01μF

L1: COILCRAFT LPO6610-222M

3532 TA04

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

LTC3440

600mA I , 2MHz, Synchronous Buck- V : 2.5V to 5.5V, V

: 2.5V to 5.5V, I = 25μA, I = <1μA, MS10/DFN Package

Q SD

OUT

IN

OUT(RANGE)

Boost DC/DC Converter

LTC3441

LTC3442

LTC3443

LTC3444

1.2A I , 1MHz, Synchronous Buck-

V : 2.4V to 5.5V, V

IN

: 2.4V to 5.25V, I = 25μA, I = <1μA, DFN Package

Q SD

OUT

Boost DC/DC Converter

1.2A I , 2MHz, Synchronous Buck-

V : 2.4V to 5.5V, V

IN

: 2.4V to 5.25V, I = 35μA, I = <1μA, DFN Package

Q SD

OUT

Boost DC/DC Converter

1.2A I , 600kHz, Synchronous Buck- V : 2.4V to 5.5V, V

: 2.4V to 5.25V, I = 28μA, I = <1μA, MS10 Package

Q SD

OUT

IN

Boost DC/DC Converter

500mA I , 1.5MHz, Synchronous

V : 2.7V to 5.5V, V

IN

: 0.5V to 5.25V, I = <1μA, 3 × 3 DFN Package

SD

OUT

Buck-Boost DC/DC Converter Optimized

for WCDMA

LTC3531/

LTC3531-3.3/

LTC3531-3

200mA I , Synchronous Buck-Boost

V : 1.8V to 5.5V, V

: 2V to 5.25V, I = 16μA, I = <1μA, SOT-23 and 3 × 3 DFN

OUT(RANGE) Q SD

OUT

IN

DC/DC Converters in SOT-23

Packages

3532fc

LT 0308 REV C • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

16

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3532EDD#PBF
厂家：	Linear
描述：	LTC3532 - Micropower Synchronous Buck-Boost DC/DC Converter; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C 转换器
文件：	总16页 (文件大小：351K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC3532EDD#PBF [Linear]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E