LTC3534EDHC#PBF [Linear]
LTC3534 - 7V, 500mA Synchronous Buck-Boost DC/DC Converter; Package: DFN; Pins: 16; Temperature Range: -40°C to 85°C;
| 型号： | LTC3534EDHC#PBF |
| 厂家： | 
Linear |
| 描述： | LTC3534 - 7V, 500mA Synchronous Buck-Boost DC/DC Converter; Package: DFN; Pins: 16; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总20页 (文件大小：213K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3534
7V, 500mA Synchronous
Buck-Boost DC/DC
Converter
FEATURES
DESCRIPTION
The LTC®3534 is a wide V range, highly efficient, fixed
n
Regulated Output with Input Voltages Above,
IN
Below or Equal to the Output
frequency, buck-boost DC/DC converter that operates
from input voltages above, below or equal to the output
voltage. The topology incorporated in the IC provides a
continuoustransferfunctionthroughalloperatingmodes,
making the product ideal for multi-cell Alkaline/NiMH or
singleLithium-Ion/Polymerapplicationswheretheoutput
voltage is within the battery voltage range.
n
2.4V to 7V Input and 1.8V to 7V Output
Voltage Range
n
5V V
at 500mA from 4 AA Cells
OUT
n
n
n
n
n
n
n
Single Inductor
Synchronous Rectification: Up to 94% Efficiency
Burst Mode® Operation with 25μA I
Q
Output Disconnect in Shutdown
1MHz Switching Frequency
<1μA Shutdown Current
Small Thermally Enhanced 16-Lead (5mm × 3mm ×
0.75mm) DFN and 16-Lead GN Packages
The LTC3534 offers extended V and V
ranges of 2.4V
IN
OUT
to 7V and 1.8V to 7V, respectively. Quiescent current is
only 25μA in Burst Mode operation, maximizing battery
life in portable applications. Burst Mode operation is user
controlled and can be enabled by driving the PWM pin
low. If the PWM pin is driven high then fixed frequency
switching is enabled.
APPLICATIONS
Other features include fixed 1MHz operating frequency, a
<1μA shutdown, short-circuit protection, programmable
soft-start, current limit and thermal overload protection.
TheLTC3534isavailableinthethermallyenhanced16-lead
(3mm × 5mm) DFN and 16-lead GN packages.
n
Medical Instruments
n
Portable Barcode Readers
n
Portable Inventory Terminals
USB to 5V Supply
Handheld GPS
n
n
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
4 AA Cells to 5V at 500mA Buck-Boost Converter
4 AA Cells to 5V Efficiency vs VIN
100
5μH
95
SW1
SW2
PWM I
= 300mA
V
OUT
OUT
V
IN
PV
IN
V
5V
OUT
3.6V TO 6.4V
90
85
80
75
+
500mA
4 AA
CELLS
V
22μF
IN
10k
33pF
649k
PWM I
= 500mA
10μF
OUT
LTC3534
FB
OFF ON
RUN/SS
PWM
15k
V
C
BURST PWM
PGND1 GND PGND2
162k
330pF
3534 TA01a
3.6 4.0 4.4 4.8 5.2 5.6 6.0 6.4
(V)
V
IN
3534 TA01b
3534f
1
LTC3534
(Note 1)
ABSOLUTE MAXIMUM RATINGS
V , PV Voltages........................................ –0.3V to 8V
OUT
SW1, SW2 Voltages
DC............................................................ –0.3V to 8V
Pulsed < 100ns........................................ –0.3V to 9V
RUN/SS, PWM Voltages............................... –0.3V to 8V
V , FB Voltages............................................ –0.3V to 6V
IN
V
IN
C
Voltage................................................ –0.3V to 8V
Operating Temperature Range (Note 2).... –40°C to 85°C
Maximum Junction Temperature (Note 3)............. 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature
(Soldering, 10sec; GN Package) ........................... 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
GND
RUN/SS
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
FB
GND
RUN/SS
GND
1
2
3
4
5
6
7
8
16 GND
15 FB
V
C
14
13
V
V
C
PGND1
SW1
V
IN
PGND1
SW1
IN
17
PV
IN
12 PV
IN
SW2
V
OUT
SW2
11 V
OUT
PGND2
GND
PWM
GND
PGND2
GND
10 PWM
GND
9
GN PACKAGE
16-LEAD PLASTIC SSOP NARROW - FUSED
DHC PACKAGE
16-LEAD (5mm × 3mm) PLASTIC DFN
T
= 125°C,θ = 90°C/W (4-LAYER BOARD), θ = 37°C/W
JA JC
JMAX
T
= 125°C, θ = 43°C/W (4-LAYER BOARD), θ = 4°C/W
JA JC
JMAX
PINS 1, 8, 9, AND 16 ARE PGND, MUST BE SOLDERED TO PCB
EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC3534EDHC#PBF
LTC3534EGN#PBF
LEAD BASED FINISH
LTC3534EDHC
TAPE AND REEL
PART MARKING
3534
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3534EDHC#TRPBF
LTC3534EGN#TRPBF
TAPE AND REEL
–40°C to 85°C
16-Lead (5mm × 3mm) Plastic DFN
16-Lead SSOP Narrow - Fused
PACKAGE DESCRIPTION
3534
–40°C to 85°C
PART MARKING
3534
TEMPERATURE RANGE
–40°C to 85°C
LTC3534EDHC#TR
LTC3534EDE#TR
16-Lead (5mm × 3mm) Plastic DFN
16-Lead SSOP Narrow - Fused
LTC3534EGN
3534
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3534f
2
LTC3534
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = VOUT = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
2.4
7
UNITS
l
l
l
l
Input Start-Up Voltage
Input Operating Range
Output Voltage Adjust Range
Feedback Voltage
2.2
V
V
2.4
1.8
7
V
(Note 4)
0.975
1
1
1.015
50
V
Feedback Input Current
V
FB
V
FB
= Measured Feedback Voltage (Note 4)
nA
μA
V
Quiescent Current – Burst Mode
= 1.2V, V
= 0V (Note 5)
PWM
25
50
IN
Operation
V
V
Quiescent Current – Shutdown
Quiescent Current – Active
V
V
V
V
V
= 0V, Not Including Switch Leakage, V = 0V
OUT
0.1
420
1.8
500
400
0.1
0.1
260
275
215
85
1
μA
μA
IN
IN
RUN/SS
= 1.2V, V
= 5V (Note 5)
PWM
700
FB
l
Input Current Limit
= 5V
= 5V
= 0V
1
A
PWM
PWM
PWM
Reverse Current Limit
mA
mA
μA
Burst Current Limit
NMOS Switches Leakage
PMOS Switches Leakage
PMOS Switches On-Resistance
NMOS B Switch On-Resistance
NMOS C Switch On-Resistance
Maximum Duty Cycle
Switches B and C
Switches A and D
Switches A and D
Switch B
7
10
μA
mΩ
mΩ
mΩ
Switch C
l
l
Boost (% Switch C On)
Buck (% Switch A On)
75
100
%
%
l
l
Minimum Duty Cycle
Frequency
0
%
MHz
dB
μA
μA
V
0.80
1
74
1.15
Error Amp AV
(Note 4)
OL
Error Amp Source Current
Error Amp Sink Current
RUN/SS Threshold
–15
225
1
l
0.4
0.4
1.4
1
RUN/SS Input Current – Shutdown
RUN/SS Input Current – Active
PWM Threshold
V
V
= 400mV; IC is Shut Down
= 5V; IC is Enabled
0.02
0.28
1
μA
μA
V
RUN/SS
1
RUN/SS
Measured at PWM Pin; Voltage at which Burst Mode Operation is
Disabled (PWMing Enabled)
1.4
PWM Input Current
V
= 5V
1.25
2.5
μA
PWM
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3534E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
Note 4: The IC is tested in a feedback loop to make this measurement.
Note 5: Current Measurements are performed when the outputs are not
switching.
3534f
3
LTC3534
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
4 Alkaline Cells to 5V Efficiency
vs ILOAD
USB to 5V Efficiency vs ILOAD
100
90
80
70
60
50
40
30
20
10
100
90
80
70
60
50
40
30
20
10
Burst
Burst
Mode
Mode
OPERATION
OPERATION
V
V
V
= 3.6V
= 5V
V
V
V
= 4.35V
= 4.8V
IN
IN
IN
IN
IN
IN
= 6.4V
= 5.25V
0.01
0.1
1
10
100
1000
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3534 G01
3534 G02
Active Quiescent and Burst Mode
SLEEP Currents vs VIN
Current Limits vs VIN
3.3
3.0
2.7
2.4
2.1
1.8
1.5
425
415
405
395
385
30
28
26
24
22
V
OUT
= 5V
V
FB
= 1.2V
ACTIVE QUIESCENT CURRENT
PEAK CURRENT LIMIT
Burst Mode SLEEP CURRENT
4.8 5.6 6.4 7.2 8
LINEAR CURRENT LIMIT
4.8 5.6 6.4 7.2 8
2.4 3.2
4
2.4 3.2
4
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
3534 G04
3534 G03
Minimum Start-Up Voltage
vs Temperature
Burst Mode SLEEP Current
vs Temperature
Active Quiescent Current
vs Temperature
2.200
2.175
2.150
2.125
450
430
410
390
370
50
40
30
20
10
V
= 1.2V
V
= 1.2V
FB
FB
–50
–25
0
25
50
75
100
–50
–25
0
25
50
75
100
–50
–25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3534 G05
3534 G06
3534 G07
3534f
4
LTC3534
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Converter Line Regulation
vs Temperature
Converter Load Regulation
vs Temperature
Feedback Voltage vs Temperature
5.005
5.000
4.995
4.990
4.985
4.980
4.975
1.001
1.000
0.999
0.998
0.997
5.01
5.00
4.99
4.98
4.97
4.96
4.95
I
= 100mA
V
= 5V
LOAD
IN
25mA
300mA
500mA
3.6V
5.0V
6.4V
–50
–25
0
25
50
75
100
–50
–25
0
25
50
75
100
–50
–25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3534 G08
3534 G10
3534 G09
Switching Frequency
vs Temperature
BURST No-Load Input Current
vs VIN (Switching)
Current Limits vs Temperature
50
45
40
35
30
1050
1025
1000
975
3.0
2.8
2.5
2.3
2.0
1.8
1.5
V
OUT
= 5V
V
= V
= 5V
OUT
IN
PEAK CURRENT LIMIT
LINEAR CURRENT LIMIT
950
2.4 3.2
4
4.8 5.6 6.4 7.2
8
–50
–25
0
25
50
75
100
–50
–25
0
25
50
75
100
INPUT VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
3534 G13
3534 G11
3534 G12
PWM No-Load Input Current
vs VIN (Switching)
BURST Maximum Output Current
Capability vs VIN
PWM Maximum Output Current
Capability vs VIN
225
200
175
150
125
100
75
18
14
10
6
1800
1600
1400
1200
1000
800
V
= 5V
V
= 5V
OUT
OUT
L = 4.7μH
600
400
V
= 5V
OUT
Burst Mode OPERATION
50
2
200
2.4 3.2
4
4.8 5.6 6.4 7.2
8
2.4 3.2
4
4.8 5.6 6.4 7.2
8
2.4 3.2
4
4.8 5.6 6.4 7.2
8
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
3534 G15
3534 G14
3534 G16
3534f
5
LTC3534
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Load Transient Response in Fixed
Frequency Mode, No-Load to
300mA
VOUT Ripple at 300mA Load
V
= 100mV/DIV
= 100mA/DIV
V
= 5V
OUT
IN
V
V
= 3.6V
= 6.4V
IN
IN
I
LOAD
3534 G18
3534 G17
100μs/DIV
1μs/DIV
= 5V, AC-COUPLED
V
I
= V
LOAD
OUT
= 5V
OUT
V
IN
OUT
= 0 TO 300mA
= 22μF
20mV/DIV
C
C
= 22μF
= 300mA
OUT
X5R CERAMIC
I
LOAD
Transition from Burst Mode
Operation to Fixed Frequency
Mode
Burst Mode Operation VOUT
Ripple at 25mA Load
V
OUT
= 50mV/DIV
V
OUT
= 50mV/DIV
INDUCTOR CURRENT
= 200mA/DIV
PWM = 2V/DIV
3534 G19
3534 G20
10μs/DIV
100μs/DIV
V
C
= V
OUT
X5R CERAMIC
= 5V
OUT
V
I
= V
= 5V
OUT
IN
IN
= 22μF
= 25mA
= 22μF
LOAD
OUT
C
X5R CERAMIC
VOUT Start-Up
V
OUT
= 2V/DIV
RUN/SS = 1V/DIV
(STARTS AT 1V)
INDUCTOR CURRENT =
500mA/DIV
3534 G21
500μs/DIV
I
= 100mA
LOAD
3534f
6
LTC3534
PIN FUNCTIONS
GND Pads (Pins 1, 8, 9, 16; GN Package): IC Substrate
Grounds. These pins MUST be soldered to the printed
circuit board ground to provide both electrical contact
and a good thermal contact to the PCB.
V
(Pin 11): Output of the Synchronous Rectifier. A
OUT
filter capacitor is placed from V
to GND. A ceramic
OUT
bypass capacitor is recommended as close to the V
and GND pins as possible. V
equation:
OUT
is given by the following
OUT
RUN/SS (Pin 2): Combined Shutdown and Soft-Start. Ap-
plying a voltage below 400mV shuts down the IC. Apply
a voltage above 1.4V to enable the IC and above 2.4V to
ensure that the error amp is not clamped from soft-start.
An R-C from the enable command signal to this pin will
provide a soft-start function by limiting the rise time of
R1+R2
VOUT =1.000 •
V
R2
PV (Pin 12): Power V Supply Pin. A 10μF ceramic
IN
IN
capacitor is recommended as close to the PV and PGND
IN
pins as possible.
the V pin.
C
V (Pin 13): Input Supply Pin. Connect the power source
IN
GND (Pin 3): Signal Ground for the IC.
to this pin.
PGND1, PGND2 (Pins 4, 7): Power Ground for the In-
ternal N-channel MOSFET Power Switches (Switches B
and C).
V (Pin 14): Error Amp Output. An R-C network is con-
C
nected from this pin to FB for loop compensation. Refer
to “Closing the Feedback Loop” section for component
selection guidelines.
SW1 (Pin 5): Switch Pin where Internal Switches A and
B are Connected. Connect inductor from SW1 to SW2.
Minimize trace length to reduce EMI.
FB(Pin15):FeedbackPin.ConnectV resistordividertap
OUT
to this pin. The output voltage can be adjusted from 1.8V
SW2 (Pin 6): Switch Pin where Internal Switches C and D
are Connected. Minimize trace length to reduce EMI.
to 7V. The feedback reference voltage is typically 1V.
ExposedPad(Pin17;DHCPackage):ICSubstrateGround.
This pin MUST be soldered to the printed circuit board
ground to provide both electrical contact and a good
thermal contact to the PCB.
PWM (Pin 10): Burst Mode Select. Applying a voltage
below 400mV enables Burst Mode operation, providing a
significantefficiencyimprovementatlightloads.Duringthe
period where the IC is supplying energy to the output, the
inductor peak current will reach 400mA typical and return
to zero current on each cycle. Burst Mode operation will
continue until this pin is driven high. Applying a voltage
above 1.4V disables Burst Mode operation, enabling low
noise, fixed frequency operation.
3534f
7
LTC3534
BLOCK DIAGRAM
L1
5
6
SW1
SW2
V
OUT
V
ANTIRING
IN
1.8V TO 7V
2.4V TO 7V
PV
V
OUT
SW A
SW D
IN
12
13
11
C
OUT
+
+
+
+
V
GATE
DRIVERS
AND
ANTICROSS
CONDUCTION
IN
–500mA
C
IN
–
SW B
SW C
+
R1
R2
REVERSE
CURRENT
LIMIT
PGND1
PGND2
R
FF
+
G
C
Z1
FB
1
=
m
15
100k
AVERAGE
1.8A
2.6A
–
CURRENT
LIMIT
THERMAL
SHUTDOWN
+
–
V
REF
1V
SUPPLY
CURRENT
LIMIT
–
+
ERROR
AMP
+
–
+
–
2.2V
PWM
LOGIC
UVLO
R
Z
PWM
COMPARATORS
C
P2
AND
SHUTDOWN
OUTPUT
PHASING
C
P1
V
C
–
+
R
SS
14
SHUTDOWN
AND
SOFT-START
RUN/SS
2
C
SS
1MHz
OSC
PWM
SLEEP
Burst Mode OPERATION
CONTROL
10
PGND1
4
GND
EXPOSED PAD
17
PGND2
7
3
3534 BD
3534f
8
LTC3534
OPERATION
The LTC3534 provides high efficiency, low noise power
for a wide variety of handheld electronic devices. Linear
Technology’s proprietary topology allows input voltages
above, below or equal to the output voltage by properly
phasing the output switches. The error amplifier output
Thefirstcircuitisanaveragecurrentlimitamplifier,sourcing
currentoutofFBtodroptheoutputvoltageshouldthepeak
input current exceed 1.8A typical. This method provides a
closed loop means of clamping the input current. During
conditions where V
is near ground, such as during a
OUT
voltage on V determines the output duty cycle of the
short circuit or start-up, this threshold is cut to 800mA
typical, providing a foldback feature. For this current limit
feature to be most effective, the Thevenin resistance from
FB to ground should be greater than 100k.
C
switches. Since V is a filtered signal, it provides rejection
C
of frequencies from well below the switching frequency.
The low R , low gate charge synchronous switches
DS(ON)
provide high frequency pulse width modulation control at
high efficiency. High efficiency is achieved at light loads
when Burst Mode operation is invoked and the LTC3534’s
quiescent current drops to a mere 25μA.
Should the peak input current exceed 2.6A typical, the
second circuit, a high speed peak current limit compara-
tor, shuts off PMOS switch A. The delay to output of this
comparator is typically 50ns.
LOW NOISE FIXED FREQUENCY OPERATION
Reverse Current Limit
During fixed frequency operation, the LTC3534 operates
in forced continuous conduction mode. The reverse cur-
rent limit comparator monitors the inductor current from
the output through PMOS switch D. Should this negative
inductorcurrentexceed500mAtypical,theLTC3534shuts
off switch D.
Oscillator
The frequency of operation is internally set to 1MHz.
Error Amplifier
The error amplifier is a voltage mode amplifier. The loop
compensation components are configured around the
amplifier(fromFBtoV )toobtainstabilityoftheconverter.
Four-Switch Control
C
For improved bandwidth, an additional R-C feedforward
network can be placed across the upper feedback divider
resistor.ThevoltageonRUN/SSclampstheerroramplifier
Figure1showsasimplifieddiagramofhowthefourinternal
switchesareconnectedtotheinductor,PV ,V ,PGND1
IN OUT
and PGND2. Figure 2 shows the regions of operation for
output, V , to provide a soft-start function.
the LTC3534 as a function of the internal control voltage,
C
V . Dependent on the magnitude of V , the LTC3534 will
CI
CI
Supply Current Limits
operate in buck, buck-boost or boost mode. V is a level
CI
There are two different supply current limit circuits in the
LTC3534, each having internally fixed thresholds.
INTERNAL
CONTROL
DUTY
CYCLE
VOLTAGE, V
CI
85%
D
MAX
V4 (^1.2V)
PV
V
IN
OUT
BOOST
A ON, B OFF
PWM C AND D
SWITCHES
12
11
BOOST REGION
D
MIN
PMOS A
PMOS D
V3 (^720mV)
V2 (^640mV)
BOOST
BUCK-BOOST REGION
FOUR SWITCH PWM
SW1
5
L1
SW2
6
D
BUCK
MAX
D ON, C OFF
BUCK REGION
PWM A AND B
SWITCHES
NMOS B
NMOS C
V1 (^100mV)
0%
4
7
3534 F01
PGND1
PGND2
3534 F02
Figure 1. Simplified Diagram of Output Switches
Figure 2. Switch Control vs Internal Control Voltage, VCI
3534f
9
LTC3534
OPERATION
shifted voltage from the output of the error amplifier (V
The V potential at which the four switch region ends is
IN
C
given by:
pin), see Figure 3. The four power switches are properly
phased so the transfer between operating modes is con-
V = V
• (1 – D) = V
• (1 – 125ns • ƒ) V
IN
OUT
OUT
tinuous, smooth and transparent to the user. When V
IN
where f = operating frequency in Hz, typically 1MHz.
approaches V
the buck-boost region is entered, where
OUT
the conduction time of the four switch region is typically
125ns. Referring to Figures 1 and 2, the various regions
of operation will now be described.
Hence, for the LTC3534,
VOUT
0.875
V
≅
V
IN(ENTER4SW)
Buck Region (V > V
)
OUT
IN
Approximate V potential at which the four switch
IN
Switch D is always on and switch C is always off dur-
region is entered.
ing this mode. When the internal control voltage, V , is
CI
V
≅ 0.875 • V
V
IN(4SWEXIT)
OUT
above voltage V1, output A begins to switch. During the
off-time of switch A, synchronous switch B turns on for
the remainder of the period. Switches A and B will alter-
nate similar to a typical synchronous buck regulator. As
the control voltage increases, the duty cycle of switch A
increases until the maximum duty cycle of the converter
Approximate V potential at which the four switch
IN
region is exited.
Boost Region (V < V
)
IN
OUT
Switch A is always on and switch B is always off during
this mode. When the internal control voltage, V , is above
in buck mode reaches D , given by:
MAX_BUCK
CI
voltageV3,switchpairCDwillalternatelyswitchtoprovide
a boosted output voltage. This operation is typical to a
synchronous boost regulator. The maximum duty cycle
of the converter is limited to 85% typical and is reached
D
= (100 – D4 )%
SW
MAX_BUCK
where D4 = duty cycle % of the four switch range.
SW
D4 = (125ns • f) • 100%
SW
when V is above V4.
CI
where f = operating frequency in Hz, typically 1MHz.
Hence, D4 = 12.5% for the LTC3534.
Burst Mode OPERATION
SW
D
= 87.5%
Burst Mode operation reduces the LTC3534’s quiescent
current consumption at light loads and improves overall
conversionefficiency, increasingbatterylife. DuringBurst
Mode operation the LTC3534 delivers energy to the output
until it is regulated and then enters a sleep state where
the switches are off and the quiescent current drops to
25μA typical. In this mode the output ripple has a variable
frequency component that depends upon load current,
and will typically be about 2% peak-to-peak. Burst Mode
operation ripple can be reduced slightly by using more
output capacitance (47μF or greater). Another method of
reducing Burst Mode operation ripple is to place a small
feedforward capacitor across the upper resistor in the
MAX_BUCK
Beyond this point the “four switch”, or buck-boost region
is reached.
Buck-Boost or Four Switch (V ~ V
)
IN
OUT
Whentheinternalcontrolvoltage,V ,isabovevoltageV2,
switch pair AD remain on for duty cycle D
CI
, and
MAX_BUCK
the switch pair AC begins to phase in. As switch pair AC
phases in, switch pair BD phases out accordingly. When
V reaches the edge of the buck-boost range, at voltage
CI
V3, the AC switch pair completely phase out the BD pair,
and the boost phase begins at duty cycle D4 .
SW
V
feedback divider network (as in Type III compensa-
Theinputvoltage,V ,wherethefourswitchregionbegins
is given by:
OUT
IN
tion), see Figure 6.
VOUT
1− 125ns • f
V =
V
IN
(
)
3534f
10
LTC3534
OPERATION
In Burst Mode operation the typical maximum average
output currents in the three operating regions, buck, four
switch, and boost are given by:
Burst Mode Operation to Fixed Frequency Transient
Response
In Burst Mode operation, the compensation network is
I
≈ 100mA;
not used and V is disconnected from the error amplifier.
OUT(MAX)BURST–BUCK
C
During long periods of Burst Mode operation, leakage
currents in the external components or on the PC board
could cause the compensation capacitor to charge (or
discharge), which could result in a large output transient
when returning to fixed frequency mode operation, even
at the same load current. To prevent this, the LTC3534
incorporates an active clamp circuit that holds the voltage
Burst Mode operation – buck region: V > V
IN
OUT
I
≈ 200mA;
OUT(MAX)BURST–FOUR_SWITCH
Burst Mode operation – four switch region: V ≈ V
IN
OUT
200 • V
VOUT
IN
IOUT(MAX)BURST−BOOST
≈
mA;
on V at an optimal voltage during Burst Mode operation.
C
Burst Mode operation – boost region: V < V
IN
OUT
This minimizes any output transient when returning to
fixed frequency mode operation. For optimum transient
response, Type III compensation is also recommended
to broad band the control loop and roll off past the two
pole response of the output LC filter. (See Closing the
Feedback Loop).
The efficiency below 1mA becomes dominated primarily
by the quiescent current. The Burst Mode operation ef-
ficiency is given by:
η•ILOAD
Efficiency ≅
25µA +ILOAD
Soft-Start
where η is typically 90% during Burst Mode operation.
The soft-start function is combined with shutdown. When
the RUN/SS pin is brought above 1V typical, the LTC3534
is enabled but the error amplifier duty cycle is clamped
AgraphofBurstModeoperationmaximumoutputcurrent
vs V (for V
= 5V) is provided in the Typical Perfor-
IN
OUT
mance Characteristics section.
from V . A detailed diagram of this function is shown in
C
Figure 3. The components R and C provide a slow
SS
SS
rampingvoltageonRUN/SStoprovideasoft-startfunction.
To ensure that V is not being clamped, RUN/SS must be
C
raised to 2.4V or above.
V
IN
13
V
OUT
RUN/SS
2
R
SS
ENABLE
SIGNAL
11
1V
+
–
ERROR
AMP
C
SS
R1
FB
15
R2
C
P1
V
C
14
+
3534 F03
V
CI
CHIP
ENABLE
TO PWM
COMPARATORS
1V
–
Figure 3. Soft-Start Circuitry
3534f
11
LTC3534
APPLICATIONS INFORMATION
COMPONENT SELECTION
2
3
4
5
6
7
RUN/SS
GND
FB 15
V
14
13
C
PGND1
SW1
V
IN
V
V
IN
PV 12
IN
SW2
V
11
OUT
OUT
PGND2
PWM 10
PWM
MULTIPLE VIAS
3534 F04
Figure 4. Recommended Component Placement. Traces Carrying High Current are Direct. Trace Area at FB and VC Pins are
Kept Low. Lead Length to Battery Should be Kept Short. Keep VOUT and VIN Ceramic Capacitors Close to their IC Pins.
Inductor Selection
ΔI = maximum allowable inductor ripple current, A
L
The high frequency operation of the LTC3534 allows the
use of small surface mount inductors. The inductor ripple
current is typically set to 20% to 40% of the maximum
inductor current. For a given ripple the inductance terms
are given as follows:
V
V
V
= minimum input voltage, V
= maximum input voltage, V
IN(MIN)
IN(MAX)
= output voltage, V
OUT
For high efficiency, choose a ferrite inductor with a high
frequency core material to reduce core loses. The induc-
tor should have low ESR (equivalent series resistance) to
V
• VOUT – V
(
)
IN(MIN)
IN(MIN)
LBOOST
>
H
2
f • ΔIL • VOUT
reduce the I R losses, and must be able to handle the peak
inductorcurrentwithoutsaturating.Moldedchokesorchip
inductors usually do not have enough core to support the
peak inductor currents in the 1A to 2A region. To minimize
radiated noise, use a shielded inductor. See Table 1 for a
suggested list of inductor suppliers.
VOUT • VIN(MAX) – VOUT
(
)
LBUCK
>
H
f • ΔIL • V
IN(MAX)
where f = switching frequency in Hz, typically 1MHz.
Table 1. Inductor Vendor Information
SUPPLIER
Coilcraft
FDK
PHONE
FAX OR E-MAIL
WEBSITE
(847) 639-6400
(408) 432-8331
(847) 639-1469
america@fdk.com
(814) 238-0490
www.coilcraft.com
www.fdk.com
www.murata.com
Murata
(814) 237-1431
(800) 831-9172
Sumida
USA: (847) 956-0666
USA: (847) 956-0702
www.sumida.com
Japan: 81(3) 3607-5111 Japan: 81(3) 3607-5144
TDK
(847) 803-6100
(847) 297-0070
(847) 803-6296
(847) 699-7864
www.component.tdk.com
www.tokoam.com
TOKO
3534f
12
LTC3534
APPLICATIONS INFORMATION
Output Capacitor Selection
Input Capacitor Selection
The bulk value of the output filter capacitor is set to reduce
the ripple due to charge into the capacitor each cycle. The
steady state ripple due to charge is given by:
Since V is the supply voltage for the IC, as well as the
IN
input to the power stage of the converter, it is recom-
mended to place at least a 10μF, low ESR ceramic bypass
capacitor close to the PV /V and PGND/GND pins. It is
IN IN
IOUT • VOUT – V
(
)
IN(MIN)
also important to minimize any stray resistance from the
ΔVP-P Boost =
ΔVP-PBuck =
V
COUT • VOUT • f
converter to the battery or other power source.
V
IN(MAX) – VOUT • V
(
)
1
OUT
•
V
Optional Schottky Diodes
8 •L •COUT • f2
V
IN(MAX)
Schottky diodes across the synchronous switches B and
D are not required, but do provide a lower drop during the
break-before-make time (typically 15ns), thus improving
efficiency. Use a surface mount Schottky diode such as an
MBRM120T3 or equivalent. Do not use ordinary rectifier
diodes since their slow recovery times will compromise
efficiency.
where f = switching frequency in Hz, typically 1MHz.
C
I
= output filter capacitor, F
= output load current, A
OUT
OUT
The output capacitance is usually many times larger than
theminimumvalueinordertohandlethetransientresponse
requirements of the converter. As a rule of thumb, the ratio
of the operating frequency to the unity-gain bandwidth of
the converter is the amount the output capacitance will
have to increase from the above calculations in order to
maintain the desired transient response. A 22μF or larger
ceramic capacitor is appropriate for most applications.
Output Voltage < 1.8V
The LTC3534 can operate as a buck converter with output
voltages as low as 400mV. Since synchronous switch D is
powered from V
and the R
will increase signifi-
OUT
DS(ON)
cantly at output voltages below 1.8V typical, a Schottky
diodeisrequiredfromSW2toV
tion path to the output at low V
limit is folded back to 800mA when V
toprovidetheconduc-
voltages. The current
OUT
OUT
The other component of ripple is due to the ESR (equiva-
lent series resistance) of the output capacitor. Low ESR
capacitors should be used to minimize output voltage
ripple. For surface mount applications, Taiyo Yuden or
TDK ceramic capacitors, AVX TPS series tantalum capaci-
tors or Sanyo POSCAP are recommended. See Table 2 for
contact information.
< 0.9V typical
OUT
which will significantly reduce the output current capabil-
ity of the application. Note that Burst Mode operation is
inhibited at output voltages below 1.6V typical.
Closing the Feedback Loop
Table 2. Capacitor Vendor Information
The LTC3534 incorporates voltage mode PWM control.
The control to output gain varies with operation region
(buck, boost, buck-boost), but is usually no greater than
15. The output filter exhibits a double pole response, as
given by:
SUPPLIER PHONE
FAX
WEBSITE
AVX
(803) 448-9411 (803) 448-1943 www.avxcorp.com
(619) 661-6322 (619) 661-1055 www.sanyovideo.com
(408) 573-4150 (408) 573-4159 www.t-yuden.com
Sanyo
Taiyo
Yuden
1
TDK
(847) 803-6100 (847) 803-6296 www.component.tdk.com
fFILTER _POLE
=
=
Hz (in buck mode)
2• π • L1•COUT
V
IN
fFILTER _POLE
Hz (in boost mode)
2• VOUT • π • L1•COUT
where L1 is in Henries and C
is in Farads.
OUT
3534f
13
LTC3534
APPLICATIONS INFORMATION
The output filter zero is given by:
Mostapplicationsdemandanimprovedtransientresponse
toallowasmalleroutputfiltercapacitor.Toachieveahigher
bandwidth, Type III compensation is required, providing
two zeros to compensate for the double-pole response of
the output filter. Referring to Figure 6, the location of the
poles and zeros are given by:
1
fFILTER _ ZERO
=
Hz
2• π •RESR •COUT
where R
is the equivalent series resistance of the
ESR
output capacitor.
1
Atroublesomefeatureinboostmodeistheright-halfplane
zero (RHP), given by:
fPOLE1
≅
Hz
2• π •5×103 •R1•CP1
(which is extremely close to DC)
1
2
V
IN
fRHPZ
=
Hz
2• π •IOUT •L1• VOUT
fZERO1
fZERO2
fPOLE2
=
=
=
Hz
Hz
Hz
2• π •RZ •CP1
The loop gain is typically rolled off before the RHP zero
frequency.
1
2• π •R1•CZ1
1
2• π •RZ •CP2
AsimpleTypeIcompensationnetworkcanbeincorporated
tostabilizetheloop,butatacostofreducedbandwidthand
slowertransientresponse.Toensureproperphasemargin
usingTypeIcompensation, theloopmustbecrossedover
a decade before the LC double pole. Referring to Figure
5, the unity-gain frequency of the error amplifier utilizing
Type I compensation is given by:
where resistance is in Ohms and capacitance is in Far-
ads.
1
fUG
=
Hz
2• π •R1•CP1
V
OUT
11
1V
+
–
V
OUT
ERROR
AMP
C
R1
R2
Z1
11
FB
15
1V
+
ERROR
AMP
R1
R2
FB
15
C
P1
V
C
R
Z
–
14
C
P1
C
P2
V
C
3534 F06
14
3534 F05
Figure 5. Error Amplifier with Type I Compensation
Figure 6. Error Amplifier with Type III Compensation
3534f
14
LTC3534
TYPICAL APPLICATIONS
4 Alkaline/NiMH to 5V at 500mA
L1
5μH
SW1
SW2
V
OUT
V
IN
PV
IN
V
OUT
5V
3.6V TO 6.4V
C
+
500mA
R
OUT
4 ALKALINE/
NiMH CELLS
V
IN
FF
C
R
IN
22μF
SS
10k
LTC3534
10μF
200k
R1
C
Z1
649k
33pF
FB
RUN/SS
PWM
C
C
SS
P1
R
Z
330pF
0.056μF
15k
V
C
C
P2
10pF
BURST PWM
R2
162k
PGND1 GND PGND2
L1: COILCRAFT MSS7341
3534 TA02a
4 Alkaline/NiMH Cells to 5V Efficiency vs ILOAD
100
Burst
Mode
90
80
70
60
50
40
30
20
10
OPERATION
V
V
V
= 3.6V
= 5V
= 6.4V
IN
IN
IN
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
3534 TA02b
3534f
15
LTC3534
TYPICAL APPLICATIONS
USB to 5V at 500mA
L1
5μH
SW1
SW2
V
OUT
USB
4.35V TO 5.25V
PV
IN
V
5V
OUT
C
500mA*
R
OUT
V
IN
FF
R
C
SS
IN
22μF
10k
LTC3534
200k
10μF
R1
C
Z1
649k
33pF
FB
RUN/SS
PWM
C
C
P1
SS
R
Z
330pF
0.056μF
15k
V
C
C
P2
10pF
BURST PWM
R2
162k
PGND1 GND PGND2
L1: COILCRAFT MSS7341
3534 TA03a
*NOTE: OUTPUT CURRENT CAN BE LESS THAN 500mA
IF USB INPUT CURRENT LIMIT REACHED.
USB to 5V Efficiency vs ILOAD
100
Burst
Mode
90
80
70
60
50
40
30
20
10
OPERATION
V
V
V
= 4.35V
= 4.8V
= 5.25V
IN
IN
IN
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
3534 TA03b
3534f
16
LTC3534
TYPICAL APPLICATIONS
Li-Ion to 3.3V at 400mA
L1
3.3μH
SW1
SW2
V
OUT
V
IN
PV
IN
V
OUT
3.3V
2.7V TO 4.2V
C
+
400mA
R
OUT
1 Li-Ion
CELL
V
IN
FF
R
22μF
SS
10k
C
IN
LTC3534
200k
R1
10μF
C
Z1
374k
66pF
FB
RUN/SS
PWM
C
C
SS
P1
R
Z
470pF
0.056μF
15k
V
C
C
P2
10pF
BURST PWM
R2
162k
PGND1 GND PGND2
L1: TDK RLF7030
3534 TA04a
Li-Ion to 3.3V Efficiency vs ILOAD
100
90
80
70
60
50
40
30
20
10
Burst
Mode
OPERATION
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
3534 TA04b
3534f
17
LTC3534
PACKAGE DESCRIPTION
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706)
0.65 0.05
3.50 0.05
1.65 0.05
2.20 0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 0.05
0.50 BSC
4.40 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
0.40 0.10
5.00 0.10
(2 SIDES)
9
16
R = 0.20
TYP
3.00 0.10 1.65 0.10
(2 SIDES)
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16) DFN 1103
8
1
0.25 0.05
0.50 BSC
0.75 0.05
0.200 REF
4.40 0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3534f
18
LTC3534
PACKAGE DESCRIPTION
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.045 p.005
.009
(0.229)
REF
16 15 14 13 12 11 10 9
.254 MIN
.150 – .165
.229 – .244
.150 – .157**
(5.817 – 6.198)
(3.810 – 3.988)
.0165 p.0015
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
1
2
3
4
5
6
7
8
.015 p .004
(0.38 p 0.10)
s 45o
.0532 – .0688
(1.35 – 1.75)
.004 – .0098
(0.102 – 0.249)
.007 – .0098
(0.178 – 0.249)
0o – 8o TYP
.016 – .050
(0.406 – 1.270)
.0250
(0.635)
BSC
.008 – .012
GN16 (SSOP) 0204
(0.203 – 0.305)
TYP
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
3534f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC3534
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I = 35μA, I <1μA, MSOP and DFN Packages
Q SD
2A (I ), 2MHz, Synchronous Buck-Boost DC/DC
96% Efficiency, V : 1.8V to 5.5V, V
= 5.25V,
OUT
IN
OUT(MAX)
Converter with Wide Input Voltage Range
I = 40μA, I <1μA, MSOP and DFN Packages
Q SD
800mA (I ), 1MHz, Synchronous Buck-Boost
95% Efficiency, V : 2.4V to 5.5V, V
= 5.25V,
OUT
IN
OUT(MAX)
DC/DC Converter
I = 35μA, I = 1.5μA, DFN Package
Q SD
3534f
LT 0209 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
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© LINEAR TECHNOLOGY CORPORATION 2009
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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