LTC3541EDD [Linear]
High Efficiency Buck + VLDO Regulator; 高效率降压+ VLDO稳压器
| 型号： | LTC3541EDD |
| 厂家： | 
Linear |
| 描述： | High Efficiency Buck + VLDO Regulator |
| 文件： | 总20页 (文件大小：346K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3541
High Efficiency
Buck + VLDO Regulator
U
DESCRIPTIO
FEATURES
ꢀ High Efficiency, 500mA Buck Plus 300mA VLDO
Regulator
TM
TheꢀLTC®3541ꢀcombinesꢀaꢀsynchronousꢀbuckꢀDC/DCꢀ
converterꢀwithꢀaꢀveryꢀlowꢀdropoutꢀlinearꢀregulatorꢀ
(VLDO)ꢀtoꢀprovideꢀupꢀtoꢀtwoꢀoutputꢀvoltagesꢀfromꢀaꢀsingleꢀ
inputꢀvoltageꢀwithꢀminimalꢀexternalꢀcomponents.ꢀWhenꢀ
configuredꢀforꢀdualꢀoutputꢀoperation,ꢀtheꢀLTC3541’sꢀautoꢀ
start-upꢀfeatureꢀwillꢀbringꢀtheꢀBuckꢀoutputꢀintoꢀregulationꢀ
inꢀaꢀcontrolledꢀmannerꢀpriorꢀtoꢀenablingꢀtheꢀVLDOꢀregulatorꢀ
outputꢀwithoutꢀtheꢀneedꢀforꢀexternalꢀpinꢀcontrol.ꢀVLDO/
linearꢀregulatorꢀoutputꢀpriorꢀtoꢀBuckꢀoutputꢀsequencingꢀ
mayꢀalsoꢀbeꢀobtainedꢀviaꢀexternalꢀpinꢀcontrol.ꢀTheꢀinputꢀ
voltageꢀrangeꢀisꢀideallyꢀsuitedꢀforꢀLi-Ionꢀbattery-poweredꢀ
applications,ꢀasꢀwellꢀasꢀpoweringꢀsub-3.3Vꢀlogicꢀfromꢀ5Vꢀ
orꢀ3.3Vꢀrails.
■
Auto Start-Up Powers Buck Output Prior to
VLDO/Linear Regulator Output
■
ꢀ Independent High Efficiency, 500mA Buck
(V : 2.7V to 5.5V)
IN
■
■
■
■
■
■
ꢀ 300mA VLDO Regulator with 30mA Standalone Mode
ꢀ No External Schottky Diodes Required
ꢀ Buck Output Voltage Range: 0.8V to 5V
ꢀ VLDO Input Voltage Range (LV ): 0.9V to 5.5V
IN
ꢀ VLDO Output Voltage Range VLDO: 0.4V to 4.1V
ꢀ SelectableꢀFixedꢀFrequency,ꢀPulse-SkipꢀOperationꢀor
ꢀ BurstꢀMode®ꢀOperation
■
ꢀ Short-CircuitꢀProtected
Theꢀsynchronousꢀbuckꢀconverterꢀprovidesꢀaꢀhighꢀefficiencyꢀ
output,ꢀtypicallyꢀ90%,ꢀcapableꢀofꢀprovidingꢀupꢀtoꢀ500mAꢀ
ofꢀcontinuousꢀoutputꢀcurrentꢀwhileꢀswitchingꢀatꢀ2.25MHz,ꢀ
allowingꢀtheꢀuseꢀofꢀsmallꢀsurfaceꢀmountꢀinductorsꢀandꢀca-
pacitors.ꢀAꢀmode-selectꢀpinꢀallowsꢀBurstꢀModeꢀoperationꢀ
toꢀbeꢀenabledꢀforꢀhigherꢀefficiencyꢀatꢀlightꢀloadꢀcurrents,ꢀorꢀ
disabledꢀforꢀlowerꢀnoise,ꢀconstantꢀfrequencyꢀoperation.ꢀ
■
ꢀ CurrentꢀModeꢀOperationꢀforꢀExcellentꢀLineꢀandꢀLoadꢀ
TransientꢀResponse
■
ꢀ ConstantꢀFrequencyꢀOperation:ꢀ2.25MHz
■
ꢀ LowꢀDropoutꢀBuckꢀOperation:ꢀ100%ꢀDutyꢀCycle
■
ꢀ Small,ꢀThermallyꢀEnhanced,ꢀ10-Leadꢀ(3mmꢀ×ꢀ3mm)ꢀ
DFNꢀPackage
U
APPLICATIO S
TheꢀVLDOꢀregulatorꢀprovidesꢀaꢀlowꢀnoise,ꢀlowꢀvoltageꢀ
outputꢀcapableꢀofꢀprovidingꢀupꢀtoꢀ300mAꢀofꢀcontinuousꢀ
outputꢀcurrentꢀusingꢀonlyꢀaꢀ2.2µFꢀceramicꢀcapacitor.ꢀTheꢀ
inputꢀsupplyꢀvoltageꢀofꢀtheꢀVLDOꢀregulatorꢀ(LV )ꢀmayꢀ
comeꢀfromꢀtheꢀbuckꢀregulatorꢀorꢀaꢀseparateꢀsupply.
, LT, LTc and LTM are registered trademarks of Linear Teꢀhnology corporation.
VLDO is a trademark of Linear Teꢀhnology corporation.
All other trademarks are the property of their respeꢀtive owners.
Proteꢀted by U.S. Patents, inꢀluding 5481178, 6611131, 6304066, 6498466, 6580258
■
ꢀ PDAs/PalmtopꢀPCs
■
ꢀ DigitalꢀCameras
IN
■
ꢀ CellularꢀPhones
ꢀ PCꢀCards
ꢀ WirelessꢀandꢀDSLꢀModems
ꢀ OtherꢀPortableꢀPowerꢀSystems
■
■
■
U
Buck (Burst) Efficiency and Power Loss vs Load Current
TYPICAL APPLICATIO
100
1
LTC3541 Typical Application
90
EFFICIENCY
80
V
IN
0.1
2.9V TO 5.5V
70
SW
ENVLDO
MODE
60
50
POWER LOSS
V
2.2µH
IN
0.01
0.001
0.0001
LTC3541
150k
412k
243k
ENBUCK
BUCKFB
GND
LFB
40
30
20
10
0
V
OUT1
2.5V
22pF
200mA
LV
LV
OUT
IN
V
V
V
= 3.3V
OUT2
IN
OUT
PGND
1.5V
= 2.5V
10µF
115k
300mA
2.2µF
1
10
100
1000
3541 TA01b
LOAD CURRENT (mA)
3541 TA01a
3541fa
ꢀ
LTC3541
W W W U
U
W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
TOP VIEW
SupplyꢀVoltages:
ꢀ V ,ꢀLV ꢀ.................................................. –0.3Vꢀtoꢀ6V
IN
IN
V
1
2
3
4
5
10 SW
IN
ꢀ LV ꢀ–ꢀV ꢀ..........................................................<0.3V
IN
IN
ENBUcK
BUcKFB
LFB
9
8
7
6
ENVLDO
11
MODE
GND
PinꢀVoltages:
ꢀ ENVLDO,ꢀENBUCK,ꢀMODE,ꢀSW,ꢀ
LV
LV
IN
OUT
ꢀ LFB,ꢀBUCKFBꢀ.............................–0.3Vꢀtoꢀ(V ꢀ+ꢀ0.3V)
LinearꢀRegulatorꢀI
OperatingꢀAmbientꢀTemperatureꢀRangeꢀ
(Noteꢀ2).................................................... –40°Cꢀtoꢀ85°C
JunctionꢀTemperatureꢀ(Noteꢀ5)ꢀ............................. 125°C
StorageꢀTemperatureꢀRange................... –65°Cꢀtoꢀ125°C
IN
ꢀ(100ms)ꢀ(Noteꢀ9)ꢀ......100mA
OUT(MAX)
DD PAcKAGE
10-LEAD (3mm × 3mm) PLASTIc DFN
ꢀ=ꢀ125°C,ꢀθ ꢀ=ꢀ43°C/W
JA
EXPOSEDꢀPADꢀ(PINꢀ11)ꢀISꢀGND,ꢀMUSTꢀBEꢀSOLDEREDꢀTOꢀPCB
ꢀ
ꢀ
T
JMAX
ORDERꢀPARTꢀNUMBER
LTC3541EDD
DDꢀPARTꢀMARKING
LCBS
Order OptionsꢀꢀꢀTapeꢀandꢀReel:ꢀAddꢀ#TRꢀ
LeadꢀFree:ꢀAddꢀ#PBFꢀꢀꢀLeadꢀFreeꢀTapeꢀandꢀReel:ꢀAddꢀ#TRPBFꢀ
LeadꢀFreeꢀPartꢀMarking:ꢀhttp://www.linear.com/leadfree/
ConsultꢀLTCꢀMarketingꢀforꢀpartsꢀspecifiedꢀwithꢀwiderꢀoperatingꢀtemperatureꢀranges.
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise specified (Note 2)
SYMBOL
PARAMETER
PeakꢀInductorꢀCurrent
CONDITIONS
V ꢀ=ꢀ4.2Vꢀ(Noteꢀ8)
MIN
0.8
TYP
0.95
MAX
1.25
UNITS
Aꢀ
I
I
I
PK
IN
●
●
●
●
BUCKFBꢀPinꢀInputꢀCurrent
LFBꢀPinꢀInputꢀCurrent
InputꢀVoltageꢀRange
V
V
ꢀ=ꢀ0.9V
BUCKFB
50
nA
nA
BUCKFB
LFB
ꢀ=ꢀ0.45V
LFB
–200
2.7
–40
V
V
(Noteꢀ4)
5.5
0.4
V
IN
BuckꢀV ꢀLineꢀRegulationꢀꢀ
V ꢀ=ꢀ2.7Vꢀtoꢀ5.5V,ꢀENBUCKꢀ=ꢀV ,ꢀꢀ
0.04
0.6
0.6
0.3
%/V
IN(LINEREG)
IN
IN
IN
ENVLDOꢀ=ꢀ0V,ꢀMODEꢀ=ꢀV ꢀ(Noteꢀ6)
IN
VLDOꢀV ꢀLineꢀRegulationꢀꢀ
V ꢀ=ꢀ2.7Vꢀtoꢀ5.5V,ꢀLV ꢀ=ꢀ1.2V,ꢀENBUCKꢀ=ꢀV ,ꢀ
mV/V
mV/V
mV/V
IN
IN
OUT
IN
(ReferredꢀtoꢀLFB)
ENVLDOꢀ=ꢀV ,ꢀI
ꢀ=ꢀ100mA,ꢀLV ꢀ=ꢀ1.5Vꢀ
IN OUT(VLDO) IN
LinearꢀRegulatorꢀV ꢀLineꢀ
Regulationꢀ(ReferredꢀtoꢀLFB)
V ꢀ=ꢀ2.7Vꢀtoꢀ5.5V,ꢀLV ꢀ=ꢀ1.2V,ꢀENBUCKꢀ=ꢀ0V,ꢀ
IN OUT
IN
ENVLDOꢀ=ꢀV ,ꢀI
ꢀ=ꢀ10mA
IN OUT(LREG)
LV
LV ꢀLineꢀRegulationꢀꢀ
LV ꢀ=ꢀ0.9Vꢀtoꢀ5.5V,ꢀV ꢀ=ꢀ5.5V,ꢀLV ꢀ=ꢀ0.4V,ꢀꢀ
IN(LINEREG)
IN
IN IN OUT
(ReferredꢀtoꢀLFB)
ENBUCKꢀ=ꢀV ,ꢀENVLDOꢀ=ꢀV ,ꢀMODEꢀ=ꢀV ,ꢀ
IN
IN
IN
I
ꢀ=ꢀ100mA
OUT(VLDO)
VLDO
LV ꢀ–ꢀLV ꢀDropoutꢀVoltageꢀ
LV ꢀ=ꢀ1.5V,ꢀENBUCKꢀ=ꢀV ,ꢀENVLDOꢀ=ꢀV ,ꢀꢀ
28
60
mV
DO
IN
OUT
IN
IN
IN
(Noteꢀ9)
MODEꢀ=ꢀV ,ꢀI
ꢀ=ꢀ50mA,ꢀV ꢀ=ꢀ0.3Vꢀ
IN OUT(VLDO) LFB
V
BuckꢀOutputꢀLoadꢀRegulationꢀ
ENBUCKꢀ=ꢀV ,ꢀENVLDOꢀ=ꢀ0V,ꢀMODEꢀ=ꢀV ꢀ(Noteꢀ6)
0.5
%
%
LOADREG
IN
IN
●
●
VLDOꢀOutputꢀLoadꢀRegulationꢀ
I
ꢀ=ꢀ1mAꢀ–ꢀ300mA,ꢀLV ꢀ=ꢀ1.5V,ꢀLV ꢀ=ꢀ1.2V,ꢀ
0.25
0.5
0.5
OUT(VLDO)
IN
OUT
ENBUCKꢀ=ꢀV ,ꢀENVLDOꢀ=ꢀV ,ꢀMODEꢀ=ꢀV
IN
IN
IN
LinearꢀRegulatorꢀOutputꢀLoadꢀ
I
ꢀ=ꢀ1mAꢀ–ꢀ30mA,ꢀLV ꢀ=ꢀ1.2V,ꢀꢀ
0.25
%
OUT(LREG)
OUT
ENBUCKꢀ=ꢀ0V,ꢀENVLDOꢀ=ꢀV
IN
V
V
ReferenceꢀRegulationꢀVoltageꢀ
(Noteꢀ6)
ENBUCKꢀ=ꢀV ,ꢀENVLDOꢀ=ꢀ0V,ꢀT ꢀ=ꢀ25°C
0.784
0.782
0.78
0.8
0.8
0.8
0.4
0.4
0.4
0.816
0.818
0.82
V
V
V
V
V
BUCKFB
LFB
IN
A
ENBUCKꢀ=ꢀV ,ꢀENVLDOꢀ=ꢀ0V,ꢀ0°Cꢀ≤ꢀT ꢀ≤ꢀ85°C
IN
A
●
●
ENBUCKꢀ=ꢀV ,ꢀENVLDOꢀ=ꢀ0V,ꢀ–40°Cꢀ≤ꢀT ꢀ≤ꢀ85°C
IN
A
ReferenceꢀRegulationꢀVoltageꢀ
(Noteꢀ7)
ENBUCKꢀ=ꢀ0V,ꢀENVLDOꢀ=ꢀV ,ꢀT ꢀ=ꢀ25°C
0.392
0.391
0.390
0.408
0.409
0.410
IN
A
ENBUCKꢀ=ꢀ0V,ꢀENVLDOꢀ=ꢀV ,ꢀ0°Cꢀ≤ꢀT ꢀ≤ꢀ85°C
IN
A
ENBUCKꢀ=ꢀ0V,ꢀENVLDOꢀ=ꢀV ,ꢀ–40°Cꢀ≤ꢀT ꢀ≤ꢀ85°C
V
IN
A
3541fa
ꢁ
LTC3541
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise specified (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Buckꢀ+ꢀVLDOꢀꢀ
LV ꢀ=ꢀ1.5V,ꢀLV ꢀ=ꢀ1.2V,ꢀENBUCKꢀ=ꢀV ,ꢀꢀ
85
µA
S
IN
OUT
IN
BurstꢀModeꢀSleepꢀꢀ
ENVLDOꢀ=ꢀV ,ꢀMODEꢀ=ꢀ0V,ꢀI
ꢀ=ꢀ10µA,ꢀ
IN
OUT(VLDO)
V ꢀQuiescentꢀCurrent
IN
V
ꢀ=ꢀ0.9V
BUCKFB
Buckꢀ+ꢀVLDOꢀꢀ
LV ꢀ=ꢀ1.5V,ꢀLV ꢀ=ꢀ1.2V,ꢀENBUCKꢀ=ꢀV ,ꢀꢀ
315
300
55
µA
µA
µA
µA
µA
µA
IN
OUT
IN
BurstꢀModeꢀActiveꢀ
ENVLDOꢀ=ꢀV ,ꢀMODEꢀ=ꢀ0V,ꢀI
ꢀ=ꢀ10µA,ꢀ
IN
OUT(VLDO)
V ꢀQuiescentꢀCurrent
V
ꢀ=ꢀ0.7V
BUCKFB
IN
Buckꢀ+ꢀVLDOꢀ
LV ꢀ=ꢀ1.5V,ꢀLV ꢀ=ꢀ1.2V,ꢀENBUCKꢀ=ꢀV ,ꢀꢀ
IN
OUT
IN
Pulse-SkipꢀModeꢀActiveꢀ
ENVLDOꢀ=ꢀV ,ꢀMODEꢀ=ꢀV ,ꢀI
V
V
ꢀ=ꢀ10µA,ꢀ
IN
IN OUT(VLDO)
V ꢀQuiescentꢀCurrent
ꢀ=ꢀ0.7V
IN
BUCKFB
Buckꢀ
ꢀ=ꢀ0.9V,ꢀI
ꢀ=ꢀ0A,ꢀENBUCKꢀ=ꢀV ,ꢀ
BUCKFB
ENVLDOꢀ=ꢀ0V,ꢀMODEꢀ=ꢀ0V
OUT(BUCK)
IN
BurstꢀModeꢀSleepꢀ
V ꢀQuiescentꢀCurrent
IN
Buckꢀ
V
ꢀ=ꢀ0.7V,ꢀI
ꢀ=ꢀ0A,ꢀENBUCKꢀ=ꢀV ,ꢀ
300
285
50
BUCKFB
OUT(BUCK)
IN
BurstꢀModeꢀActiveꢀ
ENVLDOꢀ=ꢀ0V,ꢀMODEꢀ=ꢀ0V
V ꢀQuiscentꢀCurrent
IN
Buckꢀ
V
ꢀ=ꢀ0.7V,ꢀI
ꢀ=ꢀ0A,ꢀENBUCKꢀ=ꢀV ,ꢀ
BUCKFB
OUT(BUCK)
IN
Pulse-SkipꢀModeꢀActiveꢀ
ENVLDOꢀ=ꢀ0V,ꢀMODEꢀ=ꢀV
IN
V ꢀQuiescentꢀCurrent
IN
LinearꢀRegulatorꢀV ꢀQuiescentꢀ
Current
LV ꢀ=ꢀ1.2V,ꢀENBUCKꢀ=ꢀ0V,ꢀENVLDOꢀ=ꢀV ,ꢀ
OUT IN
IN
I
ꢀ=ꢀ10µA
OUT(LREG)
V ꢀShutdownꢀQuiescentꢀCurrent ENBUCKꢀ=ꢀ0V,ꢀENVLDOꢀ=ꢀ0V
2.5
0.1
µA
µA
MHz
Ω
IN
LV ꢀShutdownꢀQuiescentꢀCurrent LV ꢀ=ꢀ3.6V,ꢀENBUCKꢀ=ꢀ0V,ꢀENVLDOꢀ=ꢀ0V
IN
IN
●
f
OscillatorꢀFrequency
1.8
0.9
2.25
0.25
0.35
0.01
2.7
1
OSC
R
R
I
R
R
ꢀofꢀP-ChannelꢀMOSFET
ꢀofꢀN-ChannelꢀMOSFET
I
I
ꢀ=ꢀ100mA
PFET
DS(ON)
SW
Ω
ꢀ=ꢀ100mA
SW
NFET
DS(ON)
SWꢀLeakage
Enableꢀ=ꢀ0V,ꢀV ꢀ=ꢀ0Vꢀorꢀ6V,ꢀV ꢀ=ꢀ6V
SW IN
µA
V
LSW
●
●
●
V
InputꢀPinꢀHighꢀThreshold
InputꢀPinꢀLowꢀThreshold
InputꢀPinꢀCurrent
MODE,ꢀENBUCK,ꢀENVLDO
IH
IL
V
I
MODE,ꢀENBUCK,ꢀENVLDO
0.3
1
V
,ꢀ
0.01
µA
MODE
ENBUCK
ENVLDO
I
I
,ꢀ
Note 6:ꢀTheꢀLTC3541ꢀisꢀtestedꢀinꢀaꢀproprietaryꢀtestꢀmodeꢀthatꢀconnectsꢀ
ꢀtoꢀtheꢀoutputꢀofꢀtheꢀerrorꢀamplifier.ꢀForꢀtheꢀreferenceꢀregulationꢀ
andꢀlineꢀregulationꢀtests,ꢀtheꢀoutputꢀofꢀtheꢀerrorꢀamplifierꢀisꢀsetꢀtoꢀtheꢀ
midpoint.ꢀForꢀtheꢀloadꢀregulationꢀtest,ꢀtheꢀoutputꢀofꢀtheꢀerrorꢀamplifierꢀisꢀ
drivenꢀtoꢀminimumꢀandꢀmaximumꢀofꢀtheꢀsignalꢀrange.
Note 1:ꢀStressesꢀbeyondꢀthoseꢀlistedꢀunderꢀAbsoluteꢀMaximumꢀRatingsꢀ
mayꢀcauseꢀpermanentꢀdamageꢀtoꢀtheꢀdevice.ꢀExposureꢀtoꢀanyꢀAbsoluteꢀ
MaximumꢀRatingꢀconditionꢀforꢀextendedꢀperiodsꢀmayꢀaffectꢀdeviceꢀ
reliabilityꢀandꢀlifetime.
V
BUCKFB
Note 2:ꢀTheꢀLTC3541ꢀisꢀguaranteedꢀtoꢀmeetꢀperformanceꢀspecificationsꢀ
fromꢀ0°Cꢀtoꢀ85°C.ꢀVLDO/linearꢀregulatorꢀoutputꢀisꢀtestedꢀandꢀspecifiedꢀ
underꢀpulseꢀloadꢀconditionsꢀsuchꢀthatꢀT ꢀ≈ꢀT ,ꢀandꢀareꢀ100%ꢀproductionꢀ
Note 7:ꢀMeasurementꢀmadeꢀinꢀclosedꢀloopꢀlinearꢀregulatorꢀconfigurationꢀ
withꢀLV ꢀ=ꢀ1.2V,ꢀI
ꢀ=ꢀ10µA.
LOAD
OUT
J
A
testedꢀatꢀ25°C.ꢀSpecificationsꢀoverꢀtheꢀ–40°Cꢀtoꢀ85°Cꢀoperatingꢀ
temperatureꢀrangeꢀareꢀassuredꢀbyꢀdesign,ꢀcharacterizationꢀandꢀcorrelationꢀ
withꢀstatisticalꢀprocessꢀcontrols.
Note 8:ꢀMeasurementꢀmadeꢀinꢀaꢀproprietaryꢀtestꢀmodeꢀwithꢀslopeꢀ
compensationꢀdisabled.
Note 9:ꢀMeasurementꢀisꢀassuredꢀbyꢀdesign,ꢀcharacterizationꢀandꢀstatisticalꢀ
processꢀcontrol.
Note 10:ꢀThisꢀICꢀincludesꢀovertemperatureꢀprotectionꢀthatꢀisꢀintendedꢀ
toꢀprotectꢀtheꢀdeviceꢀduringꢀmomentaryꢀoverloadꢀconditions.ꢀJunctionꢀ
temperatureꢀwillꢀexceedꢀ125°Cꢀwhenꢀovertemperatureꢀprotectionꢀisꢀactive.ꢀ
Continuousꢀoperationꢀaboveꢀtheꢀspecifiedꢀmaximumꢀoperatingꢀjunctionꢀ
temperatureꢀmayꢀimpairꢀdeviceꢀreliability.
Note 3:ꢀMinimumꢀoperatingꢀLV ꢀvoltageꢀrequiredꢀforꢀVLDOꢀregulatorꢀ
IN
regulationꢀis:ꢀ
ꢀ
LV ꢀ≥ꢀLV ꢀ+ꢀV
ꢀandꢀLV ꢀ≥ꢀ0.9V
DROPOUT IN
IN
OUT
Note 4:ꢀMinimumꢀoperatingꢀV ꢀvoltageꢀrequiredꢀforꢀVLDOꢀregulatorꢀandꢀ
IN
linearꢀregulatorꢀregulationꢀis:ꢀꢀ
ꢀ
ꢀ
ꢀ
V ꢀ≥ꢀLV ꢀ+ꢀ1.4VꢀandꢀV ꢀ≥ꢀ2.7V
IN
OUT
IN
Note 5:ꢀT ꢀisꢀcalculatedꢀfromꢀtheꢀambientꢀtemperature,ꢀT ,ꢀandꢀpowerꢀ
J
A
dissipation,ꢀP ,ꢀaccordingꢀtoꢀtheꢀfollowingꢀformula:
D
ꢀ
T ꢀ=ꢀT ꢀ+ꢀ(P ꢀ•ꢀ43°C/W)
J A D
3541fa
ꢂ
LTC3541
W U
TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs Input Voltage for
Buck (Burst)
Efficiency vs Input Voltage for
Buck (Pulse Skip)
Efficiency vs Load Current for
Buck (Burst)
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
100
90
80
70
60
50
40
30
20
10
0
V
= 1.8V
V
OUT
= 1.8V
OUT
V
= 2.7V
IN
I
= 500mA
I
I
= 500mA
= 30mA
OUT
V
= 4.2V
IN
OUT
OUT
V
= 3.6V
IN
I
= 100mA
OUT
I
= 100mA
OUT
I
= 30mA
OUT
V
= 1.8V
1
OUT
2
3
4
5
6
2
3
4
5
6
0.1
10
100
1000
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
LOAD CURRENT (mA)
3541 G03
3541 G01
3541 G02
Efficiency vs Load Current for
Buck (Burst)
Efficiency vs Load Current for
Buck (Pulse Skip)
Efficiency vs Load Current for
Buck (Pulse Skip)
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 2.7V
V
= 2.5V
V
= 1.8V
IN
OUT
OUT
V
= 2.7V
IN
V
= 4.2V
V
= 2.7V
IN
IN
V
= 3.6V
IN
V
= 3.6V
IN
V
= 3.6V
V
= 4.2V
V
= 4.2V
IN
IN
IN
V
= 2.5V
1
OUT
0.1
10
100
1000
0.1
1
10
100
1000
0.1
1
10
100
1000
LOAD cURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3541 G05
3541 G06
3541 G04
Buck (Burst) Plus VLDO Bias
Current vs VLDO Load Current
Output (Auto Start-Up Sequence,
Buck in Pulse Skip) vs Time
VLDO Dropout Voltage vs
Load Current
100
80
250
200
150
100
50
V
= 1.5V
V
= 3.6V
OUT
IN
I
I
= 0
LOAD(BUCK)
BIAS VIN LVIN LOAD
V
= 3V
IN
= I + I
– I
V
OUT
V
= 3.6V
IN
2V/DIV
LV
2V/DIV
OUT
60
V
= 4.2V
IN
V
IN
40
2V/DIV
20
0
3541 G09
2ms/DIV
I
I
= 300mA
LVOUT
VOUT
= 200mA
0
0
100
150
200
250
300
0.1
1
10
100
50
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3541 G07
3541 G08
3541fa
ꢃ
LTC3541
W U
TYPICAL PERFOR A CE CHARACTERISTICS
Oscillator Frequency
vs Temperature
Oscillator Frequency
vs Supply Voltage
VLDO/Linear Regulator Reference
vs Temperature
2.50
2.45
2.40
2.35
2.30
2.25
2.20
2.15
2.10
2.05
2.00
0.410
0.408
0.406
0.404
0.402
0.400
0.398
0.396
0.394
0.392
0.390
2.5
2.4
2.3
2.2
2.1
2.0
V
= 3.6V
V
= 3.6V
V
= 3.6V
IN
IN
IN
–50
0
25
50
75 100 125
–25
50
TEMPERATURE (°C)
125
–50
0
25
75 100
–25
4
5
6
3
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
3541 G10
5341 G12
3541 G11
Buck (Burst) and VLDO Output
Buck Reference vs Temperature
RDS(ON) vs Temperature
0.820
0.816
0.812
0.808
0.804
0.800
0.796
0.792
0.788
0.784
0.780
0.700
0.600
0.500
0.400
0.300
0.200
0.100
0
V
= 3.6V
IN
LV
OUT
10mV/DIV
AC COUPLED
V
OUT
10mV/DIV
SYNCH SWITCH
MAIN SWITCH
AC COUPLED
V
V
V
= 2.5V
= 3.6V
= 5.5V
3541 G15
IN
IN
IN
2µs/DIV
V
= 3.6V
OUT
IN
LV
= 1.5V
V
I
= 1.8V
= 50mA
OUT
–50
0
25
50
75 100 125
–50
25
50
75
100 125
–25
–25
0
LOAD
Burst Mode OPERATION
TEMPERATURE (°C)
TEMPERATURE (°C)
5341 G13
3541 G14
Buck (Pulse Skip) Load Step from
1mA to 500mA
Buck (Burst) Load Step from
1mA to 500mA
VLDO Load Step from
1mA to 500mA
V
V
OUT
OUT
100mV/DIV
100mV/DIV
LV
OUT
AC COUPLED
AC COUPLED
20mV/DIV
AC COUPLED
I
I
L
L
500mA/DIV
500mA/DIV
I
I
I
LOAD
LOAD
LOAD
250mA/DIV
500mA/DIV
500mA/DIV
3541 G16
3541 G18
3541 G17
40µs/DIV
V
V
I
= 3.6V
400µs/DIV
= 1mA TO 300mA
V
= 3.6V
OUT
40µs/DIV
V
V
I
= 3.6V
IN
OUT
IN
IN
OUT
= 1.8V
= 1mA TO 500mA
LV
I
= 1.5V
= 1.8V
= 1mA TO 500mA
LOAD
LOAD
LOAD
3541fa
ꢄ
LTC3541
W U
TYPICAL PERFOR A CE CHARACTERISTICS
VLDO Load Step from
100mA to 300mA
Linear Regulator to VLDO
Transient Step, Load = 1mA
Linear Regulator to VLDO
Transient Step, Load = 30mA
LV
LV
OUT
LV
OUT
OUT
20mV/DIV
10mV/DIV
10mV/DIV
AC COUPLED
AC COUPLED
AC COUPLED
I
LOAD
I
50mA/DIV
LOAD
I
LOAD
50mA/DIV
250mA/DIV
3541 G19
3541 G20
3541 G21
400µs/DIV
= 100mA TO 300mA
40µs/DIV
V
= 3.6V
OUT
V
= 3.6V
IN
40µs/DIV
V
= 3.6V
IN
IN
LV
I
= 1.5V
LV
I
= 1.5V
LV
I
= 1.5V
OUT
OUT
= 1mA
= 30mA
LOAD
LOAD
LOAD
VLDO to Linear Regulator
Transient Step, Load = 1mA
VLDO to Linear Regulator
Transient Step, Load = 30mA
LV
LV
OUT
OUT
10mV/DIV
10mV/DIV
AC COUPLED
AC COUPLED
I
LOAD
I
LOAD
50mA/DIV
50mA/DIV
3541 G22
3541 G23
40µs/DIV
V
= 3.6V
40µs/DIV
V
= 3.6V
IN
IN
LV
I
= 1.5V
LV
I
= 1.5V
OUT
OUT
= 1mA
= 30mA
LOAD
LOAD
3541fa
ꢅ
LTC3541
U U
U
PI FU CTIO S
V (Pin 1):ꢀMainꢀSupplyꢀPin.ꢀThisꢀpinꢀmustꢀbeꢀcloselyꢀ
MODE (Pin 8):ꢀBuckꢀModeꢀSelectionꢀPin.ꢀThisꢀpinꢀenablesꢀ
buckꢀPulse-Skipꢀoperationꢀwhenꢀdrivenꢀtoꢀaꢀlogicꢀhighꢀ
andꢀenablesꢀbuckꢀBurstꢀModeꢀoperationꢀwhenꢀdrivenꢀtoꢀ
aꢀlogicꢀlow.
IN
decoupledꢀtoꢀGNDꢀwithꢀaꢀ10µFꢀorꢀgreaterꢀcapacitor.
ENBUCK (Pin 2):ꢀBuckꢀEnableꢀPin.ꢀThisꢀpinꢀenablesꢀtheꢀ
buckꢀregulatorꢀwhenꢀdrivenꢀtoꢀaꢀlogicꢀhigh.
ENVLDO (Pin 9):ꢀ VLDO/Linearꢀ Regulatorꢀ Enableꢀ Pin.ꢀ
Whenꢀdrivenꢀtoꢀaꢀlogicꢀhigh,ꢀthisꢀpinꢀenablesꢀtheꢀlinearꢀ
regulatorꢀwhenꢀtheꢀENBUCKꢀpinꢀisꢀdrivenꢀtoꢀaꢀlogicꢀlow,ꢀ
andꢀenablesꢀtheꢀVLDOꢀwhenꢀtheꢀENBUCKꢀpinꢀisꢀdrivenꢀtoꢀ
aꢀlogicꢀhigh.
BUCKFB (Pin 3):ꢀBuckꢀRegulatorꢀFeedbackꢀPin.ꢀThisꢀpinꢀ
receivesꢀtheꢀbuckꢀregulator’sꢀfeedbackꢀvoltageꢀfromꢀanꢀ
externalꢀresistiveꢀdivider.
LFB (Pin 4):ꢀVLDO/LinearꢀRegulatorꢀFeedbackꢀPin.ꢀThisꢀ
pinꢀreceivesꢀeitherꢀtheꢀVLDOꢀorꢀlinearꢀregulator’sꢀfeedbackꢀ
voltageꢀfromꢀanꢀexternalꢀresistiveꢀdivider.
SW (Pin 10):ꢀSwitchꢀNodeꢀPin.ꢀThisꢀpinꢀconnectsꢀtheꢀ
internalꢀmainꢀandꢀsynchronousꢀpowerꢀMOSFETꢀswitchesꢀ
toꢀtheꢀexternalꢀinductorꢀforꢀtheꢀbuckꢀregulator.
LV
(Pin 5):ꢀVLDO/LinearꢀRegulatorꢀOutputꢀPin.ꢀThisꢀ
OUT
pinꢀprovidesꢀtheꢀregulatedꢀoutputꢀvoltageꢀfromꢀtheꢀVLDOꢀ
Exposed Pad (Pin 11):ꢀGroundꢀPin.ꢀThisꢀpinꢀmustꢀbeꢀ
solderedꢀtoꢀtheꢀPCBꢀtoꢀprovideꢀbothꢀelectricalꢀcontactꢀtoꢀ
groundꢀandꢀgoodꢀthermalꢀcontactꢀtoꢀtheꢀPCB.
orꢀlinearꢀregulator.
LV (Pin 6):ꢀVLDO/LinearꢀRegulatorꢀInputꢀSupplyꢀPin.ꢀ
IN
ThisꢀpinꢀprovidesꢀtheꢀinputꢀsupplyꢀvoltageꢀforꢀtheꢀVLDOꢀ
Note:ꢀTableꢀ1ꢀdetailsꢀtheꢀtruthꢀtableꢀforꢀtheꢀcontrolꢀpinsꢀ
ofꢀtheꢀLTC3541.
powerꢀFET.
GND (Pin 7):ꢀAnalogꢀGroundꢀPin.
Table 1. LTC3541 Control Pin Truth Table
PIN NAME
OPERATIONAL DESCRIPTION
ENBUCK ENVLDO MODE
0
0
0
1
X
X
LTC3541ꢀPoweredꢀDown
BuckꢀPoweredꢀDown,ꢀVLDOꢀRegulatorꢀ
PoweredꢀDown,ꢀLinearꢀRegulatorꢀ
Enabled
1
1
1
1
0
0
1
1
0
1
0
1
BuckꢀEnabled,ꢀVLDOꢀRegulatorꢀPoweredꢀ
Down,ꢀLinearꢀRegulatorꢀPoweredꢀDown, ꢀ
BurstꢀModeꢀOperation
BuckꢀEnabled,ꢀVLDOꢀRegulatorꢀPoweredꢀ
Down,ꢀLinearꢀRegulatorꢀPoweredꢀDown,ꢀꢀ
Pulse-SkipꢀModeꢀOperation
BuckꢀEnabled,ꢀVLDOꢀRegulatorꢀEnabled,ꢀ
LinearꢀRegulatorꢀPoweredꢀDown,ꢀBurstꢀ
ModeꢀOperation
BuckꢀEnabled,ꢀVLDOꢀRegulatorꢀEnabled,ꢀ
LinearꢀRegulatorꢀPoweredꢀDown,ꢀPulse-
SkipꢀModeꢀOperation
3541fa
ꢆ
LTC3541
U
U
W
FU CTIO AL BLOCK DIAGRA
2.2µH
I
= 500mA
OUT(BUCK)
V
≥ LV
+ 1.4V
OUT
IN(MIN)
10µF
10
SW
V
IN
1
500mA BUCK
SW
V
IN
22pF
REF
FB
GND
BUCKFB
3
6
PGND
LV
IN
VLDO/LINEAR REG
V
LV
IN
IN
REF
REF
LV
< V – 1.4V
IN
ENBUCK
ENVLDO
MODE
OUT(MAX)
+
2
9
8
I
I
= 300mA (VLDO REG)
= 30mA (LINEAR REG)
OUT
OUT
CONTROL
LOGIC
LFB
LV
–
OUT
5
4
CNTRL
GND
2.2µF
LFB
GND
PGND
11
7
3541 F01
Figure 1. LTC3541 Functional Block Diagram
U
OPERATIO
Theꢀ LTC3541ꢀ containsꢀ aꢀ highꢀ efficiencyꢀ synchronousꢀ
buckꢀconverter,ꢀaꢀveryꢀlowꢀdropoutꢀregulatorꢀ(VLDO)ꢀandꢀ
aꢀlinearꢀregulator.ꢀItꢀcanꢀbeꢀusedꢀtoꢀprovideꢀupꢀtoꢀtwoꢀ
outputꢀvoltagesꢀfromꢀaꢀsingleꢀinputꢀvoltageꢀmakingꢀtheꢀ
LTC3541ꢀidealꢀforꢀapplicationsꢀwithꢀlimitedꢀboardꢀspace.ꢀ
Theꢀcombinationꢀandꢀconfigurationꢀofꢀtheseꢀmajorꢀblocksꢀ
withinꢀtheꢀLTC3541ꢀisꢀdeterminedꢀbyꢀwayꢀofꢀtheꢀcontrolꢀ
pinsꢀENBUCKꢀandꢀENVLDOꢀasꢀdefinedꢀinꢀTableꢀ1.
whenꢀusingꢀtheꢀbuckꢀregulatorꢀtoꢀprovideꢀtheꢀpowerꢀforꢀ
bothꢀtheꢀVLDOꢀandꢀforꢀexternalꢀloads.ꢀ
WithꢀtheꢀENBUCKꢀpinꢀdrivenꢀtoꢀaꢀlogicꢀlowꢀandꢀENVLDOꢀ
drivenꢀtoꢀaꢀlogicꢀhigh,ꢀtheꢀLTC3541ꢀenablesꢀtheꢀlinearꢀ
regulator,ꢀprovidingꢀaꢀlowꢀnoiseꢀregulatedꢀoutputꢀvoltageꢀ
atꢀtheꢀLV ꢀpinꢀwhileꢀdrawingꢀminimalꢀquiescentꢀcurrentꢀ
OUT
fromꢀtheꢀV ꢀinputꢀpin.ꢀThisꢀfeatureꢀallowsꢀoutputꢀvoltageꢀ
IN
LV ꢀtoꢀbeꢀbroughtꢀintoꢀregulationꢀwithoutꢀtheꢀpresenceꢀ
OUT
WithꢀtheꢀENBUCKꢀpinꢀdrivenꢀtoꢀaꢀlogicꢀhighꢀandꢀENVLDOꢀ
drivenꢀtoꢀaꢀlogicꢀlow,ꢀtheꢀLTC3541ꢀenablesꢀtheꢀbuckꢀcon-
ofꢀtheꢀLV ꢀvoltage.ꢀ
IN
Withꢀ theꢀ ENBUCKꢀ andꢀ ENVLDOꢀ pinsꢀ bothꢀ drivenꢀ toꢀ aꢀ
logicꢀhigh,ꢀtheꢀLTC3541ꢀenablesꢀtheꢀhighꢀefficiencyꢀbuckꢀ
converterꢀandꢀVLDOꢀregulator,ꢀprovidingꢀdualꢀoutputꢀopera-
tionꢀfromꢀaꢀsingleꢀinputꢀvoltage.ꢀWhenꢀconfiguredꢀinꢀthisꢀ
manner,ꢀtheꢀLTC3541’sꢀautoꢀstart-upꢀsequencingꢀfeatureꢀ
willꢀbringꢀtheꢀbuckꢀoutputꢀintoꢀregulationꢀinꢀaꢀcontrolledꢀ
mannerꢀpriorꢀtoꢀenablingꢀtheꢀVLDOꢀregulatorꢀwithoutꢀtheꢀ
verterꢀtoꢀefficientlyꢀreduceꢀtheꢀvoltageꢀprovidedꢀatꢀtheꢀV ꢀ
IN
inputꢀpinꢀtoꢀanꢀoutputꢀvoltageꢀwhichꢀisꢀsetꢀbyꢀanꢀexternalꢀ
feedbackꢀresistorꢀnetwork.ꢀTheꢀbuckꢀregulatorꢀcanꢀbeꢀcon-
figuredꢀforꢀPulse-SkipꢀorꢀBurstꢀModeꢀoperationꢀbyꢀdrivingꢀ
theꢀMODEꢀpinꢀtoꢀaꢀlogicꢀhighꢀorꢀlogicꢀlowꢀrespectively.ꢀTheꢀ
buckꢀregulatorꢀisꢀcapableꢀofꢀprovidingꢀaꢀmaximumꢀoutputꢀ
currentꢀofꢀ500mA,ꢀwhichꢀmustꢀbeꢀtakenꢀintoꢀconsiderationꢀ
3541fa
ꢇ
LTC3541
U
OPERATIO
needꢀforꢀexternalꢀpinꢀcontrol.ꢀAꢀdetailedꢀdiscussionꢀofꢀtheꢀ
transitionsꢀbetweenꢀtheꢀVLDOꢀandꢀlinearꢀregulatorꢀcanꢀbeꢀ
foundꢀinꢀtheꢀVLDO/LinearꢀRegulatorꢀLoopꢀsection.ꢀ
WhenꢀtheꢀMODEꢀpinꢀisꢀdrivenꢀtoꢀaꢀlogicꢀhighꢀtheꢀLTC3541ꢀ
operatesꢀinꢀPulse-Skipꢀmodeꢀforꢀlowꢀoutputꢀvoltageꢀripple.ꢀ
Inꢀthisꢀmode,ꢀtheꢀLTC3541ꢀcontinuesꢀtoꢀswitchꢀatꢀaꢀconstantꢀ
frequencyꢀdownꢀtoꢀveryꢀlowꢀcurrents,ꢀwhereꢀitꢀwillꢀbeginꢀ
skippingꢀpulsesꢀusedꢀtoꢀcontrolꢀtheꢀmainꢀ(top)ꢀswitchꢀtoꢀ
maintainꢀtheꢀproperꢀaverageꢀinductorꢀcurrent.
Buck Regulator Control Loop
TheꢀLTC3541ꢀinternalꢀbuckꢀregulatorꢀusesꢀaꢀconstantꢀfre-
quency,ꢀcurrentꢀmode,ꢀstep-downꢀarchitecture.ꢀBothꢀtheꢀ
mainꢀ(top,ꢀP-channelꢀMOSFET)ꢀandꢀsynchronousꢀ(bottom,ꢀ
N-channelꢀMOSFET)ꢀswitchesꢀareꢀinternal.ꢀDuringꢀnormalꢀ
operation,ꢀtheꢀinternalꢀmainꢀswitchꢀisꢀturnedꢀonꢀatꢀtheꢀbe-
ginningꢀofꢀeachꢀclockꢀcycleꢀprovidedꢀtheꢀinternalꢀfeedbackꢀ
voltageꢀtoꢀtheꢀbuckꢀisꢀlessꢀthanꢀtheꢀreferenceꢀvoltage.ꢀTheꢀ
currentꢀintoꢀtheꢀinductorꢀprovidedꢀtoꢀtheꢀloadꢀincreasesꢀ
untilꢀtheꢀcurrentꢀlimitꢀisꢀreached.ꢀOnceꢀtheꢀcurrentꢀlimitꢀisꢀ
reachedꢀtheꢀmainꢀswitchꢀturnsꢀoffꢀandꢀtheꢀenergyꢀstoredꢀ
inꢀtheꢀinductorꢀflowsꢀthroughꢀtheꢀbottomꢀsynchronousꢀ
switchꢀintoꢀtheꢀloadꢀuntilꢀtheꢀnextꢀclockꢀcycle.
Ifꢀtheꢀinputꢀsupplyꢀvoltageꢀisꢀdecreasedꢀtoꢀaꢀvalueꢀap-
proachingꢀtheꢀoutputꢀvoltage,ꢀtheꢀdutyꢀcycleꢀofꢀtheꢀbuckꢀ
isꢀincreasedꢀtowardꢀmaximumꢀon-timeꢀandꢀ100%ꢀdutyꢀ
cycle.ꢀTheꢀoutputꢀvoltageꢀwillꢀthenꢀbeꢀdeterminedꢀbyꢀtheꢀ
inputꢀvoltageꢀminusꢀtheꢀvoltageꢀdropꢀacrossꢀtheꢀmainꢀ
switchꢀandꢀtheꢀinductor.
VLDO/Linear Regulator Loop
InꢀtheꢀLTC3541,ꢀtheꢀVLDOꢀandꢀlinearꢀregulatorꢀloopsꢀconsistꢀ
ofꢀanꢀamplifierꢀandꢀN-channelꢀMOSFETꢀoutputꢀstagesꢀthat,ꢀ
whenꢀconnectedꢀwithꢀtheꢀproperꢀexternalꢀcomponents,ꢀ
willꢀservoꢀtheꢀoutputꢀtoꢀmaintainꢀaꢀregulatorꢀoutputꢀvolt-
Theꢀpeakꢀinductorꢀcurrentꢀisꢀdeterminedꢀbyꢀcomparingꢀtheꢀ
buckꢀfeedbackꢀsignalꢀtoꢀanꢀinternalꢀ0.8Vꢀreference.ꢀWhenꢀ
theꢀloadꢀcurrentꢀincreases,ꢀtheꢀoutputꢀofꢀtheꢀbuckꢀandꢀ
henceꢀtheꢀbuckꢀfeedbackꢀsignalꢀdecrease.ꢀThisꢀdecreaseꢀ
causesꢀtheꢀpeakꢀinductorꢀcurrentꢀtoꢀincreaseꢀuntilꢀtheꢀaver-
ageꢀinductorꢀcurrentꢀmatchesꢀtheꢀloadꢀcurrent.ꢀWhileꢀtheꢀ
mainꢀswitchꢀisꢀoff,ꢀtheꢀsynchronousꢀswitchꢀisꢀturnedꢀonꢀ
untilꢀeitherꢀtheꢀinductorꢀcurrentꢀstartsꢀtoꢀreverseꢀdirectionꢀ
orꢀtheꢀbeginningꢀofꢀaꢀnewꢀclockꢀcycle.
age,ꢀLV .ꢀTheꢀinternalꢀreferenceꢀvoltageꢀprovidedꢀtoꢀtheꢀ
OUT
amplifierꢀisꢀ0.4Vꢀallowingꢀforꢀaꢀwideꢀrangeꢀofꢀoutputꢀvolt-
ages.ꢀLoopꢀconfigurationsꢀenablingꢀtheꢀVLDOꢀorꢀtheꢀlinearꢀ
regulatorꢀareꢀstableꢀwithꢀanꢀoutputꢀcapacitanceꢀasꢀlowꢀasꢀ
2.2µFꢀandꢀasꢀhighꢀasꢀ100µF.ꢀBothꢀtheꢀVLDOꢀandꢀtheꢀlinearꢀ
regulatorsꢀareꢀcapableꢀofꢀoperatingꢀwithꢀanꢀinputꢀvoltage,ꢀ
V ,ꢀasꢀlowꢀasꢀ2.7V,ꢀbutꢀareꢀsubjectꢀtoꢀtheꢀconstraintꢀthatꢀ
IN
V ꢀmustꢀbeꢀgreaterꢀthanꢀLV ꢀ+ꢀ1.4V.ꢀ
IN
OUT
WhenꢀtheꢀMODEꢀpinꢀisꢀdrivenꢀtoꢀaꢀlogicꢀlow,ꢀtheꢀLTC3541ꢀ
buckꢀregulatorꢀoperatesꢀinꢀBurstꢀModeꢀoperationꢀforꢀhighꢀ
efficiency.ꢀInꢀthisꢀmode,ꢀtheꢀmainꢀswitchꢀoperatesꢀbasedꢀ
uponꢀloadꢀdemand.ꢀInꢀBurstꢀModeꢀoperationꢀtheꢀpeakꢀ
inductorꢀcurrentꢀisꢀsetꢀtoꢀaꢀfixedꢀvalue,ꢀwhereꢀeachꢀburstꢀ
eventꢀcanꢀlastꢀfromꢀaꢀfewꢀclockꢀcyclesꢀatꢀlightꢀloadsꢀtoꢀ
nearlyꢀ continuousꢀ cyclingꢀ atꢀ moderateꢀ loads.ꢀ Betweenꢀ
burstꢀeventsꢀtheꢀmainꢀswitchꢀandꢀanyꢀunneededꢀcircuitryꢀ
areꢀturnedꢀoff,ꢀreducingꢀtheꢀquiescentꢀcurrent.ꢀInꢀthisꢀsleepꢀ
state,ꢀtheꢀloadꢀisꢀbeingꢀsuppliedꢀsolelyꢀfromꢀtheꢀoutputꢀ
capacitor.ꢀAsꢀtheꢀoutputꢀvoltageꢀdroops,ꢀanꢀinternalꢀerrorꢀ
amplifier’sꢀoutputꢀrisesꢀuntilꢀaꢀwakeꢀthresholdꢀisꢀreachedꢀ
causingꢀtheꢀmainꢀswitchꢀtoꢀagainꢀturnꢀon.ꢀThisꢀprocessꢀ
repeatsꢀatꢀaꢀrateꢀthatꢀisꢀdependantꢀuponꢀtheꢀloadꢀcurrentꢀ
demand.
TheꢀVLDOꢀisꢀdesignedꢀtoꢀprovideꢀupꢀtoꢀ300mAꢀofꢀoutputꢀ
currentꢀatꢀaꢀveryꢀlowꢀLV ꢀtoꢀLV ꢀvoltage.ꢀThisꢀallowsꢀ
IN
OUT
aꢀclean,ꢀsecondary,ꢀanalogꢀsupplyꢀvoltageꢀtoꢀbeꢀprovidedꢀ
withꢀaꢀminimumꢀdropꢀinꢀefficiency.ꢀTheꢀVLDOꢀisꢀprovidedꢀ
withꢀthermalꢀprotectionꢀthatꢀisꢀdesignedꢀtoꢀdisableꢀtheꢀ
VLDOꢀfunctionꢀwhenꢀtheꢀoutput,ꢀpassꢀtransistor’sꢀjunctionꢀ
temperatureꢀreachesꢀapproximatelyꢀ160°C.ꢀInꢀadditionꢀtoꢀ
thermalꢀprotection,ꢀshort-circuitꢀdetectionꢀisꢀprovidedꢀtoꢀ
disableꢀtheꢀVLDOꢀfunctionꢀwhenꢀaꢀshort-circuitꢀconditionꢀisꢀ
sensed.ꢀThisꢀcircuitꢀisꢀdesignedꢀsuchꢀthatꢀanꢀoutputꢀcurrentꢀ
ofꢀapproximatelyꢀ1Aꢀcanꢀbeꢀprovidedꢀbeforeꢀthisꢀcircuitꢀ
willꢀtrigger.ꢀAsꢀdetailedꢀinꢀtheꢀElectricalꢀCharacteristics,ꢀtheꢀ
VLDOꢀregulatorꢀwillꢀbeꢀoutꢀofꢀregulationꢀwhenꢀthisꢀeventꢀ
occurs.ꢀBothꢀtheꢀthermalꢀandꢀshort-circuitꢀfaultsꢀwhenꢀ
detectedꢀareꢀtreatedꢀasꢀcatastrophicꢀfaultꢀconditions.ꢀTheꢀ
3541fa
ꢈ
LTC3541
U
OPERATIO
LTC3541ꢀwillꢀbeꢀresetꢀuponꢀtheꢀdetectionꢀofꢀeitherꢀevent.ꢀ
TheꢀN-channelꢀMOSFETꢀincorporatedꢀinꢀtheꢀVLDOꢀhasꢀitsꢀ
TransitioningꢀfromꢀlinearꢀregulatorꢀmodeꢀtoꢀVLDOꢀmode,ꢀ
accomplishedꢀbyꢀbringingꢀENBUCKꢀfromꢀaꢀlogicꢀlowꢀtoꢀaꢀ
logicꢀhighꢀwhileꢀENVLDOꢀisꢀaꢀlogicꢀhigh,ꢀisꢀdesignedꢀtoꢀbeꢀ
asꢀseamlessꢀandꢀtransientꢀfreeꢀasꢀpossible.ꢀTheꢀpreciseꢀ
drainꢀconnectedꢀtoꢀtheꢀLV ꢀpinꢀasꢀshownꢀinꢀFigureꢀ1.ꢀToꢀ
IN
ensureꢀreliableꢀoperation,ꢀtheꢀLV ꢀvoltageꢀmustꢀbeꢀstableꢀ
IN
beforeꢀtheꢀVLDOꢀisꢀenabled.ꢀForꢀtheꢀcaseꢀwhereꢀtheꢀvolt-
transientꢀresponseꢀofꢀLV ꢀdueꢀtoꢀthisꢀtransitionꢀisꢀaꢀ
OUT
ageꢀonꢀtheꢀLV ꢀpinꢀisꢀsuppliedꢀbyꢀtheꢀbuckꢀregulator,ꢀtheꢀ
functionꢀofꢀC ꢀandꢀtheꢀloadꢀcurrent.ꢀWaveformsꢀgivenꢀ
IN
OUT
internalꢀpowerꢀsupplyꢀsequencingꢀlogicꢀassuresꢀvoltagesꢀ
inꢀtheꢀTypicalꢀPerformanceꢀCharaceristicsꢀshowꢀtypicalꢀ
areꢀappliedꢀinꢀtheꢀappropriateꢀmanner.ꢀForꢀtheꢀcaseꢀwhereꢀ
transientꢀresponsesꢀusingꢀtheꢀminimumꢀC ꢀofꢀ2.2µFꢀandꢀ
OUT
anꢀexternalꢀsupplyꢀisꢀusedꢀtoꢀpowerꢀtheꢀLV ꢀpin,ꢀtheꢀvolt-
loadꢀcurrentsꢀofꢀ1mAꢀandꢀ30mAꢀrespectively.ꢀGenerally,ꢀtheꢀ
IN
ageꢀonꢀtheꢀLV ꢀpinꢀmustꢀbeꢀstableꢀbeforeꢀtheꢀENVLDOꢀpinꢀ
amplitudeꢀofꢀanyꢀtransientsꢀpresentꢀwillꢀdecreaseꢀasꢀC
ꢀ
IN
OUT
isꢀbroughtꢀfromꢀaꢀlowꢀtoꢀaꢀhigh.ꢀFurther,ꢀtheꢀexternalꢀLV ꢀ
isꢀincreased.ꢀToꢀensureꢀreliableꢀoperationꢀandꢀadherenceꢀ
toꢀtheꢀloadꢀregulationꢀlimitsꢀpresentedꢀinꢀtheꢀElectricalꢀ
Characteristicsꢀtable,ꢀtheꢀloadꢀcurrentꢀmustꢀnotꢀexceedꢀ
IN
voltageꢀmustꢀbeꢀreducedꢀinꢀconjunctionꢀwithꢀV ꢀwheneverꢀ
IN
V ꢀisꢀpulledꢀlowꢀorꢀremoved.
IN
theꢀlinearꢀregulatorꢀI ꢀlimitꢀofꢀ30mAꢀwithinꢀ20msꢀafterꢀ
OUT
Theꢀlinearꢀregulatorꢀisꢀdesignedꢀtoꢀprovideꢀaꢀlowerꢀoutputꢀ
currentꢀ(30mA)ꢀthanꢀthatꢀavailableꢀfromꢀtheꢀVLDO.ꢀTheꢀ
linearꢀregulator’sꢀoutputꢀpassꢀtransistorꢀhasꢀitsꢀdrainꢀtiedꢀ
ENBUCKꢀhasꢀtransitionedꢀtoꢀaꢀlogicꢀhigh.ꢀTheꢀ300mAꢀI
ꢀ
OUT
limitꢀofꢀVLDOꢀappliesꢀthereafter.ꢀFurther,ꢀforꢀconfigurationsꢀ
thatꢀdoꢀnotꢀuseꢀtheꢀLTC3541’sꢀbuckꢀregulatorꢀtoꢀprovideꢀ
toꢀtheꢀV ꢀrail.ꢀThisꢀallowsꢀtheꢀlinearꢀregulatorꢀtoꢀbeꢀturnedꢀ
IN
theꢀVLDOꢀinputꢀvoltageꢀ(LV ),ꢀtheꢀuserꢀmustꢀensureꢀaꢀ
IN
onꢀpriorꢀto,ꢀandꢀindependentꢀof,ꢀtheꢀbuckꢀregulatorꢀwhichꢀ
ordinarilyꢀdrivesꢀtheꢀVLDO.ꢀTheꢀlinearꢀregulatorꢀisꢀprovidedꢀ
withꢀthermalꢀprotectionꢀthatꢀisꢀdesignedꢀtoꢀdisableꢀtheꢀ
linearꢀregulatorꢀfunctionꢀwhenꢀtheꢀoutputꢀpassꢀtransistor’sꢀ
junctionꢀ temperatureꢀ reachesꢀ approximatelyꢀ 160°C.ꢀ Inꢀ
additionꢀtoꢀthermalꢀprotection,ꢀshort-circuitꢀdetectionꢀisꢀ
providedꢀtoꢀdisableꢀtheꢀlinearꢀregulatorꢀfunctionꢀwhenꢀaꢀ
short-circuitꢀconditionꢀisꢀsensed.ꢀThisꢀcircuitꢀisꢀdesignedꢀ
suchꢀthatꢀanꢀoutputꢀcurrentꢀofꢀapproximatelyꢀ120mAꢀcanꢀ
beꢀprovidedꢀbeforeꢀthisꢀcircuitꢀwillꢀtrigger.ꢀAsꢀdetailedꢀinꢀ
theꢀElectricalꢀCharacteristics,ꢀtheꢀlinearꢀregulatorꢀwillꢀbeꢀ
outꢀofꢀregulationꢀwhenꢀthisꢀeventꢀoccurs.ꢀBothꢀtheꢀthermalꢀ
andꢀshort-circuitꢀfaultsꢀareꢀtreatedꢀasꢀcatastrophicꢀfaultꢀ
conditions.ꢀTheꢀLTC3541ꢀwillꢀbeꢀresetꢀuponꢀtheꢀdetectionꢀ
ofꢀeitherꢀevent.ꢀ
stableꢀLV ꢀvoltageꢀisꢀpresentꢀnoꢀlessꢀthanꢀ1msꢀpriorꢀtoꢀ
IN
ENBUCKꢀtransitioningꢀtoꢀaꢀlogicꢀhigh.
Inꢀaꢀsimilarꢀmanner,ꢀtransitioningꢀfromꢀVLDOꢀmodeꢀtoꢀ
linearꢀregulatorꢀmode,ꢀaccomplishedꢀbyꢀbringingꢀENBUCKꢀ
fromꢀaꢀhighꢀlowꢀtoꢀaꢀlogicꢀlowꢀwhileꢀENVLDOꢀisꢀaꢀlogicꢀ
high,ꢀisꢀdesignedꢀtoꢀbeꢀasꢀseamlessꢀandꢀtransientꢀfreeꢀasꢀ
possible.ꢀAgain,ꢀtheꢀpreciseꢀtransientꢀresponseꢀofꢀLV
ꢀ
OUT
dueꢀtoꢀthisꢀtransitionꢀisꢀaꢀfunctionꢀofꢀC ꢀandꢀtheꢀloadꢀ
OUT
current.ꢀ Waveformsꢀ givenꢀ inꢀ theꢀ Typicalꢀ Performanceꢀ
Characeristicsꢀ showꢀ typicalꢀ transientꢀ responsesꢀ usingꢀ
theꢀminimumꢀC ꢀofꢀ2.2µFꢀandꢀloadꢀcurrentsꢀofꢀ1mAꢀ
OUT
andꢀ30mAꢀrespectively.ꢀGenerally,ꢀtheꢀamplitudeꢀofꢀanyꢀ
transientsꢀ presentꢀ willꢀ decreaseꢀ asꢀ C ꢀ isꢀ increased.ꢀ
OUT
Toꢀensureꢀreliableꢀoperationꢀandꢀadherenceꢀtoꢀtheꢀloadꢀ
regulationꢀlimitsꢀpresentedꢀinꢀtheꢀElectricalꢀCharactersticsꢀ
table,ꢀtheꢀloadꢀcurrentꢀmustꢀnotꢀexceedꢀtheꢀlinearꢀregulatorꢀ
TheꢀN-channelꢀMOSFETꢀincorporatedꢀinꢀtheꢀlinearꢀregulatorꢀ
hasꢀitsꢀdrainꢀconnectedꢀtoꢀtheꢀV ꢀpinꢀasꢀshownꢀinꢀFigureꢀ1.ꢀ
IN
I
ꢀlimitꢀofꢀ30mAꢀ1msꢀpriorꢀtoꢀENBUCKꢀtransitioningꢀtoꢀaꢀ
OUT
TheꢀsizeꢀofꢀthisꢀMOSFETꢀandꢀitsꢀassociatedꢀpowerꢀbussingꢀ
isꢀdesignedꢀtoꢀaccommodateꢀ30mAꢀofꢀDCꢀcurrent.ꢀCurrentsꢀ
aboveꢀthisꢀcanꢀbeꢀsupportedꢀforꢀshortꢀperiodsꢀasꢀstipulatedꢀ
inꢀtheꢀAbsoluteꢀMaximumꢀRatingsꢀsection.
logicꢀlowꢀandꢀthereafer.ꢀFurther,ꢀforꢀconfigurationsꢀthatꢀdoꢀ
notꢀuseꢀtheꢀLTC3541’sꢀbuckꢀregulatorꢀtoꢀprovideꢀtheꢀVLDOꢀ
inputꢀvoltageꢀ(LV ),ꢀtheꢀuserꢀmustꢀcontinueꢀtoꢀensureꢀaꢀ
IN
stableꢀLV ꢀvoltageꢀnoꢀlessꢀthanꢀ1msꢀafterꢀENBUCKꢀhasꢀ
IN
transitionedꢀtoꢀaꢀlogicꢀlow.
3541fa
ꢀ0
LTC3541
U U
W U
APPLICATIO S I FOR ATIO
TheꢀbasicꢀLTC3541ꢀapplicationꢀcircuitꢀisꢀshownꢀonꢀtheꢀfirstꢀ
pageꢀofꢀthisꢀdataꢀsheet.ꢀExternalꢀcomponentꢀselectionꢀisꢀ
drivenꢀbyꢀtheꢀloadꢀrequirementꢀandꢀrequiresꢀtheꢀselectionꢀ
Table 2. Representative Surface Mount Inductors
PART
NUMBER
VALUE
(µH)
DCR
MAX DC
SIZE
3
(Ω MAX) CURRENT (A) W × L × H (mm )
Sumidaꢀ
CDRH3D23
1.0ꢀ
1.5ꢀ
2.2ꢀ
3.3
0.025ꢀ
0.029ꢀ
0.038ꢀ
0.048
2.0ꢀ
1.5ꢀ
1.3ꢀ
1.1
3.9ꢀ×ꢀ3.9ꢀ×ꢀ2.4
ofꢀL,ꢀfollowedꢀbyꢀC ,ꢀC ,ꢀandꢀfeedbackꢀresistorꢀvaluesꢀ
IN OUT
forꢀtheꢀbuckꢀandꢀtheꢀselectionꢀofꢀtheꢀoutputꢀcapacitorꢀandꢀ
feedbackꢀvaluesꢀforꢀtheꢀVLDOꢀandꢀlinearꢀregulator.ꢀ
Sumidaꢀ
2.2ꢀ
3.3
0.116ꢀ
0.174
0.950ꢀ
0.770
3.5ꢀ×ꢀ4.3ꢀ×ꢀ0.8
2.5ꢀ×ꢀ3.2ꢀ×ꢀ2.0
CMD4D06
BUCK REGULATOR
Inductor Selection
Coilcraftꢀ
ME3220
1.0ꢀ
1.5ꢀ
2.2ꢀ
3.3
0.058ꢀ
0.068ꢀ
0.104ꢀ
0.138
2.7ꢀ
2.2ꢀ
1.0ꢀ
1.3
Forꢀmostꢀapplications,ꢀtheꢀappropriateꢀinductorꢀvalueꢀwillꢀ
beꢀinꢀtheꢀrangeꢀofꢀ1.5µHꢀtoꢀ3.3µHꢀwithꢀ2.2µHꢀtheꢀmostꢀ
commonlyꢀ used.ꢀ Theꢀ exactꢀ inductorꢀ valueꢀ isꢀ chosenꢀ
largelyꢀ basedꢀ onꢀ theꢀ desiredꢀ rippleꢀ currentꢀ andꢀ burstꢀ
rippleꢀperformance.ꢀGenerally,ꢀlargeꢀvalueꢀinductorsꢀre-
duceꢀrippleꢀcurrent,ꢀandꢀconversely,ꢀsmallꢀvalueꢀinductorsꢀ
Murataꢀ
LQH3C
1.0ꢀ
2.2
0.060ꢀ
0.097
1.00ꢀ
0.79
2.5ꢀ×ꢀ3.2ꢀ×ꢀ2.0
3.2ꢀ×ꢀ3.2ꢀ×ꢀ1.2ꢀ
Sumidaꢀ
CDRH2D11/HP
1.5ꢀ
2.2
0.06ꢀ
0.10
1.00ꢀ
0.72
C and C
IN
Selection
OUT
produceꢀhigherꢀrippleꢀcurrent.ꢀHigherꢀV ꢀorꢀV ꢀmayꢀ
IN
OUT
Inꢀcontinuousꢀmode,ꢀtheꢀsourceꢀcurrentꢀofꢀtheꢀtopꢀMOSFETꢀ
isꢀaꢀsquareꢀwaveꢀofꢀdutyꢀcycleꢀV /V .ꢀToꢀpreventꢀlargeꢀ
voltageꢀtransients,ꢀaꢀlowꢀESRꢀinputꢀcapacitorꢀsizedꢀforꢀtheꢀ
maximumꢀRMSꢀcurrentꢀmustꢀbeꢀused.ꢀTheꢀmaximumꢀRMSꢀ
capacitorꢀcurrentꢀisꢀgivenꢀby:
alsoꢀincreaseꢀtheꢀrippleꢀcurrentꢀasꢀshownꢀinꢀEquationꢀ1.ꢀ
OUT IN
Aꢀreasonableꢀstartingꢀpointꢀforꢀsettingꢀrippleꢀcurrentꢀisꢀ
ΔI ꢀ=ꢀ200mAꢀ(40%ꢀofꢀ500mA).
L
VOUT
VIN
1
ΔIL =
VOUT 1−
(1)
f L
1/2
VOUT V − V
(
)
ꢀ
ꢀ
IN
OUT
cIN required IRMS ≅IOMAX
VIN
TheꢀDCꢀcurrentꢀratingꢀofꢀtheꢀinductorꢀshouldꢀbeꢀatꢀleastꢀ
equalꢀtoꢀtheꢀmaximumꢀloadꢀcurrentꢀplusꢀhalfꢀtheꢀrippleꢀ
currentꢀtoꢀpreventꢀcoreꢀsaturation.ꢀThus,ꢀaꢀ600mAꢀratedꢀ
inductorꢀshouldꢀbeꢀenoughꢀforꢀmostꢀapplicationsꢀ(500mAꢀ
+ꢀ100mA).ꢀForꢀbetterꢀefficiency,ꢀchooseꢀaꢀlowꢀDCꢀresis-
tanceꢀinductor.
ꢀ
Thisꢀ formulaꢀ hasꢀ aꢀ maximumꢀ atꢀ V ꢀ =ꢀ 2V ,ꢀ whereꢀ
IN
OUT
I ꢀ=ꢀI /2.ꢀThisꢀsimpleꢀworst-caseꢀconditionꢀisꢀcommon-
RMS OUT
lyꢀusedꢀforꢀdesign.ꢀNoteꢀthatꢀtheꢀcapacitorꢀmanufacturer’sꢀ
rippleꢀcurrentꢀratingsꢀareꢀoftenꢀbasedꢀonꢀ2000ꢀhoursꢀofꢀ
life.ꢀThisꢀmakesꢀitꢀadvisableꢀtoꢀfurtherꢀderateꢀtheꢀcapaci-
torꢀorꢀchooseꢀaꢀcapacitorꢀratedꢀatꢀaꢀhigherꢀtemperatureꢀ
thanꢀrequired.ꢀAlwaysꢀconsultꢀtheꢀmanufacturerꢀwithꢀanyꢀ
questionꢀregardingꢀproperꢀcapacitorꢀchoice.
Inductor Core Selection
Differentꢀ coreꢀ materialsꢀ andꢀ shapesꢀ willꢀ changeꢀ theꢀ
size/currentꢀandꢀprice/currentꢀrelationshipꢀofꢀanꢀinduc-
tor.ꢀToroidꢀorꢀshieldedꢀpotꢀcoresꢀinꢀferriteꢀorꢀpermalloyꢀ
materialsꢀareꢀsmallꢀandꢀdon’tꢀradiateꢀmuchꢀenergy,ꢀbutꢀ
generallyꢀcostꢀmoreꢀthanꢀpowderedꢀironꢀcoreꢀinductorsꢀ
withꢀsimilarꢀelectricalꢀcharacteristics.ꢀTheꢀchoiceꢀofꢀwhichꢀ
styleꢀinductorꢀtoꢀuseꢀoftenꢀdependsꢀmoreꢀonꢀtheꢀpriceꢀvsꢀ
sizeꢀrequirementꢀandꢀanyꢀradiatedꢀfield/EMIꢀrequirementsꢀ
TheꢀselectionꢀofꢀC ꢀforꢀtheꢀbuckꢀregulatorꢀisꢀdrivenꢀbyꢀ
OUT
theꢀdesiredꢀbuckꢀloopꢀtransientꢀresponse,ꢀrequiredꢀeffectiveꢀ
seriesꢀresistanceꢀ(ESR)ꢀandꢀburstꢀrippleꢀperformance.
TheꢀLTC3541ꢀminimizesꢀtheꢀrequiredꢀnumberꢀofꢀexternalꢀ
componentsꢀ byꢀ providingꢀ internalꢀ loopꢀ compensationꢀ
forꢀtheꢀbuckꢀregulatorꢀloop.ꢀLoopꢀstability,ꢀtransientꢀre
-
ratherꢀthanꢀwhatꢀtheꢀLTC3541ꢀrequiresꢀtoꢀoperate.ꢀTableꢀ2ꢀ sponseꢀandꢀburstꢀperformanceꢀcanꢀbeꢀtailoredꢀbyꢀchoiceꢀ
showsꢀsomeꢀtypicalꢀsurfaceꢀmountꢀinductorsꢀthatꢀworkꢀ ofꢀoutputꢀcapacitance.ꢀForꢀmanyꢀapplications,ꢀdesirableꢀ
wellꢀinꢀLTC3541ꢀapplications.
stability,ꢀtransientꢀresponseꢀandꢀrippleꢀperformanceꢀcanꢀ
3541fa
ꢀꢀ
LTC3541
U U
W U
APPLICATIO S I FOR ATIO
beꢀobtainedꢀbyꢀchoosingꢀanꢀoutputꢀcapacitorꢀvalueꢀofꢀ10µFꢀ
Whenꢀchoosingꢀtheꢀinputꢀandꢀoutputꢀceramicꢀcapacitors,ꢀ
chooseꢀtheꢀX5RꢀorꢀX7Rꢀdielectricꢀformulations.ꢀTheseꢀ
dielectricsꢀhaveꢀtheꢀbestꢀtemperatureꢀandꢀvoltageꢀcharac-
teristicsꢀofꢀallꢀtheꢀceramicsꢀforꢀaꢀgivenꢀvalueꢀandꢀsize.
toꢀ22µF.ꢀTypically,ꢀonceꢀtheꢀESRꢀrequirementꢀforꢀC ꢀhasꢀ
OUT
beenꢀmet,ꢀtheꢀRMSꢀcurrentꢀratingꢀgenerallyꢀfarꢀexceedsꢀ
theꢀI
ꢀrequirement.ꢀTheꢀoutputꢀrippleꢀΔV ꢀisꢀ
RIPPLE(P-P)
determinedꢀby:
OUT
Output Voltage Programming
1
ΔVOUT ≅ ΔIL ESR+
TheꢀoutputꢀvoltageꢀisꢀsetꢀbyꢀtyingꢀBUCKFBꢀtoꢀaꢀresistiveꢀ
dividerꢀaccordingꢀtoꢀtheꢀfollowingꢀformula:
8fc
OUT
ꢀ
whereꢀfꢀ=ꢀoperatingꢀfrequency,ꢀC ꢀ=ꢀoutputꢀcapacitanceꢀ
OUT
R2
R1
andꢀΔI ꢀ=ꢀrippleꢀcurrentꢀinꢀtheꢀinductor.ꢀForꢀaꢀfixedꢀoutputꢀ
L
VOUT = 0.8V 1+
voltage,ꢀtheꢀoutputꢀrippleꢀisꢀhighestꢀatꢀmaximumꢀinputꢀ
ꢀ
voltageꢀsinceꢀΔI ꢀincreasesꢀwithꢀinputꢀvoltage.
L
SinceꢀtheꢀimpedanceꢀatꢀtheꢀBUCKFBꢀpinꢀisꢀdependantꢀuponꢀ
theꢀresistorꢀdividerꢀnetworkꢀused,ꢀandꢀphaseꢀshiftꢀdueꢀtoꢀ
thisꢀimpedanceꢀdirectlyꢀimpactsꢀtheꢀtransientꢀresponseꢀofꢀ
theꢀbuck,ꢀR1ꢀshouldꢀbeꢀchosenꢀ<125k.ꢀInꢀaddition,ꢀstrayꢀ
capacitanceꢀatꢀthisꢀpinꢀshouldꢀbeꢀminimizedꢀ(<5pF)ꢀtoꢀpre-
ventꢀexcessiveꢀphaseꢀshift.ꢀFinally,ꢀspecialꢀattentionꢀshouldꢀ
beꢀgivenꢀtoꢀanyꢀstrayꢀcapacitancesꢀthatꢀcanꢀcoupleꢀexternalꢀ
signalsꢀontoꢀtheꢀBUCKFBꢀpinꢀproducingꢀundesirableꢀoutputꢀ
ripple.ꢀForꢀoptimumꢀperformanceꢀconnectꢀtheꢀBUCKFBꢀ
pinꢀtoꢀR1ꢀandꢀR2ꢀwithꢀaꢀshortꢀPCBꢀtraceꢀandꢀminimizeꢀallꢀ
otherꢀstrayꢀcapacitanceꢀtoꢀtheꢀBUCKFBꢀpin.
Aluminumꢀelectrolyticꢀandꢀdryꢀtantalumꢀcapacitorsꢀareꢀbothꢀ
availableꢀinꢀsurfaceꢀmountꢀconfigurations.ꢀInꢀtheꢀcaseꢀofꢀ
tantalum,ꢀitꢀisꢀcriticalꢀthatꢀtheꢀcapacitorsꢀareꢀsurgeꢀtestedꢀ
forꢀuseꢀinꢀswitchingꢀpowerꢀsupplies.ꢀAnꢀexcellentꢀchoiceꢀisꢀ
theꢀAVXꢀTPSꢀseriesꢀofꢀsurfaceꢀmountꢀtantalum.ꢀTheseꢀareꢀ
speciallyꢀconstructedꢀandꢀtestedꢀforꢀlowꢀESRꢀsoꢀtheyꢀgiveꢀ
theꢀlowestꢀESRꢀforꢀaꢀgivenꢀvolume.ꢀOtherꢀcapacitorꢀtypesꢀ
includeꢀSanyoꢀPOSCAP,ꢀKemetꢀT510ꢀandꢀT495ꢀseries,ꢀandꢀ
Spragueꢀ593Dꢀandꢀ595Dꢀseries.ꢀConsultꢀtheꢀmanufacturerꢀ
forꢀotherꢀspecificꢀrecommendations.
Using Ceramic Input and Output Capacitors
Theꢀexternalꢀresistiveꢀdividerꢀisꢀconnectedꢀtoꢀtheꢀoutput,ꢀ
allowingꢀremoteꢀvoltageꢀsensingꢀasꢀshownꢀinꢀFigureꢀ6.
Highꢀvalue,ꢀlowꢀcostꢀceramicꢀcapacitorsꢀareꢀnowꢀbecomingꢀ
availableꢀinꢀsmallerꢀcaseꢀsizes.ꢀTheirꢀhighꢀrippleꢀcurrent,ꢀ
highꢀvoltageꢀrating,ꢀandꢀlowꢀESRꢀmakeꢀthemꢀidealꢀforꢀ
switchingꢀ regulatorꢀ applications.ꢀ Sinceꢀ theꢀ LTC3541’sꢀ
controlꢀloopꢀdoesꢀnotꢀdependꢀonꢀtheꢀoutputꢀcapacitor’sꢀ
ESRꢀforꢀstableꢀoperation,ꢀceramicꢀcapacitorsꢀcanꢀbeꢀusedꢀ
freelyꢀtoꢀachieveꢀveryꢀlowꢀoutputꢀrippleꢀandꢀsmallꢀcircuitꢀ
size.
Checking Transient Response
Theꢀregulatorꢀloopꢀresponseꢀcanꢀbeꢀcheckedꢀbyꢀlookingꢀ
atꢀtheꢀloadꢀtransientꢀresponse.ꢀSwitchingꢀregulatorsꢀtakeꢀ
severalꢀcyclesꢀtoꢀrespondꢀtoꢀaꢀstepꢀinꢀloadꢀcurrent.ꢀWhenꢀ
aꢀloadꢀstepꢀoccurs,ꢀV ꢀimmediatelyꢀshiftsꢀbyꢀanꢀamountꢀ
OUT
equalꢀtoꢀ(ΔI
ꢀ•ꢀESR),ꢀwhereꢀESRꢀisꢀtheꢀeffectiveꢀseriesꢀ
LOAD
However,ꢀcareꢀmustꢀbeꢀtakenꢀwhenꢀceramicꢀcapacitorsꢀ
areꢀusedꢀatꢀtheꢀinputꢀandꢀtheꢀoutput.ꢀWhenꢀaꢀceramicꢀ
capacitorꢀisꢀusedꢀatꢀtheꢀinputꢀandꢀtheꢀpowerꢀisꢀsuppliedꢀ
byꢀaꢀwallꢀadapterꢀthroughꢀlongꢀwires,ꢀaꢀloadꢀstepꢀatꢀtheꢀ
0.8V ≤ V
≤ 5V
OUT
R2
BUcKFB
LTc3541
R1
outputꢀcanꢀinduceꢀringingꢀatꢀtheꢀinput,ꢀV .ꢀAtꢀbest,ꢀthisꢀ
IN
GND
ringingꢀcanꢀcoupleꢀtoꢀtheꢀoutputꢀandꢀbeꢀmistakenꢀasꢀloopꢀ
3541 F06
instability.ꢀAtꢀworst,ꢀaꢀsuddenꢀinrushꢀofꢀcurrentꢀthroughꢀ
theꢀlongꢀwiresꢀcanꢀpotentiallyꢀcauseꢀaꢀvoltageꢀspikeꢀatꢀV ,ꢀ
Figure 6. Setting the LTC3541 Output Voltage
IN
largeꢀenoughꢀtoꢀdamageꢀtheꢀpart.
3541fa
ꢀꢁ
LTC3541
U U
W U
APPLICATIO S I FOR ATIO
resistanceꢀofꢀC .ꢀΔI
ꢀalsoꢀbeginsꢀtoꢀchargeꢀorꢀdis-
OUT
LOAD
R2
R1
LV
V
= 0.4V 1 +
OUT
OUT
(
)
chargeꢀC ,ꢀwhichꢀgeneratesꢀaꢀfeedbackꢀerrorꢀsignal.ꢀTheꢀ
OUT
R2
R1
LTc3541
LFB
regulatorꢀloopꢀthenꢀactsꢀtoꢀreturnꢀV ꢀtoꢀitsꢀsteady-stateꢀ
value.ꢀDuringꢀthisꢀrecoveryꢀtimeꢀV ꢀcanꢀbeꢀmonitoredꢀ
OUT
OUT
c
OUT
forꢀovershootꢀorꢀringingꢀthatꢀwouldꢀindicateꢀaꢀstabilityꢀ
problem.ꢀForꢀaꢀdetailedꢀexplanationꢀofꢀswitchingꢀcontrolꢀ
loopꢀtheoryꢀseeꢀApplicationꢀNoteꢀ76.
GND
3541 F07
Figure 7. Programming the LTC3541
Aꢀsecond,ꢀmoreꢀsevereꢀtransientꢀisꢀcausedꢀbyꢀswitchingꢀ
inꢀloadsꢀwithꢀlargeꢀ(>1µF)ꢀsupplyꢀbypassꢀcapacitors.ꢀTheꢀ
dischargedꢀbypassꢀcapacitorsꢀareꢀeffectivelyꢀputꢀinꢀparal-
forꢀtheꢀlinearꢀregulator.ꢀToꢀcalculateꢀtheꢀchangeꢀreferredꢀ
toꢀtheꢀoutputꢀsimplyꢀmultiplyꢀbyꢀtheꢀgainꢀofꢀtheꢀfeedbackꢀ
networkꢀ(i.e.,ꢀ1ꢀ+ꢀR2/R1).ꢀForꢀexample,ꢀtoꢀprogramꢀtheꢀ
outputꢀforꢀ1.2VꢀchooseꢀR2/R1ꢀ=ꢀ2.ꢀInꢀthisꢀexample,ꢀanꢀ
outputꢀcurrentꢀchangeꢀofꢀ1mAꢀtoꢀ300mAꢀproducesꢀ1.05mVꢀ
•ꢀ(1ꢀ+ꢀ2)ꢀ=ꢀ3.15mVꢀdropꢀatꢀtheꢀoutput.
lelꢀwithꢀC ,ꢀcausingꢀaꢀrapidꢀdropꢀinꢀV .ꢀNoꢀregulatorꢀ
OUT
OUT
canꢀdeliverꢀenoughꢀcurrentꢀtoꢀpreventꢀthisꢀproblemꢀifꢀtheꢀ
loadꢀswitchꢀresistanceꢀisꢀlowꢀandꢀitꢀisꢀdrivenꢀquickly.ꢀTheꢀ
onlyꢀsolutionꢀisꢀtoꢀlimitꢀtheꢀriseꢀtimeꢀofꢀtheꢀswitchꢀdriveꢀ
soꢀ thatꢀ theꢀ loadꢀ riseꢀ timeꢀ isꢀ limitedꢀ toꢀ approximatelyꢀ
SinceꢀtheꢀLFBꢀpinꢀisꢀrelativelyꢀhighꢀimpedanceꢀ(dependingꢀ
onꢀtheꢀresistorꢀdividerꢀused),ꢀstrayꢀcapacitanceꢀatꢀthisꢀpinꢀ
shouldꢀbeꢀminimizedꢀ(<10pF)ꢀtoꢀpreventꢀphaseꢀshiftꢀinꢀtheꢀ
errorꢀamplifierꢀloop.ꢀAdditionally,ꢀspecialꢀattentionꢀshouldꢀ
beꢀgivenꢀtoꢀanyꢀstrayꢀcapacitancesꢀthatꢀcanꢀcoupleꢀexternalꢀ
signalsꢀontoꢀtheꢀLFBꢀpinꢀproducingꢀundesirableꢀoutputꢀ
ripple.ꢀForꢀoptimumꢀperformanceꢀconnectꢀtheꢀLFBꢀpinꢀtoꢀ
R1ꢀandꢀR2ꢀwithꢀaꢀshortꢀPCBꢀtraceꢀandꢀminimizeꢀallꢀotherꢀ
strayꢀcapacitanceꢀtoꢀtheꢀLFBꢀpin.
(25ꢀ•ꢀC
).ꢀThus,ꢀaꢀ10µFꢀcapacitorꢀchargingꢀtoꢀ3.3Vꢀ
LOAD
wouldꢀrequireꢀaꢀ250µsꢀriseꢀtime,ꢀlimitingꢀtheꢀchargingꢀ
currentꢀtoꢀaboutꢀ130mA.
VLDO/LINEAR REGULATOR
Adjustable Output Voltage
TheꢀLTC3541ꢀLV ꢀoutputꢀvoltageꢀisꢀsetꢀbyꢀtheꢀratioꢀofꢀtwoꢀ
OUT
externalꢀresistorsꢀasꢀshownꢀinꢀFigureꢀ7.ꢀTheꢀdeviceꢀservosꢀ
Output Capacitance and Transient Response
LV ꢀtoꢀmaintainꢀtheꢀLFBꢀpinꢀvoltageꢀatꢀ0.4Vꢀ(referencedꢀ
OUT
toꢀground).ꢀThus,ꢀtheꢀcurrentꢀinꢀR1ꢀisꢀequalꢀtoꢀ0.4V/R1.ꢀ
Forꢀgoodꢀtransientꢀresponse,ꢀstability,ꢀandꢀaccuracy,ꢀtheꢀ
currentꢀinꢀR1ꢀshouldꢀbeꢀatꢀleastꢀ2µA,ꢀthusꢀtheꢀvalueꢀofꢀ
R1ꢀshouldꢀbeꢀnoꢀgreaterꢀthanꢀ200k.ꢀTheꢀcurrentꢀinꢀR2ꢀisꢀ
theꢀcurrentꢀinꢀR1ꢀplusꢀtheꢀLFBꢀpinꢀbiasꢀcurrent.ꢀSinceꢀtheꢀ
LFBꢀpinꢀbiasꢀcurrentꢀisꢀtypicallyꢀ<10nA,ꢀitꢀcanꢀbeꢀignoredꢀ
inꢀtheꢀoutputꢀvoltageꢀcalculation.ꢀTheꢀoutputꢀvoltageꢀcanꢀ
beꢀcalculatedꢀusingꢀtheꢀformulaꢀinꢀFigureꢀ8.ꢀNoteꢀthatꢀinꢀ
shutdownꢀtheꢀoutputꢀisꢀturnedꢀoffꢀandꢀtheꢀdividerꢀcurrentꢀ
TheꢀLTC3541ꢀisꢀdesignedꢀtoꢀbeꢀstableꢀwithꢀaꢀwideꢀrangeꢀofꢀ
ceramicꢀoutputꢀcapacitors.ꢀTheꢀESRꢀofꢀtheꢀoutputꢀcapaci-
torꢀaffectsꢀstability,ꢀmostꢀnotablyꢀwithꢀsmallꢀcapacitors.ꢀ
Aꢀminimumꢀoutputꢀcapacitorꢀofꢀ2.2µFꢀwithꢀanꢀESRꢀofꢀ
0.05Ωꢀorꢀlessꢀisꢀrecommendedꢀtoꢀensureꢀstability.ꢀTheꢀ
LTC3541ꢀVLDOꢀisꢀaꢀmicropowerꢀdeviceꢀandꢀoutputꢀtran-
sientꢀresponseꢀwillꢀbeꢀaꢀfunctionꢀofꢀoutputꢀcapacitance.ꢀ
Largerꢀvaluesꢀofꢀoutputꢀcapacitanceꢀdecreaseꢀtheꢀpeakꢀ
deviationsꢀandꢀprovideꢀimprovedꢀtransientꢀresponseꢀforꢀ
largerꢀloadꢀcurrentꢀchanges.ꢀNoteꢀthatꢀbypassꢀcapacitorsꢀ
usedꢀtoꢀdecoupleꢀindividualꢀcomponentsꢀpoweredꢀbyꢀtheꢀ
LTC3541ꢀwillꢀincreaseꢀtheꢀeffectiveꢀoutputꢀcapacitorꢀvalue.ꢀ
HighꢀESRꢀtantalumꢀandꢀelectrolyticꢀcapacitorsꢀmayꢀbeꢀused,ꢀ
butꢀaꢀlowꢀESRꢀceramicꢀcapacitorꢀmustꢀbeꢀinꢀparallelꢀatꢀtheꢀ
output.ꢀThereꢀisꢀnoꢀminimumꢀESRꢀorꢀmaximumꢀcapacitorꢀ
sizeꢀrequirement.
willꢀbeꢀzeroꢀonceꢀC ꢀisꢀdischarged.
OUT
TheꢀLTC3541ꢀVLDOꢀandꢀlinearꢀregulatorꢀloopsꢀoperateꢀ
atꢀaꢀrelativelyꢀhighꢀgainꢀofꢀ–3.5µV/mAꢀandꢀ–3.4µV/mAꢀ
respectively,ꢀreferredꢀtoꢀtheꢀLFBꢀinput.ꢀThus,ꢀaꢀloadꢀcur-
rentꢀchangeꢀofꢀ1mAꢀtoꢀ300mAꢀproducesꢀaꢀ1.05mVꢀdropꢀ
atꢀtheꢀLFBꢀinputꢀforꢀtheꢀVLDOꢀandꢀaꢀloadꢀcurrentꢀchangeꢀ
ofꢀ1mAꢀtoꢀ30mAꢀproducesꢀaꢀ0.1mVꢀdropꢀatꢀtheꢀLFBꢀinputꢀ
3541fa
ꢀꢂ
LTC3541
U U
W U
APPLICATIO S I FOR ATIO
Extraꢀconsiderationꢀmustꢀbeꢀgivenꢀtoꢀtheꢀuseꢀofꢀceramicꢀ
capacitors.ꢀCeramicꢀcapacitorsꢀareꢀmanufacturedꢀwithꢀaꢀ
varietyꢀofꢀdielectrics,ꢀeachꢀwithꢀdifferentꢀbehaviorꢀacrossꢀ
temperatureꢀ andꢀ appliedꢀ voltage.ꢀ Theꢀ mostꢀ commonꢀ
dielectricsꢀusedꢀareꢀZ5U,ꢀY5V,ꢀX5RꢀandꢀX7R.ꢀTheꢀZ5Uꢀ
andꢀY5Vꢀdielectricsꢀareꢀgoodꢀforꢀprovidingꢀhighꢀcapaci-
tancesꢀinꢀaꢀsmallꢀpackage,ꢀbutꢀexhibitꢀlargeꢀvoltageꢀandꢀ
temperatureꢀcoefficientsꢀasꢀshownꢀinꢀFiguresꢀ8ꢀandꢀ9.ꢀ
Whenꢀusedꢀwithꢀaꢀ2Vꢀregulator,ꢀaꢀ1µFꢀY5Vꢀcapacitorꢀcanꢀ
loseꢀasꢀmuchꢀasꢀ75%ꢀofꢀitsꢀinitialꢀcapacitanceꢀoverꢀtheꢀ
operatingꢀtemperatureꢀrange.ꢀTheꢀX5RꢀandꢀX7Rꢀdielectricsꢀ
resultꢀinꢀmoreꢀstableꢀcharacteristicsꢀandꢀareꢀusuallyꢀmoreꢀ
suitableꢀforꢀuseꢀasꢀtheꢀoutputꢀcapacitor.ꢀTheꢀX7Rꢀtypeꢀhasꢀ
betterꢀstabilityꢀacrossꢀtemperature,ꢀwhileꢀtheꢀX5Rꢀisꢀlessꢀ
expensiveꢀandꢀisꢀavailableꢀinꢀhigherꢀvalues.ꢀInꢀallꢀcases,ꢀ
theꢀoutputꢀcapacitanceꢀshouldꢀneverꢀdropꢀbelowꢀ1µFꢀorꢀ
instabilityꢀorꢀdegradedꢀperformanceꢀmayꢀoccur.
EFFICIENCY CONSIDERATIONS
Generally,ꢀtheꢀefficiencyꢀofꢀaꢀregulatorꢀisꢀequalꢀtoꢀtheꢀout-
putꢀpowerꢀdividedꢀbyꢀtheꢀinputꢀpowerꢀtimesꢀ100%.ꢀItꢀisꢀ
oftenꢀusefulꢀtoꢀanalyzeꢀindividualꢀlossꢀtermsꢀtoꢀdetermineꢀ
whichꢀtermsꢀareꢀlimitingꢀefficiencyꢀandꢀwhatꢀifꢀanyꢀchangeꢀ
wouldꢀyieldꢀtheꢀgreatestꢀimprovement.ꢀEfficiencyꢀcanꢀbeꢀ
expressedꢀas:
ꢀ Efficiencyꢀ=ꢀ100%ꢀ–ꢀ(L1ꢀ+ꢀL2ꢀ+ꢀL3ꢀ+ꢀ...)
whereꢀL1,ꢀL2,ꢀetc.ꢀareꢀtheꢀindividualꢀlossꢀtermsꢀasꢀaꢀper-
centageꢀofꢀinputꢀpower.
20
BOTH cAPAcITORS ARE 1µF,
10V, 0603 cASE SIZE
0
Althoughꢀallꢀdissipativeꢀelementsꢀinꢀtheꢀcircuitꢀproduceꢀ
losses,ꢀthreeꢀmainꢀsourcesꢀtypicallyꢀaccountꢀforꢀtheꢀmajorityꢀ
X5R
–20
–40
ofꢀtheꢀlossesꢀinꢀtheꢀLTC3541ꢀcircuits:ꢀV ꢀquiescentꢀcurrent,ꢀ
IN
2
I RꢀlossesꢀandꢀlossꢀacrossꢀVLDOꢀoutputꢀdevice.ꢀWhenꢀ
Y5V
operatingꢀwithꢀbothꢀtheꢀbuckꢀandꢀVLDOꢀactiveꢀ(ENBUCKꢀ
andꢀENVLDOꢀequalꢀtoꢀlogicꢀhigh),ꢀV ꢀquiescentꢀcurrentꢀ
–60
–80
IN
lossꢀandꢀlossꢀacrossꢀtheꢀVLDOꢀoutputꢀdeviceꢀdominateꢀ
2
theꢀefficiencyꢀlossꢀatꢀlowꢀloadꢀcurrents,ꢀwhereasꢀtheꢀI Rꢀ
lossꢀandꢀlossꢀacrossꢀtheꢀVLDOꢀoutputꢀdeviceꢀdominateꢀ
theꢀefficiencyꢀlossꢀatꢀmediumꢀtoꢀhighꢀloadꢀcurrents.ꢀAtꢀ
lowꢀloadꢀcurrentsꢀwithꢀtheꢀpartꢀoperatingꢀwithꢀtheꢀlinearꢀ
regulatorꢀ(ENBUCKꢀequalꢀtoꢀlogicꢀlow,ꢀENVLDOꢀequalꢀtoꢀ
logicꢀhigh),ꢀefficiencyꢀisꢀtypicallyꢀdominatedꢀbyꢀtheꢀlossꢀ
–100
0
8
2
4
6
10
Dc BIAS VOLTAGE (V)
3541 F08
Figure 8. Change in Capacitor vs Bias Voltage
20
acrossꢀtheꢀlinearꢀregulatorꢀoutputꢀdeviceꢀandꢀV ꢀquiescentꢀ
IN
current.ꢀInꢀaꢀtypicalꢀefficiencyꢀplot,ꢀtheꢀefficiencyꢀcurveꢀatꢀ
veryꢀlowꢀloadꢀcurrentsꢀcanꢀbeꢀmisleadingꢀsinceꢀtheꢀactualꢀ
powerꢀlostꢀisꢀofꢀlittleꢀconsequence.
0
X5R
–20
Y5V
1.ꢀTheꢀV ꢀquiescentꢀcurrentꢀlossꢀinꢀtheꢀbuckꢀisꢀdueꢀtoꢀtwoꢀ
IN
–40
–60
components:ꢀtheꢀDCꢀbiasꢀcurrentꢀasꢀgivenꢀinꢀtheꢀElectricalꢀ
Characteristicsꢀandꢀtheꢀinternalꢀmainꢀswitchꢀandꢀsynchro-
nousꢀswitchꢀgateꢀchargeꢀcurrents.ꢀTheꢀgateꢀchargeꢀcurrentꢀ
resultsꢀfromꢀswitchingꢀtheꢀgateꢀcapacitanceꢀofꢀtheꢀinternalꢀ
powerꢀswitches.ꢀEachꢀtimeꢀtheꢀgateꢀisꢀswitchedꢀfromꢀhighꢀ
toꢀlowꢀtoꢀhighꢀagain,ꢀaꢀpacketꢀofꢀcharge,ꢀdQ,ꢀmovesꢀfromꢀ
–80
BOTH cAPAcITORS ARE 1µF,
10V, 0603 cASE SIZE
–100
–50
0
25
50
75
–25
TEMPERATURE (°c)
3541 F09
V ꢀtoꢀground.ꢀTheꢀresultingꢀdQ/dtꢀisꢀtheꢀcurrentꢀoutꢀofꢀ
IN
Figure 9. Change in Capacitor vs Temperature
V ꢀthatꢀisꢀtypicallyꢀlargerꢀthanꢀtheꢀDCꢀbiasꢀcurrentꢀandꢀ
IN
3541fa
ꢀꢃ
LTC3541
U U
W U
APPLICATIO S I FOR ATIO
Forꢀsurfaceꢀmountꢀdevices,ꢀheatꢀsinkingꢀisꢀaccomplishedꢀ
byꢀusingꢀtheꢀheat-spreadingꢀcapabilitiesꢀofꢀtheꢀPCꢀboardꢀ
andꢀitsꢀcopperꢀtraces.ꢀCopperꢀboardꢀstiffenersꢀandꢀplatedꢀ
throughꢀholesꢀcanꢀalsoꢀbeꢀusedꢀtoꢀspreadꢀtheꢀheatꢀgener-
atedꢀbyꢀpowerꢀdevices.
proportionalꢀtoꢀfrequency.ꢀBothꢀtheꢀDCꢀbiasꢀandꢀgateꢀchargeꢀ
lossesꢀareꢀproportionalꢀtoꢀV ꢀandꢀthusꢀtheirꢀeffectsꢀwillꢀ
IN
beꢀmoreꢀpronouncedꢀatꢀhigherꢀsupplyꢀvoltages.
2
2.ꢀI Rꢀlossesꢀareꢀcalculatedꢀfromꢀtheꢀresistancesꢀofꢀtheꢀ
internalꢀswitches,ꢀR ,ꢀandꢀexternalꢀinductorꢀR .ꢀInꢀcon-
SW
L
ToꢀavoidꢀtheꢀLTC3541ꢀexceedingꢀtheꢀmaximumꢀjunctionꢀ
temperature,ꢀsomeꢀthermalꢀanalysisꢀisꢀrequired.ꢀTheꢀgoalꢀ
ofꢀtheꢀthermalꢀanalysisꢀisꢀtoꢀdetermineꢀwhetherꢀtheꢀpowerꢀ
dissipatedꢀexceedsꢀtheꢀmaximumꢀjunctionꢀtemperatureꢀofꢀ
theꢀpart.ꢀTheꢀtemperatureꢀriseꢀisꢀgivenꢀby:
tinuousꢀmode,ꢀtheꢀaverageꢀoutputꢀcurrentꢀflowingꢀthroughꢀ
inductorꢀLꢀisꢀ“chopped”ꢀbetweenꢀtheꢀmainꢀswitchꢀandꢀtheꢀ
synchronousꢀswitch.ꢀThus,ꢀtheꢀseriesꢀresistanceꢀlookingꢀ
intoꢀtheꢀSWꢀpinꢀisꢀaꢀfunctionꢀofꢀbothꢀtopꢀandꢀbottomꢀ
MOSFETꢀR
ꢀandꢀtheꢀdutyꢀcycleꢀ(DC)ꢀasꢀfollows:
DS(ON)
ꢀ T ꢀ=ꢀP •ꢀθ
ꢀ R ꢀ=ꢀ(R
)(DC)ꢀ+ꢀ(R )(1ꢀ–ꢀDC)
DS(ON)TOP DS(ON)BOT
R
Dꢀ JA
SW
whereꢀP ꢀisꢀtheꢀpowerꢀdissipatedꢀbyꢀtheꢀregulatorꢀandꢀθ ꢀ
TheꢀR
ꢀforꢀbothꢀtheꢀtopꢀandꢀbottomꢀMOSFETsꢀcanꢀ
D
JA
DS(ON)
isꢀtheꢀthermalꢀresistanceꢀfromꢀtheꢀjunctionꢀofꢀtheꢀdieꢀtoꢀ
beꢀobtainedꢀfromꢀtheꢀTypicalꢀPerformanceꢀCharacteristicsꢀ
2
theꢀambientꢀtemperature.
curves.ꢀThus,ꢀtoꢀobtainꢀI Rꢀlosses,ꢀsimplyꢀaddꢀR ꢀtoꢀ
SW
R ꢀandꢀmultiplyꢀtheꢀresultꢀbyꢀtheꢀsquareꢀofꢀtheꢀaverageꢀ
L
Theꢀjunctionꢀtemperature,ꢀT ,ꢀisꢀgivenꢀby:
J
outputꢀcurrent.
ꢀ T ꢀ=ꢀT ꢀ+ꢀT
R
J
A
3.ꢀLossesꢀinꢀtheꢀVLDO/linearꢀregulatorꢀareꢀdueꢀtoꢀtheꢀDCꢀbiasꢀ
currentsꢀasꢀgivenꢀinꢀtheꢀElectricalꢀCharacteristicsꢀandꢀtoꢀtheꢀ
whereꢀT ꢀisꢀtheꢀambientꢀtemperature.
A
(V ꢀ–ꢀV )ꢀvoltageꢀdropꢀacrossꢀtheꢀinternalꢀoutputꢀdeviceꢀ
IN
OUT
Asꢀanꢀexample,ꢀconsiderꢀtheꢀLTC3541ꢀwithꢀanꢀinputꢀvoltageꢀ
transistor.
V ꢀofꢀ2.9V,ꢀanꢀLV ꢀvoltageꢀofꢀ1.8V,ꢀanꢀLV ꢀvoltageꢀofꢀ
IN
IN
OUT
1.5V,ꢀaꢀloadꢀcurrentꢀofꢀ200mAꢀforꢀtheꢀbuck,ꢀaꢀloadꢀcur-
rentꢀofꢀ300mAꢀforꢀtheꢀVLDOꢀandꢀanꢀambientꢀtemperatureꢀ
ofꢀ85°C.ꢀFromꢀtheꢀtypicalꢀperformanceꢀgraphꢀofꢀswitchꢀ
OtherꢀlossesꢀwhenꢀtheꢀbuckꢀandꢀVLDOꢀareꢀinꢀoperationꢀ
(ENBUCKꢀandꢀENVLDOꢀequalꢀlogicꢀhigh),ꢀincludingꢀC ꢀ
IN
andꢀC ꢀESRꢀdissipativeꢀlossesꢀandꢀinductorꢀcoreꢀlosses,ꢀ
OUT
resistance,ꢀtheꢀR
ꢀofꢀtheꢀP-channelꢀswitchꢀatꢀ85°Cꢀisꢀ
DS(ON)
generallyꢀaccountꢀforꢀlessꢀthanꢀ2%ꢀtotalꢀadditionalꢀloss.
approximatelyꢀ0.25Ω.TheꢀR
isꢀapproximatelyꢀ0.4Ω.ꢀTherefore,ꢀpowerꢀdissipatedꢀbyꢀtheꢀ
ofꢀtheꢀN-channelꢀswitchꢀ
DS(ON)ꢀ
THERMAL CONSIDERATIONS
partꢀisꢀapproximately:
TheꢀLTC3541ꢀrequiresꢀtheꢀpackageꢀbackplaneꢀmetalꢀ(GNDꢀ
pin)ꢀtoꢀbeꢀwellꢀsolderedꢀtoꢀtheꢀPCꢀboard.ꢀThisꢀgivesꢀtheꢀ
DFNꢀpackageꢀexceptionalꢀthermalꢀproperties.ꢀTheꢀpowerꢀ
handlingꢀcapabilityꢀofꢀtheꢀdeviceꢀwillꢀbeꢀlimitedꢀbyꢀtheꢀ
maximumꢀ ratedꢀ junctionꢀ temperatureꢀ ofꢀ 125°C.ꢀ Theꢀ
LTC3541ꢀhasꢀinternalꢀthermalꢀlimitingꢀdesignedꢀtoꢀprotectꢀ
theꢀdeviceꢀduringꢀmomentaryꢀoverloadꢀconditions.ꢀForꢀ
continuousꢀ normalꢀ conditions,ꢀ theꢀ maximumꢀ junctionꢀ
temperatureꢀratingꢀofꢀ125°Cꢀmustꢀnotꢀbeꢀexceeded.ꢀItꢀisꢀ
importantꢀtoꢀgiveꢀcarefulꢀconsiderationꢀtoꢀallꢀsourcesꢀofꢀ
thermalꢀresistanceꢀfromꢀjunctionꢀtoꢀambient.ꢀAdditionalꢀ
heatꢀsourcesꢀmountedꢀnearbyꢀmustꢀalsoꢀbeꢀconsidered.ꢀ
2
ꢀ P ꢀ=ꢀ(I
) ꢀ•ꢀR ꢀ+ꢀ(I
)•ꢀ
D
LOADBUCK
SW
LOADVLDO ꢀ
ꢀ ꢀ ꢀꢀꢀꢀꢀ(LV ꢀ–ꢀLV )ꢀ=ꢀ167mW
IN
OUT
Forꢀtheꢀ3mmꢀ×ꢀ3mmꢀDFNꢀpackage,ꢀtheꢀθ ꢀisꢀ43°C/W.
JA
Thus,ꢀtheꢀjunctionꢀtemperatureꢀofꢀtheꢀregulatorꢀis:
ꢀ T ꢀ=ꢀ85°Cꢀ+ꢀ(0.167)(43)ꢀ=ꢀ92°C
J
whichꢀisꢀwellꢀbelowꢀtheꢀmaximumꢀjunctionꢀtemperatureꢀ
ofꢀ125°C.
Noteꢀthatꢀatꢀhigherꢀsupplyꢀvoltages,ꢀtheꢀjunctionꢀtempera-
tureꢀisꢀlowerꢀdueꢀtoꢀreducedꢀswitchꢀresistanceꢀR
.
DS(ON)
3541fa
ꢀꢄ
LTC3541
U U
W U
APPLICATIO S I FOR ATIO
PC BOARD LAYOUT CHECKLIST
ingꢀupꢀtoꢀ0.3Aꢀofꢀcurrent.ꢀWithꢀthisꢀinformationꢀweꢀcanꢀ
calculateꢀLꢀusingꢀEquationꢀ2:
Whenꢀlayingꢀoutꢀtheꢀprintedꢀcircuitꢀboard,ꢀtheꢀfollowingꢀ
checklistꢀshouldꢀbeꢀusedꢀtoꢀensureꢀproperꢀoperationꢀofꢀ
theꢀLTC3541.ꢀCheckꢀtheꢀfollowingꢀinꢀyourꢀlayout:
VOUT
VIN
1
f ΔI
L =
VOUT 1−
(2)
L
ꢀ
ꢀ
1.ꢀTheꢀpowerꢀtraces,ꢀconsistingꢀofꢀtheꢀGNDꢀtrace,ꢀtheꢀSWꢀ
SubstitutingꢀV ꢀ=ꢀ1.8V,ꢀV ꢀ=ꢀ3.6Vꢀ(typ),ꢀΔI ꢀ=ꢀ0.2Aꢀandꢀ
traceꢀandꢀtheꢀV ꢀtraceꢀshouldꢀbeꢀkeptꢀshort,ꢀdirectꢀandꢀ
OUT
IN
L
IN
fꢀ=ꢀ2.25MHzꢀinꢀEquationꢀ3ꢀgives:
wide.
2.ꢀDoesꢀtheꢀLFBꢀpinꢀconnectꢀdirectlyꢀtoꢀtheꢀfeedbackꢀre-
sistors?ꢀTheꢀresistiveꢀdividerꢀR1/R2ꢀmustꢀbeꢀconnectedꢀ
1.8V
2.25MHz(200mA)
1.8V
3.6V
L =
1−
= 2µH
(3)
ꢀ
ꢀ
betweenꢀtheꢀ(+)ꢀplateꢀofꢀC ꢀandꢀground.
OUT
Aꢀ2.2µHꢀinductorꢀworksꢀwellꢀforꢀthisꢀapplication.ꢀForꢀbestꢀ
efficiencyꢀchooseꢀaꢀ600mAꢀorꢀgreaterꢀinductorꢀwithꢀlessꢀ
thanꢀ0.2Ωꢀseriesꢀresistance.
3.ꢀDoesꢀtheꢀ(+)ꢀplateꢀofꢀC ꢀconnectꢀtoꢀV ꢀasꢀcloselyꢀasꢀ
IN
IN
possible?ꢀThisꢀcapacitorꢀprovidesꢀtheꢀACꢀcurrentꢀtoꢀtheꢀ
internalꢀpowerꢀMOSFETs.
C ꢀwillꢀrequireꢀanꢀRMSꢀcurrentꢀratingꢀofꢀatꢀleastꢀ0.25Aꢀ=ꢀ
IN
4.ꢀKeepꢀtheꢀswitchingꢀnode,ꢀSW,ꢀawayꢀfromꢀtheꢀsensitiveꢀ
LFBꢀnode.
I
/2ꢀatꢀtemperatureꢀ.ꢀC ꢀforꢀtheꢀbuckꢀisꢀchosenꢀ
LOAD(MAX)
OUT
asꢀ22µFꢀwithꢀanꢀESRꢀofꢀlessꢀthanꢀ0.2Ω.ꢀInꢀmostꢀcases,ꢀaꢀ
ceramicꢀcapacitorꢀwillꢀsatisfyꢀthisꢀrequirement.
5.ꢀKeepꢀtheꢀ(–)ꢀplatesꢀofꢀC ꢀandꢀC ꢀasꢀcloseꢀasꢀpos-
IN
OUT
sible.
Forꢀtheꢀfeedbackꢀresistorsꢀofꢀtheꢀbuck,ꢀchooseꢀR1ꢀ=ꢀ80k.ꢀ
R2ꢀcanꢀthenꢀbeꢀcalculatedꢀfromꢀEquationꢀ4ꢀtoꢀbe:
DESIGN EXAMPLE
V
0.8
OUT
Asꢀaꢀdesignꢀexample,ꢀassumeꢀtheꢀLTC3541ꢀisꢀusedꢀinꢀ
aꢀsingleꢀlithium-ionꢀbatteryꢀpoweredꢀcellularꢀphoneꢀap-
R2=
−1 R1=100k
(4)
ꢀ
ꢀ
plication.ꢀTheꢀV ꢀwillꢀbeꢀoperatingꢀfromꢀaꢀmaximumꢀofꢀ
IN
ForꢀtheꢀfeedbackꢀresistorsꢀofꢀtheꢀVLDO,ꢀchooseꢀR1ꢀ=ꢀ200k.ꢀ
R2ꢀcanꢀthenꢀbeꢀcalculatedꢀfromꢀEquationꢀ5ꢀtoꢀbe:
4.2Vꢀdownꢀtoꢀaboutꢀ3V.ꢀTheꢀloadꢀcurrentꢀrequirementꢀisꢀ
aꢀmaximumꢀofꢀ0.5Aꢀforꢀtheꢀbuckꢀoutputꢀbutꢀmostꢀofꢀtheꢀ
timeꢀitꢀwillꢀbeꢀinꢀstandbyꢀmode,ꢀrequiringꢀonlyꢀ2mA.ꢀEf-
ficiencyꢀatꢀbothꢀlowꢀandꢀhighꢀloadꢀcurrentsꢀisꢀimportant.ꢀ
Theꢀoutputꢀvoltageꢀforꢀtheꢀbuckꢀisꢀ1.8V.ꢀTheꢀrequirementꢀ
forꢀtheꢀoutputꢀvoltageꢀofꢀtheꢀVLDOꢀisꢀ1.5Vꢀwhileꢀprovid-
V
OUT
R2=
−1 R1= 550k
0.4
ꢀ
C
ꢀforꢀtheꢀVLDOꢀisꢀchosenꢀasꢀ2.2µF.
OUT
3541fa
ꢀꢅ
LTC3541
U
TYPICAL APPLICATIO S
Dual Output with Minimal External Components Using Auto Start-Up Sequence,
Buck in Burst Mode Operation for High Efficiency Down to Low Load Currents
V
IN
3.2V TO 4.2V
V
OUT
2V/DIV
SW
ENVLDO
MODE
GND
LV
OUT
V
IN
2.2µH
10µF
2V/DIV
ENBUCK
165k
576k
LTC3541
154k
73k
22pF
V
IN
V
2V/DIV
OUT1
2.5V
BUCKFB
LFB
OUT
V
OUT2
1.8V
LV
IN
LV
PGND
200mA
300mA
2.2µF
3541 TA02b
4ms/DIV
I
I
= 200mA
LVOUT
VOUT
3541 TA02a
= 300mA
Dual Output with Minimal External Components Using Auto Start-Up
Sequence, Buck in Pulse Skip Mode for Low Noise Operation
V
IN
3.2V TO 4.2V
V
OUT
2V/DIV
SW
ENVLDO
MODE
GND
LV
OUT
V
IN
2.2µH
2V/DIV
ENBUCK
165k
576k
LTC3541
154k
73k
22pF
V
IN
V
2V/DIV
OUT1
2.5V
BUCKFB
LFB
OUT
V
OUT2
1.8V
LV
IN
LV
PGND
200mA
300mA
10µF
2.2µF
3541 TA03b
4ms/DIV
I
I
= 200mA
LVOUT
VOUT
3541 TA03a
= 300mA
3541fa
ꢀꢆ
LTC3541
U
TYPICAL APPLICATIO S
Dual Output Using Minimal External Components with VOUT2 Controlled by External Logic
Signal, Buck in Burst Mode Operation for High Efficiency Down to Low Load Currents
V
IN
3.2V TO 4.2V
V
OUT
2V/DIV
SW
ENVLDO
MODE
GND
V
LV
IN
2.2µH
10µF
OUT
2V/DIV
ENBUCK
165k
576k
LTC3541
154k
73k
22pF
V
IN
V
OUT1
2.5V
BUCKFB
LFB
OUT
2V/DIV
V
OUT2
1.8V
LV
IN
LV
PGND
200mA
300mA
2.2µF
3541 TA04b
4ms/DIV
I
I
= 200mA
LVOUT
3541 TA04a
VOUT
= 300mA
Dual Output Using Minimal External Components with VOUT1 Controlled by External Logic
Signal, Buck in Burst Mode Operation for High Efficiency Down to Low Load Currents
V
IN
2.9V TO 4.2V
V
OUT
2V/DIV
SW
ENVLDO
MODE
GND
V
LV
IN
2.2µH
OUT
2V/DIV
ENBUCK
150k
412k
LTC3541
143k
115k
22pF
V
IN
V
OUT1
1.8V
BUCKFB
LFB
OUT
2V/DIV
V
OUT2
1.5V
LV
IN
LV
PGND
200mA
300mA
10µF
2.2µF
3541 TA05b
4ms/DIV
I
I
= 200mA
LVOUT
VOUT
3541 TA05a
= 30mA
3541fa
ꢀꢇ
LTC3541
U
PACKAGE DESCRIPTIO
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Referenꢀe LTc DWG # 05-08-1699)
0.675 ±0.05
3.50 ±0.05
2.15 ±0.05 (2 SIDES)
1.65 ±0.05
PAcKAGE
OUTLINE
0.25 ± 0.05
0.50
BSc
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITcH AND DIMENSIONS
R = 0.115
TYP
6
0.38 ± 0.10
10
3.00 ±0.10
(4 SIDES)
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
(DD10) DFN 1103
5
1
0.25 ± 0.05
0.50 BSc
0.75 ±0.05
0.200 REF
2.38 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEc PAcKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
cHEcK THE LTc WEBSITE DATA SHEET FOR cURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO ScALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PAcKAGE DO NOT INcLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXcEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENcE FOR PIN 1 LOcATION ON THE
TOP AND BOTTOM OF PAcKAGE
3541fa
Information furnished by Linear Teꢀhnology corporation is believed to be aꢀꢀurate and reliable.
However, no responsibility is assumed for its use. Linear Teꢀhnology corporation makes no represen-
tation that the interꢀonneꢀtion of its ꢀirꢀuits as desꢀribed herein will not infringe on existing patent rights.
ꢀꢈ
LTC3541
RELATED PARTS
PART NUMBER
LT®3023ꢀ
DESCRIPTION
COMMENTS
V :ꢀ1.8Vꢀtoꢀ20V,ꢀV
Dual,ꢀ2x100mA,ꢀLowꢀNoiseꢀMicropowerꢀLDOꢀ
ꢀ=ꢀ1.22V,ꢀV ꢀ=ꢀ0.30V,ꢀI ꢀ=ꢀ40µA,ꢀI ꢀ<ꢀ1µA,ꢀꢀ
IN
OUT(MIN)
DO
Q
SD
V
ꢀ=ꢀADJ,ꢀDFN,ꢀMSꢀPackages,ꢀLowꢀNoiseꢀ<ꢀ20µV
,ꢀStableꢀwithꢀ
OUT
RMS(P-P)
1µFꢀCeramicꢀCapacitorsꢀ
LT3024ꢀ
Dual,ꢀ100mA/500mA,ꢀLowꢀNoiseꢀMicropowerꢀLDO
300mA,ꢀMicropowerꢀVLDOꢀLinearꢀRegulator
V :ꢀ1.8Vꢀtoꢀ20V,ꢀV
OUT
1µFꢀCeramicꢀCapacitorsꢀ
ꢀ=ꢀ1.22V,ꢀV ꢀ=ꢀ0.30V,ꢀI ꢀ=ꢀ60µA,ꢀI ꢀ<ꢀ1µA,ꢀꢀ
IN
OUT(MIN)
DO
Q
SD
V
ꢀ=ꢀADJ,ꢀDFN,ꢀTSSOPꢀPackages,ꢀLowꢀNoiseꢀ<ꢀ20µV
,ꢀStableꢀwithꢀ
RMS(P-P)
LTC3025ꢀ
V :ꢀ0.9Vꢀtoꢀ5.5V,ꢀV
ꢀ=ꢀ0.4V,ꢀ2.7Vꢀtoꢀ5.5VꢀBiasꢀVoltageꢀRequired,ꢀꢀ
IN
DO
OUT(MIN)
ꢀ=ꢀ45mV,ꢀI ꢀ=ꢀ50µA,ꢀI ꢀ<ꢀ1µA,ꢀV ꢀ=ꢀADJ,ꢀDFNꢀPackages,ꢀStableꢀwithꢀ
Q SD OUT
V
1µFꢀCeramicꢀCapacitors
LTC3407
LTC3407-2
LTC3445
DualꢀSynchronousꢀ600mAꢀSynchronousꢀStep-Downꢀ 1.5MHzꢀConstantꢀFrequencyꢀCurrentꢀModeꢀOperation,ꢀV ꢀfromꢀ2.5Vꢀtoꢀ
IN
DC/DCꢀRegulator
5.5V,ꢀV ꢀDownꢀtoꢀ0.6V,ꢀDFN,ꢀMSꢀPackages
OUT
DualꢀSynchronousꢀ800mAꢀSynchronousꢀStep-Downꢀ 2.25MHzꢀConstantꢀFrequencyꢀCurrentꢀModeꢀOperation,ꢀV ꢀfromꢀ2.5Vꢀtoꢀ
IN
DC/DCꢀRegulator,ꢀ2.25MHz
5.5V,ꢀV ꢀDownꢀtoꢀ0.6V,ꢀDFN,ꢀMSꢀPackages
OUT
2
2
I CꢀControllableꢀBuckꢀRegulatorꢀwithꢀTwoꢀLDOsꢀandꢀ 600mA,ꢀ1.5MHzꢀCurrentꢀModeꢀBuckꢀRegulator,ꢀI CꢀProgrammableꢀ
BackupꢀBatteryꢀInput
V
ꢀfromꢀ0.85Vꢀtoꢀ1.55V,ꢀtwoꢀ50mAꢀLDOs,ꢀBackupꢀBatteryꢀInputꢀwithꢀ
OUT
PowerPathꢀControl,ꢀQFNꢀPackageꢀ
LTC3446
LTC3448
LTC3541-2
LTC3541-3
LTC3547
TripleꢀOutputꢀStep-DownꢀConverterꢀ1AꢀOutputꢀBuck,ꢀ V :ꢀ2.7Vꢀtoꢀ5.5V,ꢀV ꢀBuckꢀ=ꢀ0.8V,ꢀV
ꢀVLDOꢀ=ꢀ0.4V
,ꢀ
IN
OUT(MIN)
OUT(MIN)
OUT(MIN)
TwoꢀEachꢀ300mAꢀVDLOs
14-PinꢀDFNꢀPackage
V :ꢀ2.7Vꢀtoꢀ5.5V,ꢀV ꢀ=ꢀ0.6V,ꢀSwitchesꢀtoꢀLDOꢀModeꢀatꢀ≤3A,ꢀꢀ
OUT(MIN)
600mAꢀ(I ),ꢀHighꢀEfficiency,ꢀ1.5MHz/2.25MHzꢀ
OUT
IN
SynchronousꢀStep-DownꢀRegulatorꢀwithꢀLDOꢀMode
DD8,ꢀMS8/EꢀPackages
HighꢀEfficiencyꢀBuckꢀplusꢀVLDOꢀRegulator
V :ꢀ2.9Vꢀtoꢀ5.5V,ꢀV
ꢀ=ꢀ1.875V,ꢀV ꢀ=ꢀ1.5V,ꢀ3mmꢀ×ꢀ3mmꢀ
OUT(BUCK) OUT(VLDO)
IN
10-PinꢀDFNꢀPackage
HighꢀEfficiencyꢀBuckꢀplusꢀVLDOꢀRegulator
V :ꢀ3Vꢀtoꢀ5.5V,ꢀV
ꢀ=ꢀ1.8V,ꢀV
ꢀ=ꢀ1.575V,ꢀ3mmꢀ×ꢀ3mmꢀꢀ
IN
OUT(BUCK)
OUT(VLDO)
10-PinꢀDFNꢀPackage
Dualꢀ300mAꢀ(I ),ꢀ2.25MHz,ꢀSynchronousꢀꢀ
95%ꢀEfficiency,ꢀV :ꢀ2.5Vꢀtoꢀ5.5V,ꢀV
ꢀ=ꢀ0.6V,ꢀI ꢀ=ꢀ40µA,ꢀI ꢀ<ꢀ1µA,ꢀ
Q SD
OUT
IN
OUT(MIN)
Step-DownꢀDC/DCꢀConverter
8-PinꢀDFNꢀPackage
LTC3548/LTC3548-1ꢀ Dualꢀ800mA/400mAꢀ(I ),ꢀ2.25MHz,ꢀSynchronousꢀꢀ
95%ꢀEfficiency,ꢀV :ꢀ2.5Vꢀtoꢀ5.5V,ꢀV
ꢀ=ꢀ0.6V,ꢀI ꢀ=ꢀ40µA,ꢀI ꢀ<ꢀ1µA,ꢀ
OUT(MIN) Q SD
OUT
IN
LTC3548-2
Step-DownꢀDC/DCꢀConverter
DFNꢀandꢀ10-PinꢀMSꢀPackages
LTC3700
Step-DownꢀDC/DCꢀControllerꢀwithꢀLDOꢀRegulator
V ꢀfromꢀ2.65Vꢀtoꢀ9.8V,ꢀConstantꢀFrequencyꢀ550kHzꢀOperation
IN
PowerPathꢀisꢀaꢀtrademarkꢀofꢀLinearꢀTechnologyꢀCorporation.ꢀ
3541fa
LT 0407 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 Mꢀcarthy Blvd., Milpitas, cA 95035-7417
ꢁ0
●
●
LINEAR TECHNOLOGY CORPORATION 2006
(408)432-1900 FAX: (408) 434-0507 www.linear.ꢀom
相关型号：
LTC3541EDD-1#PBF
LTC3541-1 - High Efficiency Buck + VLDO Regulator; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C
Linear
LTC3541EDD-1#TRPBF
LTC3541-1 - High Efficiency Buck + VLDO Regulator; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C
Linear
LTC3541EDD-2#PBF
LTC3541-2 - High Efficiency Buck + VLDO Regulator; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C
Linear
LTC3541EDD-2#TRPBF
LTC3541-2 - High Efficiency Buck + VLDO Regulator; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C
Linear
LTC3541EDD-3#TR
IC 1.25 A SWITCHING REGULATOR, 2700 kHz SWITCHING FREQ-MAX, PDSO10, 3 X 3 MM, PLASTIC, M0-229WEED-2, DFN-10, Switching Regulator or Controller
Linear
LTC3541EDD-3#TRPBF
LTC3541-3 - High Efficiency Buck + VLDO Regulator; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C
Linear
©2020 ICPDF网 联系我们和版权申明