LTC3560ES6#TR_技术文档

LTC3560

2.25MHz, 800mA

Synchronous Step-Down

Regulator in ThinSOT

DESCRIPTION

TheLTC^®3560isahighefﬁciencymonolithicsynchronous

buck regulator using a constant frequency, current mode

architecture.Supplycurrentduringoperationisonly16μA,

dropping to <1μA in shutdown. The 2.5V to 5.5V input

voltage range makes the LTC3560 ideally suited for single

Li-Ion/Li-Polymer battery-powered applications. 100%

duty cycle provides low dropout operation, extending

battery life in portable systems.

FEATURES

n

High Efﬁciency: Up to 95%

Low Output Ripple (<20mV ): Burst Mode^®

n

P-P

Operation: I = 16μA

Q

n

2.5V to 5.5V Input Voltage Range

n

2.25MHz Constant Frequency Operation

n

Synchronizable to External Clock

n

No Schottky Diode Required

n

Stable with Ceramic Capacitors

n

Low Dropout Operation: 100% Duty Cycle

Switching frequency is internally set at 2.25MHz, allowing

the use of small surface mount inductors and capacitors.

For noise sensitive applications the LTC3560 can be ex-

ternally synchronized from 1MHz to 3MHz. Burst Mode

operation is inhibited during synchronization or when the

SYNC/MODE pin is pulled high, preventing low frequency

ripple from interfering with audio circuitry.

n

0.6V Reference Allows Low Output Voltages

n

Shutdown Mode Draws <1μA Supply Current

n

2% Output Voltage Accuracy

n

Current Mode Operation for Excellent Line and

Load Transient Response

Overtemperature Protected

n

Low Proﬁle (1mm) ThinSOT™ Package

The internal synchronous switch increases efﬁciency

and eliminates the need for an external Schottky diode.

Low output voltages are easily supported with the 0.6V

feedback reference voltage. The LTC3560 is available in a

low proﬁle (1mm) ThinSOT package.

APPLICATIONS

n

Cellular Telephones

n

Wireless and DSL Modems

n

Digital Still Cameras

Media Players

L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation.

ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property

of their respective owners. Protected by U.S. Patents including 6580258, 5481178, 5994885,

6304066, 6498466, 6611131.

n

Portable Instruments

TYPICAL APPLICATION

100

90

80

70

60

50

40

30

20

10

0

1

0.1

2.2μH

10pF

V

IN

V

OUT

0.01

0.001

0.0001

2.7V

V

SW

IN

2.5V

C

10μF

CER

TO 5.5V

IN

C

10μF

CER

OUT

LTC3560

RUN

SYNC/MODE V

FB

V

= 3.6V

= 4.2V

= 5.5V

IN

806k

GND

255k

3405A F01a

0.1

1

10

100

1000

LOAD CURRENT (mA)

3560 F01b

Figure 1a. High Efﬁciency Step-Down Converter

Figure 1b. Efﬁciency vs Load Current

3560fb

1

LTC3560

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Note 1)

Input Supply Voltage................................... –0.3V to 6V

TOP VIEW

SYNC/MODE, RUN, V Voltages............... –0.3V to V

FB

IN

RUN 1

GND 2

SW 3

6 SYNC/MODE

SW Voltage (DC).......................... –0.3V to (V + 0.3V)

5 V

4 V

IN

FB

IN

P-Channel Switch Source Current (DC) (Note 6)..... 1.2A

N-Channel Switch Sink Current (DC) (Note 6) ........ 1.2A

Peak SW Sink and Source Current (Note 6) ........... 2.1A

Operating Temperature Range (Note 2)

S6 PACKAGE

6-LEAD PLASTIC TSOT-23

T

JMAX

= 125°C, θ = 250°C/W

JA

LTC3560E.............................................–40°C to 85°C

LTC3560I............................................–40°C to 125°C

Junction Temperature (Notes 3, 7) ...................... 125°C

Storage Temperature Range.................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec) ................. 300°C

ORDER INFORMATION

LEAD FREE FINISH

LTC3560ES6#PBF

LTC3560IS6#PBF

TAPE AND REEL

PART MARKING*

LTCFY

PACKAGE DESCRIPTION

6-Lead Plastic TSOT-23

TEMPERATURE RANGE

LTC3560ES6#TRPBF

LTC3560IS6#TRPBF

–40°C to 85°C

–40°C to 125°C

LTCFY

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *The temperature grade is identiﬁed by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

The l denotes the speciﬁcations which apply over the full operating

ELECTRICAL CHARACTERISTICS

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= 3.6V unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

30

UNITS

nA

l

I

Feedback Current

VFB

PK

Peak Inductor Current

Regulated Feedback Voltage

V

IN

= 3V, V = 0.5V, Duty Cycle < 35%

1.0

1.5

2.0

A

FB

l

V

(Note 4)

E Grade

I Grade

0.588

0.582

0.6

0.612

0.618

V

FB

l

ΔV

Reference Voltage Line Regulation

V

IN

= 2.5V to 5.5V (Note 4)

E Grade

I Grade

0.04

0.4

0.8

%/V

FB

V

Output Voltage Load Regulation

Input Voltage Range

0.5

%

V

LOADREG

IN

l

2.5

5.5

I

Input DC Bias Current

Pulse-Skipping Mode

Burst Mode Operation

Shutdown

(Note 5)

S

V

= 0.63V, Mode = High, I

= 0A

LOAD

= 0A

LOAD

200

16

300

30

1

μA

FB

= 0.63V, Mode = Low, I

= 0V, V = 5.5V

0.1

RUN

IN

l

f

Oscillator Frequency

V

= 0.6V

1.8

1

2.25

2.7

3

MHz

Ω

OSC

FB

SYNC Frequency Range

SYNC

R

of P-Channel FET

of N-Channel FET

I

= 100mA

0.23

0.21

0.01

0.35

1

PFET

NFET

LSW

DS(ON)

SW

= –100mA

Ω

SW

I

SW Leakage

V

RUN

= 0V, V = 0V or 5.5V, V = 5.5V

μA

SW

IN

3560fb

2

LTC3560

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= 3.6V unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

1

MAX

1.5

1

UNITS

V

l

V

RUN Threshold

0.3

RUN

I

RUN Leakage Current

SYNC/MODE Threshold

SYNC/MODE Leakage Current

Soft-Start Time

0.01

1.0

0.01

0.9

μA

V

0.3

0.6

1.5

1

V

SYNC/MODE

SOFTSTART

I

t

μA

V

FB

from 10% to 90% Full Scale

1.2

ms

Note 4: The LTC3560 is tested in a proprietary test mode that connects V

to the output of the error ampliﬁer.

Note 5: Dynamic supply current is higher due to the gate charge being

delivered at the switching frequency.

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

FB

Note 2: The LTC3560E is guaranteed to meet performance speciﬁcations

from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls. The LTC3560I is guaranteed to meet

speciﬁed performance speciﬁcations over the full –40°C to 125°C

operating temperature range.

Note 6: Guaranteed by long-term current density limitations.

Note 7: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature protection is active.

Continuous operation above the speciﬁed maximum operating junction

temperature may impair device reliability.

Note 3: T is calculated from the ambient temperature T and power

J

A

dissipation P according to the following formula:

D

LTC3560: T = T + (P )(250°C/W)

J

A

D

TYPICAL PERFORMANCE CHARACTERISTICS

(From Figure 1a Except for the Resistive Divider Resistor Values)

Efﬁciency vs Input Voltage

Efﬁciency vs Output Current

100

90

80

70

60

50

40

30

20

10

0

100

95

90

85

80

75

70

65

60

55

50

100

90

80

70

60

50

40

30

20

10

0

V

= 1.8V

OUT

I

= 100mA

OUT

I

= 10mA

OUT

I

= 1mA

OUT

I

= 900mA

OUT

I

= 0.1mA

OUT

V

IN

V

IN

V

IN

V

IN

= 2.7V

= 3.6V

= 4.2V

= 5.5V

V

= 3.6V

= 4.2V

= 5.5V

IN

V

= 1.8V

V

= 3.3V

1

OUT

0.1

10

100

1000

2.5

3

4

4.5

5

5.5

3.5

0.1

1

10

100

1000

OUTPUT CURRENT (mA)

INPUT VOLTAGE (V)

OUTPUT CURRENT (mA)

3560 G02

3560 G03

3560 G01

3560fb

3

LTC3560

TYPICAL PERFORMANCE CHARACTERISTICS

(From Figure 1a Except for the Resistive Divider Resistor Values)

Reference Voltage

vs Temperature

Efﬁciency vs Output Current

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

0.615

0.610

0.605

0.600

V

= 3.6V

IN

V

= 1.3V

Burst Mode OPERATION

OUT

PULSE SKIP MODE

0.595

0.590

0.585

V

IN

V

IN

V

IN

= 2.7V

= 3.6V

= 4.2V

V

= 4.2V

= 3.6V

IN

V

= 1.8V

1

OUT

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

0.1

1

10

100

1000

0.1

10

100

1000

OUTPUT CURRENT (mA)

3560 G04

3560 G05

3560 G06

Oscillator Frequency

vs Temperature

Oscillator Frequency

vs Supply Voltage

Output Voltage vs Load Current

1.84

1.83

1.82

1.81

1.80

1.79

1.78

2.50

2.45

2.40

2.35

2.30

2.25

2.20

2.15

2.10

2.05

2.00

2.4

2.3

2.2

2.1

2.0

1.9

1.8

V

= 3.6V

V

= 3.6V

IN

Burst Mode OPERATION

PULSE SKIP MODE

0

400

600

800

1000 1200

4.5

INPUT VOLTAGE (V)

5

200

2

2.5

3

3.5

4

5.5

6

–50

0

25

50

75 100 125

–25

LOAD CURRENT (mA)

TEMPERATURE (°C)

3560 G09

3560 G08

3560 G07

R_DS(ON) vs Input Voltage

R_DS(ON)vs Temperature

Dynamic Supply Current

0.40

0.35

0.30

0.25

0.40

300

250

200

150

100

50

V

LOAD

= 1.2V

= 0A

OUT

I

0.35

0.30

V

= 3.6V

IN

V

= 2.7V

IN

0.25

0.20

0.15

0.10

0.05

PULSE SKIPPING MODE

MAIN SWITCH

V

= 4.2V

IN

SYNCHRONOUS

SWITCH

0.20

0.15

0.10

SYNCHRONOUS SWITCH

MAIN SWITCH

Burst Mode OPERATION

0

4

6

7

0

1

2

3

5

–25

0

50

75 100 125

4.5

INPUT VOLTAGE (V)

5

–50

25

2

2.5

3

3.5

4

5.5

6

INPUT VOLTAGE (V)

TEMPERATURE (°C)

3560 G10

3560 G11

3560 G12

3560fb

4

LTC3560

TYPICAL PERFORMANCE CHARACTERISTICS

(From Figure 1a Except for the Resistive Divider Resistor Values)

Dynamic Supply Current

vs Temperature

Switch Leakage vs Temperature

Switch Leakage vs Input Voltage

300

250

200

150

140

120

1000

900

800

700

600

500

400

300

200

100

0

RUN = 0V

V

LOAD

= 3.6V

IN

= 1.2V

= 0A

OUT

I

100

80

60

40

20

PULSE SKIPPING MODE

MAIN SWITCH

100

50

0

SYNCHRONOUS

SWITCH

SYNCHRONOUS

SWITCH

Burst Mode OPERATION

0

50

TEMPERATURE (°C)

100 125

–50

25

50

75

100 125

0

1

3

4

5

6

–50 –25

0

25

75

–25

0

2

INPUT VOLTAGE (V)

TEMPERATURE (°C)

3560 G13

3560 G14

3560 G15

Burst Mode Operation

Pulse-Skipping Mode Operation

Start-Up from Shutdown

RUN

SW

2V/DIV

SW

2V/DIV

V

OUT

1V/DIV

V

OUT

V

OUT

20mV/DIV

AC COUPLED

I

L

I

L

500mA/DIV

I

L

200mA/DIV

3560 G17

3560 G18

3560 G16

V

I

= 3.6V

500ns/DIV

V

I

= 3.6V

500µs/DIV

V

I

= 3.6V

2μs/DIV

IN

OUT

IN

OUT

IN

OUT

= 1.8V

= 25mA

= 800mA

= 25mA

LOAD

Load Step

V

OUT

200mV/DIV

V

OUT

AC COUPLED

200mV/DIV

AC COUPLED

I

L

1A/DIV

L

1A/DIV

I

LOAD

1A/DIV

LOAD

1A/DIV

3560 G19

3560 G20

3560 G21

V

LOAD

= 3.6V

20μs/DIV

V

LOAD

= 3.6V

20μs/DIV

V

= 3.6V

20µs/DIV

= 100mA TO 800mA

IN

= 1.8V

OUT

I

= 0A TO 800mA

I

= 50mA TO 800mA

I

LOAD

PULSE SKIPPING MODE

3560fb

5

LTC3560

TYPICAL PERFORMANCE CHARACTERISTICS

(From Figure 1a Except for the Resistive Divider Resistor Values)

Load Step

V

OUT

200mV/DIV

AC COUPLED

I

L

1A/DIV

L

1A/DIV

I

LOAD

1A/DIV

LOAD

1A/DIV

LOAD

1A/DIV

3560 G22

3560 G23

3560 G24

V

LOAD

= 3.6V

20μs/DIV

V

LOAD

= 3.6V

20μs/DIV

V

= 3.6V

20μs/DIV

= 100mA TO 800mA

IN

= 1.8V

OUT

I

= 0A TO 800mA

I

= 50mA TO 800mA

I

LOAD

Burst Mode OPERATION

PIN FUNCTIONS

RUN(Pin1):RunControlInput. Forcingthispinabove1.5V

enables the part. Forcing this pin below 0.3V shuts down

thedevice.Inshutdown,allfunctionsaredisableddrawing

<1μA supply current. Do not leave RUN ﬂoating.

V

(Pin 5): Feedback Pin. Receives the feedback voltage

FB

from an external resistive divider across the output.

SYNC/MODE (Pin 6): External Clock Synchronization and

Mode Select Input. To synchronize with an external clock,

apply a clock with a frequency between 1MHz and 3MHz.

GND (Pin 2): Ground Pin.

To select pulse-skipping mode, tie to V . Grounding this

IN

SW (Pin 3): Switch Node Connection to Inductor. This pin

connectstothedrainsoftheinternalmainandsynchronous

power MOSFET switches.

pin selects Burst Mode operation. Do not leave this pin

ﬂoating.

V (Pin 4): Main Supply Pin. Must be closely decoupled

IN

to GND, Pin 2, with a 10μF or greater ceramic capacitor.

FUNCTIONAL DIAGRAM

SYNC/MODE

6

SLOPE

COMP

OSC

0.65V

OSC

V

4

IN

FREQ

–

+

SHIFT

V

FB

EN

–

+

5

SLEEP

+

–

5ꢀ

+

–

0.6V

I

0.4V

COMP

EA

BURST

Q

S

V

IN

SWITCHING

LOGIC

AND

BLANKING

CIRCUIT

R

Q

ANTI-

SHOOT-

THRU

RUN

1

RS LATCH

SW

3

0.6V REF

+

–

SHUTDOWN

I

RCMP

2

GND

3560 BD

3560fb

6

LTC3560

OPERATION ^{(Refer to Functional Diagram)}

Main Control Loop

When the converter is in Burst Mode operation, the peak

current of the inductor is set to approximately 150mA

regardless of the output load. Each burst event can last

from a few cycles at light loads to almost continuously

cycling with short sleep intervals at moderate loads. In

between these burst events, the power MOSFETs and any

unneeded circuitry are turned off, reducing the quiescent

currentto16μA.Inthissleepstate,theloadcurrentisbeing

supplied solely from the output capacitor. As the output

voltage droops, the EA ampliﬁer’s output rises above the

sleep threshold signaling the BURST comparator to trip

and turn the top MOSFET on. This process repeats at a

rate that is dependent on the load demand.

TheLTC3560usesaconstantfrequency,currentmodestep-

down architecture. Both the main (P-channel MOSFET)

and synchronous (N-channel MOSFET) switches are

internal. During normal operation, the internal top power

MOSFET is turned on each cycle when the oscillator sets

the RS latch, and turned off when the current comparator,

I

, resets the RS latch. The peak inductor current

COMP

at which I

resets the RS latch, is controlled by the

COMP

output of error ampliﬁer EA. The V pin, described in

FB

the Pin Functions section, allows EA to receive an output

feedback voltage from an external resistive divider. When

the load current increases, it causes a slight decrease in

the feedback voltage relative to the 0.6V reference, which

inturn,causestheEAampliﬁer’soutputvoltagetoincrease

until the average inductor current matches the new load

current. While the top MOSFET is off, the bottom MOSFET

is turned on until either the inductor current starts to

reverse, as indicated by the current reversal comparator

Frequency Synchronization

When the LTC3560 is clocked by an external source, Burst

Mode operation is disabled; the LTC3560 then operates in

PWMpulse-skippingmode. Inthismode, whentheoutput

load is very low, current comparator I

may remain

COMP

trippedforseveralcyclesandforcethemainswitchtostay

off for the same number of cycles. Increasing the output

load slightly allows constant frequency PWM operation

to resume. This mode exhibits low output ripple as well

as low audio noise and reduced RF interference while

providing reasonable low current efﬁciency.

I

, or the beginning of the next clock cycle.

RCMP

The main control loop is shut down by grounding RUN,

resetting the internal soft-start. Re-enabling the main

control loop by pulling RUN high activates the internal

soft-start, which slowly ramps the output voltage over

approximately 0.9ms until it reaches regulation.

Dropout Operation

Burst Mode Operation

Astheinputsupplyvoltagedecreasestoavalueapproaching

the output voltage, the duty cycle increases toward the

maximumontime. Furtherreductionofthesupplyvoltage

forcesthemainswitchtoremainonformorethanonecycle

until it reaches 100% duty cycle. The output voltage will

then be determined by the input voltage minus the voltage

drop across the P-channel MOSFET and the inductor.

The LTC3560 is capable of Burst Mode operation in which

the internal power MOSFETs operate intermittently based

on load demand. To enable Burst Mode operation, simply

connect the SYNC/MODE pin to GND. To disable Burst

Mode operation and enable PWM pulse-skipping mode,

connect the SYNC/MODE pin to V or drive it with a logic

IN

high (V

> 1.5V). In this mode, the efﬁciency is lower

MODE

Another important detail to remember is that at low input

at light loads, but becomes comparable to Burst Mode

operation when the output load exceeds 100mA. The

advantage of pulse-skipping mode is lower output ripple

and less interference to audio circuitry.

supply voltages, the R

of the P-channel switch

DS(ON)

increases (see Typical Performance Characteristics).

Therefore, the user should calculate the power dissipation

when the LTC3560 is used at 100% duty cycle with low

input voltage (See Thermal Considerations in the Applica-

tions Information section).

3560fb

7

LTC3560

OPERATION ^{(Refer to Functional Diagram)}

Slope Compensation and Inductor Peak Current

signal at duty cycles in excess of 40%. Normally, this

results in a reduction of maximum inductor peak current

for duty cycles >40%. However, the LTC3560 uses a

patented scheme that counteracts this compensating

ramp, which allows the maximum inductor peak current

to remain unaffected throughout all duty cycles.

Slope compensation provides stability in constant

frequency architectures by preventing subharmonic

oscillationsathighdutycycles.Itisaccomplishedinternally

by adding a compensating ramp to the inductor current

APPLICATIONS INFORMATION

ThebasicLTC3560applicationcircuitisshowninFigure1.

External component selection is driven by the load re-

quirement and begins with the selection of L followed by

current to prevent core saturation. Thus, a 960mA rated

inductorshouldbeenoughformostapplications(800mA+

160mA). For better efﬁciency, choose a low DC-resistance

inductor.

C and C

.

IN

OUT

The inductor value also has an effect on Burst Mode

operation. The transition to low current operation begins

when the inductor current peaks fall to approximately

Inductor Selection

For most applications, the value of the inductor will fall

in the range of 1μH to 3.3μH. Its value is chosen based

on the desired ripple current. Large value inductors

lower ripple current and small value inductors result in

200mA. Lower inductor values (higher ΔI ) will cause this

L

to occur at lower load currents, which can cause a dip in

efﬁciency in the upper range of low current operation. In

Burst Mode operation, lower inductance values will cause

the burst frequency to increase.

higher ripple currents. Higher V or V

also increases

IN

OUT

the ripple current as shown in equation 1. A reasonable

starting point for setting ripple current is ΔI = 320mA

L

(40% of 800mA).

Inductor Core Selection

ꢂ

ꢄ

ꢃ

_OUTꢅ

V_IN

ꢆ

V

1

Different core materials and shapes will change the size/

currentandprice/currentrelationshipofaninductor.Toroid

or shielded pot cores in ferrite or permalloy materials are

small and don’t radiate much energy, but generally cost

ꢀI_L=

V_OUT1ꢁ

(1)

ꢇ

f L

( )( )

The DC current rating of the inductor should be at least

equal to the maximum load current plus half the ripple

Table 1. Representative Surface Mount Inductors

MAX DC

CURRENT

MANUFACTURER PART NUMBER

VALUE

DCR

HEIGHT

Toko

A960AW-1R2M-518LC

A960AW-2R3M-518LC

A997AS-3R3M-DB318L

1.2μH

2.3μH

3.3μH

1.8A

1.5A

1.2A

46mꢀ

63mꢀ

70mꢀ

1.8mm

Sumida

CDRH2D11/HP-1R5

CDRH3D11/HP-1R5

CDRH2D18/HP-2R2

CDRH2D14-3R3

1.5μH

2.2μH

3.3μH

1.35A

2A

1.6A

1.2A

64mꢀ

80mꢀ

48mꢀ

100mꢀ

1.2mm

2.0mm

1.55mm

TDK

VLF3010AT-1R5M1R2

VLF3010AT-2R2M1R0

1.5μH

2.2μH

1.2A

1.0A

68mꢀ

100mꢀ

1.0mm

Coilcraft

D01608C-222

LP01704-222M

2.2μH

2.3A

2.4A

70mꢀ

120mꢀ

3.0mm

1.0mm

Cooper

EPCO

SD3112-2R2

2.2μH

1.1A

1.6A

140mꢀ

90mꢀ

1.2mm

B82470A1222M

3560fb

8

LTC3560

APPLICATIONS INFORMATION

more than powdered iron core inductors with similar

electrical characteristics. The choice of which style

inductor to use often depends more on the price versus

size requirements and any radiated ﬁeld/EMI requirements

than on what the LTC3560 requires to operate. Table 1

shows some typical surface mount inductors that work

well in LTC3560 applications.

Iftantalumcapacitorsareused,itiscriticalthatthecapaci-

tors are surge tested for use in switching power supplies.

AnexcellentchoiceistheAVXTPSseriesofsurfacemount

tantalum.Thesearespeciallyconstructedandtestedforlow

ESR so they give the lowest ESR for a given volume. Other

capacitor types include Sanyo POSCAP, Kemet T510 and

T495 series, and Sprague 593D and 595D series. Consult

the manufacturer for other speciﬁc recommendations.

C and C

Selection

IN

OUT

Using Ceramic Input and Output Capacitors

Incontinuousmode,thesourcecurrentofthetopMOSFET

is a square wave of duty cycle V /V . To prevent large

Higher values, lower cost ceramic capacitors are now

becoming available in smaller case sizes. Their high ripple

current, high voltage rating and low ESR make them

ideal for switching regulator applications. Because the

LTC3560’s control loop does not depend on the output

capacitor’s ESR for stable operation, ceramic capacitors

can be used freely to achieve very low output ripple and

small circuit size.

OUT IN

voltage transients, a low ESR input capacitor sized for the

maximumRMScurrentmustbeused.ThemaximumRMS

capacitor current is given by:

1/2

⎡

⎤

OUT

V_OUTV − V

(

)

IN

⎣

⎦

C_INrequired I_RMS≅I_OMAX

V_IN

This formula has a maximum at V = 2V , where

IN

OUT

However, care must be taken when ceramic capacitors

are used at the input and the output. When a ceramic

capacitor is used at the input and the power is supplied

by a wall adapter through long wires, a load step at the

I

= I /2. This simple worst-case condition is

RMS

OUT

commonly used for design because even signiﬁcant

deviations do not offer much relief. Note that the capacitor

manufacturer’s ripple current ratings are often based on

2000 hours of life. This makes it advisable to further

derate the capacitor, or choose a capacitor rated at a

higher temperature than required. Always consult the

manufacturer if there is any question.

output can induce ringing at the input, V . At best, this

IN

ringing can couple to the output and be mistaken as loop

instability. At worst, a sudden inrush of current through

the long wires can potentially cause a voltage spike at V ,

IN

large enough to damage the part.

The selection of C

is driven by the required effective

OUT

When choosing the input and output ceramic capacitors,

choose the X5R or X7R dielectric formulations. These

dielectrics have the best temperature and voltage charac-

teristics of all the ceramics for a given value and size.

seriesresistance(ESR).Typically,oncetheESRrequirement

for C

has been met, the RMS current rating generally

RIPPLE(P-P)

is determined by:

OUT

farexceeds the I

requirement. Theoutput ripple

ΔV

OUT

Output Voltage Programming

ꢂ

ꢅ

1

8fC

ꢀV_OUTꢁ ꢀI_LESR+

The output voltage is set by a resistive divider according

to the following formula:

ꢄ

ꢇ

ꢃ

_OUTꢆ

R2

R1

ꢀ

ꢁ

ꢃ

ꢄ

where f = operating frequency, C

= output capacitance

OUT

)

(2

V_OUT= 0.6V 1+

ꢂ

ꢅ

and ΔI = ripple current in the inductor. For a ﬁxed output

L

voltage, the output ripple is highest at maximum input

The external resistive divider is connected to the output,

allowing remote voltage sensing as shown in Figure 2.

voltage since ΔI increases with input voltage.

L

3560fb

9

LTC3560

APPLICATIONS INFORMATION

1. The V quiescent current is due to two components:

0.6V ≤ V

≤ 5.5V

OUT

IN

the DC bias current as given in the electrical charac-

teristics and the internal main switch and synchronous

switch gate charge currents. The gate charge current

results from switching the gate capacitance of the

internal power MOSFET switches. Each time the gate

is switched from high to low to high again, a packet of

R2

V

FB

LTC3560

R1

GND

3560 F02

Figure 2. Setting the LTC3560 Output Voltage

charge, dQ, moves from V to ground. The resulting

IN

dQ/dt is the current out of V that is typically larger

IN

than the DC bias current. In continuous mode, I

Efﬁciency Considerations

GATECHG

= f(Q + Q ) where Q and Q are the gate charges of

T

B

T

B

Theefﬁciencyofaswitchingregulatorisequaltotheoutput

power divided by the input power times 100%. It is often

useful to analyze individual losses to determine what is

limiting the efﬁciency and which change would produce

the most improvement. Efﬁciency can be expressed as:

the internal top and bottom switches. Both the DC bias

and gate charge losses are proportional to V and thus

IN

their effects will be more pronounced at higher supply

voltages.

2

2. I R losses are calculated from the resistances of the

Efﬁciency = 100% – (L1 + L2 + L3 + ...)

internal switches, R , and external inductor R . In

SW

L

continuous mode, the average output current ﬂowing

through inductor L is “chopped” between the main

switch and the synchronous switch. Thus, the series

resistance looking into the SW pin is a function of both

whereL1, L2, etc. aretheindividuallossesasapercentage

of input power.

Although all dissipative elements in the circuit produce

losses, two main sources usually account for most of

top and bottom MOSFET R

(DC) as follows:

and the duty cycle

DS(ON)

the losses in LTC3560 circuits: V quiescent current and

IN

2

I R losses. The V quiescent current loss dominates

IN

R

SW

= (R

)(DC) + (R )(1 – DC)

DS(ON)TOP DS(ON)BOT

the efﬁciency loss at very low load currents whereas the

2

I R loss dominates the efﬁciency loss at medium to high

The R

for both the top and bottom MOSFETs can

DS(ON)

load currents. In a typical efﬁciency plot, the efﬁciency

curve at very low load currents can be misleading since

the actual power lost is of no consequence as illustrated

in Figure 3.

beobtainedfromtheTypicalPerformanceCharateristics

2

curves. Thus, to obtain I R losses, simply add R to

SW

R and multiply the result by the square of the average

L

output current.

OtherlossesincludingC andC ESRdissipativelosses

1

IN

OUT

V

= 2.5V

OUT

and inductor core losses generally account for less than

Burst Mode OPERATION

2% total additional loss.

0.1

0.01

Thermal Considerations

In most applications the LTC3560 does not dissipate

much heat due to its high efﬁciency. But, in applica-

tions where the LTC3560 is running at high ambient

temperaturewithlowsupplyvoltageandhighdutycycles,

such as in dropout, the heat dissipated may exceed the

maximumjunctiontemperatureofthepart.Ifthejunction

temperature reaches approximately 150°C, both power

0.001

0.0001

V

= 3.6V

= 4.2V

= 5.5V

IN

0.1

1

10

100

1000

LOAD CURRENT (mA)

3560 F03

Figure 3. Power Lost vs Load Current

3560fb

10

LTC3560

APPLICATIONS INFORMATION

switches will be turned off and the SW node will become

high impedance.

steady-state value. During this recovery time V

can be

OUT

monitored for overshoot or ringing that would indicate a

stability problem. For a detailed explanation of switching

control loop theory, see Application Note 76.

To avoid the LTC3560 from exceeding the maximum junc-

tion temperature, the user will need to do some thermal

analysis. The goal of the thermal analysis is to determine

whether the power dissipated exceeds the maximum

junction temperature of the part. The temperature rise is

given by:

A second, more severe transient is caused by switching

in loads with large (>1μF) supply bypass capacitors. The

discharged bypass capacitors are effectively put in paral-

lel with C , causing a rapid drop in V . No regulator

OUT

can deliver enough current to prevent this problem if

the load switch resistance is low and it is driven quickly.

The only solution is to limit the rise time of the switch

drive so that the load rise time is limited to approximately

T = (P )(θ )

R

D

JA

where P is the power dissipated by the regulator and θ

D

JA

is the thermal resistance from the junction of the die to

the ambient temperature.

(25 • C

). Thus, a 10μF capacitor charging to 3.3V

LOAD

would require a 250μs rise time, limiting the charging

current to about 130mA.

The junction temperature, T , is given by:

J

T = T + T

R

J

A

PC Board Layout Checklist

where T is the ambient temperature.

A

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the LTC3560. These items are also illustrated graphically

in Figures 4 and 5. Check the following in your layout:

As an example, consider the LTC3560 in dropout at an

input voltage of 2.7V, a load current of 800mA and an

ambient temperature of 70°C. From the typical perfor-

mance graph of switch resistance, the R

of the

DS(ON)

P-channel switch at 70°C is approximately 0.31ꢀ. There-

fore, power dissipated by the part is:

1. The power traces, consisting of the GND trace, the SW

trace and the V trace should be kept short, direct and

IN

2

wide.

P = I

D

• R

= 198mW

LOAD

DS(ON)

2. Does the V pin connect directly to the feedback resis-

FB

For the SOT-23 package, the θ is 250°C/W. Thus, the

JA

tors? The resistive divider R1/R2 must be connected

junction temperature of the regulator is:

between the (+) plate of C

and ground.

OUT

T = 70°C + (0.198)(250) = 120°C

J

3. Does the (+) plate of C connect to V as closely as

IN

which is below the maximum junction temperature of

125°C.

possible? This capacitor provides the AC current to the

internal power MOSFETs.

Notethatathighersupplyvoltages,thejunctiontemperature

4. Keep the (–) plates of C and C

as close as pos-

IN

OUT

is lower due to reduced switch resistance (R

).

DS(ON)

sible.

5. Keep the switching node, SW, away from the sensitive

node.

Checking Transient Response

V

FB

The regulator loop response can be checked by looking

at the load transient response. Switching regulators

take several cycles to respond to a step in load current.

Design Example

As a design example, assume the LTC3560 is used in

a single lithium-ion battery-powered cellular phone

When a load step occurs, V

immediately shifts by an

OUT

amountequalto(ΔI

•ESR), whereESRistheeffective

LOAD

application. The V will be operating from a maximum of

IN

series resistance of C . ΔI

also begins to charge

OUT

LOAD

4.2V down to about 2.7V. The load current requirement

or discharge C , which generates a feedback error

OUT

is a maximum of 0.8A but most of the time it will be in

signal. The regulator loop then acts to return V

to its

OUT

3560fb

11

LTC3560

APPLICATIONS INFORMATION

1

2

3

6

5

4

RUN SYNC/MODE

LTC3560

GND

V

FB

–

C

V

R2

R1

OUT

SW

V

IN

+

L1

C

FWD

C

IN

V

IN

3560 F04

BOLD LINES INDICATE HIGH CURRENT PATHS

Figure 4. LTC3560 Layout Diagram

VIA TO GND

R1

V

OUT

V

IN

VIA TO V

LTC3560

IN

VIA TO V

OUT

R2

PIN 1

L1

C

FWD

SW

C

IN

OUT

GND

3560 F05

Figure 5. LTC3560 Suggested Layout

standby mode, requiring only 2mA. Efﬁciency at both

low and high load currents is important. Output voltage

is 2.5V. With this information we can calculate L using

equation (1),

C will require an RMS current rating of at least 0.4A ≅

IN

I

/2 at temperature and C

will require an ESR

LOAD(MAX)

OUT

of less than 0.1Ω. In most cases, a ceramic capacitor will

satisfy this requirement.

For the feedback resistors, choose R1 = 309k. R2 can

then be calculated from equation (2) to be:

ꢂ

ꢄ

ꢃ

_OUTꢅ

V_IN

ꢆ

V

1

(3)

L =

V_OUT1ꢁ

ꢇ

f ꢀI

( )

(

)

L

V

ꢁ

ꢃ

ꢄ

ꢆ

OUT

R2=

ꢀ1 R1= 978.5k; use 976k

Substituting V

= 2.5V, V = 4.2V, ΔI = 320mA and

f = 2.25MHz in equation (3) gives:

OUT

IN

L

ꢂ

ꢅ

0.6

Figure 6 shows the complete circuit along with its ef-

ﬁciency curve.

2.5V

2.25MHz(320mA)

2.5V

4.2V

ꢁ

ꢂ

ꢄ

ꢅ

L =

1ꢀ

ꢇ1.4μH

ꢃ

ꢆ

A 1.5μH inductor works well for this application. For best

efﬁciency choose a 960mA or greater inductor with less

than 0.2ꢀ series resistance.

3560fb

12

LTC3560

APPLICATIONS INFORMATION

100

90

80

70

60

50

40

30

20

10

0

V

= 2.5V

OUT

Burst Mode

OPERATION

1.5μH**

10pF

V

PULSE

SKIPPING

IN

4

3

5

V

OUT

2.7V

V

SW

IN

2.5V

C

10μF

CER

*

TO 4.2V

IN

LTC3560

RUN

C

10μF

CER

*

OUT

1

6

SYNC/MODE V

FB

976k

309k

GND

3560 F06a

V

= 3.6V

= 4.2V

IN

2

0.1

1

10

100

1000

*TDK C2012X5R0J106M

**TDK VLF3010AT-1R5N1R2

OUTPUT CURRENT (mA)

3560 F06b

Figure 6a

Figure 6b

V

OUT

200mV/DIV

AC COUPLED

I

L

1A/DIV

L

1A/DIV

I

LOAD

1A/DIV

LOAD

1A/DIV

3560 F06c

3560 F06d

V

LOAD

= 3.6V

20μs/DIV

V

= 3.6V

20μs/DIV

IN

= 2.5V

OUT

LOAD

I

= 100mA TO 800mA

I

= 100mA TO 800mA

Burst Mode OPERATION

PULSE SKIPPING MODE

Figure 6c

Figure 6d

3560fb

13

LTC3560

APPLICATIONS INFORMATION

100

90

80

1μH**

10pF

V

IN

70

4

3

5

V

OUT

2.7V

V

SW

IN

1.2V

C

10μF

CER

*

IN

60

50

TO 4.2V

LTC3560

RUN

C

10μF

CER

*

OUT

1

6

40

30

20

10

0

SYNC/MODE V

3MHz CLK

FB

301k

GND

301k

3560 F07a

2

V

= 2.7V

= 3.6V

= 4.2V

IN

*TDK C2012X5R0J106M

**MURATA LQH32CN1R0M33

1

10

100

1000

LOAD CURRENT (mA)

3560 F07b

Figure 7a

Figure 7b

V

OUT

100mV/DIV

AC COUPLED

I

L

500mA/DIV

I

LOAD

I

LOAD

500mA/DIV

3560 F07c

3560 F07d

V

LOAD

= 3.6V

20μs/DIV

V

LOAD

= 3.6V

IN

20μs/DIV

IN

= 1.2V

OUT

I

= 300A TO 800mA

I

= 0mA TO 500mA

Figure 7c

Figure 7d

3560fb

14

LTC3560

PACKAGE DESCRIPTION

S6 Package

6-Lead Plastic TSOT-23

(Reference LTC DWG # 05-08-1636)

2.90 BSC

(NOTE 4)

0.62

MAX

0.95

REF

1.22 REF

1.4 MIN

1.50 – 1.75

(NOTE 4)

2.80 BSC

3.85 MAX 2.62 REF

PIN ONE ID

RECOMMENDED SOLDER PAD LAYOUT

PER IPC CALCULATOR

0.30 – 0.45

6 PLCS (NOTE 3)

0.95 BSC

0.80 – 0.90

0.20 BSC

DATUM ‘A’

0.01 – 0.10

1.00 MAX

0.30 – 0.50 REF

1.90 BSC

0.09 – 0.20

(NOTE 3)

S6 TSOT-23 0302 REV B

NOTE:

1. DIMENSIONS ARE IN MILLIMETERS

2. DRAWING NOT TO SCALE

3. DIMENSIONS ARE INCLUSIVE OF PLATING

4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR

5. MOLD FLASH SHALL NOT EXCEED 0.254mm

6. JEDEC PACKAGE REFERENCE IS MO-193

3560fb

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

15

LTC3560

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

95% Efﬁciency, V : 2.5V to 5.5V, V

LTC3405/LTC3405A

300mA (I ), 1.5MHz, Synchronous Step-Down

= 0.8V, I = 20μA,

Q

OUT

IN

OUT(MIN)

DC/DC Converters

I

= <1μA, ThinSOT Package

SD

LTC3406/LTC3406B

LTC3407/LTC3407-2

LTC3409

600mA (I ), 1.5MHz, Synchronous Step-Down

96% Efﬁciency, V : 2.5V to 5.5V, V

= 0.6V, I = 20μA,

Q

OUT

IN

DC/DC Converters

I

= <1μA, ThinSOT Package

SD

Dual 600mA/800mA (I ), 1.5MHz/2.25MHz,

95% Efﬁciency, V : 2.5V to 5.5V, V

= 0.6V, I = 40μA,

Q

OUT

IN

Synchronous Step-Down DC/DC Converters

I

= <1μA, MS10E, DFN Packages

SD

600mA (I ), 1.7MHz/2.6MHz, Synchronous Step-Down

96% Efﬁciency, V : 1.6V to 5.5V, V

= 0.6V, I = 65μA,

Q

OUT

IN

DC/DC Converter

I

= <1μA, DFN Package

SD

LTC3410/LTC3410B

LTC3411

300mA (I ), 2.25MHz, Synchronous Step-Down

95% Efﬁciency, V : 2.5V to 5.5V, V

= 0.8V, I = 26μA,

Q

OUT

IN

DC/DC Converters

I

= <1μA, SC70 Package

SD

1.25A (I ), 4MHz, Synchronous Step-Down

95% Efﬁciency, V : 2.5V to 5.5V, V

= 0.8V, I = 60μA,

Q

OUT

IN

DC/DC Converter

I

= <1μA, MS10, DFN Packages

SD

LTC3412

2.5A (I ), 4MHz, Synchronous Step-Down

95% Efﬁciency, V : 2.5V to 5.5V, V

= 0.8V, I = 60μA,

OUT

IN

Q

DC/DC Converter

I

= <1μA, TSSOP-16E Package

SD

LTC3441/LTC3442/

LTC3443

1.2A (I ), 2MHz, Synchronous Buck-Boost

95% Efﬁciency, V : 2.4V to 5.5V, V

Q SD

: 2.4V to 5.25V,

OUT

IN

DC/DC Converters

I = 50μA, I = <1μA, DFN Package

LTC3531/LTC3531-3/

LTC3531-3.3

200mA (I ), 1.5MHz, Synchronous Buck-Boost

95% Efﬁciency, V : 1.8V to 5.5V, V

SD

: 2V to 5V, I = 16μA,

OUT

IN

OUT(MIN)

Q

DC/DC Converters

I

= <1μA, ThinSOT, DFN Packages

LTC3532

500mA (I ), 2MHz, Synchronous Buck-Boost DC/DC

95% Efﬁciency, V : 2.4V to 5.5V, V

: 2.4V to 5.25V,

OUT

IN

OUT(MIN)

Converter

I = 35μA, I = <1μA, MS10, DFN Packages

Q SD

LTC3548/LTC3548-1/

LTC3548-2

Dual 400mA/800mA (I ), 2.25MHz, Synchronous

95% Efﬁciency, V : 2.5V to 5.5V, V

= 0.6V, I = 40μA,

Q

OUT

IN

OUT(MIN)

Step-Down DC/DC Converters

I

= <1μA, MS10E, DFN Packages

SD

LTC3561

1.25A (I ), 4MHz, Synchronous Step-Down

95% Efﬁciency, V : 2.5V to 5.5V, V

= 0.8V, I = 240μA,

Q

OUT

IN

DC/DC Converter

I

= <1μA, DFN Package

SD

3560fb

LT 0509 REV B • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

16

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3560ES6#TR
厂家：	Linear
描述：	LTC3560 - 2.25MHz, 800mA Synchronous Step-Down Regulator in ThinSOT; Package: SOT; Pins: 6; Temperature Range: -40°C to 85°C 开关光电二极管
文件：	总16页 (文件大小：251K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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