LTC3567EUF-TRPBF_技术文档

LTC3567

High Efﬁciency USB Power

Manager Plus 1A Buck-Boost

2

Converter with I C Control

DESCRIPTION

FEATURES

The LTC^®3567 is a highly integrated power management

and battery charger IC for Li-Ion/Polymer battery applica-

tions.Itincludesahighefﬁciencycurrentlimitedswitching

PowerPath manager with automatic load prioritization,

a battery charger, an ideal diode, and a high efﬁciency

synchronous buck-boost switching regulator. Designed

speciﬁcally for USB applications, the LTC3567’s switch-

ing power manager automatically limits input current to

a maximum of either 100mA or 500mA for USB or 1A for

adapter-powered applications.

Power Manager

n

High Efﬁciency Switching PowerPath™ Controller

with Bat-Track™ Adaptive Output Control

n

Programmable USB or Wall Current Limit

(100mA/500mA/1A)

n

Full Featured Li-Ion/Polymer Battery Charger

n

“Instant-On” Operation with a Discharged Battery

n

1.5A Maximum Charge Current

n

Internal 180mΩ Ideal Diode Plus External Ideal Diode

Controller Powers Load in Battery Mode

n

Low No-Load I When Powered from BAT (<30μA)

Q

TheLTC3567’sswitchinginputstagetransmitsnearlyallof

the 2.5W available from the USB port to the system load

with minimal power wasted as heat. This feature allows

the LTC3567 to provide more power to the application and

eases thermal budgeting constraints in small spaces.

1A Buck-Boost DC/DC

n

High Efﬁciency (1A I

)

OUT

n

2.25MHz Constant Frequency Operation

Low No-Load Quiescent Current (~13μA)

Zero Shutdown Current

The synchronous buck-boost DC/DC can provide up to

1A output current.

2

I C Control of All Functions

The LTC3567 is available in a low proﬁle 24-pin (4mm ×

4mm × 0.75mm) QFN surface mount package.

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. PowerPath

and Bat-Track are a trademarks of Linear Technology Corporation. All other trademarks are the

property of their respective owners. Protected by U.S. Patents including 6522118 and 6404251.

APPLICATIONS

n

HDD Based MP3 Players, PDA, GPS, PMP Products

n

Other USB Based Handheld Products

TYPICAL APPLICATION

LTC3567 USB Power Manager with a 3.3V/1A Buck-Boost

Switching Regulator Efﬁciency to

FROM AC

ADAPTER

3.3μH

System Load (P_OUT/P_BUS

)

V

=

OUT

100

90

80

70

60

50

40

30

20

10

V

SW

V

OUT

FROM USB

BAT + 300mV

BUS

4.7μF

10μF

OTHER DC/DCs

CLPROG

PROG

GATE

BAT

3.01k

2k

100k

OPTIONAL

BAT = 4.2V

BAT = 3.3V

0.1μF

+

Li-Ion

1μF

3.3V/20mA

ALWAYS

ON LDO

NTC

LDO3V3

V

IN1

CHRG

CHRGEN

EN1

100k

LTC3567

T

SWAB1

DIGITAL

CONTROL

2.2μH

1.5nF

1μF

V

I

= 5V

BUS

= 0mA

SWCD1

BAT

3.3V/1A

HDD

10x MODE

V

OUT1

SCL

0

2

324k

0.01

0.1

(A)

1

I C SERIAL

INTERFACE

SDA

I

10μF

OUT

FB1

3567 TA01b

DV

CC

105k

V

C1

3567 TA01

3567f

1

LTC3567

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Note 1)

TOP VIEW

V

(Transient) t<1ms, Duty Cycle<1%...... –0.3V to 7V

BUS

(Static), V , BAT, NTC, CHRG, DV , SCL,

IN1

CC

SDA, EN1, CHRGEN................................. –0.3V to 6V

FB1, V .................–0.3V to Lesser of 6V or V + 0.3V

24 23 22 21 20 19

C1

IN1

LDO3V3

CLPROG

NTC

1

2

3

4

5

6

18 GATE

I

....................................................................3mA

CLPROG

GND

17

16

......................................................................50mA

CHRG

PROG

CHRG

25

........................................................................2mA

FB1

15 PROG

SDA

...................................................................30mA

LDO3V3

V

C1

14

13 SCL

, I , I

............................................................2A

GND

SW BAT VOUT

, I

,............................................2.5A

VOUT1 SWAB1 SWCD1

7

8

9 10 11 12

Operating Temperature Range (Note 2).... –40°C to 85°C

Junction Temperature (Note 3) ............................. 125°C

Storage Temperature Range................... –65°C to 125°C

UF PACKAGE

24-LEAD (4mm × 4mm) PLASTIC QFN

T

JMAX

= 125°C, θ = 37°C/W

JA

EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB

ORDER INFORMATION

LEAD FREE FINISH

TAPE AND REEL

PART MARKING

PACKAGE DESCRIPTION

24-Lead (4mm × 4mm) Plastic QFN

TEMPERATURE RANGE

–40°C to 85°C

LTC3567EUF#PBF

LTC3567EUF#TRPBF

3567

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS

The l denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_BUS= 5V, V_IN1= V_OUT1= 3.8V, V_BAT= 3.8V, DV_CC= 3.3V, R_PROG= 1k,

R_CLPROG= 3.01k, unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

PowerPath Switching Regulator

V

Input Supply Voltage

Total Input Current

4.35

5.5

V

BUS

l

I

1x Mode, V

5x Mode, V

= BAT

OUT

87

95

100

500

1000

0.50

mA

BUSLIM

OUT

436

800

0.31

460

860

0.38

10x Mode, V

= BAT

Suspend Mode, V

= BAT

OUT

I

V

Quiescent Current

1x Mode, I

5x Mode, I

= 0mA

7

15

mA

BUSQ

BUS

OUT

10x Mode, I

= 0mA

15

OUT

Suspend Mode, I

= 0mA

0.044

OUT

h

(Note 4)

Ratio of Measured V

current to 1x Mode

BUS

224

1133

2140

11.3

mA/mA

CLPROG

CLPROG Program Current

5x Mode

10x Mode

Suspend Mode

3567f

2

LTC3567

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_BUS= 5V, V_IN1= V_OUT1= 3.8V, V_BAT= 3.8V, DV_CC= 3.3V, R_PROG= 1k,

R_CLPROG= 3.01k, unless otherwise noted.

SYMBOL

PARAMETER

Current Available Before

CONDITIONS

MIN

TYP

MAX

UNITS

I

V

1x Mode, BAT = 3.3V

5x Mode, BAT = 3.3V

10x Mode, BAT = 3.3V

Suspend Mode

135

672

1251

0.32

mA

OUT (POWERPATH)

OUT

Loading BAT

V

CLPROG Servo Voltage in Current 1x, 5x, 10x Modes

1.188

100

V

CLPROG

Limit

Suspend Mode

mV

V

Undervoltage Lockout

to BAT Differential

Rising Threshold

Falling Threshold

4.30

4.00

4.35

4.7

V

UVLO_VBUS

UVLO_VBUS-VBAT

OUT

BUS

3.95

3.4

V

Rising Threshold

Falling Threshold

200

50

mV

BUS

Undervoltage Lockout

V

Voltage

1x, 5x, 10x Modes,

BAT+0.3

V

OUT

0V < BAT < 4.2V, I

Charger Off

= 0mA, Battery

OUT

USB Suspend Mode, I

= 250μA

4.5

1.8

4.6

4.7

2.7

V

MHz

Ω

OUT

l

f

Switching Frequency

PMOS On-Resistance

NMOS On-Resistance

Peak Switch Current Limit

2.25

0.18

0.30

OSC

R

PMOS_POWERPATH

NMOS_POWERPATH

PEAK_POWERPATH

Ω

I

1x, 5x Modes

10x Mode

2

3

A

Battery Charger

V

FLOAT

BAT Regulated Output Voltage

4.179

4.165

4.200

4.221

4.235

V

l

I

Constant Current Mode Charge

Current

980

185

1022

204

1065

223

mA

CHG

R

= 5k

PROG

Battery Drain Current

V

> V , Battery Charger Off,

UVLO

= 0μA

= 0V, I

2

3.5

5

μA

BAT

BUS

OUT

BUS

I

V

= 0μA (Ideal Diode

OUT

27

38

μA

Mode)

V

PROG Pin Servo Voltage

1.000

0.100

V

PROG

PROG Pin Servo Voltage in Trickle

Charge

V < V

BAT TRIKL

PROG_TRIKL

V

C/10 Threshold Voltage at PROG

100

1022

100

mV

mA/mA

mA

C/10

PROG

TRKL

h

Ratio of I to PROG Pin Current

BAT

I

Trickle Charge Current

BAT < V

TRKL

V

Trickle Charge Threshold Voltage

Trickle Charge Hysteresis Voltage

BAT Rising

2.7

2.85

135

3.0

V

TRKL

ΔV

mV

TRKL

V

Recharge Battery Threshold

Voltage

Threshold Voltage Relative to V

–75

–100

–125

mV

RECHRG

FLOAT

t

Safety Timer Termination

Timer Starts When BAT = V

3.3

0.42

0.088

4

5

Hour

TERM

FLOAT

Bad Battery Termination Time

BAT < V

0.5

0.1

0.63

0.112

BADBAT

TRKL

h

End of Charge Indication Current

Ratio

(Note 5)

mA/mA

C/10

V

CHRG Pin Output Low Voltage

CHRG Pin Leakage Current

I

= 5mA

= 5V

65

100

1

mV

μA

CHRG

I

V

CHRG

3567f

3

LTC3567

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_BUS= 5V, V_IN1= V_OUT1= 3.8V, V_BAT= 3.8V, DV_CC= 3.3V, R_PROG= 1k,

R_CLPROG= 3.01k, unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

R

Battery Charger Power FET On

0.18

Ω

ON_CHG

Resistance (Between V

BAT)

and

OUT

T

Junction Temperature in Constant

Temperature Mode

110

°C

LIM

NTC

V

COLD

V

HOT

V

DIS

Cold Temperature Fault Threshold Rising Threshold

75.0

33.4

0.7

76.5

1.5

78.0

36.4

2.7

%V

BUS

Voltage

Hysteresis

Hot Temperature Fault Threshold

Voltage

Falling Threshold

Hysteresis

34.9

1.5

%V

BUS

NTC Disable Threshold Voltage

Falling Threshold

Hysteresis

1.7

50

%V

BUS

mV

I

NTC Leakage Current

V

NTC

= V = 5V

BUS

–50

50

nA

NTC

Ideal Diode

V

FWD

Forward Voltage

V

= 0V, I = 10mA

OUT

= 10mA

2

15

mV

BUS

OUT

I

R

Internal Diode On-Resistance,

Dropout

V

= 0V

0.18

Ω

DROPOUT

BUS

I

Internal Diode Current Limit

1.6

3.1

A

MAX_DIODE

Always On 3.3V Supply

V

Regulated Output Voltage

0mA < I

< 25mA

3.3

4

3.5

V

Ω

LDO3V3

R

Closed-Loop Output Resistance

Dropout Output Resistance

CL_LDO3V3

23

OL_LDO3V3

Logic (CHRGEN, EN1)

V

Logic Low Input Voltage

Logic High Input Voltage

EN1 Pull-Down Current

CHRGEN Pull-Down Current

0.4

10

V

IL

1.2

1.6

IH

I

1.6

μA

PD_EN1

PD_CHRGEN

2

I C Port (Note 6)

DV

Input Supply Voltage

5.5

1

V

μA

V

CC

I

DV Current

CC

SCL/SDA = 0kHz

0.3

1.0

DVCC

V

DV UVLO

CC

DVCC_UVLO

2

ADDRESS

V , SDA, SCL

I C Address

0001001[0]

Input High Voltage

70

–1

%DV

IH

CC

V , SDA, SCL

IL

Input Low Voltage

30

1

I , I SDA, SCL

IH IL

Input High/Low Current

SDA Output Low Voltage

Clock Operating Frequency

0

μA

V

SDA

OL

I

= 3mA

SDA

0.4

400

f

t

kHz

μs

SCL

BUF

Bus Free Time Between Stop and

Start Condition

1.3

0.6

t

Hold Time After (Repeated) Start

Condition

μs

HD_STA

SU_STA

Repeated Start Condition Setup

Time

3567f

4

LTC3567

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_BUS= 5V, V_IN1= V_OUT1= 3.8V, V_BAT= 3.8V, DV_CC= 3.3V, R_PROG= 1k,

R_CLPROG= 3.01k, unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

0.6

TYP

MAX

UNITS

μs

t

Stop Condition Setup Time

Data Hold Time Output

Data Hold Time Input

Data Setup Time

SU_STO

0

900

ns

HD_DAT (O)

0

ns

HD_DAT (I)

100

ns

SU_DAT

SCL Clock Low Period

SCL Clock High Period

Clock/Data Fall Time

Clock/Data Rise Time

1.3

μs

LOW

0.6

μs

HIGH

C = Capacitance of One BUS Line (pF)

B

20+0.1•C

300

50

ns

f

B

C = Capacitance of One BUS Line (pF)

B

ns

r

B

Input Spike Suppression Pulse

Width

ns

SP

Buck-Boost Regulator

V

Input Supply Voltage

2.7

2.5

5.5

2.9

2.7

V

IN1

V

UVLO – V

Falling

Rising

V

Connected to V Through Low

OUT

2.6

2.8

V

OUTUVLO

OUT

IN1

Impedance. Switching Regulator is

Disabled in UVLO

l

f

I

Oscillator Frequency

Input Current

1.8

2.25

MHz

OSC

PWM Mode, I

= 0μA

220

13

0

400

20

1

μA

VIN1

OUT1

Burst Mode^®Operation, I

Shutdown

= 0μA

OUT1

V

Minimum Regulated Output

Voltage

For Burst Mode Operation or

Synchronous PWM Operation

2.65

2.75

V

OUT1(LOW)

Maximum Regulated Output

Voltage

5.50

5.60

V

OUT1(HIGH)

l

I

Forward Current Limit (Switch A) PWM Mode

2

2.5

3

A

LIMF1

Forward Burst Current Limit

(Switch A)

Burst Mode Operation

200

275

350

mA

PEAK1(BURST)

l

I

Reverse Burst Current Limit

(Switch D)

Burst Mode Operation

–30

50

0

30

mA

ZERO1(BURST)

MAX1(BURST)

Maximum Deliverable Output

Current in Burst Mode Operation

2.7V ≤ V ≤ 5.5V,

IN1

2.75V ≤ V

≤ 5.5V

OUT1

(Note 6)

l

V

Maximum Servo Voltage

Minimum Servo Voltage

Full Scale (1,1,1,1)

Zero Scale (0,0,0,0)

0.780

0.405

0.800

0.425

25

0.820

0.445

V

FBHIGH1

FBLOW1

LSB1

V

Servo Voltage Step Size

mV

nA

Ω

FB1

I

FB1 Input Current

V

FB1

= 0.8V

-50

50

FB1

R

PMOS R

NMOS R

Switches A, D

Switches B, C

Switches A, D

Switches B, C

0.22

0.17

DS(ON)P

DS(ON)N

LEAK(P)

LEAK(N)

DS(ON)

Ω

I

PMOS Switch Leakage

NMOS Switch Leakage

–1

1

μA

kΩ

%

R

V

Pull-Down in Shutdown

OUT1

10

VOUT1

l

D

Maximum Buck Duty Cycle

Maximum Boost Duty Cycle

Soft-Start Time

PWM Mode

100

BUCK(MAX)

75

%

BOOST(MAX)

t

0.5

ms

SS1

Burst Mode is a registered trademark of Linear Technology Corporation.

3567f

5

LTC3567

ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

temperatures will exceed 125°C when overtemperature protection is

active. Continuous operation above the speciﬁed maximum operating

junction temperature may impair device reliability.

Note 4: Total Input current is the sum of quiescent current, I

, and

VBUSQ

measured current given by:

Note 2: The LTC3567E is guaranteed to meet performance speciﬁcations

from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls.

Note 3: The LTC3567 includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

V

• (h

+ 1)

CLPROG/RCLPROG

CLPROG

Note 5: h

is expressed as a fraction of measured full charge current

C/10

with indicated PROG resistor.

Note 6: Guaranteed by design.

TYPICAL PERFORMANCE CHARACTERISTICS

T_A= 25°C unless otherwise noted.

Ideal Diode Resistance

vs Battery Voltage

Output Voltage vs Output Current

(Battery Charger Disabled)

Ideal Diode V-I Characteristics

1.0

0.8

0.6

0.4

0.2

0

0.25

0.20

0.15

0.10

0.05

0

4.50

4.25

4.00

3.75

3.50

3.25

V

= 5V

INTERNAL IDEAL DIODE

WITH SUPPLEMENTAL

EXTERNAL VISHAY

Si2333 PMOS

BUS

BAT = 4V

5x MODE

INTERNAL IDEAL

DIODE

INTERNAL IDEAL

DIODE ONLY

BAT = 3.4V

INTERNAL IDEAL DIODE

WITH SUPPLEMENTAL

EXTERNAL VISHAY

Si2333 PMOS

V

= 0V

= 5V

BUS

0

0.04

0.08

0.12

0.16

0.20

2.7

3.0

3.3

3.6

3.9

4.2

0

200

400

600

800

1000

FORWARD VOLTAGE (V)

BATTERY VOLTAGE (V)

OUTPUT CURRENT (mA)

3567 G01

3567 G02

3567 G03

USB Limited Battery Charge

Current vs Battery Voltage

USB Limited Battery Charge

Current vs Battery Voltage

Battery Drain Current

vs Battery Voltage

700

600

150

125

25

20

15

10

5

I

= 0μA

VOUT

V

= 0V

BUS

V

R

= 5V

BUS

500

400

300

200

100

0

V

R

= 5V

BUS

= 1k

PROG

CLPROG

100

75

= 1k

PROG

CLPROG

= 2.94k

50

25

0

V

= 5V

BUS

(SUSPEND MODE)

1x USB SETTING,

BATTERY CHARGER SET FOR 1A

5x USB SETTING,

BATTERY CHARGER SET FOR 1A

0

3.0

3.3

3.6

4.2

2.7

3.9

2.7 3.0 3.3 3.6

BATTERY VOLTAGE (V)

3.9

4.2

2.7

3.0

3.3

3.6

3.9

4.2

BATTERY VOLTAGE (V)

3567 G04

3567 G05

3567 G06

3567f

6

LTC3567

TYPICAL PERFORMANCE CHARACTERISTICS ^T_A^{= 25°C unless otherwise noted.}

Battery Charging Efﬁciency vs

PowerPath Switching Regulator

Efﬁciency vs Output Current

Battery Voltage with No External

V_BUSCurrent vs V_BUSVoltage

(Suspend)

Load (P_BAT/P_BUS

)

100

90

80

70

60

50

40

100

90

80

70

60

50

40

30

20

10

0

BAT = 3.8V

R

I

= 3.01k

BAT = 3.8V

VOUT

CLPROG

PROG

VOUT

5x, 10x MODE

= 1k

I

= 0mA

1x MODE

5x CHARGING

EFFICIENCY

= 0mA

1x CHARGING

EFFICIENCY

0.01

0.1

1

2.7

3.0

3.6

BATTERY VOLTAGE (V)

3.9

3.3

4.2

0

1

3

4

5

2

OUTPUT CURRENT (A)

BUS VOLTAGE (V)

3567 G07

3567 G08

3567 G09

Output Voltage vs Load Current in

Suspend

V_BUSCurrent vs Load Current in

Suspend

3.3V LDO Output Voltage

vs Load Current, V_BUS= 0V

3.4

3.2

3.0

2.8

2.6

5.0

4.5

4.0

3.5

3.0

2.5

0.5

0.4

0.3

0.2

0.1

0

BAT = 3.5V

V

BUS

= 5V

BAT = 3.9V, 4.2V

BAT = 3.4V

BAT = 3.3V

= 2.94k

BAT = 3.6V

R

CLPROG

BAT = 3V

BAT = 3.1V

BAT = 3.2V

V

BUS

= 5V

BAT = 3.3V

= 2.94k

R

CLPROG

BAT = 3.3V

0

5

10

15

20

25

0

0.1

0.2

0.3

0.4

0.5

0

0.1

0.2

0.3

0.4

0.5

LOAD CURRENT (mA)

3567 G12

3567 G10

3567 G11

Battery Charge Current

vs Temperature

Battery Charger Float Voltage

vs Temperature

Low-Battery (Instant-On) Output

Voltage vs Temperature

4.21

4.20

4.19

4.18

4.17

3.68

3.66

3.64

3.62

3.60

600

500

400

300

200

100

0

BAT = 2.7V

I

= 100mA

VOUT

5x MODE

THERMAL REGULATION

R

= 2k

PROG

10x MODE

60 80

20 40

TEMPERATURE (°C)

–40 –20

0

100 120

–40

–15

10

35

60

85

–40

–15

10

35

60

85

TEMPERATURE (°C)

3567 G13

3567 G14

3567 G15

3567f

7

LTC3567

T_A= 25°C unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

Oscillator Frequency

vs Temperature

V_BUSQuiescent Current

vs Temperature

V_BUSQuiescent Current in

Suspend vs Temperature

15

12

9

2.6

2.4

2.2

2.0

1.8

70

60

50

40

30

V

VOUT

= 5V

= 0μA

I

= 0μA

BUS

VOUT

I

5x MODE

BAT = 3.6V

= 0V

V

BUS

= 5V

V

BUS

BAT = 3V

= 0V

1x MODE

V

BUS

6

BAT = 2.7V

= 0V

V

BUS

3

–40

–15

10

35

60

85

–40

–15

10

35

60

85

–40

–15

10

35

60

85

TEMPERATURE (°C)

3567 G17

3567 G16

3567 G18

CHRG Pin Current vs Voltage

(Pull-Down State)

3.3V LDO Step Response

(5mA to 15mA)

Battery Drain Current

vs Temperature

100

80

60

40

20

0

50

40

30

20

10

0

V

= 5V

BAT = 3.8V

BUS

BUCK REGULATORS OFF

BUS

BAT = 3.8V

V

= 0V

I

LDO3V3

5mA/DIV

0mA

V

LDO3V3

20mV/DIV

AC COUPLED

3567 G20

V

BAT

= 3.8V

20μs/DIV

0

1

2

3

4

5

–40

–15

10

35

60

85

CHRG PIN VOLTAGE (V)

TEMPERATURE (°C)

3567 G19

3567 G21

R_DS(ON)for Buck-Boost Regulator

Power Switches vs Temperature

Buck-Boost Regulator Current

Limit vs Temperature

Buck-Boost Regulator Burst Mode

Operation Quiescent Current

0.30

0.25

0.40

0.35

14.0

13.5

2600

2550

V

OUT1

= 3.3V

V

IN1

= 3V

PMOS V = 3V

IN1

PMOS V = 3.6V

IN1

V

IN1

= 4.5V

PMOS V = 4.5V

IN1

V

= 3.6V

= 4.5V

IN1

0.20

0.30

13.0

2500

V

= 3V

IN1

V

IN1

NMOS V = 3V

IN1

0.15

0.10

0.25

0.20

12.5

12.0

2450

2400

NMOS V = 3.6V

V

IN1

= 3.6V

IN1

NMOS V = 4.5V

IN1

0.05

0

0.15

0.10

11.5

11.0

2350

2300

–55 –35 –15

5

25 45 65 85 105 125

–55 –35 –15

5

25 45 65 85 105 125

–55 –35 –15

5

25 45 65 85 105 125

TEMPERATURE (°C)

3567 G22

3567 G24

3567 G23

3567f

8

LTC3567

T_A= 25°C unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

Buck-Boost Regulator PWM Mode

Efﬁciency

Buck-Boost Regulator PWM

Efﬁciency vs V_IN1

Buck-Boost Regulator vs I_LOAD

BURST MODE OPERATION

CURVES

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

BURST MODE

OPERATION

CURVES

PWM MODE

CURVES

PWM MODE

CURVES

V

= 3V

= 3.6V

= 4.5V

I

= 50mA

IN1

LOAD

V

= 3V

= 3.6V

= 4.5V

IN1

= 200mA

V

= 3V

= 3.6V

= 4.5V

IN1

= 1000mA

V

= 3V

= 3.6V

= 4.5V

IN1

V

OUT1

= 3.3V

V

OUT1

= 3.3V

V

OUT1

= 5V

TYPE 3 COMPENSATION

10 100 1000

(mA)

TYPE 3 COMPENSATION

2.7

3.5

3.1 3.9

(V)

TYPE 3 COMPENSATION

10 100 1000

(mA)

0.1

1

4.3

4.7

0.1

1

I

LOAD

V

IN1

LOAD

3567 G25

3567 G27

3567 G26

Buck-Boost Regulator Load

Regulation

Reduction in Current

Deliverability at Low V_IN1

Buck-Boost Regulator Load Step,

0mA to 300mA

3.333

3.322

3.311

3.300

3.289

3.278

3.267

300

250

V

= 3V

= 3.6V

= 4.5V

STEADY STATE I

START-UP WITH A

RESISTIVE LOAD

START-UP WITH A

CURRENT SOURCE LOAD

IN1

LOAD

V

IN1

CH1 V

OUT1

AC 100mV/DIV

200

150

CH2 I

LOAD

100

50

0

DC 200mA/DIV

3567 G30

V

= 4.2V

100μs/DIV

IN1

OUT1

V

OUT1

= 3.3V

V

= 3.3V

OUT1

= 3.3V

TYPE 3 COMPENSATION

3.9 4.3 4.7

(V)

TYPE 3 COMPENSATION

L = 2.2μH

= 47μF

C

OUT

1

10

100

1A

2.7

3.1

3.5

V

IN1

I

(mA)

LOAD

3567 G28

3567 G29

PIN FUNCTIONS

LDO3V3 (Pin 1): 3.3V LDO Output Pin. This pin provides

when the synchronous switch of the PowerPath switching

regulator is on. The switching regulator delivers power

a regulated always-on, 3.3V supply voltage. LDO3V3

gets its power from V . It may be used for light loads

until the CLPROG pin reaches 1.188V. Several V

cur-

OUT

BUS

such as a watchdog microprocessor or real time clock.

A 1μF capacitor is required from LDO3V3 to ground. If

the LDO3V3 output is not used it should be disabled by

rent limit settings are available via user input which will

typically correspond to the 500mA and the 100mA USB

speciﬁcations. A multilayer ceramic averaging capacitor

or R-C network is required at CLPROG for ﬁltering.

connecting it to V

.

OUT

CLPROG (Pin 2): USB Current Limit Program and Moni-

NTC (Pin 3): Input to the Thermistor Monitoring Circuits.

The NTC pin connects to a battery’s thermistor to deter-

mine if the battery is too hot or too cold to charge. If the

tor Pin. A resistor from CLPROG to ground determines

the upper limit of the current drawn from the V

pin.

BUS

A fraction of the V

current is sent to the CLPROG pin

battery’s temperature is out of range, charging is paused

BUS

3567f

9

LTC3567

PIN FUNCTIONS

until it re-enters the valid range. A low drift bias resistor

CHRG (Pin 16): Open-Drain Charge Status Output. The

CHRG pin indicates the status of the battery charger. Four

possible states are represented by CHRG: charging, not

charging, unresponsive battery and battery temperature

out of range. CHRG is modulated at 35kHz and switches

between a low and high duty cycle for easy recognition

by either humans or microprocessors. See Table 1. CHRG

requires a pull-up resistor and/or LED to provide indica-

tion.

is required from V

to NTC and a thermistor is required

BUS

from NTC to ground. If the NTC function is not desired,

the NTC pin should be grounded.

FB1(Pin4):FeedbackInputforthe(Buck-Boost)Switching

Regulator. When the regulator’s control loop is complete,

this pin servos to 1 of 16 possible set-points based on the

2

commanded value from the I C serial port. See Table 4.

V

(Pin 5): Output of the Error Ampliﬁer and Voltage

C1

GND (Pin 17): GND pin for USB Power Manager.

Compensation Node for the (Buck-Boost) Switching

Regulator. External Type I or Type III compensation (to

FB1) connects to this pin. See Applications Section for

selecting buck-boost loop compensation components.

GATE (Pin 18): Analog Output. This pin controls the gate

of an optional external P-channel MOSFET transistor used

to supplement the ideal diode between V

and BAT. The

OUT

external ideal diode operates in parallel with the internal

ideal diode. The source of the P-channel MOSFET should

GND (Pin 6, 12): Power GND Pins for the buck-boost.

SWAB1(Pin7):SwitchNodeforthe(Buck-Boost)Switch-

ing Regulator. Connected to internal power switches A

and B. External inductor connects between this node and

SWCD1.

be connected to V

and the drain should be connected

OUT

to BAT. If the external ideal diode FET is not used, GATE

should be left ﬂoating.

BAT (Pin 19): Single Cell Li-Ion Battery Pin. Depending

2

DV (Pin 8): Logic Supply for the I C Serial Port.

on available V

power, a Li-Ion battery on BAT will ei-

CC

BUS

ther deliver power to V

through the ideal diode or be

OUT

V

(Pin 9): Power Input for the (Buck-Boost) Switching

IN1

charged from V

via the battery charger.

OUT

Regulator. This pin will generally be connected to V

OUT

(Pin 20). A 1μF (min) MLCC capacitor is recommended

on this pin.

V

(Pin 20): Output Voltage of the Switching Power-

OUT

Path Controller and Input Voltage of the Battery Charger.

The majority of the portable product should be powered

V

(Pin 10): Regulated Output Voltage for the (Buck-

OUT1

from V . The LTC3567 will partition the available power

OUT

Boost) Switching Regulator.

between the external load on V

and the internal battery

OUT

SWCD1 (Pin 11): Switch Node for the (Buck-Boost)

SwitchingRegulator.Connectedtointernalpowerswitches

C and D. External inductor connects between this node

and SWAB1.

charger. Priority is given to the external load and any extra

power is used to charge the battery. An ideal diode from

BAT to V

ensures that V

is powered even if the load

OUT

exceeds the allotted power from V

or if the V

power

BUS

2

source is removed. V

should be bypassed with a low

SCL (Pin 13): Clock Input Pin for the I C Serial Port. The

OUT

2

impedance ceramic capacitor.

I C logic levels are scaled with respect to DV .

CC

2

V

(Pin 21): Primary Input Power Pin. This pin delivers

SDA (Pin 14): Data Input Pin for the I C Serial Port. The

BUS

2

powertoV viatheSWpinbydrawingcontrolledcurrent

I C logic levels are scaled with respect to DV .

OUT

CC

from a DC source such as a USB port or wall adapter.

PROG (Pin 15): Charge Current Program and Charge

Current Monitor Pin. Connecting a resistor from PROG

to ground programs the charge current. If sufﬁcient in-

put power is available in constant-current mode, this pin

servos to 1V. The voltage on this pin always represents

the actual charge current.

SW (Pin 22): Power Transmission Pin for the USB Pow-

erPath. The SW pin delivers power from V

to V

BUS

OUT

via the step-down switching regulator. A 3.3μH inductor

should be connected from SW to V

.

OUT

3567f

10

LTC3567

PIN FUNCTIONS

2

CHRGEN (Pin 23): Logic Input. This logic input pin in-

dependently enables the battery charger. Active low. Has a

1.6μAinternalpull-downcurrentsource.Thispinislogically

pin is logically ORed with its corresponding bit in the I C

serial port.

ExposedPad(Pin25):Ground.Buck-BoostlogicandUSB

power manager ground connections. The Exposed Pad

should be connected to a continuous ground plane on the

printed circuit board directly under the LTC3567.

2

ORed with its corresponding bit in the I C serial port.

EN1 (Pin 24): Logic Input. This logic input pin indepen-

dently enables the buck-boost switching regulator. Active

high. Has a 1.6μA internal pull-down current source. This

BLOCK DIAGRAM

V

BUS

21

SW

2.25MHz PowerPath

BUCK REGULATOR

22

1

LDO3V3

3.3V LDO

V

OUT

SUSPEND LDO

500μA/2.5mA

20

18

+

CLPROG

NTC

–

GATE

2

3

IDEAL

+

BATTERY

TEMPERATURE

MONITOR

–

CC/CV

CHARGER

+

15mV

CHRG

BAT

16

1.2V

19

15

3.6V

+–

CHARGE

STATUS

PROG

0.3V

CHRGEN

V

IN1

9

7

ENABLE

MODE

SWAB1

ILIM

DECODE

LOGIC

D/A

V

OUT1

10

11

CHRGEN

4

1A, 2.25MHz

BUCK-BOOST

REGULATOR

23

24

8

SWCD1

EN1

DV

CC

FB1

SDA

SCL

2

I C PORT

4

5

14

13

V

C1

GND

3567 BD

6, 12, 17, 25

3567f

11

LTC3567

TIMING DIAGRAM

DATA BYTE A

DATA BYTE B

ADDRESS

WR

0

1

0

1

A7

1

A6

2

A5

3

A4

A3

A2

6

A1

7

A0

8

B7

1

B6

2

B5

3

B4

B3

B2

6

B1

7

B0

8

START

STOP

SDA

SCL

0

1

0

8

ACK

9

ACK

9

ACK

9

1

2

3

4

5

6

7

4

5

4

5

SDA

t

BUF

SU, DAT

SU, STA

t

LOW

HD, STA

SU, STO

HD, DAT

3567 TD

SCL

t

SP

HD, STA

HIGH

START

CONDITION

REPEATED START

CONDITION

STOP

CONDITION

START

CONDITION

t

r

t

f

OPERATION

Introduction

The LTC3567 also has a general purpose buck-boost

switching regulator, which can be independently enabled

The LTC3567 is a highly integrated power management IC

which includes a high efﬁciency switch mode PowerPath

controller, a battery charger, an ideal diode, an always-on

LDO and a 1A buck-boost switching regulator. The entire

2

via direct digital control or the I C serial port. Along with

constant frequency PWM mode, the buck-boost regulator

has a low power burst-only mode setting for signiﬁcantly

reduced quiescent current under light load conditions.

2

chip is controllable via an I C serial port.

DesignedspeciﬁcallyforUSBapplications,thePowerPath

controller incorporates a precision average input current

step-down switching regulator to make maximum use of

the allowable USB power. Because power is conserved,

High Efﬁciency Switching PowerPath Controller

Whenever V

is available and the PowerPath switching

BUS

regulator is enabled, power is delivered from V

to V

BUS

OUT

via SW. V

drives both the external load (including the

OUT

the LTC3567 allows the load current on V

to exceed

OUT

buck-boost regulator) and the battery charger.

the current drawn by the USB port without exceeding the

USB load speciﬁcations.

If the combined load does not exceed the PowerPath

switchingregulator’sprogrammedinputcurrentlimit,V

will track 0.3V above the battery (Bat-Track). By keeping

the voltage across the battery charger low, efﬁciency is

optimized because power lost to the linear battery char-

ger is minimized. Power available to the external load is

therefore optimized.

OUT

The PowerPath switching regulator and battery charger

communicate to ensure that the input current never vio-

lates the USB speciﬁcations.

The ideal diode from BAT to V

power is always available to V

guarantees that ample

even if there is insufﬁ-

OUT

.

cient or absent power at V

BUS

If the combined load at V

is large enough to cause the

OUT

An “always-on” LDO provides a regulated 3.3V from avail-

switching power supply to reach the programmed input

current limit, the battery charger will reduce its charge

current by the amount necessary to enable the external

load to be satisﬁed. Even if the battery charge current is

able power at V . Drawing very little quiescent current,

OUT

this LDO will be on at all times and can be used to supply

up to 25mA.

3567f

12

LTC3567

OPERATION

settoexceedtheallowableUSBcurrent,theUSBspeciﬁca-

tion will not be violated. The switching regulator will limit

the average input current so that the USB speciﬁcation

is never violated. Furthermore, load current at V

always be prioritized and only remaining available power

will be used to charge the battery.

4.5

4.2

3.9

3.6

3.3

3.0

2.7

2.4

will

OUT

NO LOAD

300mV

If the voltage at BAT is below 3.3V, or the battery is not

presentandtheloadrequirementdoesnotcausetheswitch-

ing regulator to exceed the USB speciﬁcation, V

will

OUT

regulateat3.6V,therebyproviding“Instant-On”operation.

If the load exceeds the available power, V will drop to

3.6

4.2

2.4

2.7

3.0

3.3

3.9

BAT (V)

OUT

3567 F01

a voltage between 3.6V and the battery voltage. If there

is no battery present when the load exceeds the available

Figure 1. V_OUTvs BAT

USB power, V

can drop toward ground.

OUT

Ideal Diode from BAT to V

OUT

The power delivered from V

to V

is controlled

OUT

BUS

The LTC3567 has an internal ideal diode as well as a con-

troller for an optional external ideal diode. The ideal diode

controller is always on and will respond quickly whenever

by a 2.25MHz constant-frequency step-down switching

regulator. To meet the USB maximum load speciﬁcation,

the switching regulator includes a control loop which

ensures that the average input current is below the level

programmed at CLPROG.

V

drops below BAT.

OUT

2200

VISHAY Si2333

OPTIONAL EXTERNAL

IDEAL DIODE

2000

1800

1600

1400

1200

1000

800

–1

ThecurrentatCLPROGisafraction(h

)oftheV

BUS

CLPROG

current. When a programming resistor and an averaging

capacitorareconnectedfromCLPROGtoGND,thevoltage

on CLPROG represents the average input current of the

switching regulator. When the input current approaches

LTC3567

IDEAL DIODE

the programmed limit, CLPROG reaches V

, 1.188V

CLPROG

600

ON

and power out is held constant. The input current is pro-

SEMICONDUCTOR

MBRM120LT3

400

2

grammed by the B1 and B0 bits of the I C serial port. It

200

can be conﬁgured to limit average input current to one of

several possible settings as well as be deactivated (USB

0

120 180 240 300 360 420 480

60

FORWARD VOLTAGE (mV) (BAT – V

)

OUT

suspend).TheinputcurrentlimitwillbesetbytheV

CLPROG

3567 F02

servo voltage and the resistor on CLPROG according to

the following expression:

Figure 2. Ideal Diode Operation

If the load current increases beyond the power allowed

fromtheswitchingregulator,additionalpowerwillbepulled

from the battery via the internal ideal diode. Furthermore,

V_CLPROG

R_CLPROG

I

_VBUS=I_BUSQ

+

•(h_CLPROG+1)

if power to V

(USB or wall power) is removed, then all

BUS

Figure 1 shows the range of possible voltages at V

a function of battery voltage.

as

OUT

of the application power will be provided by the battery via

the ideal diode. The transition from input power to battery

power at V

will be quick enough to allow only the 10μF

OUT

capacitor to keep V

from drooping. The ideal diode

OUT

consists of a precision ampliﬁer that enables a large on-

3567f

13

LTC3567

OPERATION

chipP-channelMOSFETtransistorwheneverthevoltageat

not exceed the 500μA low power suspend speciﬁcation.

If the load on V exceeds the suspend current limit,

V

is approximately 15mV (V ) below the voltage at

OUT

FWD

OUT

BAT. The resistance of the internal ideal diode is approxi-

mately180mΩ. Ifthisissufﬁcientfortheapplication, then

no external components are necessary. However, if more

conductance is needed, an external P-channel MOSFET

the additional current will come from the battery via the

ideal diode.

3.3V Always-On Supply

transistor can be added from BAT to V

.

OUT

TheLTC3567includesalowquiescentcurrentlowdrop-out

regulator that is always powered. This LDO can be used to

provide power to a system pushbutton controller, standby

microcontroller or real time clock. Designed to deliver up

to 25mA, the always-on LDO requires at least a 1μF low

impedance ceramic bypass capacitor for compensation.

WhenanexternalP-channelMOSFETtransistorispresent,

the GATE pin of the LTC3567 drives its gate for automatic

ideal diode control. The source of the external P-chan-

nel MOSFET should be connected to V

and the drain

OUT

should be connected to BAT. Capable of driving a 1nF load,

the GATE pin can control an external P-channel MOSFET

transistor having an on-resistance of 40mΩ or lower.

The LDO is powered from V , and therefore will enter

OUT

dropout at loads less than 25mA as V

falls near 3.3V.

OUT

If the LDO3V3 output is not used, it should be disabled

by connecting it to V

Suspend LDO

.

OUT

If the LTC3567 is conﬁgured for USB suspend mode, the

switching regulator is disabled and the suspend LDO

V

Undervoltage Lockout (UVLO)

BUS

AninternalundervoltagelockoutcircuitmonitorsV and

provides power to the V

pin (presuming there is power

BUS

OUT

keeps the PowerPath switching regulator off until V

available to V ). This LDO will prevent the battery from

BUS

rises above 4.30V and is at least 200mV above the battery

running down when the portable product has access to

a suspended USB port. Regulating at 4.6V, this LDO only

becomes active when the switching converter is disabled

(suspended). ToremaincompliantwiththeUSBspeciﬁca-

tion, the input to the LDO is current limited so that it will

voltage. Hysteresis on the UVLO turns off the regulator if

V

drops below 4.00V or to within 50mV of BAT. When

BUS

this happens, system power at V

the battery via the ideal diode.

will be drawn from

OUT

3.5V TO

TO USB

OR WALL

ADAPTER

V

BUS

SW

22

21

(BAT + 0.3V)

TO SYSTEM

LOAD

I

/N

SWITCH

V

OUT

PWM AND

GATE DRIVE

20

18

IDEAL

DIODE

OPTIONAL

EXTERNAL

IDEAL DIODE

PMOS

CONSTANT CURRENT

CONSTANT VOLTAGE

BATTERY CHARGER

+

–

GATE

BAT

–

+

15mV

–

+

–

+

0.3V

CLPROG

1.206V

2

+

19

–

3.6V

AVERAGE INPUT

CURRENT LIMIT

CONTROLLER

AVERAGE OUTPUT

VOLTAGE LIMIT

CONTROLLER

+

SINGLE CELL

Li-Ion

3567 F03

Figure 3. PowerPath Block Diagram

3567f

14

LTC3567

OPERATION

Battery Charger

the battery is always topped off, a charge cycle will auto-

matically begin when the battery voltage falls below 4.1V.

In the event that the safety timer is running when the

battery voltage falls below 4.1V, it will reset back to zero.

To prevent brief excursions below 4.1V from resetting the

safety timer, the battery voltage must be below 4.1V for

more than 1.3ms. The charge cycle and safety timer will

The LTC3567 includes a constant-current/constant-volt-

age battery charger with automatic recharge, automatic

termination by safety timer, low voltage trickle charging,

bad cell detection and thermistor sensor input for out-of-

temperature charge pausing.

also restart if the V

UVLO cycles low and then high

BUS

Battery Preconditioning

(e.g. V , is removed and then replaced), or if the battery

BUS

2

When a battery charge cycle begins, the battery charger

ﬁrst determines if the battery is deeply discharged. If the

batteryvoltageisbelowV

charger is cycled on and off by either the I C port or the

CHRGEN digital I/O pin.

,typically2.85V,anautomatic

TRKL

trickle charge feature sets the battery charge current to

10% of the programmed value. If the low voltage persists

for more than 1/2 hour, the battery charger automatically

terminates and indicates via the CHRG pin that the battery

was unresponsive.

Charge Current

The charge current is programmed using a single resis-

tor from PROG to ground. 1/1022 of the battery charge

current is sent to PROG which will attempt to servo to

1.000V. Thus, the battery charge current will try to reach

1022 times the current in the PROG pin. The program

resistor and the charge current are calculated using the

following equations:

th

Oncethebatteryvoltageisabove2.85V,thebatterycharger

begins charging in full power constant-current mode. The

current delivered to the battery will try to reach 1022V/

R . Depending on available input power and external

PROG

1022V

I_CHG

1022V

R_PROG

load conditions, the battery charger may or may not be

able to charge at the full programmed rate. The external

load will always be prioritized over the battery charge

current. The USB current limit programming will always

be observed and only additional power will be available to

charge the battery. When system loads are light, battery

charge current will be maximized.

R_PROG

=

,I_CHG=

Ineithertheconstant-currentorconstant-voltagecharging

modes, the voltage at the PROG pin will be proportional to

the actual charge current delivered to the battery. There-

fore, the actual charge current can be determined at any

time by monitoring the PROG pin voltage and using the

following equation:

Charge Termination

V_PROG

R_PROG

The battery charger has a built-in safety timer. When

the voltage on the battery reaches the pre-programmed

ﬂoat voltage of 4.200V, the battery charger will regulate

the battery voltage and the charge current will decrease

naturally. Once the battery charger detects that the battery

has reached 4.200V, the four hour safety timer is started.

After the safety timer expires, charging of the battery will

discontinue and no more current will be delivered.

I_BAT

=

•1022

In many cases, the actual battery charge current, I , will

BAT

belowerthanI

duetolimitedinputpoweravailableand

CHG

prioritization with the system load drawn from V

.

OUT

Charge Status Indication

The CHRG pin indicates the status of the battery charger.

Four possible states are represented by CHRG which in-

clude charging, not charging, unresponsive battery, and

battery temperature out of range.

Automatic Recharge

After the battery charger terminates, it will remain off

drawing only microamperes of current from the battery.

If the portable product remains in this state long enough,

the battery will eventually self discharge. To ensure that

The signal at the CHRG pin can be easily recognized

as one of the above four states by either a human or a

3567f

15

LTC3567

OPERATION

If a battery is found to be unresponsive to charging (i.e.,

its voltage remains below 2.85V for 1/2 hour), the CHRG

pingivesthebatteryfaultindication.Forthisfault,ahuman

would easily recognize the frantic 6.1Hz “fast” blink of the

LEDwhileamicroprocessorwouldbeabletodecodeeither

the 12.5% or 87.5% duty cycles as a bad battery fault.

microprocessor. An open-drain output, the CHRG pin can

drive an indicator LED through a current limiting resistor

for human interfacing or simply a pull-up resistor for mi-

croprocessor interfacing.

To make the CHRG pin easily recognized by both humans

and microprocessors, the pin is either low for charging,

high for not charging, or it is switched at high frequency

(35kHz) to indicate the two possible faults, unresponsive

battery and battery temperature out of range.

Note that the LTC3567 is a 3-terminal PowerPath prod-

uct where system load is always prioritized over battery

charging. Due to excessive system load, there may not be

sufﬁcient power to charge the battery beyond the trickle

charge threshold voltage within the bad battery timeout

period. Inthiscase, thebatterychargerwillfalselyindicate

a bad battery. System software may then reduce the load

and reset the battery charger to try again.

When charging begins, CHRG is pulled low and remains

low for the duration of a normal charge cycle. When

charging is complete, i.e., the BAT pin reaches 4.200V

and the charge current has dropped to one-tenth of the

programmed value, the CHRG pin is released (Hi-Z). If a

faultoccurs,thepinisswitchedat35kHz.Whileswitching,

its duty cycle is modulated between a high and low value

at a very low frequency. The low and high duty cycles

are disparate enough to make an LED appear to be on

or off thus giving the appearance of “blinking”. Each of

the two faults has its own unique “blink” rate for human

recognition as well as two unique duty cycles for machine

recognition.

Although very improbable, it is possible that a duty cycle

reading could be taken at the bright-dim transition (low

duty cycle to high duty cycle). When this happens the

duty cycle reading will be precisely 50%. If the duty cycle

reading is 50%, system software should disqualify it and

take a new duty cycle reading.

NTC Thermistor

The battery temperature is measured by placing a nega-

tive temperature coefﬁcient (NTC) thermistor close to the

battery pack.

The CHRG pin does not respond to the C/10 threshold if

the LTC3567 is in V

current limit. This prevents false

BUS

end of charge indications due to insufﬁcient power avail-

able to the battery charger.

To use this feature, connect the NTC thermistor, R , be-

NTC

tween the NTC pin and ground and a resistor, R

, from

Table 1 illustrates the four possible states of the CHRG

pin when the battery charger is active.

NOM

V

to the NTC pin. R

should be a 1% resistor with

BUS

NOM

a value equal to the value of the chosen NTC thermistor

at 25°C (R25). A 100k thermistor is recommended since

thermistor current is not measured by the LTC3567 and

will have to be budgeted for USB compliance.

Table 1. CHRG Signal

MODULATION

STATUS

Charging

FREQUENCY (BLINK) FREQUENCY DUTY CYCLES

0Hz

0Hz (Lo-Z)

0Hz (Hi-Z)

100%

0%

The LTC3567 will pause charging when the resistance of

the NTC thermistor drops to 0.54 times the value of R25

or approximately 54k. For Vishay “Curve 1” thermistor,

this corresponds to approximately 40°C. If the battery

charger is in constant-voltage (ﬂoat) mode, the safety

timer also pauses until the thermistor indicates a return

to a valid temperature. As the temperature drops, the

resistance of the NTC thermistor rises. The LTC3567 is

also designed to pause charging when the value of the

NTC thermistor increases to 3.25 times the value of R25.

Not Charging

NTC Fault

35kHz

1.5Hz AT 50%

6.1Hz AT 50%

6.25%, 93.75%

12.5%, 87.5%

Bad Battery

An NTC fault is represented by a 35kHz pulse train whose

duty cycle alternates between 6.25% and 93.75% at a

1.5Hz rate. A human will easily recognize the 1.5Hz rate

as a “slow” blinking which indicates the out-of-range

battery temperature while a microprocessor will be able

to decode either the 6.25% or 93.75% duty cycles as an

NTC fault.

For Vishay “Curve 1” this resistance, 325k, corresponds

3567f

16

LTC3567

OPERATION

to approximately 0°C. The hot and cold comparators each

haveapproximately3°Cofhysteresistopreventoscillation

about the trip point. Grounding the NTC pin disables the

NTC charge pausing function.

Start and Stop Condition

A bus master signals the beginning of a communication

to a slave device by transmitting a Start condition. A Start

condition is generated by transitioning SDA from high

to low while SCL is high. When the master has ﬁnished

communicating with the slave, it issues a Stop condition

by transitioning SDA from low to high while SCL is high.

Thermal Regulation

To optimize charging time, an internal thermal feedback

loop may automatically decrease the programmed charge

current. This will occur if the die temperature rises to

approximately 110°C. Thermal regulation protects the

LTC3567 from excessive temperature due to high power

operation or high ambient thermal conditions and allows

the user to push the limits of the power handling capability

with a given circuit board design without risk of damag-

ing the LTC3567 or external components. The beneﬁt

of the LTC3567 thermal regulation loop is that charge

current can be set according to actual conditions rather

than worst-case conditions with the assurance that the

battery charger will automatically reduce the current in

worst-case conditions.

2

The bus is then free for communication with another I C

device.

Byte Format

Each byte sent to the LTC3567 must be eight bits long

followed by an extra clock cycle for the Acknowledge bit

to be returned by the LTC3567. The data should be sent

to the LTC3567 most signiﬁcant bit (MSB) ﬁrst.

Acknowledge

The Acknowledge signal is used for handshaking be-

tween the master and the slave. An Acknowledge (active

low) generated by the slave (LTC3567) lets the master

know that the latest byte of information was received.

The Acknowledge related clock pulse is generated by the

master. The master releases the SDA line (high) during

the Acknowledge clock cycle. The slave receiver must pull

down the SDA line during the Acknowledge clock pulse

so that it remains a stable low during the high period of

this clock pulse.

2

I C Interface

The LTC3567 may receive commands from a host (mas-

ter) using the standard I C 2-wire interface. The Timing

2

Diagram shows the timing relationship of the signals on

the bus. The two bus lines, SDA and SCL, must be high

when the bus is not in use. External pull-up resistors or

2

current sources, such as the LTC1694 I C accelerator, are

required on these lines. The LTC3567 is a receive-only

Slave Address

2

(slave) device. The I C control signals, SDA and SCL are

The LTC3567 responds to only one 7-bit address which

has been factory programmed to 0001001. The LSB of the

address byte is 1 for Read and 0 for Write. This device is

write only corresponding to an address byte of 00010010

(0x12). If the correct seven bit address is given but the

R/W bit is 1, the LTC3567 will not respond.

scaled internally to the DV supply. DV should be con-

CC

nected to the same power supply as the microcontroller

2

generating the I C signals.

2

The I C port has an undervoltage lockout on the DV pin.

CC

2

When the DV is below approximately 1V, the I C serial

CC

port is cleared and the buck-boost switching regulator is

set to full scale.

Bus Write Operation

The master initiates communication with the LTC3567

with a Start condition and a 7-bit address followed by

the Write Bit R/W = 0. If the address matches that of the

LTC3567,theLTC3567returnsanAcknowledge.Themaster

should then deliver the most signiﬁcant data byte. Again

the LTC3567 acknowledges and the cycle is repeated for

3567f

Bus Speed

2

The I C port is designed to be operated at speeds of up

to 400kHz. It has built-in timing delays to ensure correct

2

operation when addressed from an I C compliant master

device. It also contains input ﬁlters designed to suppress

glitches should the bus become corrupted.

17

LTC3567

OPERATION

Table 2. I²C Serial Port Mapping (Defaults 0xFF00 in Reset State or if DV_CC= 0V)

A7

A6

A5

A4

A3

Switching Regulator

Voltage (See Table 4)

A2

A1

A0

B7

B6

B5

B4

B3

B2

B1

B0

Reserved for Internal

Use

Disable

Battery

Charger

Buck-Boost

Regulator

Mode (See

Table 5)

Reserved for Internal

Use

Enable

Buck-Boost

Regulator

Input Current Limit

(See Table 3)

Table 3. USB Current Limit Settings

the communication with a Stop condition. Alternatively, a

Repeat-Start condition can be initiated by the master and

B1

0

B0

0

USB SETTING

2

1x Mode (USB 100mA Limit)

10x Mode (Wall 1A Limit)

Suspend

another chip on the I C bus can be addressed. This cycle

can continue indeﬁnitely and the LTC3567 will remember

thelastinputofvaliddatathatitreceived. Onceallchipson

the bus have been addressed and sent valid data, a global

Stop condition can be sent and the LTC3567 will update its

command latch with the data that it had received.

0

1

0

1

5x Mode (USB 500mA Limit)

Table 4. Buck-Boost Regulator Servo Voltage

SWITCHING REGULATOR

SERVO VOLTAGE

2

In certain circumstances the data on the I C bus may

A3

0

1

A2

0

1

0

1

A1

0

1

0

1

0

1

0

1

A0

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

become corrupted. In these cases the LTC3567 responds

appropriately by preserving only the last set of complete

datathatithasreceived.Forexample,assumetheLTC3567

has been successfully addressed and is receiving data

when a Stop condition mistakenly occurs. The LTC3567

will ignore this Stop condition and will not respond until

a new Start condition, correct address, new set of data

and Stop condition are transmitted.

0.425V

0.450V

0.475V

0.500V

0.525V

0.550V

0.575V

0.600V

0.625V

0.650V

0.675V

0.700V

0.725V

0.750V

0.775V

0.800V

Likewise, with only one exception, if the LTC3567 was

previously addressed and sent valid data but not updated

with a Stop, it will respond to any Stop that appears on

the bus, independent of the number of Repeat-Starts that

have occurred. If a Repeat-Start is given and the LTC3567

successfully acknowledges its address and ﬁrst byte, it

will not respond to a Stop until both bytes of the new data

have been received and acknowledged.

2

Disabling the I C Port

Table 5. Buck-Boost Switching Regulator Modes

2

B6

0

SWITCHING REGULATOR MODE

PWM Mode

The I C serial port can be disabled by grounding the DV

CC

pin. In this mode, control automatically passes to the

1

Burst Mode Operation

individual logic input pins EN1 and CHRGEN. However,

2

with the I C port disabled, the programmable buck-boost

the total of one address byte and two data bytes. Each

data byte is transferred to an internal holding latch upon

the return of an Acknowledge. After both data bytes have

beentransferredtotheLTC3567,themastermayterminate

switchingregulatordefaultstoaﬁxedservovoltageof0.8V

in PWM mode, and the USB input current limit defaults to

1x mode (100mA limit). By default the battery charger will

be enabled and the buck-boost will be disabled.

3567f

18

LTC3567

OPERATION

Buck-Boost DC/DC Switching Regulator

Buck-Boost Regulator PWM Operating Mode

TheLTC3567containsa2.25MHzconstant-frequencyvolt-

age mode buck-boost switching regulator. The regulator

provides up to 1A of output load current. The buck-boost

canbeprogrammedtoaminimumoutputvoltageof2.75V

and can be used to power a microcontroller core, micro-

controller I/O, memory, disk drive, or other logic circuitry.

In PWM mode the voltage seen at FB1 is compared to the

selected reference voltage (0.425V to 0.8V). From the FB1

voltage an error ampliﬁer generates an error signal seen

at V . This error signal commands PWM waveforms

C1

that modulate switches A, B, C, and D. Switches A and B

operate synchronously as do switches C and D. If V is

IN1

, thenthe

2

WhencontrolledbyI C,thebuck-boosthasprogrammable

signiﬁcantlygreaterthantheprogrammedV

OUT1

set-pointsforon-the-ﬂypowersavings. Tosuitavarietyof

applications, aselectablemodefunctionallowstheuserto

trade off noise for efﬁciency. Two modes are available to

control the operation of the LTC3567’s buck-boost regula-

tor. At moderate to heavy loads, the constant frequency

PWMmodeprovidestheleastnoiseswitchingsolution. At

lighter loads Burst Mode operation may be selected. The

full-scaleoutputvoltageisprogrammedbyauser-supplied

resistive divider returned to the FB1 pin. An error ampliﬁer

compares the divided output voltage with a reference and

adjuststhecompensationvoltageaccordinglyuntiltheFB1

has stabilized to the selected reference voltage (0.425V to

0.8V).Thebuck-boostregulatoralsoincludesasoft-startto

limit inrush current and voltage overshoot when powering

on, short circuit current protection, and switch node slew

limiting circuitry for reduced radiated EMI.

converterwilloperateinbuckmode.Inthismodeswitches

A and B will be modulated, with switch D always on (and

switch C always off), to step down the input voltage to the

programmed output. If V is signiﬁcantly less than the

IN1

programmedV

,thentheconverterwilloperateinboost

OUT1

mode. In this mode switches C and D are modulated, with

switch A always on (and switch B always off), to step up

theinputvoltagetotheprogrammedoutput.IfV isclose

IN1

to the programmed V

, then the converter will operate

OUT1

in 4-switch mode. In this mode the switches sequence

through the pattern of AD, AC, BD to either step the input

voltage up or down to the programmed output.

Buck-Boost Regulator Burst-Mode Operation

In Burst Mode operation, the buck-boost regulator uses

a hysteretic FB1 voltage algorithm to control the output

voltage. By limiting FET switching and using a hysteretic

control loop, switching losses are greatly reduced. In this

mode output current is limited to 50mA typical. While

operating in Burst Mode operation, the output capacitor

is charged to a voltage slightly higher than the regulation

point. The buck-boost converter then goes into a sleep

state, during which the output capacitor provides the

load current. The output capacitor is charged by charg-

ing the inductor until the input current reaches 275mA

typical and then discharging the inductor until the reverse

current reaches 0mA typical. This process is repeated

until the feedback voltage has charged to 6mV above the

regulation point. In the sleep state, most of the regulator’s

circuitry is powered down, helping to conserve battery

power. When the feedback voltage drops 6mV below the

regulation point, the switching regulator circuitry is pow-

ered on and another burst cycle begins. The duration for

which the regulator sleeps depends on the load current

and output capacitor value. The sleep time decreases as

Input Current Limit

The input current limit comparator will shut the input

PMOS switch off once current exceeds 2.5A (typical). The

2.5A input current limit also protects against a grounded

V

node.

OUT1

Output Overvoltage Protection

If the FB1 node were inadvertently shorted to ground, then

the output would increase indeﬁnitely with the maximum

current that could be sourced from V . The LTC3567

IN1

protects against this by shutting off the input PMOS if

the output voltage exceeds a 5.6V (typical).

Low Output Voltage Operation

When the output voltage is below 2.65V (typical) during

start-up, Burst Mode operation is disabled and switch D

is turned off (allowing forward current through the well

diode and limiting reverse current to 0mA).

the load current increases. The maximum load current in

3567f

19

LTC3567

OPERATION

Burst Mode operation is 50mA. The buck-boost regulator

will not go to sleep if the current is greater than 50mA,

and if the load current increases beyond this point while

in Burst Mode operation the output will lose regulation.

Burst Mode operation provides a signiﬁcant improvement

in efﬁciency at light loads at the expense of higher output

ripple when compared to PWM mode. For many noise-

sensitive systems, Burst Mode operation might be unde-

sirable at certain times (i.e., during a transmit or receive

cycle of a wireless device), but highly desirable at others

(i.e. when the device is in low power standby mode). The

(typical)period.Thislimitstransientinrushcurrentsduring

start-up because the output voltage is always “in regula-

tion.” Ramping the reference voltage input also limits the

rate of increase in the V voltage which helps minimize

C1

output overshoot during start-up. A soft-start cycle oc-

curs whenever the buck-boost is enabled, or after a fault

condition has occurred (thermal shutdown or UVLO). A

soft-start cycle is not triggered by changing operating

modes.Thisallowsseamlessoperationwhentransitioning

between Burst Mode operation and PWM mode.

2

Low Supply Operation

B6 bit of the I C port is used to enable or disable Burst

Mode operation at any time, offering both low noise and

low power operation when they are needed.

The LTC3567 incorporates an undervoltage lockout cir-

cuit on V

(connected to V ) which shuts down the

OUT

IN1

OUT

buck-boost regulator when V

drops below 2.6V. This

Buck-Boost Regulator Soft-Start Operation

UVLO prevents unstable operation.

Soft-start is accomplished by gradually increasing the

reference voltage input to the error ampliﬁer over a 0.5ms

APPLICATIONS INFORMATION

CLPROG Resistor and Capacitor

loop when current limit is reached. To ensure stability, the

capacitor on CLPROG should be 0.1μF or larger.

As described in the High Efﬁciency Switching PowerPath

Controller section, the resistor on the CLPROG pin deter-

mines the average input current limit when the switching

regulator is set to either the 1x mode (USB 100mA), the

5x mode (USB 500mA) or the 10x mode. The input cur-

rent will be comprised of two components, the current

Choosing the PowerPath Inductor

Because the input voltage range and output voltage range

of the PowerPath switching regulator are both fairly nar-

row, the LTC3567 was designed for a speciﬁc inductance

value of 3.3μH. Some inductors which may be suitable

for this application are listed in Table 6.

that is used to drive V

and the quiescent current of the

OUT

switching regulator. To ensure that the USB speciﬁcation

is strictly met, both components of input current should

be considered. The Electrical Characteristics table gives

values for quiescent currents in either setting as well as

current limit programming accuracy. To get as close to

the 500mA or 100mA speciﬁcations as possible, a 1%

Table 6. Recommended Inductors for PowerPath Controller

MAX MAX

INDUCTOR

TYPE

L

I

DCR

(Ω)

SIZE IN mm

(L × W × H) MANUFACTURER

DC

(ꢀH) (A)

LPS4018

3.3 2.2

0.08 3.9 × 3.9 × 1.7 Coilcraft

www.coilcraft.com

resistor should be used. Recall that I

= I

+

VBUS

VBUSQ

D53LC

DB318C

3.3 2.26 0.034 5.0 × 5.0 × 3.0 Toko

3.3 1.55 0.070 3.8 × 3.8 × 1.8 www.toko.com

V

/R

• (h

+ 1).

CLPROG CLPROG

CLPROG

WE-TPC

Type M1

3.3 1.95 0.065 4.8 × 4.8 × 1.8 Würth Elektronik

An averaging capacitor or an R-C combination is required

in parallel with the CLPROG resistor so that the switching

regulator can determine the average input current. This

network also provides the dominant pole for the feedback

www.we-online.com

CDRH6D12 3.3 2.2 0.0625 6.7 × 6.7 × 1.5 Sumida

CDRH6D38 3.3 3.5 0.020 7.0 × 7.0 × 4.0 www.sumida.com

3567f

20

LTC3567

APPLICATIONS INFORMATION

V

and V

Bypass Capacitors

Buck-Boost Regulator Inductor Selection

BUS

OUT

The style and value of capacitors used with the LTC3567

determineseveralimportantparameterssuchasregulator

control-loop stability and input voltage ripple. Because

the LTC3567 uses a step-down switching power supply

Many different sizes and shapes of inductors are avail-

able from numerous manufacturers. Choosing the right

inductor from such a large selection of devices can be

overwhelming, but following a few basic guidelines will

make the selection process much simpler.

from V

to V , its input current waveform contains

BUS

OUT

high frequency components. It is strongly recommended

The buck-boost converter is designed to work with induc-

tors in the range of 1μH to 5μH. For most applications a

2.2μH inductor will sufﬁce. Larger value inductors reduce

ripplecurrentwhichimprovesoutputripplevoltage.Lower

valueinductorsresultinhigherripplecurrentandimproved

transient response time. To maximize efﬁciency, choose

an inductor with a low DC resistance. For a 3.3V output,

efﬁciency is reduced about 3% for a 100mΩ series resis-

tance at 1A load current, and about 2% for 300mΩ series

resistance at 200mA load current. Choose an inductor

with a DC current rating at least two times larger than the

maximumloadcurrenttoensurethattheinductordoesnot

saturate during normal operation. If output short circuit

is a possible condition, the inductor should be rated to

handle the 2.5A maximum peak current speciﬁed for the

buck-boost converter.

that a low equivalent series resistance (ESR) multilayer

ceramic capacitor be used to bypass V . Tantalum and

BUS

aluminum capacitors are not recommended because of

their high ESR. The value of the capacitor on V

directly

BUS

controls the amount of input ripple for a given load cur-

rent. Increasing the size of this capacitor will reduce the

input ripple.

To prevent large V

voltage steps during transient load

OUT

conditions, it is also recommended that a ceramic capaci-

tor be used to bypass V . The output capacitor is used

OUT

in the compensation of the switching regulator. At least

4μF of actual capacitance with low ESR are required on

V

. Additional capacitance will improve load transient

OUT

performance and stability.

Multilayer ceramic chip capacitors typically have excep-

tional ESR performance. MLCCs combined with a tight

board layout and an unbroken ground plane will yield very

good performance and low EMI emissions.

Different core materials and shapes will change the

size/current and price/current relationship of an induc-

tor. Toroid or shielded pot cores in ferrite or Permalloy

materials are small and do not radiate much energy, but

generally cost more than powdered iron core inductors

with similar electrical characteristics. Inductors that are

very thin or have a very small volume typically have much

higher core and DCR losses, and will not give the best ef-

ﬁciency. The choice of which style inductor to use often

depends more on the price vs size, performance and any

radiated EMI requirements than on what the LTC3567

requires to operate.

There are several types of ceramic capacitors available,

each having considerably different characteristics. For

example,X7Rceramiccapacitorshavethebestvoltageand

temperature stability. X5R ceramic capacitors have appar-

ently higher packing density but poorer performance over

their rated voltage and temperature ranges. Y5V ceramic

capacitors have the highest packing density, but must be

used with caution, because of their extreme nonlinear

characteristicofcapacitancevsvoltage.Theactualin-circuit

capacitanceofaceramiccapacitorshouldbemeasuredwith

a small AC signal (ideally less than 200mV) as is expected

in-circuit.Manyvendorsspecifythecapacitancevsvoltage

The inductor value also has an effect on Burst Mode op-

eration. Lower inductor values will cause the Burst Mode

operation switching frequencies to increase.

with a 1V

AC test signal and as a result overstate the

RMS

Table 7 shows several inductors that work well with the

LTC3567’s buck-boost regulator. These inductors offer a

good compromise in current rating, DCR and physical

size. Consult each manufacturer for detailed information

on their entire selection of inductors.

capacitancethatthecapacitorwillpresentintheapplication.

Using similar operating conditions as the application, the

user must measure or request from the vendor the actual

capacitance to determine if the selected capacitor meets

the minimum capacitance that the application requires.

3567f

21

LTC3567

APPLICATIONS INFORMATION

Table 7. Recommended Inductors for Buck-Boost Regulator

In some cases the battery charger may be programmed

(with the PROG pin) to deliver the maximum safe charging

current without regard to the USB speciﬁcations. If there

is insufﬁcient current available to charge the battery at the

programmed rate, the PowerPath regulator will reduce

MAX MAX

DC

(ꢀH) (A)

INDUCTOR

TYPE

L

I

DCR

(Ω)

SIZE IN mm

(L × W × H) MANUFACTURER

LPS4018

3.3

2.2

2.5

0.08 3.9 × 3.9 × 1.7 Coilcraft

0.07 3.9 × 3.9 × 1.7 www.coilcraft.com

charge current until the system load on V

is satisﬁed

OUT

D53LC

2.0 3.25 0.02 5.0 × 5.0 × 3.0 Toko

www.toko.com

and the V

current limit is satisﬁed. Programming the

BUS

7440430022 2.2

2.5 0.028 4.8 × 4.8 × 2.8 Würth-Elektronik

www.we-online.com

battery charger for more current than is available will not

cause the average input current limit to be violated. It will

merelyallowthebatterychargertomakeuseofallavailable

powertochargethebatteryasquicklyaspossible,andwith

minimal power dissipation within the battery charger.

CDRH4D22/ 2.2

HP

2.4 0.044 4.7 × 4.7 × 2.4 Sumida

www.sumida.com

SD14

2.0 2.56 0.045 5.2 × 5.2 × 1.45 Cooper

www.cooper.com

Alternate NTC Thermistors and Biasing

Buck-Boost Regulator Input/Output Capacitor

Selection

The LTC3567 provides temperature qualiﬁed charging if

a grounded thermistor and a bias resistor are connected

to NTC. By using a bias resistor whose value is equal to

the room temperature resistance of the thermistor (R25)

the upper and lower temperatures are pre-programmed

to approximately 40°C and 0°C, respectively (assuming

a Vishay “Curve 1” thermistor).

Low ESR MLCC capacitors should also be used at both

the buck-boost regulator output (V

) and the buck-

OUT1

boost regulator input supply (V ). Only X5R or X7R

IN1

ceramic capacitors should be used because they retain

their capacitance over wider voltage and temperature

ranges than other ceramic types. A 22μF output capaci-

tor is sufﬁcient for most applications. The buck-boost

regulator input supply should be bypassed with a 2.2μF

capacitor. Consult with capacitor manufacturers for de-

tailed information on their selection and speciﬁcations of

ceramic capacitors. Many manufacturers now offer very

thin (<1mm tall) ceramic capacitors ideal for use in height

restricted designs. Table 8 shows a list of several ceramic

capacitor manufacturers.

The upper and lower temperature thresholds can be ad-

justed by either a modiﬁcation of the bias resistor value

or by adding a second adjustment resistor to the circuit.

If only the bias resistor is adjusted, then either the upper

or the lower threshold can be modiﬁed but not both. The

other trip point will be determined by the characteristics

of the thermistor. Using the bias resistor in addition to an

adjustment resistor, both the upper and the lower tem-

perature trip points can be independently programmed

with the constraint that the difference between the upper

and lower temperature thresholds cannot decrease. Ex-

amples of each technique follow.

Table 8. Recommended Ceramic Capacitor Manufacturers

MANUFACTURER

AVX

WEBSITE

www.avxcorp.com

www.murata.com

www.t-yuden.com

www.vishay.com

www.tdk.com

Murata

Taiyo Yuden

Vishay Siliconix

TDK

NTC thermistors have temperature characteristics which

areindicatedonresistance-temperatureconversiontables.

TheVishay-DalethermistorNTHS0603N011-N1003F,used

in the following examples, has a nominal value of 100k

and follows the Vishay “Curve 1” resistance-temperature

characteristic.

Over-Programming the Battery Charger

The USB high power speciﬁcation allows for up to 2.5W to

bedrawnfromtheUSBport(5V×500mA).ThePowerPath

In the explanation below, the following notation is used.

R25 = Value of the thermistor at 25°C

switching regulator transforms the voltage at V

to just

BUS

abovethevoltageatBATwithhighefﬁciency,whilelimiting

power to less than the amount programmed at CLPROG.

R

= Value of thermistor at the cold trip point

NTC|COLD

3567f

22

LTC3567

APPLICATIONS INFORMATION

R

= Value of thermistor at the hot trip point

where r

and r are the resistance ratios at the de-

COLD

NTC|HOT

HOT

sired hot and cold trip points. Note that these equations

are linked. Therefore, only one of the two trip points can

be chosen, the other is determined by the default ratios

designed in the IC. Consider an example where a 60°C

hot trip point is desired.

r

= Ratio of R

to R25

COLD

NTC|COLD

= Ratio of R

to R25

HOT

NTC|HOT

R

= Primary thermistor bias resistor (see Figure 4a)

NOM

R1 = Optional temperature range adjustment resistor

(see Figure 4b)

FromtheVishayCurve1R-Tcharacteristics,r is0.2488

HOT

should be set

, the cold trip point is

at 60°C. Using the above equation, R

NOM

The trip points for the LTC3567’s temperature qualiﬁca-

tion are internally programmed at 0.349 • V

threshold and 0.765 • V

to 46.4k. With this value of R

NOM

for the hot

BUS

about 16°C. Notice that the span is now 44°C rather than

the previous 40°C. This is due to the decrease in “tem-

perature gain” of the thermistor as absolute temperature

increases.

for the cold threshold.

BUS

Therefore, the hot trip point is set when:

R_NTC|HOT

• V_BUS= 0.349 • V_BUS

The upper and lower temperature trip points can be in-

dependently programmed by using an additional bias

resistor as shown in Figure 4b. The following formulas

R

_NOM+R_NTC|HOT

and the cold trip point is set when:

can be used to compute the values of R

and R1:

NOM

R_NTC|COLD

• V_BUS= 0.765• V_BUS

R

_NOM+R_NTC|COLD

r

_COLD−r_HOT

R_NOM

=

•R25

2.714

SolvingtheseequationsforR

in the following:

andR

results

NTC|COLD

NTC|HOT

R1= 0.536 •R_NOM−r_HOT•R25

R

= 0.536•R

For example, to set the trip points to 0°C and 45°C with

a Vishay Curve 1 thermistor choose

NTC|HOT

NOM

and

3.266− 0.4368

R

= 3.25•R

NTC|COLD

NOM

R_NOM

=

•100k =104.2k

2.714

By setting R

equal to R25, the above equations result

NOM

in r

= 0.536 and r

= 3.25. Referencing these ratios

The nearest 1% value is 105k

HOT

COLD

to the Vishay Resistance-Temperature Curve 1 chart gives

a hot trip point of about 40°C and a cold trip point of about

0°C. The difference between the hot and cold trip points

is approximately 40°C.

R1 = 0.536•105k – 0.4368•100k = 12.6k

The nearest 1% value is 12.7k. The ﬁnal solution is shown

in Figure 4b and results in an upper trip point of 45°C and

a lower trip point of 0°C.

By using a bias resistor, R

, different in value from

NOM

R25, the hot and cold trip points can be moved in either

direction.Thetemperaturespanwillchangesomewhatdue

to the nonlinear behavior of the thermistor. The following

equations can be used to easily calculate a new value for

the bias resistor:

USB Inrush Limiting

When a USB cable is plugged into a portable product,

the inductance of the cable and the high-Q ceramic input

capacitor form an L-C resonant circuit. If the cable does

not have adequate mutual coupling or if there is not much

impedance in the cable, it is possible for the voltage at

the input of the product to reach as high as twice the USB

voltage (~10V) before it settles out. To prevent excessive

voltagefromdamagingtheLTC3567duringahotinsertion,

r_HOT

R_NOM

=

•R25

0.536

r_COLD

3.25

3567f

23

LTC3567

APPLICATIONS INFORMATION

LTC3567

V

BUS

V

BUS

LTC3567

NTC BLOCK

V

BUS

V

BUS

NTC BLOCK

0.765 • V

BUS

R

NOM

105k

NOM

100k

–

+

–

+

TOO_COLD

TOO_HOT

TOO_COLD

NTC

3

R1

12.7k

R

NTC

100k

–

+

–

+

TOO_HOT

0.349 • V

BUS

R

NTC

100k

+

–

+

–

NTC_ENABLE

0.017V • V

0.017 • V

BUS

3567 F04b

3567 F04a

(b)

(a)

Figure 4. NTC Circuits

it is best to have a low voltage coefﬁcient capacitor at the

pintotheLTC3567. Thisisachievablebyselectingan

scaleoutputvoltageisprogrammedusingaresistordivider

from the V pin connected to the FB1 pin such that:

V

BUS

OUT1

MLCC capacitor that has a higher voltage rating than that

requiredfortheapplication. Forexample, a16V, X5R, 10μF

capacitor in a 1206 case would be a more conservative

choice than a 6.3V, X5R, 10μF capacitor in a smaller 0805

case. The size of the input overshoot will be determined

ꢀ

ꢃ

R1

V

_OUT1= V_FB1

+1

ꢅ

ꢂ

R

ꢁ

ꢄ

FB

where V ranges from 0.425V to 0.8V (see Figure 6).

FB1

by the “Q” of the resonant tank circuit formed by C and

Closing the Feedback Loop

IN

the input lead inductance. It is recommended to measure

the input ringing with the selected components to verify

compliance with the Absolute Maximum speciﬁcations.

TheLTC3567incorporatesvoltagemodePWMcontrol.The

control to output gain varies with operation region (buck,

boost, buck-boost), but is usually no greater than 20. The

output ﬁlter exhibits a double pole response given by:

Alternatively, the following soft connect circuit (Figure 5)

can be employed. In this circuit, capacitor C1 holds MP1

offwhenthecableisﬁrstconnected. EventuallyC1begins

to charge up to the USB input voltage applying increasing

gate support to MP1. The long time constant of R1 and

C1 prevent the current from building up in the cable too

fast thus dampening out any resonant overshoot.

1

f_{FILTER _POLE}

=

Hz

2• π • L •C_OUT

is the output ﬁlter capacitor.

Where C

OUT

The output ﬁlter zero is given by:

1

MP1

Si2333

f_{FILTER _ ZERO}

=

Hz

V

BUS

2• π •R_ESR•C_OUT

C1

100nF

5V USB

INPUT

C2

10μF

USB CABLE

LTC3567

where R

is the capacitor equivalent series resistance.

R1

40k

ESR

GND

Atroublesomefeatureinboostmodeistheright-halfplane

3567 F05

zero (RHP), and is given by:

Figure 5. USB Soft Connect Circuit

2

V

IN1

f_RHPZ

=

Hz

2• π •I_OUT•L • V_OUT1

Buck-Boost Regulator Output Voltage Programming

The buck-boost regulator can be programmed for output

voltages greater than 2.75V and less than 5.5V. The full-

The loop gain is typically rolled off before the RHP zero

frequency.

3567f

24

LTC3567

APPLICATIONS INFORMATION

A simple Type I compensation network (as shown in

Figure 6) can be incorporated to stabilize the loop but at

the cost of reduced bandwidth and slower transient re-

sponse. To ensure proper phase margin, the loop must

cross unity-gain a decade before the LC double pole.

attempting to cross over after the LC double pole, the

system must still cross over before the boost right-half

plane zero. If unity gain is not reached sufﬁciently before

the right-half plane zero, then the –180° of phase lag from

the LC double pole combined with the –90° of phase lag

from the right-half plane zero will result in negating the

phase bump of the compensator.

V

OUT1

+

–

0.8V

FB1

R1

R

ERROR

AMP

The compensator zeros should be placed either before

or only slightly after the LC double pole such that their

positive phase contributions offset the –180° that occurs

at the ﬁlter double pole. If they are placed at too low of a

frequency, theywillintroducetoomuchgaintothesystem

and the crossover frequency will be too high. The two high

frequency poles should be placed such that the system

crosses unity gain during the phase bump introduced

by the zeros and before the boost right-half plane zero

and such that the compensator bandwidth is less than

the bandwidth of the error amp (typically 900kHz). If the

gain of the compensation network is ever greater than

the gain of the error ampliﬁer, then the error ampliﬁer no

longer acts as an ideal op-amp, and another pole will be

introduced at the same point.

C

P1

V

C1

FB

3567 F06

Figure 6. Error Ampliﬁer with Type I Compensation

The unity-gain frequency of the error ampliﬁer with the

Type I compensation is given by:

1

f_UG

=

Hz

2• π •R1•C_P1

Mostapplicationsdemandanimprovedtransientresponse

toallowasmalleroutputﬁltercapacitor.Toachieveahigher

bandwidth, Type III compensation is required. Two zeros

are required to compensate for the double-pole response.

Type III compensation also reduces any V

seen at start-up.

overshoot

OUT1

Recommended Type III compensation components for a

3.3V output:

The compensation network depicted in Figure 7 yields the

transfer function:

R1: 324kΩ

R : 105kΩ

FB

V_C1

1

(1+ sR2C2) •(1+ s(R1+R3)C3)

=

•

C1: 10pF

R2: 15kΩ

C2: 330pF

R3: 121kΩ

C3: 33pF

sR2C1C2

C1+C2

V_OUT1R1•(C1+C2)

ꢀ

ꢁ

ꢃ

ꢄ

s • 1+

•(1+ sR3C3)

ꢂ

ꢅ

V

OUT1

+

0.8V

FB1

R3

C3

R1

ERROR

AMP

–

C2

R

V

FB

C1

R2

C

: 22μF

OUT

3567 F07

C1

L

: 2.2μH

OUT

Printed Circuit Board Layout Considerations

Figure 7. Error Ampliﬁer with Type III Compensation

In order to be able to deliver maximum current under

all conditions, it is critical that the Exposed Pad on the

backside of the LTC3567 package be soldered to the PC

board ground. Failure to make thermal contact between

A Type III compensation network attempts to introduce

a phase bump at a higher frequency than the LC double

pole. This allows the system to cross unity gain after the

LC double pole, and achieve a higher bandwidth. While

3567f

25

LTC3567

APPLICATIONS INFORMATION

the Exposed Pad on the backside of the package and the

copper board will result in higher thermal resistances.

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the LTC3567.

Furthermore, due to its high frequency switching cir-

cuitry, it is imperative that the input capacitors, induc-

tors, and output capacitors be as close to the LTC3567

as possible and that there be an unbroken ground plane

under the LTC3567 and all of its external high frequency

1. Are the capacitors at V , V , and V

as close

BUS IN1

OUT1

as possible to the LTC3567? These capacitors provide

the AC current to the internal power MOSFETs and their

drivers. Minimizing inductance from these capacitors

to the LTC3567 is a top priority.

components. High frequency currents, such as the V

,

BUS

V

, and V

currents on the LTC3567, tend to ﬁnd

IN1

OUT1

2. Are C

and L1 closely connected? The (-) plate of C

OUT

their way along the ground plane in a myriad of paths

ranging from directly back to a mirror path beneath the

incident path on the top of the board. If there are slits or

cuts in the ground plane due to other traces on that layer,

the current will be forced to go around the slits. If high

frequency currents are not allowed to ﬂow back through

their natural least-area path, excessive voltage will build

up and radiated emissions will occur. There should be a

group of vias under the grounded backside of the pack-

age leading directly down to an internal ground plane. To

minimize parasitic inductance, the ground plane should

be on the second layer of the PC board.

returns current to the GND plane, and then back to C .

IN

3. Keep sensitive components away from the SW pins.

Battery Charger Stability Considerations

The LTC3567’s battery charger contains both a constant-

voltageandaconstant-currentcontrolloop.Theconstant-

voltage loop is stable without any compensation when a

battery is connected with low impedance leads. Excessive

lead length, however, may add enough series inductance

to require a bypass capacitor of at least 1μF from BAT to

GND. Furthermore, when the battery is disconnected, a

4.7μF capacitor in series with a 0.2Ω to 1Ω resistor from

BAT to GND is required to keep ripple voltage low.

High value, low ESR multilayer ceramic chip capacitors

reduce the constant-voltage loop phase margin, possibly

resulting in instability. Ceramic capacitors up to 22μF may

beusedinparallelwithabattery,butlargerceramicsshould

be decoupled with 0.2Ω to 1Ω of series resistance.

3567 F08

In constant-current mode, the PROG pin is in the feed-

back loop rather than the battery voltage. Because of the

additional pole created by any PROG pin capacitance,

capacitance on this pin must be kept to a minimum. With

no additional capacitance on the PROG pin, the battery

charger is stable with program resistor values as high

as 25k. However, additional capacitance on this node re-

duces the maximum allowed program resistor. The pole

frequency at the PROG pin should be kept above 100kHz.

Therefore, if the PROG pin has a parasitic capacitance,

Figure 8. Higher Frequency Ground Currents Follow Their

Incident Path. Slices in the Ground Plane Cause High Voltage

and Increased Emissions.

The GATE pin for the external ideal diode controller has

extremely limited drive current. Care must be taken to

minimize leakage to adjacent PC board traces. 100nA of

leakage from this pin will introduce an offset to the 15mV

ideal diode of approximately 10mV. To minimize leakage,

the trace can be guarded on the PC board by surrounding

C

, the following equation should be used to calculate

PROG

the maximum resistance value for R

:

PROG

1

it with V

connected metal, which should generally be

OUT

R_PROG≤

2π •100kHz •C_PROG

less than one volt higher than GATE.

3567f

26

LTC3567

TYPICAL APPLICATIONS

Direct Pin Controlled LTC3567 USB Power Manager with 3.3V/1A Buck-Boost

L1

3.3μH

TO

OTHER

LOADS

USB

4.5V TO 5.5V

V

SW

OUT

BUS

C2

22μF

C1

10μF

100k

V

LTC3567

NTC

GATE

BAT

OPTIONAL

Li-Ion

1k

+

100k

T

PROG

GND

CLPROG

CHRG

2k

0.1μF 3.01k

V

IN1

2.2μF

33pF

SWAB1

L2

2.2μH

PUSH BUTTON

MICROCONTROLLER

LDO3V3

3.3V/1A

DISK DRIVE

SWCD1

1μF

C3

22μF

121k

324k

D

V

VCC

OUT1

FB1

CHRGEN

PARTS LIST

330pF

10pF

15k

C1: MURATA GRM21BR61A/06KE19

C2,C3: TAIYO-YUDEN JMK212BJ226MG

L1: COILCRAFT LPS4018-332MLC

L2: COILCRAFT LPS4018-222MLC

V

C1

2

EN1

GND

I C

105k

2

3567 TA02

PACKAGE DESCRIPTION

UF Package

24-Lead Plastic QFN (4mm × 4mm)

(Reference LTC DWG # 05-08-1697 Rev B)

BOTTOM VIEW—EXPOSED PAD

R = 0.115

PIN 1 NOTCH

R = 0.20 TYP OR

0.35 × 45° CHAMFER

0.75 ± 0.05

4.00 ± 0.10

(4 SIDES)

TYP

23 24

0.70 ±0.05

PIN 1

TOP MARK

(NOTE 6)

0.40 ± 0.10

1

2

4.50 ± 0.05

3.10 ± 0.05

2.45 ± 0.05

(4 SIDES)

2.45 ± 0.10

(4-SIDES)

PACKAGE

OUTLINE

(UF24) QFN 0105

0.200 REF

0.25 ± 0.05

0.25 ±0.05

0.50 BSC

0.00 – 0.05

0.50 BSC

NOTE:

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-X)—TO BE APPROVED

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE, IF PRESENT

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

3567f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

27

LTC3567

RELATED PARTS

PART NUMBER DESCRIPTION

COMMENTS

V : 2.5V to 5.5V, V : 2.5V to 5.5V

LTC3440

600mA (I ), 2MHz Synchronous Buck-Boost

OUT

IN

OUT

DC/DC Converter

I = 25μA, I < 1μA, MS, DFN Package

Q SD

LTC3441/

LTC3442

1.2A (I ), Synchronous Buck-Boost DC/DC

V : 2.5V to 5.5V, V : 2.4V to 5.25V

IN OUT

I = 25μA, I < 1μA, MS, DFN Package

Q SD

OUT

Converters, LTC3441 (1MHz), LTC3443 (600kHz)

LTC3442

LTC3455

LTC3538

LTC3550

1.2A (I ), 2MHz Synchronous Buck-Boost DC/DC V : 2.4V to 5.5V, V : 2.4V to 5.25V

OUT IN OUT

Converter

I = 28μA, I < 1μA, MS Package

Q SD

Dual DC/DC Converter with USB Power

Management and Li-Ion Battery Charger

Efﬁciency >96%, Accurate USB Current Limiting (500mA/100mA),

4mm × 4mm QFN-24 Package

800mA, 2MHz Synchronous Buck-Boost DC/DC

Converter

V : 2.4V to 5.5V, V : 1.8V to 5.25V

IN OUT

Q

I = 35μA, 2mm × 3mm DFN-8 Package

Dual Input USB/AC Adapter Li-Ion Battery Charger Synchronous Buck Converter, Efﬁciency: 93%, Adjustable Output at 600mA;

with adjustable output 600mA Buck Converter

Charge Current: 950mA Programmable, USB Compatible, Automatic Input Power

Detection and Selection, 3mm × 5mm DFN-16 Package

LTC3550-1

LTC3555

Dual Input USB/AC Adapter Li-Ion Battery Charger Synchronous Buck Converter, Efﬁciency: 93%, Output: 1.875V at 600mA; Charge

with 600mA Buck Converter

Current: 950mA Programmable, USB Compatible, Automatic Input Power

Detection and Selection, 3mm × 5mm DFN-16 Package

Switching USB Power Manager with Li-Ion/Polymer Complete Multi-Function PMIC: Switchmode Power Manager and Three Buck

Charger, Triple Synchronous Buck Converter Plus

LDO

Regulators Plus LDO; Charge Current Programmable Up to 1.5A from Wall

Adapter Input, Thermal Regulation Synchronous Buck Converters Efﬁciency:

>95%, ADJ Outputs: 0.8V to 3.6V at 400mA/400mA/1A Bat-Track Adaptive Output

Control, 200mꢀ Ideal Diode, 4mm × 5mm QFN-28 Package

LTC3556

Switching USB Power Manager with Li-Ion/Polymer Complete Multi-Function PMIC: Switching Power Manager, 1A Buck-Boost Plus

Charger, 1A Buck-Boost Plus Dual Sync Buck

Converter Plus LDO

2 Buck Regulators Plus LDO, ADJ Out Down to 0.8V at 400mA/400mA/1A,

Synchronous Buck/Buck-Boost Converter Efﬁciency: >95%; Charge Current

Programmable up to 1.5A from Wall Adapter Input, Thermal Regulation, Bat-Track

Adaptive Output Control, 180mꢀ Ideal Diode, 4mm × 5mm QFN-28 Package

LTC3557/

LTC3557-1

USB Power Manager with Li-Ion/Polymer Charger, Complete Multi-Function PMIC: Linear Power Manager and Three Buck Regulators

Triple Synchronous Buck Converter Plus LDO

Charge Current Programmable Up to 1.5A from Wall Adapter Input, Thermal

Regulation Synchronous Buck Converters Efﬁciency: >95%, ADJ Output: 0.8V to

3.6V at 400mA/400mA/600mA Bat-Track Adaptive Output Control, 200mꢀ Ideal

Diode, 4mm × 4mm QFN-28 Package

LTC3559

LTC3566

Linear USB Li-Ion/Polymer Battery Charger

with Dual Synchronous Buck Converter

Adjustable Synchronous Buck Converters, Efﬁciency: >90%, Outputs: Down

to 0.8V at 400mA for Each, Charge Current Programmable Up to 950mA, USB

Compatible, 3mm × 3mm QFN-16 Package

Switching USB Power Manager with Li-Ion/Polymer Multi-Function PMIC: Switchmode Power Manager and 1A Buck-Boost Regulator

Charger, 1A Buck-Boost Converter Plus LDO

Plus LDO, Charge Current Programmable up to 1.5A from Wall Adapter Input,

Thermal Regulation Synchronous Buck-Boost Converters Efﬁciency: >95%, ADJ

Output: Down to 0.8V at 1A, Bat-Track Adaptive Output Control, 180mꢀ Ideal

Diode, 4mm × 4mm QFN-24 Package

LTC4055

LTC4067

LTC4085

USB Power Controller and Battery Charger

Charges Single-Cell Li-Ion Batteries Directly From USB Port,

Thermal Regulation, 4mm × 4mm QFN-16 Package

Linear USB Power Manager with OVP,

Ideal Diode Controller and Li-Ion Charger

13V Overvoltage Transient Protection, Thermal Regulation 200mꢀ Ideal Diode

with <50mꢀ Option, 3mm × 4mm QFN-14 Package

Linear USB Power Manager with Ideal Diode

Controller and Li-Ion Charger

Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation,

200mꢀ Ideal Diode with <50mꢀ Option,

3mm × 4mm QFN-14 Package

LTC4088

High Efﬁciency USB Power Manager and

Battery Charger

Maximizes Available Power from USB Port, Bat-Track, “Instant-On” Operation,

1.5A Maximum Charge Current, 180mꢀ Ideal Diode with <50mꢀ Option,

3.3V/25mA Always-On LDO, 3mm × 4mm DFN-14 Package

LTC4088-1/

LTC4088/2

High Efﬁciency USB Power Manager and

Battery Charger with Regulated Output Voltage

Maximizes Available Power from USB Port, Bat-Track, “Instant-On” Operation, 1.5A

Maximum Charge Current, 180mꢀ Ideal Diode with <50mꢀ Option, Automatic

Charge Current Reduction Maintains 3.6V Minimum V , Battery Charger Disabled

OUT

when all Logic Inputs are Grounded, 3mm × 4mm DFN-14 Package

3567f

LT 0608 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

28

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3567EUF-TRPBF
厂家：	Linear
描述：	High Effi ciency USB Power Manager Plus 1A Buck-Boost Converter with I2C Control 高艾菲效率USB电源管理器加上1A降压 - 升压型转换器，带有I2C控制转换器
文件：	总28页 (文件大小：274K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC3567EUF-TRPBF [Linear]

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LTC3569EFE#PBF

LTC3569EFE#TRPBF

LTC3569EFE-PBF

LTC3569EFE-TRPBF

LTC3569EUD#PBF