LTC3588IMSE-2#PBF [Linear]
LTC3588-2 - Nanopower Energy Harvesting Power Supply with 14V Minimum VIN; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C;型号: | LTC3588IMSE-2#PBF |
厂家: | Linear |
描述: | LTC3588-2 - Nanopower Energy Harvesting Power Supply with 14V Minimum VIN; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C 光电二极管 |
文件: | 总18页 (文件大小:414K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC3588-2
Nanopower Energy
Harvesting Power Supply
with 14V Minimum V
IN
FEATURES
DESCRIPTION
n
1500nA Input Quiescent Current (Output in
The LTC®3588-2 integrates a low-loss full-wave bridge
rectifier with a high efficiency buck converter to form a
complete energy harvesting solution optimized for high
output impedance energy sources such as piezoelectric,
solar, or magnetic transducers.
Regulation – No Load, V = 18V)
IN
n
n
n
n
830nA Input Quiescent Current in UVLO, V = 12V
IN
14V to 20V Input Operating Range
Integrated Low-Loss Full-Wave Bridge Rectifier
16V UVLO Improves Power Utilization from High
Voltage Current Limited Inputs
Anultralowquiescentcurrentundervoltagelockout(UVLO)
mode with a 16V rising threshold enables efficient energy
extraction from sources with high open circuit voltages.
This energy is transferred from the input capacitor to the
output via a high efficiency synchronous buck regulator.
The 16V UVLO threshold also allows for input to output
current multiplication through the buck regulator. The
buck features a sleep state that minimizes both input and
output quiescent currents while in regulation.
n
n
n
n
Up to 100mA of Output Current
High Efficiency Integrated Hysteretic Buck DC/DC
Selectable Output Voltages: 3.45V, 4.1V, 4.5V, 5.0V
Input Protective Shunt – Up to 25mA Pull-Down at
V ≥ 20V
IN
n
Available in 10-Lead MSE and 3mm × 3mm DFN
Packages
Four output voltages of 3.45V, 4.1V, 4.5V and 5.0V are
pin selectable with up to 100mA of continuous output
APPLICATIONS
n
Piezoelectric Energy Harvesting
current, and suit Li-Ion and LiFePO batteries as well as
4
n
Electro-Mechanical Energy Harvesting
supercapacitors. An input protective shunt set at 20V
provides overvoltage protection.
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
n
Low Power Battery Charging
n
Wireless HVAC Sensors
n
Mobile Asset Tracking
n
Tire Pressure Sensors
n
Battery Replacement for Industrial Sensors
TYPICAL APPLICATION
High Voltage Piezoelectric Energy Harvesting Power Supply
LTC3588-2 5.0V Regulator Start-Up Profile
20
C
= 10µF, C
= 47µF
STORAGE
IN
V
IN
18 NO LOAD, I = 2µA
VIN
16
14
12
10
8
MIDE V25W
PZ1
PZ2
SW
22µH
V
IN
V
OUT
LTC3588-2
1µF
6V
C
STORAGE
V
OUT
6V
CAP
PGOOD
D0, D1
10µF
25V
2
OUTPUT
VOLTAGE
SELECT
V
OUT
V
IN2
6
GND
4.7µF
6V
4
35882 TA01
2
PGOOD = LOGIC 1
400 600
0
0
200
TIME (sec)
35882 TA01b
35882fc
1
For more information www.linear.com/LTC3588-2
LTC3588-2
(Note 1)
ABSOLUTE MAXIMUM RATINGS
V
V
.................. –0.3V to [Lesser of (V + 0.3V) or 6V]
IN
OUT IN
PGOOD............–0.3V to [Lesser of (V
Low Impedance Source ....................... –0.3V to 18V*
Current Fed, I = 0A ...................................... 25mA
+ 0.3V) or 6V]
OUT
†
I
, I ............................................................. 50mA
...................................................................... 350mA
SW
PZ1 PZ2
I
PZ1, PZ2...........................................................0V to V
IN
SW
D0, D1..............–0.3V to [Lesser of (V + 0.3V) or 6V]
Operating Junction Temperature Range
IN2
IN
IN
CAP......................[Higher of –0.3V or (V – 6V)] to V
(Notes 2, 3)................................................–40 to 125°C
Storage Temperature Range ......................–65 to 125°C
Lead Temperature (Soldering, 10 sec)
IN
V
................... –0.3V to [Lesser of (V + 0.3V) or 6V]
IN2
* V has an internal 20V clamp
IN
†
MSE Only..........................................................300°C
For t < 1ms and Duty Cycle < 1%,
Absolute Maximum Continuous Current = 5mA
PIN CONFIGURATION
TOP VIEW
TOP VIEW
PZ1
PZ2
CAP
1
2
3
4
5
10 PGOOD
PZ1
PZ2
CAP
IN
SW
1
2
3
4
5
10 PGOOD
9
8
7
6
D0
D1
9
8
7
6
D0
D1
11
11
GND
GND
V
V
V
IN2
OUT
V
V
V
IN
IN2
SW
OUT
MSE PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE
T
= 125°C, θ = 45°C/W, θ = 10°C/W
JA JC
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
JMAX
10-LEAD (3mm × 3mm) PLASTIC DFN
T
= 125°C, θ = 43°C/W, θ = 7.5°C/W
JA JC
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
JMAX
ORDER INFORMATION
LEAD FREE FINISH
LTC3588EDD-2#PBF
LTC3588IDD-2#PBF
LTC3588EMSE-2#PBF
LTC3588IMSE-2#PBF
TAPE AND REEL
PART MARKING*
LFYK
PACKAGE DESCRIPTION
10-Lead (3mm × 3mm) Plastic DFN
TEMPERATURE RANGE
–40°C to 125°C
LTC3588EDD-2#TRPBF
LTC3588IDD-2#TRPBF
LFYK
10-Lead (3mm × 3mm) Plastic DFN
10-Lead Plastic MSOP
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
LTC3588EMSE-2#TRPBF LTFYM
LTC3588IMSE-2#TRPBF LTFYM
10-Lead Plastic MSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping
container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
35882fc
2
For more information www.linear.com/LTC3588-2
LTC3588-2
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are for TA = 25°C (Note 2). VIN = 18V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
V
IN
Input Voltage Range
Low Impedance Source on V
18.0
V
IN
I
Q
V
IN
Quiescent Current
UVLO
Buck Enabled, Sleeping
Buck Enabled, Not Sleeping
V
V
SW
= 12V, Not PGOOD
= 18V
= 0A (Note 4)
830
1500
150
1400
2500
250
nA
nA
µA
IN
IN
I
l
l
V
V
V
V
Undervoltage Lockout Threshold
V
V
Rising
Falling
= 1mA
16.0
14.0
20.0
17.0
V
V
UVLO
IN
IN
IN
IN
13.0
18.8
25
Shunt Regulator Voltage
I
21.2
V
SHUNT
SHUNT
VIN
I
Maximum Protective Shunt Current
1ms Duration
= 10µA
mA
mV
Internal Bridge Rectifier Loss
(|V – V | – V )
I
350
400
30
450
20
BRIDGE
PZ1
PZ2
IN
Internal Bridge Rectifier Reverse
Leakage Current
V
= 18V
= 1µA
nA
V
REVERSE
REVERSE
Internal Bridge Rectifier Reverse
Breakdown Voltage
I
V
SHUNT
V
Regulated Output Voltage
3.45V Output Selected
Sleep Threshold
Wake-Up Threshold
4.1V Output Selected
Sleep Threshold
Wake-Up Threshold
4.5V Output Selected
Sleep Threshold
OUT
l
l
3.466
3.434
3.554
4.221
4.646
5.175
V
V
3.346
3.979
4.354
l
l
4.116
4.084
V
V
l
l
4.516
4.484
V
V
Wake-Up Threshold
5.0V Output Selected
Sleep Threshold
l
l
5.016
4.984
V
V
Wake-Up Threshold
4.825
83
PGOOD Falling Threshold
Output Quiescent Current
Buck Peak Switch Current
Available Buck Output Current
Buck PMOS Switch On-Resistance
Buck NMOS Switch On-Resistance
Max Buck Duty Cycle
As a Percentage of the Selected V
92
%
nA
mA
mA
Ω
OUT
I
I
I
V
OUT
= 5.0V
125
260
250
350
VOUT
PEAK
BUCK
200
100
R
1.1
1.3
P
N
R
Ω
l
l
l
100
1.2
%
V
V
D0/D1 Input High Voltage
D0/D1 Input Low Voltage
D0/D1 Input High Current
D0/D1 Input Low Current
V
IH(D0, D1)
IL(D0, D1)
IH(D0, D1)
IL(D0, D1)
0.4
10
10
V
I
I
nA
nA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
impedance and other environmental factors.
Note 2: The LTC3588E-2 is tested under pulsed load conditions such
Note 3: The junction temperature (T , in °C) is calculated from the ambient
temperature (T , in °C) and power dissipation (P , in Watts) according
A D
J
that T ≈ T . The LTC3588E-2 is guaranteed to meet specifications
J
A
from 0°C to 85°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3588I-2 is guaranteed over the –40°C to 125°C operating junction
to the formula: T = T + (P • θ ), where θ (in °C/W) is the package
thermal impedance.
Note 4: Dynamic supply current is higher due to gate charge being
J
A
D
JA
JA
delivered at the switching frequency.
35882fc
3
For more information www.linear.com/LTC3588-2
LTC3588-2
TYPICAL PERFORMANCE CHARACTERISTICS
Input IQ in UVLO vs VIN
Input IQ in Sleep vs VIN
UVLO Rising vs Temperature
1800
1600
1400
1200
1000
800
600
400
200
0
3600
3200
2800
2400
2000
1600
1200
800
16.4
16.2
16.0
15.8
15.6
125°C
125°C
85°C
25°C
85°C
–40°C
25°C
–40°C
0
2
4
6
8
10 12 14 16
14
15
16
(V)
17
18
–50 –25
0
25
50
75 100 125
V
IN
(V)
V
IN
TEMPERATURE (°C)
35882 G01
35882 G02
35882 G03
Total Bridge Rectifier Drop
vs Bridge Current
UVLO Falling vs Temperature
VSHUNT vs Temperature
1800
1600
1400
1200
1000
800
600
400
200
0
14.4
14.2
14.0
13.8
13.6
21.2
21.0
20.8
20.6
20.4
20.2
20.0
19.8
19.6
19.4
19.2
19.0
18.8
|V
– V | – V
PZ2
PZ1
IN
–40°C
I
= 25mA
SHUNT
85°C
25°C
I
= 1mA
SHUNT
1µ
10µ
100µ
1m
10m
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
BRIDGE CURRENT (A)
TEMPERATURE (°C)
TEMPERATURE (°C)
35882 G06
35882 G04
35882 G05
Bridge Leakage vs Temperature
Bridge Frequency Response
3.45V Output vs Temperature
20
18
16
14
12
10
8
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
3.55
3.50
3.45
3.40
3.35
3.30
3.25
3.20
3.15
3.10
4V APPLIED TO PZ1/PZ2 INPUT
P-P
MEASURED IN UVLO
V
= 18V, LEAKAGE AT PZ1 OR PZ2
IN
SLEEP THRESHOLD
WAKE-UP THRESHOLD
6
PGOOD FALLING
4
2
0
–55
–10
35
80
125
170
10 100 1k 10k 100k 1M 10M 100M
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
FREQUENCY (Hz)
TEMPERATURE (°C)
35882 G07
35882 G08
35882 G09
35882fc
4
For more information www.linear.com/LTC3588-2
LTC3588-2
TYPICAL PERFORMANCE CHARACTERISTICS
5.0V Output vs Temperature
4.1V Output vs Temperature
SLEEP THRESHOLD
4.5V Output vs Temperature
4.20
4.10
4.00
3.90
3.80
3.70
4.60
4.50
4.40
4.30
4.20
4.10
5.10
5.00
4.90
4.80
4.70
4.60
4.50
SLEEP THRESHOLD
SLEEP THRESHOLD
WAKE-UP THRESHOLD
WAKE-UP THRESHOLD
WAKE-UP THRESHOLD
PGOOD FALLING
PGOOD FALLING
PGOOD FALLING
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
35882 G10
35882 G11
35882 G12
V
OUT Load Regulation
VOUT Line Regulation
IVOUT vs Temperature
4.20
4.15
4.10
4.05
4.00
4.15
160
140
120
100
80
C
= 100µF, I
= 60mA,
LOAD
V
= 18V, C
= 100µF, D1 = 0, D0 = 1
OUT
OUT
IN
V
OUT
= 5.0V
4.14 D1 = 0, D0 = 1
4.13
4.12
4.11
4.10
4.09
4.08
4.07
4.06
4.05
V
OUT
= 4.5V
V
= 3.45V
OUT
V
= 4.1V
50
OUT
60
40
1µ
10µ
100µ
1m
10m
100m
14
15
16
(V)
17
18
–50 –25
0
25
75 100 125
LOAD CURRENT (A)
V
TEMPERATURE (°C)
IN
35882 G13
35882 G14
35882 G15
RDS(ON) of PMOS/NMOS
vs Temperature
IPEAK vs Temperature
Operating Waveforms
300
290
280
270
260
250
240
230
220
210
200
2.0
1.8
1.6
1.4
1.2
1.0
0.8
OUTPUT
VOLTAGE
50mV/DIV
AC-COUPLED
NMOS
PMOS
SWITCH
VOLTAGE
10V/DIV
0V
INDUCTOR
CURRENT
200mA/DIV
0mA
35882 G18
2.5µs/DIV
–50 –25
0
25
50
75 100 125
–55 –35 –15
5
25 45 65 85 105 125
V
= 18V, V
= 5.0V
TEMPERATURE (°C)
TEMPERATURE (°C)
IN
OUT
35882 G16
35882 G17
I
= 1mA
LOAD
L = 22µH, C
= 47µF
OUT
35882fc
5
For more information www.linear.com/LTC3588-2
LTC3588-2
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs VIN for
ILOAD = 100mA, L = 22µH
Efficiency vs VIN for
VOUT = 4.1V, L = 22µH
Efficiency vs ILOAD, L = 22µH
94
92
90
88
86
84
82
80
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
V
= 15V
IN
I
I
I
I
I
= 100mA
= 100µA
= 50µA
= 30µA
= 10µA
LOAD
LOAD
LOAD
LOAD
LOAD
V
V
V
V
= 5.0V
= 4.5V
= 4.1V
= 3.45V
V
V
V
V
= 5.0V
= 4.5V
= 4.1V
= 3.45V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
14
15
16
(V)
17
18
1µ
10µ
100µ
1m
10m
100m
14
15
16
17
18
V
LOAD CURRENT (A)
V
IN
(V)
IN
35882 G20
35881 G19
35882 G21
Efficiency vs VIN for
ILOAD = 100mA, L = 100µH
Efficiency vs VIN for
VOUT = 4.1V, L = 100µH
Efficiency vs ILOAD, L = 100µH
100
90
80
70
60
50
40
30
94
92
90
88
86
84
82
80
100
90
80
70
60
50
40
30
20
10
0
V
= 15V
IN
I
I
I
I
I
= 100mA
= 100µA
= 50µA
= 30µA
= 10µA
LOAD
LOAD
LOAD
LOAD
LOAD
V
= 5.0V
V
V
V
V
= 5.0V
OUT
OUT
OUT
OUT
OUT
V
V
V
= 4.5V
= 4.1V
= 3.45V
= 4.5V
= 4.1V
= 3.45V
OUT
OUT
OUT
14
15
16
17
18
14
15
16
(V)
17
18
1µ
10µ
100µ
1m
10m
100m
V
IN
(V)
V
LOAD CURRENT (A)
IN
35882 G24
35882 G23
35882 G22
35882fc
6
For more information www.linear.com/LTC3588-2
LTC3588-2
PIN FUNCTIONS
PZ1 (Pin 1): Input connection for piezoelectric element or
other AC source (used in conjunction with PZ2).
V
(Pin 7): Internal low voltage rail to serve as gate drive
IN2
for buck NMOS switch. Also serves as a logic high rail for
output voltage select bits D0 and D1. A 4.7µF capacitor
PZ2 (Pin 2): Input connection for piezoelectric element or
other AC source (used in conjunction with PZ1).
should be connected from V to GND. This pin is not
IN2
intended for use as an external system rail.
CAP (Pin 3): Internal rail referenced to V to serve as gate
IN
D1 (Pin 8): Output Voltage Select Bit. D1 should be tied
drive for buck PMOS switch. A 1µF capacitor should be
high to V or low to GND to select desired V
(see
IN2
OUT
connected between CAP and V . This pin is not intended
IN
Table 1).
for use as an external system rail.
D0 (Pin 9): Output Voltage Select Bit. D0 should be tied
V
(Pin 4): Rectified Input Voltage. A capacitor on this
IN
high to V or low to GND to select desired V
(see
IN2
OUT
pin serves as an energy reservoir and input supply for the
Table 1).
buck regulator. The V voltage is internally clamped to a
maximum of 20V (typical).
IN
PGOOD (Pin 10): Power good output is logic high when
is above 92% of the target value. The logic high is
V
OUT
SW (Pin 5): Switch Pin for the Buck Switching Regulator.
referenced to the V
rail.
OUT
A 22µH or larger inductor should be connected from SW
to V
.
GND (Exposed Pad Pin 11): Ground. The Exposed Pad
should be connected to a continuous ground plane on the
second layer of the printed circuit board by several vias
directly under the LTC3588-2.
OUT
V
(Pin 6): Sense pin used to monitor the output volt-
OUT
age and adjust it through internal feedback.
BLOCK DIAGRAM
4
V
IN
20V
INTERNAL RAIL
GENERATION
3
5
7
CAP
SW
1
2
PZ1
PZ2
V
IN2
BUCK
CONTROL
UVLO
GND
11
SLEEP
BANDGAP
REFERENCE
V
OUT
6
8, 9
D1, D0
2
PGOOD
COMPARATOR
10
PGOOD
35882 BD
35882fc
7
For more information www.linear.com/LTC3588-2
LTC3588-2
OPERATION
The LTC3588-2 is an ultralow quiescent current power
supply designed specifically for energy harvesting and/or
lowcurrentstep-downapplications.Thepartisdesignedto
interfacedirectlytoapiezoelectricoralternativeA/Cpower
source, rectify a voltage waveform and store harvested
energyonanexternalcapacitor,bleedoffanyexcesspower
via an internal shunt regulator, and maintain a regulated
output voltage by means of a nanopower high efficiency
synchronous buck regulator.
are connected to the CAP and V pins to serve as energy
IN2
reservoirsfordrivingthebuckswitches.WhenV isbelow
IN
4.8V, V is equal to V and CAP is held at GND. Figure 1
IN2
IN
shows the ideal V , V and CAP relationship.
IN IN2
18
16
14
V
IN
12
10
8
Internal Bridge Rectifier
6
V
IN2
The LTC3588-2 has an internal full-wave bridge rectifier
accessible via the differential PZ1 and PZ2 inputs that
rectifies AC inputs such as those from a piezoelectric
element. The rectified output is stored on a capacitor at
4
CAP
2
0
0
5
10
15
V
(V)
IN
35882 F01
the V pin and can be used as an energy reservoir for the
IN
Figure 1. Ideal VIN, VIN2 and CAP Relationship
buck converter. The low-loss bridge rectifier has a total
dropofabout400mVwithtypicalpiezogeneratedcurrents
(~10µA). The bridge is capable of carrying up to 50mA.
One side of the bridge can be operated as a single-ended
DC input. PZ1 and PZ2 should never be shorted together
when the bridge is in use.
Buck Operation
The buck regulator uses a hysteretic voltage algorithm
to control the output through internal feedback from the
V
sense pin. The buck converter charges an output
OUT
capacitor through an inductor to a value slightly higher
than the regulation point. It does this by ramping the
inductor current up to 260mA through an internal PMOS
switch and then ramping it down to 0mA through an
internal NMOS switch. This efficiently delivers energy
to the output capacitor. The ramp rate is determined by
Undervoltage Lockout (UVLO)
When the voltage on V rises above the UVLO rising
IN
threshold the buck converter is enabled and charge is
transferredfromtheinputcapacitortotheoutputcapacitor.
A wide (~2V) UVLO hysteresis window allows a portion of
the energy stored on the input capacitor to be transferred
totheoutputcapacitorbythebuck.Whentheinputcapaci-
tor voltage is depleted below the UVLO falling threshold
the buck converter is disabled. Extremely low quiescent
V , V , and the inductor value. If the input voltage
IN
OUT
falls below the UVLO falling threshold before the output
voltage reaches regulation, the buck converter will shut
off and will not be turned on until the input voltage again
rises above the UVLO rising threshold. During this time
the output voltage will be loaded by approximately 100nA.
When the buck brings the output voltage into regulation
the converter enters a low quiescent current sleep state
that monitors the output voltage with a sleep comparator.
During this operating mode load current is provided by
the buck output capacitor. When the output voltage falls
below the regulation point the buck regulator wakes up
and the cycle repeats. This hysteretic method of providing
a regulated output reduces losses associated with FET
switching and maintains an output at light loads. The buck
delivers a minimum of 100mA of average current to the
current (830nA typical, V = 12V) in UVLO allows energy
IN
to accumulate on the input capacitor in situations where
energy must be harvested from low power sources.
Internal Rail Generation
Twointernalrails,CAPandV ,aregeneratedfromV and
IN2
IN
are used to drive the high side PMOS and low side NMOS
of the buck converter, respectively. Additionally the V
IN2
rail serves as logic high for output voltage select bits D0
and D1. The V rail is regulated at 4.8V above GND while
IN2
the CAP rail is regulated at 4.8V below V . These are not
IN
output when it is switching.
intended to be used as external rails. Bypass capacitors
35882fc
8
For more information www.linear.com/LTC3588-2
LTC3588-2
OPERATION
When the sleep comparator signals that the output has
reached the sleep threshold the buck converter may be
in the middle of a cycle with current still flowing through
the inductor. Normally both synchronous switches would
turn off and the current in the inductor would freewheel
to zero through the NMOS body diode. The LTC3588-2
keeps the NMOS switch on during this time to prevent the
conduction loss that would occur in the diode if the NMOS
were off. If the PMOS is on when the sleep comparator
trips the NMOS will turn on immediately in order to ramp
down the current. If the NMOS is on it will be kept on until
the current reaches zero.
regulation voltage. Several sleep cycles may occur during
thistime.Additionally,ifPGOODishighandV fallsbelow
IN
the UVLO falling threshold, PGOOD will remain high until
V
falls to 92% of the desired regulation point. This
OUT
allows output energy to be used even if the input is lost.
Figure 2 shows the behavior for V
= 5V and a 10µA
OUT
load. At t = 2s V becomes high impedance and is dis-
IN
charged by the quiescent current of the LTC3588-2 and
through servicing V
which is discharged by its own
OUT
leakage current. V crosses UVLO falling but PGOOD
IN
OUT
remains high until V
decreases to 92% of the desired
regulation point. The PGOOD pin is designed to drive a
microprocessor or other chip I/O and is not intended to
drive higher current loads such as an LED.
Though the quiescent current when the buck is switching
is much greater than the sleep quiescent current, it is still
a small percentage of the average inductor current which
results in high efficiency over most load conditions. The
buck operates only when sufficient energy has been ac-
cumulated in the input capacitor and the length of time the
converter needs to transfer energy to the output is much
less than the time it takes to accumulate energy. Thus, the
buck operating quiescent current is averaged over a long
period of time so that the total average quiescent current
is low. This feature accommodates sources that harvest
small amounts of ambient energy.
The D0/D1 inputs can be switched while in regulation as
showninFigure3. IfV
isprogrammedtoavoltagewith
OUT
aPGOODfallingthresholdabovetheoldV , PGOODwill
OUT
20
18
V
IN
16
14
12
10
8
V
= UVLO FALLING
IN
C
= 10µF,
= 47µF,
= 10µA
IN
C
OUT
I
LOAD
6
Four selectable voltages are available by tying the output
V
4
OUT
select bits, D0 and D1, to GND or V . Table 1 shows the
IN2
2
PGOOD
fourD0/D1codesandtheircorrespondingoutputvoltages.
0
0
2
4
6
8
10
12
TIME (sec)
Table 1. Output Voltage Selection
35882 F02
D1
0
D0
0
V
V
QUIESCENT CURRENT (I
)
OUT
OUT
VOUT
Figure 2. PGOOD Operation During Transition to UVLO
3.45V
4.1V
4.5V
5.0V
86nA
101nA
111nA
125nA
6
0
1
C
OUT
= 100µF, I
= 100mA
LOAD
1
0
D1=D0=1
D1=D0=0
D1=D0=0
5
4
3
2
1
0
1
1
V
OUT
The internal feedback network draws a small amount of
current from V as listed in Table 1.
OUT
Power Good Comparator
PGOOD = LOGIC 1
Apowergoodcomparatorproducesalogichighreferenced
to V
on the PGOOD pin the first time the converter
OUT
0
2
4
6
8
10 12 14 16 18 20
reaches the sleep threshold of the programmed V
,
OUT
TIME (ms)
signaling that the output is in regulation. The PGOOD pin
will remain high until V falls to 92% of the desired
35882 F03
OUT
Figure 3. PGOOD Operation During D0/D1 Transition
35882fc
9
For more information www.linear.com/LTC3588-2
LTC3588-2
OPERATION
transition low until the new regulation point is reached.
regulatedoutput. Whileenergystorageattheinpututilizes
the high voltage at the input, the load current is limited
to what the buck converter can supply. If larger loads
need to be serviced the output capacitor can be sized to
support a larger current for some duration. For example,
a current burst could begin when PGOOD goes high and
would continuously deplete the output capacitor until
PGOOD went low.
When V
is programmed to a lower voltage, PGOOD
OUT
will remain high through the transition.
Energy Storage
Harvested energy can be stored on the input capacitor
or the output capacitor. The high UVLO threshold takes
advantage of the fact that energy storage on a capacitor is
proportional to the square of the capacitor voltage. After
the output voltage is brought into regulation any excess
energy is stored on the input capacitor and its voltage
increases. When a load exists at the output the buck can
efficiently transfer energy stored at a high voltage to the
The output voltages available on the LTC3588-2 are par-
ticularly suited to Li-Ion and LiFePO batteries as well as
4
supercapacitors for applications where energy storage at
the output is desired.
APPLICATIONS INFORMATION
Introduction
readily. A wide range of piezoelectric elements are avail-
able and produce a variety of open-circuit voltages and
short-circuit currents. Typically the open-circuit voltage
and short-circuit currents increase with available vibra-
tional energy as shown in Figure 4. Piezoelectric elements
can be placed in series or in parallel to achieve desired
open-circuit voltages.
The LTC3588-2 harvests ambient vibrational energy
through a piezoelectric element in its primary application.
Common piezoelectric elements are PZT (lead zirconate
titanate) ceramics, PVDF (polyvinylidene fluoride) poly-
mers,orothercomposites.Ceramicpiezoelectricelements
exhibit a piezoelectric effect when the crystal structure
of the ceramic is compressed and internal dipole move-
ment produces a voltage. Polymer elements comprised
of long-chain molecules produce a voltage when flexed
as molecules repel each other. Ceramics are often used
under direct pressure while a polymer can be flexed more
The LTC3588-2 is well-suited to a piezoelectric energy
harvesting application. The 20V input protective shunt
can accommodate a variety of piezoelectric elements. The
low quiescent current of the LTC3588-2 enables efficient
energy accumulation from piezoelectric elements which
can have short-circuit currents on the order of tens of
microamps. Piezoelectric elements can be obtained from
manufacturers listed in Table 2.
INCREASING
VIBRATION ENERGY
Table 2. Piezoelectric Element Manufacturers
Advanced Cerametrics
Piezo Systems
www.advancedcerametrics.com
www.piezo.com
Measurement Specialties
PI (Physik Instrumente)
MIDE Technology Corporation
Morgan Technical Ceramics
www.meas-spec.com
www.pi-usa.us
www.mide.com
0
0
www.morganelectroceramics.com
PIEZO CURRENT
35882 F04
Figure 4. Typical Piezoelectric Load Lines
35882fc
10
For more information www.linear.com/LTC3588-2
LTC3588-2
APPLICATIONS INFORMATION
OUTPUT
VOLTAGE
PZ1
PZ2
50mV/DIV
V
IN
PGOOD
T
X
EN
AC-COUPLED
1µF
6V
MICROPROCESSOR
22µH
5V
LTC3588-2
CAP
SW
OUT
10µF
25V
CORE
GND
LOAD
CURRENT
25mA/DIV
V
IN2
V
D1
D0
47µF
6V
4.7µF
6V
GND
5mA
35882 F05a
35882 F05b
250µs/DIV
= 47µF
V
= 18V
IN
L = 22µH, C
OUT
LOAD STEP BETWEEN 5mA and 55mA
Figure 5. 5V Piezoelectric Energy Harvester Powering a Microprocessor
with a Wireless Transmitter and 50mA Load Step Response
The LTC3588-2 will gather energy and convert it to a use-
able output voltage to power microprocessors, wireless
sensors, and wireless transmission components. Such a
wireless sensor application may require much more peak
powerthanapiezoelectricelementcanproduce.However,
the LTC3588-2 accumulates energy over a long period of
time to enable efficient use for short power bursts. For
continuous operation, these bursts must occur with a low
dutycyclesuchthatthetotaloutputenergyduringtheburst
doesnotexceedtheaveragesourcepowerintegratedover
an energy accumulation cycle. For piezoelectric inputs the
time between cycles could be minutes, hours, or longer
depending on the selected capacitor values and the nature
of the vibration source.
Input and Output Capacitor Selection
The input and output capacitors should be selected based
on the energy needs and load requirements of the ap-
plication. In every case the V capacitor should be rated
IN
to withstand the highest voltage ever present at V .
IN
For 100mA or smaller loads, storing energy at the input
takes advantage of the high voltage input since the buck
can deliver 100mA average load current efficiently to the
output. The input capacitor should then be sized to store
enough energy to provide output power for the length of
time required. This may involve using a large capacitor,
lettingV chargetoahighvoltage,orboth.Enoughenergy
IN
should be stored on the input so that the buck does not
reach the UVLO falling threshold which would halt energy
transfer to the output. In general:
PGOOD Signal
1
2
P
LOADtLOAD = ηCIN
V
2 − VU
2
The PGOOD signal can be used to enable a sleeping
(
)
IN
VLO(FALLING)
microprocessor or other circuitry when V
reaches
OUT
VUVLO(FALLING) ≤ V ≤ V
regulation, as shown in Figure 5. Typically V will be
IN
SHUNT
IN
somewhere between the UVLO thresholds at this time
and a load could only be supported by the output capaci-
tor. Alternatively, waiting a period of time after PGOOD
goes high would let the input capacitor accumulate more
energy allowing load current to be maintained longer as
the buck efficiently transfers that energy to the output.
While active, a microprocessor may draw a small load
when operating sensors, and then draw a large load to
transmit data. Figure 5 shows the LTC3588-2 responding
smoothly to such a load step.
The above equation can be used to size the input capaci-
tor to meet the power requirements of the output for an
application with continuous input energy. Here η is the
average efficiency of the buck converter over the input
range and V is the input voltage when the buck begins to
IN
switch. This equation may overestimate the input capaci-
tor necessary since load current can deplete the output
capacitor all the way to the lower PGOOD threshold. It also
assumes that the input source charging has a negligible
35882fc
11
For more information www.linear.com/LTC3588-2
LTC3588-2
APPLICATIONS INFORMATION
effect during this time. For applications where the output
must reach regulation on a single UVLO cycle, the energy
required to charge the output capacitor must be taken into
Inductor
Thebuckisoptimizedtoworkwitha22µHinductor.Induc-
tor values greater than 22µH may yield benefits in some
applications. For example, a larger inductor will benefit
high voltage applications by increasing the on-time of the
PMOS switch and improving efficiency by reducing gate
charge loss. Choose an inductor with a DC current rating
greater than 350mA. The DCR of the inductor can have
an impact on efficiency as it is a source of loss. Trade-offs
between price, size, and DCR should be evaluated. Table 3
lists several inductors that work well with the LTC3588-2.
account when sizing C .
IN
The duration for which the regulator sleeps depends on
the load current and the size of the output capacitor. The
sleep time decreases as the load current increases and/or
astheoutputcapacitordecreases.TheDCsleephysteresis
window is 16mV around the programmed output volt-
age. Ideally this means that the sleep time is determined
by the following equation:
32mV
ILOAD
Table 3. Recommended Inductors for LTC3588-2
MAX MAX
t
SLEEP =COUT
INDUCTOR
TYPE
L
I
DCR
(Ω)
SIZE in mm
MANU-
DC
(µH) (mA)
(L × W × H)
FACTURER
This is true for output capacitors on the order of 100µF
or larger, but as the output capacitor decreases towards
10µF delays in the internal sleep comparator along with
A997AS-220M
LPS5030-223MLC
LPS4012-473MLC
SLF7045T
22
22
390 0.440 4.0 × 4.0 × 1.8
700 0.190 4.9 × 4.9 × 3.0
350 1.400 4.0 × 4.0 × 1.2
500 0.250 7.0 × 7.0 × 4.8
Toko
Coilcraft
Coilcraft
TDK
47
the load current may result in the V
voltage slewing
OUT
100
past the 16mV thresholds. This will lengthen the sleep
time and increase V ripple. A capacitor less than 10µF
OUT
V
and CAP Capacitors
IN2
is not recommended as V
ripple could increase to an
OUT
undesirable level.
A 1μF capacitor should be connected between V and
CAP and a 4.7µF capacitor should be connected between
IN
Iftransientloadcurrentsabove100mAarerequiredthena
larger capacitor can be used at the output. This capacitor
willbecontinuouslydischargedduringaloadconditionand
V
and GND. These capacitors hold up the internal rails
IN2
during buck switching and compensate the internal rail
generation circuits.
the capacitor can be sized for an acceptable drop in V
tLOAD
:
OUT
Additional Applications with Piezo Inputs
C
OUT = (ILOAD – IBUCK )
VOUT+ – VOUT
is the value of V when PGOOD goes high
OUT
–
The versatile LTC3588-2 can be used in a variety of con-
figurations.Figure6showsasinglepiezosourcepowering
two LTC3588-2s simultaneously, providing capability for
multiple rail systems. As the piezo provides input power
+
–
Here V
and V
OUT
OUT
is the desired lower limit of V . I
average current being delivered from the buck converter,
typically I /2.
is the
OUT BUCK
both V rails will initially come up together, but when
IN
PEAK
one output starts drawing power, only its corresponding
A standard surface mount ceramic capacitor can be used
for C , though some applications may be better suited
to a low leakage aluminum electrolytic capacitor or a
supercapacitor. These capacitors can be obtained from
manufacturers such as Vishay, Illinois Capacitor, AVX,
or CAP-XX.
V
will fall as the bridges of each LTC3588-2 provide
IN
OUT
isolation. Input piezo energy will then be directed to this
lower voltage capacitor until both V rails are again
IN
equal. This configuration is expandable to any number
of LTC3588-2s powered by a single piezo as long as the
piezo can support the sum total of the quiescent currents
from each LTC3588-2.
35882fc
12
For more information www.linear.com/LTC3588-2
LTC3588-2
APPLICATIONS INFORMATION
ADVANCED CERAMETRICS
PFCB-W14
PZ1
PZ2
PZ1
PZ2
PGOOD1
22µH
PGOOD2
PGOOD
V
V
PGOOD
IN
IN
1µF
6V
1µF
6V
22µH
3.45V
LTC3588-2
LTC3588-2
5.0V
SW
CAP
CAP
SW
OUT
10µF
25V
10µF
25V
V
OUT
V
V
IN2
V
IN2
D1
10µF
6V
10µF
6V
D1
D0
4.7µF
6V
4.7µF
6V
D0
GND
GND
35882 F06
Figure 6. Dual Rail Power Supply with Single Piezo
DANGER! HIGH VOLTAGE!
DANGEROUS AND LETHAL POTENTIALS ARE PRESENT IN OFFLINE CIRCUITS!
BEFORE PROCEEDING ANY FURTHER, THE READER IS WARNED THAT
CAUTION MUST BE USED IN THE CONSTRUCTION, TESTING AND USE OF
OFFLINE CIRCUITS. EXTREME CAUTION MUST BE USED IN WORKING WITH
AND MAKING CONNECTIONS TO THESE CIRCUITS. REPEAT: OFFLINE
CIRCUITS CONTAIN DANGEROUS, AC LINE-CONNECTED HIGH VOLTAGE
POTENTIALS. USE CAUTION. ALL TESTING PERFORMED ON AN OFFLINE
CIRCUIT MUST BE DONE WITH AN ISOLATION TRANSFORMER CONNECTED
BETWEEN THE OFFLINE CIRCUIT’S INPUT AND THE AC LINE. USERS AND
CONSTRUCTORS OF OFFLINE CIRCUITS MUST OBSERVE THIS PRECAUTION
WHEN CONNECTING TEST EQUIPMENT TO THE CIRCUIT TO AVOID ELECTRIC
SHOCK. REPEAT: AN ISOLATION TRANSFORMER MUST BE CONNECTED
BETWEEN THE CIRCUIT INPUT AND THE AC LINE IF ANY TEST EQUIPMENT IS
TO BE CONNECTED.
150k
150k
120VAC
60Hz
150k
150k
PZ1
PZ2
PGOOD
PGOOD
22µH
V
IN
1µF
6V
LTC3588-2
V
OUT
CAP
SW
OUT
4.1V
10µF
25V
V
IN2
V
22µF
6V
Li-Ion
D0
D1
POWER
STREAM
LiR2450
120mAh
4.7µF
6V
GND
35882 F07
Figure 7. AC Line Powered 4.1V Li-Ion Battery Charger
Alternate Power Sources
The LTC3588-2 is not limited to use with piezoelectric ele-
mentsbutcanaccommodateawidevarietyofinputsources
dependingonthetypeofambientenergyavailable.Figure7
shows the LTC3588-2 internal bridge rectifier connected
to the AC line in series with four 150k current limiting
resistors. This is a high voltage application and minimum
spacing between the line, neutral, and any high voltage
components should be maintained per the applicable UL
specification. For general off-line applications refer to UL
regulation 1012.
PANELS ARE PLACED 6"
FROM 2' × 4' FLUORESCENT
LIGHT FIXTURES
COPPER PANEL
COPPER PANEL
(12" × 24")
(12" × 24")
PZ1
PZ2
PGOOD
22µH
V
PGOOD
IN
1µF
6V
LTC3588-2
4.5V
CAP
SW
OUT
10µF
25V
V
V
IN2
10µF
6V
D1
D0
4.7µF
6V
GND
35882 F08
Figure 8 shows an application where copper panels are
placednearastandardfluorescentroomlighttocapacitively
harvest energy from the electric field around the light. The
Figure 8. Electric Field Energy Harvester
35882fc
13
For more information www.linear.com/LTC3588-2
LTC3588-2
APPLICATIONS INFORMATION
that level. This same technique can be extended to AC
source that also have limited current available at the input.
frequency of the emission will be 120Hz for magnetic bal-
lastsbutcouldbehigherifthelightuseselectronicballast.
The LTC3588-2 bridge rectifier can handle a wide range
of input frequencies.
28k
PZ1
48V
PZ2
1mA
Figure 9 shows the LTC3588-2 powered by a 48V com-
munications line. In this example, 1mA is the maximum
currentthatisallowedtobedrawn.The28kcurrentlimiting
V
PGOOD
22µH
PGOOD
IN
1µF
6V
LTC3588-2
V
OUT
CAP
3.45V
SW
OUT
47µF
25V
3.5mA
V
IN2
V
resistor sets this current as the LTC3588-2 will shunt V
IN
D1
D0
at 20V. The advantage of this scheme is that the current at
+
4.7µF
6V
10µF
6V
LiFePO
4
GND
the output is multiplied by the ratio of V to V
(less the
IN
OUT
loss in the buck converter). This is useful in cases where
greater current is needed at the output than is available
at the input. The high UVLO of 16V prevents any start-up
issue as there is already a good multiplication factor at
35882 F09
Figure 9. Current Fed 3.45V LiFePO4 Battery Charger
35882fc
14
For more information www.linear.com/LTC3588-2
LTC3588-2
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 0.05
3.55 0.05
2.15 0.05 (2 SIDES)
1.65 0.05
PACKAGE
OUTLINE
0.25 0.05
0.50
BSC
2.38 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.125
0.40 0.10
TYP
6
10
3.00 0.10
(4 SIDES)
1.65 0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
PIN 1
TOP MARK
(SEE NOTE 6)
0.35 × 45°
CHAMFER
(DD) DFN REV C 0310
5
1
0.25 0.05
0.50 BSC
0.75 0.05
0.200 REF
2.38 0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
35882fc
15
For more information www.linear.com/LTC3588-2
LTC3588-2
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev I)
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.88
(.074)
1.88 ±0.102
(.074 ±.004)
0.889 ±0.127
(.035 ±.005)
1
0.29
REF
1.68
(.066)
0.05 REF
5.10
(.201)
MIN
1.68 ±0.102
3.20 – 3.45
DETAIL “B”
(.066 ±.004) (.126 – .136)
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
10
NO MEASUREMENT PURPOSE
0.50
(.0197)
BSC
0.305 ± 0.038
(.0120 ±.0015)
TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.497 ±0.076
(.0196 ±.003)
10 9
8
7 6
RECOMMENDED SOLDER PAD LAYOUT
REF
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
DETAIL “A”
0.254
(.010)
0° – 6° TYP
1
2
3
4 5
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
0.50
(.0197)
BSC
MSOP (MSE) 0213 REV I
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
35882fc
16
For more information www.linear.com/LTC3588-2
LTC3588-2
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
5/11
Add brackets to Absolute Maximum Ratings for V
and PGOOD.
2
OUT
Replace MS package description to the correct MSE package description.
Add to Related Parts section and order parts by part number.
Clarified title and Description
15
16
1
B
C
7/14
8/15
Clarified x-axis label on Figure 1
8
Clarified Figure 8
14
18
12
Clarified Related Parts list
Modified C
Equation
OUT
35882fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
17
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3588-2
TYPICAL APPLICATION
Piezoelectric Shunt Charger for Small Li-Ion Cells or Thin Film Batteries
ADVANCED CERAMETRICS PFCB-W14
V
OUT
PZ1
PZ2
SW
22µH
8.87k
5.0V
100µA CONTINUOUS
20mA PULSED
V
IN
1µF
V
OUT
LTC3588-2
DMP2104LP
6.3V
V
CC
CAP
22µF
25V
NTCBIAS
ADJ
LBO
C
47µF
6.3V
OUT
V
IN2
NC7SVL04
10k
LTC4070
D1
D0
PGOOD
NTC
INFINITE POWER SOLUTIONS
4.7µF
6.3V
MEC101-10SES
4.1V
1mAh
+
GND
GND
4.7M
T*
Li-ION
35882 TA02
* NTHS0805E3103LT
LOCATE NEAR BATTERY
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LT1389
LTC1540
LT3009
LTC3105
Nanopower Precision Shunt Voltage Reference
Nanopower Comparator with Reference
800nA Operating Current, 1.25V/2.5V/4.096V
0.3µA I , Drives 0.01µF, Adjustable Hysteresis, 2V to 11V Input Range
Q
3µA I , 20mA Low Dropout Linear Regulator
Low 3µA I , 1.6V to 20V Range, 20mA Output Current
Q
Q
400mA Step-Up Converter with 250mV Start-Up and
Maximum Power Point Control
High Efficiency Step-Up DC/DC Converter, V : 0.225V to 5V, Integrated
IN
Maximum Power Point Controller (MPPT), Photovoltaic Cells,
Thermoelectric Generators (TEGs), and Fuel Cells, Burst Mode® Operation
LTC3108/
LTC3108-1
Ultralow Voltage Step-Up Converter and Power Manager
V : 0.02V to 1V, V
= 2.2V, 2.35V, 3.3V, 4.1V, 5V, I = 6µA, 4mm ×
IN
OUT Q
3mm DFN-12, SSOP-16 Packages, LTC3108-1 V
3.7V, 4.5V
= 2.2V, 2.5V, 3V,
OUT
LTC3109
Auto-Polarity, Ultralow Voltage Step-Up Converter and Power |V |: 0.03V to 1V, V
= 2.2V, 2.35V, 3.3V, 4.1V, 5V, I = 7µA,
IN
OUT Q
Manager
4mm × 4mm QFN-20, SSOP-20 Packages
LTC3388-1/
LTC3388-3
20V High Efficiency Nanopower Step-Down Regulator
860nA I in Sleep, 2.7V to 20V Input, V : 1.2V to 5V,
Q
OUT
Enable and Standby Pins
LTC3588-1
Nanopower Energy Harvesting Power Supply
950nA I in Sleep, V : 1.8V, 2.5V, 3.3V, 3.6V,
Q OUT
Integrated Bridge Rectifier
LTC3631
LTC3642
LT3652
45V, 100mA, Synchronous Step-Down Regulator with 12µA I 4.5V to 45V Operating Range, Overvoltage Lockout Up to 60V
Q
45V, 50mA, Synchronous Step-Down Regulator with 12µA I
Power Tracking 2A Battery Charger for Solar Power
4.5V to 45V Operating Range, Overvoltage Lockout Up to 60V
Q
MPPT for Solar Applications, V : 4.95V to 32V, Charge Rate Up to 2A, User
IN
Selectable Termination: C/10 or On-Board Timer, Resister Programmable
Float Voltage up to 14.4V, 3mm × 3mm DFN12 or MSOP-12
LT3970
LT3971
LT3991
LTC4070
LTC4071
40V, 350mA Step-Down Regulator with 2.5µA I
Integrated Boost and Catch Diodes, 4.2V to 40V Operating Range
4.3V to 38V Operating Range, Low Ripple Burst Mode Operation
4.3V to 55V Operating Range, Low Ripple Burst Mode Operation
Q
38V, 1.2A, 2MHz Step-Down Regulator with 2.8µA I
Q
55V, 1.2A 2MHz Step-Down Regulator with 2.8µA I
Li-Ion/Polymer Shunt Battery Charger System
Q
450nA I , 1% Float Voltage Accuracy, 50mA Shunt Current 4V/4.1V/4.2V
Q
Li-Ion/Polymer Shunt Battery Charger System with Low
Battery Disconnect
550nA I , 1% Float Voltage Accuracy, <10nA Low Battery Disconnect,
Q
4V/4.1V/4.2V, 8-Lead 2mm × 3mm DFN and MSOP Packages
LTC3330
LTC3331
Nanopower Buck-Boost DC/DC with Energy Harvesting
Battery Life Extender
V : 2.7V to 20V, BAT: 1.8V to 5.5V, 750nA I , 5mm × 5mm
IN
Q
QFN-32 Package
Nanopower Buck-Boost DC/DC with Energy Harvesting
Battery Charger
V : 2.7V to 20V, BAT: Up to 4.2V, Shunt Charger, Low Battery
IN
Disconnect, 950nA I , 5mm × 5mm QFN-32 Package
Q
35882fc
LT 0815 REV C • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
18
●
●
LINEAR TECHNOLOGY CORPORATION 2010
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC3588-2
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