LTC3600IDD#PBF [Linear]
LTC3600 - 15V, 1.5A Synchronous Rail-to-Rail Single Resistor Step-Down Regulator; Package: DFN; Pins: 12; Temperature Range: -40°C to 85°C;
| 型号： | LTC3600IDD#PBF |
| 厂家： | 
Linear |
| 描述： | LTC3600 - 15V, 1.5A Synchronous Rail-to-Rail Single Resistor Step-Down Regulator; Package: DFN; Pins: 12; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总28页 (文件大小：826K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3600
15V, 1.5A Synchronous
Rail-to-Rail Single Resistor
Step-Down Regulator
FeaTures
DescripTion
TheLTC®3600isahighefficiency,monolithicsynchronous
buck regulator whose output is programmed with just one
external resistor. The accurate internally generated 50µA
current source on the ISET pin allows the use of a single
external resistor to program an output voltage that ranges
n
Single Resistor Programmable V
OUT
n
±±1 ꢀ Accuracy
SET
n
n
n
n
n
n
n
n
Tight V
Regulation ꢀndependent of V
Voltage
OUT
OUT
Easy to Parallel for Higher Current and Heat Spreading
Wide V Range 0V to V – 0.5V
OUT
ꢀN
High Efficiency: Up to 96%
1.5A Output Current
from 0V to 0.5V below V . The V
voltage feeds directly
IN
OUT
back to the error amplifier in unity gain fashion and equals
the ISET voltage. The operating supply voltage range is 4V
to 15V, making it suitable for dual lithium-ion battery and
5V or 12V input point-of-load power supply applications.
Adjustable Frequency: 200kHz to 4MHz
4V to 15V V Range
IN
Current Mode Operation for Excellent Line and Load
Transient Response
Zero Supply Current in Shutdown
Available in Thermally Enhanced 12-Pin
(3mm × 3mm) DFN and MSOP Packages
The operating frequency is synchronizable to an external
clock or programmable from 200kHz to 4MHz with an
external resistor. High switching frequency allows the use
of small surface mount inductors. The unique constant
on-timearchitectureisidealforoperatingathighfrequency
in high step-down ratio applications that also demand fast
load transient response.
n
n
applicaTions
n
Voltage Tracking Supplies
n
Point-of-Load Power Supplies
L, LT, LTC, LTM, Linear Technology, the Linear logo and OPTI-LOOP are registered trademarks
and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 5481178, 5705919,
5847554, 6580258.
n
Portable Instruments
Distributed Power Systems
n
Typical applicaTion
High Efficiency, ±MHz, ±.5A Step-Down Converter
Efficiency and Power Loss vs
Output Current
9
100
90
1.0
0.9
0.8
0.7
LTC3600
V
IN
V
V
= 12V
BOOST
IN
OUT
V
IN
12V
0.1µF
8
5
= 2.5V
RUN
50µA
80
DCM
POWER
LOSS
2.2µH
SW
OUT
+
V
70
OUT
2.5V
22µF
PWM CONTROL
AND SWITCH
DRIVER
10µF
ERROR
AMP
7
60
50
0.6
0.5
–
CCM
40
30
20
10
0
0.4
0.3
0.2
0.1
0
V
11
MODE/
SYNC INTV
CCM
0.1
RT
3
GND PGFB ITH PGOOD
ISET
CC
1
6
10
13
4
2
12
3600 TA01a
DCM
0.001
0.01
1
10
LOAD CURRENT (A)
3600 TA01b
0.1µF
1µF
49.9k
3600fd
1
LTC3600
absoluTe MaxiMuM raTings (Notes ±, 5)
V , SW Voltage......................................... –0.3V to 16V
ITH, RT Voltage.....................................–0.3V to INTV
MODE/SYNC, PGFB, PGOOD Voltage....–0.3V to INTV
Operating Junction Temperature Range
(Notes 2, 5)............................................ –40°C to 125°C
MSE Package Lead Temperature
(Soldering, 10 sec)................................................300°C
IN
CC
CC
SW Transient Voltage (Note 6).......................–2V to 21V
V
, ISET Voltage............................................0V to V
OUT
IN
BOOST Voltage ............................–0.3V to V + INTV
IN
CC
RUN Voltage................................................–0.3V to 12V
INTV Voltage ............................................ –0.3V to 7V
CC
pin conFiguraTion
TOP VIEW
TOP VIEW
1
2
3
4
5
6
12 PGOOD
ISET
ITH
1
2
3
4
5
6
ISET
ITH
RT
PGFB
RUN
12 PGOOD
11
10 INTV
11
V
OUT
V
OUT
CC
13
GND
10 INTV
13
GND
RT
CC
9
8
7
BOOST
9
8
7
BOOST
PGFB
V
IN
V
RUN
IN
MODE/SYNC
SW
SW
MODE/SYNC
MSE PACKAGE
DD PACKAGE
12-LEAD PLASTIC MSOP
12-LEAD (3mm × 3mm) PLASTIC DFN
T
= 125°C, θ = 43°C/W
JA
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
JMAX
T
= 125°C, θ = 55°C/W
JA
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
JMAX
orDer inForMaTion http://www.linear.com/product/LTC3600#orderinfo
LEAD FREE FꢀNꢀSH
LTC3600EDD#PBF
LTC3600IDD#PBF
LTC3600EMSE#PBF
LTC3600IMSE#PBF
TAPE AND REEL
PART MARKꢀNG*
PACKAGE DESCRꢀPTꢀON
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
LTC3600EDD#TRPBF
LTC3600IDD#TRPBF
LTC3600EMSE#TRPBF
LTC3600IMSE#TRPBF
LFXB
12-Lead (3mm × 3mm) Plastic DFN
12-Lead (3mm × 3mm) Plastic DFN
12-Lead Plastic MSOP
LFXB
3600
3600
12-Lead Plastic MSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
3600fd
2
LTC3600
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VꢀN = ±2V, unless otherwise noted.
SYMBOL
PARAMETER
CONDꢀTꢀONS
MꢀN
TYP
MAX
UNꢀTS
V
IN
V
IN
Supply Range
4
15
V
ISET
I
Reference Current
49.5
49.3
50
50
50.5
51
µA
µA
SET
l
l
I
I
I
Line Regulation
0.02
340
0.05
%/V
mV
µA
mV
%
SET
SET
SET
DROP_OUT Voltage
Load Regulation
I
I
> 45µA, V – V
SET
IN
SET
= 0 to 1.5A
0.25
OUT
Error Amp Input Offset
(Note 4)
–3
3
l
Error Amp Load Regulation
0.05
10
0.1
Minimum V
Voltage
V
= 0, R = 0
OUT
mV
mS
ns
OUT
ISET
g (EA)
m
Error Amplifier Transconductance
Minimum On-Time
0.63
30
0.9
2.4
t
t
I
ON(MIN)
OFF(MIN)
LIM
Minimum Off-Time
130
2
ns
l
Current Limit
1.6
A
Negative Current Limit
–0.9
200
100
3.45
150
A
R
R
Top Power NMOS On-Resistance
Bottom Power NMOS On-Resistance
mΩ
mΩ
V
TOP
BOTTOM
UVLO
V
INTV Undervoltage Lockout Threshold INTV Rising
3.7
1.8
CC
CC
UVLO Hysteresis
INTV Falling
mV
CC
l
V
Run Threshold
Run Hysteresis
RUN Rising
RUN Falling
1.55
0.13
V
V
RUN
RUN Pin Leakage
RUN = 12V
0
5
2
µA
V
V
Internal V Voltage
5.5V < V < 15V
4.8
5.4
INTVCC
CC
IN
INTV Load Regulation
I
= 0mA to 20mA
LOAD
0.3
0.645
%
V
CC
OV
UV
Output Overvoltage PGOOD Upper
Threshold
PGFB Rising
0.620
0.520
0.680
0.590
Output Undervoltage PGOOD Lower
Threshold
PGFB Falling
0.555
V
PGOOD Hysteresis
PGFB Returning
1mA Load
10
mV
Ω
PGOOD Pull-Down Resistance
200
PGOOD Leakage Current
MODE/SYNC Threshold
PGOOD = 5V
1
µA
V
MODE V
MODE V
0.4
V
V
V
V
MODE/SYNC
IL(MAX)
IH(MIN)
IH(MIN)
IL(MAX)
4.3
2.5
SYNC V
SYNC V
0.4
MODE/SYNC Pin Current
Switching Frequency
MODE = 5V
R = 36.1k
9.5
1
µA
MHz
kΩ
l
f
0.92
1.06
OSC
T
V
V
Pin Resistance to Ground
600
OUT
V
Overvoltage Lockout
V
IN
V
IN
Rising
Falling
17.5
16
V
V
INOV
IN
I
Input DC Supply Current
Discontinuous
Shutdown
(Note 3)
Q
Mode = 0, R = 36.1k
700
0
1100
1.5
µA
µA
T
Run = 0
3600fd
3
LTC3600
elecTrical characTerisTics
Note ±: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime. Absolute Maximum Ratings are those values
beyond which the life of a device may be impaired.
Note 3: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 4: The LTC3600 is tested in a feedback loop that adjusts V
to
OUT
achieve a specified error amplifier output voltage (I ).
TH
Note 5: This IC includes overtemperature protection that is intended
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 6: Duration of voltage transient is less than 20ns for each switching
cycle.
Note 2: The LTC3600 is tested under pulsed load conditions such that
T
≈ T . The LTC3600E is guaranteed to meet performance specifications
J
A
from 0°C to 85°C junction temperature. Specifications over the
–40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC3600I is guaranteed over the full –40°C to 125°C operating
junction temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
impedance and other environmental factors. The junction temperature
(T , in °C) is calculated from the ambient temperature (T , in °C) and
J
A
power dissipation (P , in watts) according to the formula:
D
T = T + (P • θ ), where θ (in °C/W) is the package thermal
J
A
D
JA
JA
impedance.
3600fd
4
LTC3600
Typical perForMance characTerisTics
Load Regulation
ꢀSET Current vs Temperature
ꢀSET Current vs VꢀSET
100
99
50.5
50.3
50.1
49.9
49.7
49.5
51
50
49
48
47
46
45
44
V
IN
=15V
V
OUT
V
ISET
98
97
96
95
V
V
= 12V
IN
= 3.3V
OUT
0
0.2 0.4 0.6 0.8
I
1
(A)
1.2 1.4 1.6 1.8
–50 –25
75 100
150
125
0
25 50
0
2
4
6
8
10 12 14 16
V
ISET
TEMPERATURE (°C)
OUT
3600 G02
3600 G01
3600 G03
ꢀSET Current Line Regulation
Shutdown ꢀQ vs VꢀN
Quiescent Current vs Temperature
50.4
50.2
50.0
49.8
49.6
49.4
49.2
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
V
= 0
RUN
CCM
DCM
I
I
(V
= 0V)
= 2.5V)
0.5
0
SET ISET
(V
SET ISET
0
2
4
6
8
10 12 14 16 18
0
2
4
6
8
10 12 14 16
–100 –50
0
50
100
150
200
V
IN
V
IN
TEMPERATURE (°C)
3600 G04
3600 G06
3600 G05
Transient Response CCM Operation,
External Compensation
Transient Response CCM
Operation, ꢀnternal Compensation
RDS(ON) vs Temperature
260
240
220
200
180
160
140
120
100
80
V
OUT
V
OUT
MTOP
100mV/DIV
AC-
100mV/DIV
AC-
COUPLED
COUPLED
MBOT
I
I
L
L
1A/DIV
1A/DIV
60
40
3600 G08
3600 G09
20µs/DIV
20µs/DIV
20
0
–50
V
V
I
= 12V
f
= 1MHz
ITH
V
V
I
= 12V
f
= 1MHz
IN
SW
IN
SW
= 3.3V
R
= 27.5kΩ, C = 250pF
= 3.3V
ITH = INTV
OUT
= 0A TO 1A
ITH
OUT
= 0A TO 1A
CC
0
50
100
150
MODE = INTV
C
MODE = INTV
CC
C
OUT
CC
OUT
L = 4.7µH
= 47µF
L = 4.7µH
= 47µF
TEMPERATURE (°C)
OUT
OUT
3600 G07
3600fd
5
LTC3600
Typical perForMance characTerisTics
Transient Response DCM,
Operation, ꢀnternal Compensation
Transient Response DCM,
Operation, External Compensation
Output Tracking
I
SET
VOLTAGE
V
V
OUT
OUT
100mV/DIV
AC-
100mV/DIV
AC-
V
OUT
I
2V/DIV
SET
COUPLED
COUPLED
VOLTAGE
V
OUT
I
I
L
1A/DIV
L
I
INDUCTOR
1A/DIV
CURRENT
500mA/DIV
3600 G10
3600 G11
3600 G12
20µs/DIV
20µs/DIV
1ms/DIV
V
V
= 12V
OUT
= 0.1A TO 1A
f
= 1MHz
V
V
= 12V
OUT
= 0.1A TO 1A
f
=1MHz
IN
SW
IN
SW
= 3.3V
R
= 27.5kΩ, C = 250pF
= 3.3V
ITH = INTV
MODE = 0
ITH
MODE = 0
= 47µF
ITH
CC
I
I
OUT
L = 4.7µH
OUT
L = 4.7µH
C
C
= 47µF
OUT
OUT
Discontinuous Conduction
Mode Operation
Continuous Conduction
Mode Operation
Switching Frequency/Period vs RT
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
6
5
4
3
2
1
0
I
I
L
L
1A/DIV
1A/DIV
t
SW
V
SW
5V/DIV
V
SW
5V/DIV
3600 G14
3600 G13
f
SW
V
V
= 15V
OUT
V
V
= 15V
OUT
IN
IN
= 2.5V
= 2.5V
MODE = INTV
L = 2.2µH
MODE = 0
L = 2.2µH
0
50
100
RT (kΩ)
150
200
CC
3600 G15
Switch Leakage Current
ꢀNTVCC Load Regulation
5.00
4.98
4.96
4.94
4.92
4.90
4.88
4.86
10
8
V
IN
= 12V
6
MBOT
4
MTOP
2
0
0
20 30 40 50 60 70 80 90 100
10
–50 –30 –10 10 30 50 70 90 110 130
INTV CURRENT (mA)
CC
TEMPERATURE (°C)
3600 G17
3600 G16
3600fd
6
LTC3600
Typical perForMance characTerisTics
Efficiency vs Load Current
VOUT = ±.2V, VꢀN = ±2V
Rising RUN Threshold vs
Temperature
Efficiency vs Load Current
VOUT = 3.3V, VꢀN = ±2V
100
90
100
90
1.60
1.55
1.50
1.45
1.40
80
80
70
70
DCM
DCM
60
50
60
50
CCM
CCM
40
30
20
10
0
40
30
20
10
0
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
–60 –40 –20
0
20 40 60 80 100 120 140
LOAD CURRENT (A)
LOAD CURRENT (A)
TEMPERATURE (°C)
3600 G20
3600 G19
3600 G18
Start-Up Waveform
Start-Up Waveform
Start-Up Waveform
RUN
5V/DIV
RUN
5V/DIV
RUN
5V/DIV
V
V
V
OUT
2V/DIV
OUT
OUT
2V/DIV
2V/DIV
I
I
L
1A/DIV
L
I
L
1A/DIV
3600 G21
3600 G22
3600 G23
1ms/DIV
1ms/DIV
1ms/DIV
MODE = CCM
MODE = DCM
MODE = CCM
NO PREBIASED V
NO PREBIASED V
V
V
V
IS PREBIASED TO 2V
OUT
OUT
OUT
IN
OUT
V
V
= 12V
OUT
V
V
= 12V
OUT
= 12V
IN
IN
= 3.3V
= 3.3V
= 3.3V
Start-Up Waveform
VꢀN Overvoltage
V
IN
RUN
5V/DIV
5V/DIV
V
OUT
V
OUT
1V/DIV
2V/DIV
I
L
1A/DIV
SW
10V/DIV
3600 G24
3600 G25
1ms/DIV
20ms/DIV
= 12V TO 18V TO 12V
MODE = DCM
V
V
I
IN
V
V
V
IS PREBIASED TO 2V
= 3.3V
= 1A
OUT
IN
OUT
OUT
= 12V
OUT
= 3.3V
V
RESISTOR = 30Ω
IN
MODE = CCM
3600fd
7
LTC3600
pin FuncTions
ꢀSET(Pin±):Accurate50µACurrentSource.Positiveinput
MODE/SYNC (Pin 6): Operation Mode Select. Tie this pin
totheerroramplifier.Connectanexternalresistorfromthis
to INTV to force continuous synchronous operation at
CC
pintosignalGNDtoprogramtheV
voltage.Connecting
all output loads. Tying it to GND enables discontinuous
mode operation at light loads. Applying an external clock
signal to this pin will synchronize switching frequency
to the external clock. During external clock synchroniza-
OUT
an external capacitor from ISET to ground will soft start
theoutputvoltageandreducecurrentinrushwhenturning
on. V
can also be programmed by driving ISET directly
OUT
with an external supply from 0 to V , in which case the
tion, R value should be set up such that the free running
IN
T
external supply would be sinking the provided 50µA. Do
not drive V
frequency is within 30% of the external clock frequency.
above V or below GND. Do not float ISET.
ISET
IN
SW (Pin 7): Switch Node Connection to External Inductor.
ꢀTH (Pin 2): Error Amplifier Output and Switching
Regulator Compensation Point. The internal current
comparator’s trip threshold is linearly proportional to
this voltage, whose normal range is from 0.3V to 2.4V.
Voltage swing of SW is from a diode voltage drop below
ground to V .
IN
V (Pin 8): Input voltage. Must decouple to GND with a
ꢀN
capacitor close to the V pin.
IN
For external compensation, tie a resistor (R ) in series
ITH
with a capacitor (C ) to signal GND. A separate 10pF
BOOST (Pin 9): Boosted Floating Driver Supply for Inter-
nal Top Power MOSFET. The (+) terminal of the bootstrap
capacitor connects here. This pin swings from a diode
ITH
high frequency filtering capacitor can also be placed
from ITH to signal GND. Tying ITH to INTV activates
CC
internal compensation.
voltage drop below INTV up to V + INTV .
CC
IN
CC
RT (Pin 3): Switching Frequency Programming Pin. Con-
nect an external resistor (between 200k to 10k) from RT
to SGND to program the frequency from 200kHz to 4MHz.
ꢀNTV (Pin±0):Internal5VRegulatorOutput.Theinternal
CC
power drivers and control circuits are powered from this
voltage. Decouple this pin to GND with a minimum of 1µF
low ESR ceramic capacitor.
Tying the RT pin to INTV programs 1MHz operation.
CC
Do not float the RT pin.
V
(Pin ±±): Output Voltage Pin. Output of the LTC3600
OUT
PGFB (Pin 4): Power Good Feedback. Place a resistor
voltage regulator. Also the negative input of the error
amplifier which is driven to be the same voltage as ISET.
divider on V
to detect power good level. If PGFB is
OUT
more than 0.645V, or less than 0.555V, PGOOD will be
PGOOD (Pin ±2): Output Power Good with Open-Drain
Logic. PGOOD is pulled to ground when the PGFB pin is
morethan0.645Vorlessthan0.555V.PGOODopen-drain
pulled down. Tie PGFB to INTV to disable the PGOOD
CC
function. Tying PGFB to a voltage greater than 0.64V and
less than 4V will force continuous synchronous operation
regardless of the MODE/SYNC state.
logic will be disabled if PGFB is tied to INTV .
CC
GND(ExposedPadPin±3):Ground.Returnpathofinternal
power MOSFETs. Connect the exposed pad to the negative
terminal of the input capacitor and output capacitor.
RUN(Pin5):RunControlInput. Enableschipoperationby
tying RUN above 1.55V. Tying it below 1V shuts down the
switchingregulator. Tyingitbelow0.4Vshutsofftheentire
chip. When tying RUN to more than 12V, place a resistor
(100k to 500k) between RUN and the voltage source.
3600fd
8
LTC3600
FuncTional DiagraM
V
ON
200k
0.2V
400k
4V
100k
2pF
GND
V
OUT
100pF
V
IN
8
V
IN
5V
REG
V
ON
C
IN
ION
BUFFER
PLL-SYNC
INTV
CC
( 30ꢀ)
0.0122 • V
IN
I
=
10
ION
R
T
C
VCC
BOOST
9
V
INTV
IN
V
VON
I
ION
×
t
ON
=
(1pF)
CC
R
S
TG
ON
M1
C
B
Q
SW
7
SWITCH LOGIC
AND ANTI-
SHOOT-THROUGH
20k
MODE/SYNC
6
OSC
L1
+
–
+
V
OUT
RT
I
I
+
CMP
REV
SENSE
3
C
OUT
600k
–
R
T
ENABLE
BG
M2
–3.3µA TO 6.7µA
PGB
–
SENSE
GND
13
PGOOD
12
3.3µA
0µA TO 10µA
V
OUT
11
1
240k
0.645V
–
OV
–
+
R
PG2
PGFB
4
+
INTV
CC
I
TH
2
R
50pF
PG1
100k
–
UV
0.555V
+
V
IN
RUN
–
+
50µA
EA
+
–
1.5V
ISET
3600 BD
1
5
C
ITH
RUN
R
ITH
R
SET
3600fd
9
LTC3600
operaTion
Main Control Loop
Pulling the RUN pin to ground forces the LTC3600 into
its shutdown state, turning off both power MOSFETs and
all of its internal control circuitry. Bringing the RUN pin
above 0.7V turns on the internal reference only, while still
keeping the power MOSFETs off. Further increasing the
RUN voltage above 1.5V turns on the entire chip.
The LTC3600 is a current mode monolithic step down
regulator.Theaccurate50µAcurrentsourceontheISETpin
allows the user to use just one external resistor to program
the output voltage in a unity gain buffer fashion. In normal
operation, the internal top power MOSFET is turned on for
a fixed interval determined by a fixed one-shot timer OST.
When the top power MOSFET turns off, the bottom power
ꢀNTV Regulator
CC
An internal low drop out (LDO) regulator produces the
5V supply that powers the drivers and the internal bias
MOSFET turns on until the current comparator I
trips,
CMP
restarting the one-shot timer and initiating the next cycle.
Inductor current is determined by sensing the voltage
drop across the SW and PGND nodes of the bottom power
MOSFET. The voltage on the ITH pin sets the comparator
threshold corresponding to inductor valley current. The
error amplifier, EA, adjusts this ITH voltage by comparing
circuitry. The INTV can supply up to 50mA RMS and
CC
must be bypassed to ground with a minimum of 1µF ce-
ramic capacitor. Good bypassing is necessary to supply
thehightransientcurrentsrequiredbythepowerMOSFET
gate drivers. Applications with high input voltage and high
switchingfrequencywillincreasedietemperaturebecause
of the higher power dissipation across the LDO. Connect-
theV voltagewiththevoltageonISET.Iftheloadcurrent
OUT
increases, it causes a drop in the V
voltage relative to
OUT
ing a load to the INTV pin is not recommended since
CC
V
. The ITH voltage then rises until the average inductor
ISET
it will further push the LDO into its RMS current rating
while increasing power dissipation and die temperature.
current matches that of the load current.
At low load current, the inductor current can drop to zero
and become negative. This is detected by current rever-
V Overvoltage Protection
ꢀN
sal comparator, I , which then shuts off the bottom
REV
In order to protect the internal power MOSFET devices
against transient voltage spikes, the LTC3600 constantly
power MOSFET, resulting in discontinuous operation.
Both power MOSFETs will remain off with the output
capacitor supplying the load current until the ITH voltage
rises above the zero current level (0.8V) to initiate another
cycle. Discontinuous mode operation is disabled by tying
monitors the V pin for an overvoltage condition. When
IN
V
rises above 16V, the regulator suspends operation
IN
by shutting off both power MOSFETs and discharges the
ISETpinvoltagetoground. OnceV dropsbelow15V, the
IN
the MODE pin to INTV , which forces continuous syn-
chronous operation regardless of output load.
CC
regulatorimmediatelyresumesnormalswitchingoperation
byfirstcharginguptheISETpintoitsprogrammedvoltage.
TheoperatingfrequencyisdeterminedbythevalueoftheR
T
Programming Switching Frequency
resistor, which programs the current for the internal oscilla-
tor as well as the current for the internal one-shot timer. An
internal phase-locked loop servos the switching regulator
on-time to track the internal oscillator to force constant
switching frequency. If an external synchronization clock is
present on the MODE/SYNC pin, the regulator on-time and
switching frequency would then track the external clock.
Connecting a resistor from the RT pin to GND programs
the switching frequency from 200kHz to 4MHz according
to the following formula:
10
3.6 •10 (1/F)
Frequency (Hz)=
RT (Ω)
Overvoltage and undervoltage comparators OV and UV
pull the PGOOD output low if the output power good
For ease of use, the RT pin can be connected directly to
theINTV pinfor1MHzoperation. DonotfloattheRTpin.
CC
feedback voltage V
exits a 7.5% window around the
PGFB
regulation point. Continuous operation is forced during
an OV condition. To defeat the PGOOD function, simply
The internal on-time phase-locked loop has a synchroni-
zation range of 30% around its programmed frequency.
tie PGFB to INTV .
CC
Therefore,duringexternalclocksynchronization,theproper
3600fd
10
LTC3600
operaTion
T
frequency is within this 30% range of the R programmed
frequency.
R value should be selected such that the external clock
compensation. This connects an internal 100k resistor
in series with a 50pF capacitor to the output of the error
amplifier (internal ITH compensation point). This is a
trade-off for simplicity instead of OPTI-LOOP® optimiza-
tion, whereITHcomponentsareexternalandareselected
to optimize the loop transient response with minimum
output capacitance.
T
Output Voltage Tracking and Soft Start
TheLTC3600allowstheusertoprogramitsoutputvoltage
ramp rate by means of the ISET pin. Since V
servos its
OUT
voltage to that of the ISET pin, placing an external capaci-
Minimum Off-Time Considerations
tor C on the ISET pin will program the ramp-up rate of
SET
the ISET pin and thus the V
voltage.
OUT
The minimum off-time, t
, is the smallest amount
OFF(MIN)
of time that the LTC3600 is capable of turning on the bot-
tom power MOSFET, tripping the current comparator and
turning the power MOSFET back off. This time is generally
about130ns. Theminimumoff-timelimitimposesamaxi-
t
−
•
RSET CSET
V
= I
• R
1− e
OUT(t)
ISET
SET
from 0 to 90% V
OUT
mum duty cycle of t /(t + t
). If the maximum
OFF(MIN)
ON ON
duty cycle is reached, due to a dropping input voltage for
example, then the output will drop out of regulation. The
minimum input voltage to avoid dropout is:
t
t
≅ − R
• C
• n(1− 0.9)
SET
SS
SS
SET
2.3R
• C
SET
SET
t
ON + tOFF(MIN)
The soft-start time t (from 0% to 90% V ) is 2.3
V
= V
•
SS
OUT
IN(MIN)
OUT
tON
times of time constant (R
• C ). The ISET pin can
SET
SET
also be driven by an external voltage supply capable of
sinking 50µA.
Conversely, the minimum on-time is the smallest dura-
tion of time in which the top power MOSFET can be in
its “on” state. This time is typically 30ns. In continuous
mode operation, the minimum on-time limit imposes a
minimum duty cycle of:
When starting up into a pre-biased V , the LTC3600 will
OUT
stay in discontinuous mode and keep the power switches
off until the voltage on ISET has ramped up to be equal
to V , at which point the switcher will begin switching
OUT
D
MIN
= f • t
SW ON(MIN)
and V
will ramp up with ISET.
OUT
Where t
is the minimum on-time. As the equation
ON(MIN)
Output Power Good
shows, reducing the operating frequency will alleviate the
minimum duty cycle constraint.
When the LTC3600’s output voltage is within the 7.5%
window of the regulation point, which is reflected back
In the rare cases where the minimum duty cycle is sur-
passed,theoutputvoltagewillstillremaininregulation,but
theswitchingfrequencywilldecreasefromitsprogrammed
value. Thisisanacceptableresultinmanyapplications, so
this constraint may not be of critical importance in most
cases. High switching frequencies may be used in the
design without any fear of severe consequences. As the
sections on inductor and capacitor selection show, high
switchingfrequenciesallowtheuseofsmallerboardcom-
ponents, thus reducing the size of the application circuit.
as a V
voltage in the range of 0.555V to 0.645V,
PGFB
the output voltage is in regulation and the PGOOD pin is
pulled high with an external resistor connected to INTV
CC
or another voltage rail. Otherwise, an internal open-drain
pull-down device (200Ω) will pull the PGOOD pin low.
To prevent unwanted PGOOD glitches during transients
or dynamic V
changes, the LTC3600’s PGOOD falling
OUT
edge includes a blanking delay of approximately 20µs.
ꢀnternal/External ꢀTH Compensation
For ease of use, the user can simplify the loop compen-
sation by tying the ITH pin to INTV to enable internal
CC
3600fd
11
LTC3600
applicaTions inForMaTion
C and C
Selection
significantly higher ESR, but can be used in cost-sensitive
applications provided that consideration is given to ripple
currentratingsandlongtermreliability.Ceramiccapacitors
haveexcellentlowESRcharacteristicsandsmallfootprints.
Their relatively low value of bulk capacitance may require
multiples in parallel.
ꢀN
OUT
The input capacitance, C , is needed to filter the trapezoi-
IN
dal wave current at the drain of the top power MOSFET.
To prevent large voltage transients from occurring, a low
ESR input capacitor sized for the maximum RMS current
should be used. The maximum RMS current is given by:
Using Ceramic ꢀnput and Output Capacitors
V
V
IN
OUT
−1
I
= I
OUT(MAX)
RMS
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
V
V
OUT
IN
This formula has a maximum at V = 2V
, where I
RMS
IN
OUT
= I
/2. This simple worst-case condition is commonly
OUT
used for design because even significant deviations do
not offer much relief. Note that ripple current ratings from
capacitor manufacturers are often based on only 2000
hours of life which makes it advisable to further derate
the capacitor, or choose a capacitor rated at a higher
temperature than required.
V input. Atbest, thisringingcancoupletotheoutputand
IN
be mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause
Several capacitors may also be paralleled to meet size or
height requirements in the design. For low input voltage
applications, sufficient bulk input capacitance is needed
to minimize transient effects during output load changes.
a voltage spike at V large enough to damage the part.
IN
When choosing the input and output ceramic capacitors,
choose the X5R and X7R dielectric formulations. These
dielectrics have the best temperature and voltage char-
acteristics of all the ceramics for a given value and size.
The selection of C
is determined by the effective series
OUT
resistance(ESR)thatisrequiredtominimizevoltageripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must instead fulfill a charge storage
requirement.Duringaloadstep,theoutputcapacitormust
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is dependent on the compensation and
the output capacitor size. Typically, three to four cycles
are required to respond to a load step, but only in the first
cycle does the output drop linearly. The output droop,
the load transient response. The output ripple, ΔV
, is
OUT
determined by:
ΔIL
ΔVOUT
≈
+ ΔIL •RESR
8 • fSW • COUT
The output ripple is highest at maximum input voltage
since ΔI increases with input voltage. Multiple capacitors
L
V
, is usually about two to three times the linear
placed in parallel may be needed to meet the ESR and
RMScurrenthandlingrequirements.Drytantalum,special
polymer,aluminumelectrolyticandceramiccapacitorsare
all available in surface mount packages. Special polymer
capacitors are very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
DROOP
drop of the first cycle. Thus, a good place to start with
the output capacitor value is approximately:
2.5 • ΔIOUT
fSW • VDROOP
COUT
More capacitance may be required depending on the duty
cycle and load step requirements.
3600fd
12
LTC3600
applicaTions inForMaTion
Inmostapplications,theinputcapacitorismerelyrequired
tosupplyhighfrequencybypassing,sincetheimpedanceto
the supply is very low. A 22µF ceramic capacitor is usually
enough for these conditions. Place this input capacitor as
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors, and output voltage
ripple. Highest efficiency operation is obtained at low
frequency with small ripple current. However, achieving
this requires a large inductor. There is a trade-off between
component size, efficiency and operating frequency.
close to V pin as possible.
IN
ꢀnductor Selection
A reasonable starting point is to choose a ripple current
Given the desired input and output voltages, the inductor
valueandoperatingfrequencydeterminetheripplecurrent:
that is about 40% of I
. Note that the largest ripple
IN
OUT(MAX)
current occurs at the highest V . To guarantee that ripple
current does not exceed a specified maximum, the induc-
tance should be chosen according to:
VOUT
fSW •L
VOUT
V
IN
1−
∆IL =
VOUT
VOUT
1−
L =
f
• ∆I
V
IN(MAX)
SW
L(MAX)
Table ±. ꢀnductor Selection Table
ꢀNDUCTANCE
(µH)
DCR
(mΩ)
MAX CURRENT
(A)
DꢀMENSꢀONS
(mm)
HEꢀGHT
(mm)
ꢀNDUCTOR
MANUFACTURER
IHLP-1616BZ-11 Series
1.0
2.2
4.7
24
61
95
4.5
3.25
1.7
4.3 × 4.7
4.3 × 4.7
4.3 × 4.7
2
2
2
Vishay
www.vishay.com
IHLP-2020BZ-01 Series
FDV0620 Series
1
18.9
45.6
79.2
108
113
139
18
37
51
68
7
5.4 × 5.7
5.4 × 5.7
5.4 × 5.7
5.4 × 5.7
5.4 × 5.7
5.4 × 5.7
6.7 × 7.4
6.7 × 7.4
6.7 × 7.4
6.7 × 7.4
2
2
2
2
2
2
2
2
2
2
2.2
3.3
4.7
5.6
6.8
4.2
3.3
2.8
2.5
2.4
1
5.7
4
3.2
2.8
Toko
www.toko.com
2.2
3.3
4.7
MPLC0525L Series
HCP0703 Series
1
16
24
40
6.4
5.2
4.1
11
9
8
6
5.5
4.5
4
6.2 × 5.4
6.2 × 5.4
6.2 × 5.4
7 × 7.3
7 × 7.3
7 × 7.3
7 × 7.3
7 × 7.3
7 × 7.3
7 × 7.3
2.5
2.5
2.5
3
3
3
3
3
3
3
NEC/Tokin
1.5
2.2
www.nec-tokin.com
1
9
Cooper Bussmann
www.cooperbussmann.com
1.5
2.2
3.3
4.7
6.8
8.2
14
18
28
37
54
64
RLF7030 Series
1
8.8
9.6
12
20
31
45
6.4
6.1
5.4
4.1
3.4
2.8
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
3.2
3.2
3.2
3.2
3.2
3.2
TDK
www.tdk.com
1.5
2.2
3.3
4.7
6.8
WE-TPC 4828 Series
1.2
1.8
2.2
2.7
3.3
3.9
4.7
17
20
23
27
30
47
52
3.1
2.7
4.8 × 4.8
4.8 × 4.8
4.8 × 4.8
4.8 × 4.8
4.8 × 4.8
4.8 × 4.8
4.8 × 4.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
Würth Elektronik
www.we-online.com
2.5
2.35
2.15
1.72
1.55
3600fd
13
LTC3600
applicaTions inForMaTion
loop feedback factor gain and phase. An output current
pulse of 20% to 100% of full load current having a rise
time of 1µs to 10µs will produce output voltage and ITH
pin waveforms that will give a sense of the overall loop
stability without breaking the feedback loop.
Oncethevalue forL isknown, thetypeofinductormust be
selected. Ferritedesignshaveverylowcorelossesandare
preferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing satura-
tion. Ferrite core material saturates “hard”, which means
that inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage
ripple. Do not allow the core to saturate!
Switching regulators take several cycles to respond to
a step in load current. When a load step occurs, V
OUT
immediately shifts by an amount equal to ΔI
• ESR,
LOAD
where ESR is the effective series resistance of C
.
OUT
generat-
ΔI
also begins to charge or discharge C
Different core materials and shapes will change the size/
currentandprice/currentrelationshipofaninductor.Toroid
or shielded pot cores in ferrite or permalloy materials are
small and do not radiate much energy, but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price versus size requirements
and any radiated field/EMI requirements. New designs for
surface mount inductors are available from Toko, Vishay,
NEC/Tokin, Cooper, TDK, and Würth Elektronik. Refer to
Table 1 for more details.
LOAD
OUT
ing a feedback error signal used by the regulator to return
V
V
to its steady-state value. During this recovery time,
canbemonitoredforovershootorringingthatwould
OUT
OUT
indicate a stability problem.
The initial output voltage step may not be within the band-
width of the feedback loop, so the standard second order
overshoot/DC ratio cannot be used to determine phase
margin. The gain of the loop increases with the R and
ITH
thebandwidthoftheloopincreaseswithdecreasingC .If
ITH
R
isincreasedbythesamefactorthatC isdecreased,
ITH
ITH
the zero frequency will be kept the same, thereby keeping
the phase the same in the most critical frequency range
of the feedback loop.
Checking Transient Response
The OPTI-LOOP compensation allows the transient re-
sponse to be optimized for a wide range of loads and
output capacitors. The availability of the ITH pin not only
allows optimization of the control loop behavior but also
providesaDCcoupledandACfilteredclosedloopresponse
test point. The DC step, rise time and settling at this test
point truly reflects the closed loop response. Assuming a
predominantly second order system, phase margin and/
or damping factor can be estimated using the percentage
of overshoot seen at this pin.
Theoutputvoltagesettlingbehaviorisrelatedtothestability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a
review of control loop theory, refer to Linear Technology
Application Note 76.
Insomeapplications,amoreseveretransientcanbecaused
by switching in loads with large (>10µF) load capacitors.
Thedischargedloadcapacitorsareeffectivelyputinparal-
TheITH external componentsshown intheFigure1 circuit
will provide an adequate starting point for most applica-
tions. The series R-C filter sets the dominant pole-zero
loop compensation. The values can be modified slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the final PC layout is done and
the particular output capacitor type and value have been
determined. The output capacitors need to be selected
because their various types and values determine the
lel with C
, causing a rapid drop in V
. No regulator
OUT
OUT
can deliver enough current to prevent this problem, if the
switchconnectingtheloadhaslowresistanceandisdriven
quickly. The solution is to limit the turn-on speed of the
™
load switch driver. A Hot Swap controller is designed
specifically for this purpose and usually incorporates cur-
rent limit, short-circuit protection, and soft-start.
3600fd
14
LTC3600
applicaTions inForMaTion
Efficiency Considerations
is switched from low to high to low again, a packet of
charge dQ moves from V to ground. The resulting
IN
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
dQ/dt is a current out of INTV that is typically much
CC
larger than the DC control bias current. In continuous
mode, I
= f (QT + QB), where QT and QB are
GATECHG
SW
the gate charges of the internal top and bottom power
MOSFETs and f is the switching frequency. Since
SW
INTV is a low dropout regulator output powered by
CC
% Efficiency = 100% – (L1 + L2 + L3 + …)
V , the INTV current also shows up as V current,
IN
CC
IN
unless a separate voltage supply (>5V and <6V) is used
where L1, L2, etc., are the individual losses as a percent-
age of input power.
to drive INTV .
CC
4. Other“hidden”lossessuchascoppertraceandinternal
load resistances can account for additional efficiency
degradations in the overall power system. It is very
important to include these system level losses in the
designofasystem.Otherlossesincludingdiodeconduc-
tion losses during dead-time and inductor core losses
generally account for less than 2% total additional loss.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
2
the losses in LTC3600 circuits: 1) I R losses, 2) transition
losses, 3) switching losses, 4) other losses.
2
1. I R losses are calculated from the DC resistances of
the internal switches, R , the external inductor, R ,
SW
L
andboardtraceresistance,R .Incontinuousmode,the
b
average output current flows through inductor L but is
“chopped” between the internal top and bottom power
MOSFETs. Thus, the series resistance looking into the
SW pin is a function of both top and bottom MOSFET
Thermal Considerations
In a majority of applications, the LTC3600 does not dis-
sipatemuchheatduetoitshighefficiencyandlowthermal
resistanceofitsexposedpadDFNorMSOPpackage.How-
ever, in applications where the LTC3600 is running at high
R
and the duty cycle (D) as follows:
DS(ON)
R
= (R )(D) + (R )(1-D)
DS(ON)TOP DS(ON)BOT
ambient temperature, high V , high switching frequency
SW
IN
andmaximumoutputcurrentload,theheatdissipatedmay
exceed the maximum junction temperature of the part. If
the junction temperature reaches approximately 160°C,
both power switches will be turned off until temperature
is about 15°C cooler.
TheR
forboththetopandbottomMOSFETscanbe
DS(ON)
obtained from the Typical Performance Characteristics
2
curves. Thus, to obtain I R losses:
2
2
I R losses = I
(R + R + R )
SW L b
OUT
2. Transition loss arises from the brief amount of time
the top power MOSFET spends in the saturated region
during switch node transitions. It depends upon the
input voltage, load current, internal power MOSFET
gate capacitance, internal driver strength, and switch-
ing frequency.
To avoid the LTC3600 from exceeding the maximum junc-
tion temperature, the user will need to do some thermal
analysis. The goal of the thermal analysis is to determine
whetherthepowerdissipatedexceedsthemaximumjunction
temperature of the part. The temperature rise is given by:
T
RISE
= P • θ
D JA
3. The INTV current is the sum of the power MOSFET
CC
driver and control currents. The power MOSFET driver
current results from switching the gate capacitance of
the power MOSFETs. Each time a power MOSFET gate
3600fd
15
LTC3600
applicaTions inForMaTion
As an example, consider the case when the LTC3600 is
Board Layout Considerations
usedinapplicationwhereV =12V,I =1.5A,frequency
IN
OUT
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3600. Check the following in your layout:
= 4MHz, V
= 1.8V. The equivalent power MOSFET
OUT
resistance R is:
SW
VOUT
1. Do the capacitors C connect to the power V and
IN
IN
RSW = RDS(ON)TOP
•
+ RDS(ON)BOT
power GND as close as possible? These capacitors
provide the AC current to the internal power MOSFETs
and their drivers.
V
IN
V − V
1.8
12
10.2
+ 0.1 •
12
IN
OUT
•
= 0.2 •
V
IN
2. Are C
and inductor closely connected? The (–) plate
OUT
= 0.115Ω
of C
returns current to PGND and the (–) plate of
OUT
C .
IN
The V current during 4MHz forced continuous operation
IN
with no load is about 11mA, which includes switching and
internal biasing current loss, transition loss, inductor core
loss and other losses in the application. Therefore, the
total power dissipated by the part is:
3. The ground terminal of the ISET resistor must be
connected to the other quiet signal GND and together
connect to the power GND on only one point. The ISET
resistor should be placed and routed away from noisy
components and traces, such as the SW line, and its
trace should be minimized.
2
P = I
• R + V • I (No Load)
SW IN VIN
D
OUT
2
= 2.25A • 0.115Ω + 12V • 11mA = 0.39W
4. Keep sensitive components away from the SW pin. The
The DFN 3mm × 3mm package junction-to-ambient
ISETresistor,R resistor,thecompensationcomponents
T
thermal resistance, θ , is around 55°C/W. Therefore, the
JA
C
ITH
and R , and the INTV bypass capacitor, should
ITH CC
junction temperature of the regulator operating in a 50°C
be routed away from the SW trace and the inductor.
ambient temperature is approximately:
5. A ground plane is preferred, but if not available, keep
the signal and power grounds segregated with small
signal components returning to the signal GND at one
point which is then connected to the power GND at the
exposed pad with minimal resistance.
°C
W
TJ = 0.39W • 55
+ 50°C = 71°C
Remembering that the above junction temperature is
obtained from an R at 25°C, we might recalculate
DS(ON)
Flood all unused areas on all layers with copper, which
reduces the temperature rise of power components.
These copper areas should be connected to one of the
the junction temperature based on a higher R
since
DS(ON)
it increases with temperature. Redoing the calculation
assuming that R increased 25% at 71°C yields a new
SW
input supplies: V or GND.
junction temperature of 75°C, which is still very far away
from thermal shutdown or maximum allowed junction
temperature rating.
IN
3600fd
16
LTC3600
applicaTions inForMaTion
Design Example
tor value for 2MHz switching frequency. Based on that,
T
R should be 18.2k. Then calculate the inductor value for
As a design example, consider using the LTC3600 in an
application with the following specifications:
about 40% ripple current at maximum V :
IN
1.8V
2MHz • 0.6A
1.8V
13.2V
L =
1−
= 1.3µH
V = 10.8V to 13.2V
IN
V
OUT
= 1.8V
I
I
f
= 1.5A
OUT(MAX)
OUT(MIN)
SW
The nearest standard value inductor would be 1.2µH.
will be selected based on the ESR that is required to
= 500mA
C
OUT
= 2MHz
satisfy the output voltage ripple requirement and the bulk
capacitance needed for loop stability. For this design, one
47µF ceramic capacitor will be used.
First, R is selected based on:
SET
VOUT
1.8V
RSET
=
=
= 36kΩ
C should be sized for a maximum current rating of:
50µA 50µA
IN
1/2
1.8V
13.2V
13.2V
1.8V
⎛
⎞ ⎛
⎞
⎠
For best accuracy, a 0.1% 36.1k resistor is selected.
IRMS = 1.5A
− 1 = 0.51A
⎟
⎜
⎝
⎟ ⎜
⎠ ⎝
Because efficiency is important at both high and low load
current, discontinuous mode operation will be utilized.
Decoupling the V pin with one 22µF ceramic capacitor
IN
Select from the characteristic curves the correct R resis-
is adequate for most applications.
T
3600fd
17
LTC3600
Typical applicaTions
9
LTC3600
V
IN
BOOST
V
IN
8
5
4V TO 15V
RUN
100k
10µF
50µA
0.1µF
2.2µH
+
PWM CONTROL
AND SWITCH
DRIVER
ERROR
AMP
SW
OUT
V
OUT
–
7
3.3V
22µF
V
11
MODE/
SYNC INTV
RT
GND PGFB ITH PGOOD
13 12
ISET
CC
1
6
10
3
4
2
3600 F01
66.5k
0.1µF
1µF 36.5k
56k
68pF
10pF
Figure ±. ±2V to 3.3V ±MHz Buck Regulator
±2V to ±.2V 2MHz Buck Regulator
9
LTC3600
V
IN
BOOST
V
IN
8
4V TO 15V
RUN
100k
10µF
50µA
0.1µF
5
+
PWM CONTROL
ERROR
AND SWITCH
0.47µH
SW
OUT
AMP
–
DRIVER
V
OUT
7
1.2V
22µF
V
11
MODE/
SYNC INTV
RT
3
GND PGFB ITH PGOOD
13 12
ISET
24k
CC
1
6
10
4
2
3600 TA02
100k
100k
0.1µF
1µF 18.7k
100k
3600fd
18
LTC3600
Typical applicaTions
0.9V FPGA Power Supply
9
9
LTC3600
LTC3600
V
IN
V
IN
BOOST
BOOST
V
IN
4V TO 12V
V
8
5
8
5
IN
RUN
RUN
50µA
50µA
0.1µF
0.1µF
1.1µH
PWM
CONTROL
AND
SWITCH
DRIVER
PWM
CONTROL
AND
SWITCH
DRIVER
+
+
ERROR
AMP
ERROR
AMP
10µF
10µF
1.1µH
SW
SW
7
7
–
–
GND
13
GND
22µF
22µF
13
OUT
11
V
V
OUT
11
MODE/
SYNC INTV
MODE/
SYNC
RT
3
PGFB
4
ITH PGOOD
PGOOD ITH PGFB
RT INTV
CC
ISET
ISET
CC
1
6
10
2
12
12
2
4
3
1
10
6
V
OUT
1µF
10pF
10pF
1µF
(0.9V, 6A)
9
9
FPGA
LTC3600
LTC3600
V
IN
V
IN
BOOST
BOOST
V
V
8
5
IN
8
5
IN
RUN
RUN
50µA
50µA
0.1µF
1.1µH
0.1µF
1.1µH
+
+
PWM
CONTROL
AND
SWITCH
DRIVER
PWM
CONTROL
AND
SWITCH
DRIVER
ERROR
AMP
ERROR
AMP
10µF
10µF
SW
SW
–
7
7
–
GND
13
GND
13
OUT
11
22µF
22µF
V
V
OUT
11
MODE/
SYNC INTV
MODE/
SYNC
RT
3
PGFB
4
ITH PGOOD
12
PGOOD ITH PGFB
12
RT INTV
ISET
CC
ISET
CC
10
6
10
2
1
2
4
3
6
1
4.53k
1µF
10pF
10pF
1µF
0.1µF
0.1µF
15k
330pF
3600 TA03
INTV
CC
5k
V+
SET
LTC6902*
DIV
MOD
PH
GND
OUT1
OUT2
OUT3
OUT4
*EXTERNAL CLOCK FOR FREQUENCY SYNCHRONIZATION IS RECOMMENDED
3600fd
19
LTC3600
Typical applicaTions
High Efficiency Fast Load Response Power Supply
9
LTC3600
V
IN
BOOST
4V TO 15V
8
5
RUN
50µA
100k
10µF
0.1µF
2.2µH
PWM
CONTROL
AND
SWITCH
DRIVER
+
ERROR
AMP
SW
V
OUT
2.52V
1.5A
–
7
GND
22µF
13
V
OUT
11
MODE/
SYNC INTV
RT
3
PGFB
4
ITH PGOOD
ISET
CC
1
6
10
2
12
56k
68pF
1µF
402Ω
IN
LT3083
50µA
3.3V
V
CONTROL
SET
OUT
3600 TA04
10µF
0.1µF
24.9k
3600fd
20
LTC3600
Typical applicaTions
LED Driver with Programmable Dimming Control
9
LTC3600
V
IN
BOOST
15V
8
5
RUN
50µA
100k
10µF
0.1µF
PWM
+
CONTROL
ERROR
AND
SWITCH
DRIVER
10µH*
SW
AMP
–
0.1Ω
22µF
7
GND
I
OUT
13
V
OUT
11
MODE/
SYNC INTV
RT
3
PGFB
4
ITH PGOOD
ISET
CC
1
6
10
2
12
**
(LED CURRENT: 20mA TO 500mA)
1µF
0k TO 1k
3600 TA05
*TDK LTF5022T-100M1R4-LC
**LUXEON LXML-PWN1-0100
High Efficiency ±2V Audio Driver
9
LTC3600
V
IN
BOOST
12V
8
5
8Ω
RUN
50µA
0.1µF
4.7µH
10µF
10µF
SPEAKER
PWM
CONTROL
AND
SWITCH
DRIVER
+
10µF
ERROR
AMP
SW
7
–
4.7µF
GND
13
V
OUT
11
MODE/
SYNC INTV
RT
3
PGFB
4
ITH PGOOD
ISET
CC
1
6
10
2
12
3600 TA06
10nF
3k
220pF
1µF
AUDIO
SIGNAL
120k
3600fd
21
LTC3600
Typical applicaTions
Programmable ±.5A Current Source
9
LTC3600
V
IN
BOOST
12V
8
5
RUN
50µA
0.1µF
2.2µH
PWM
+
10µF
CONTROL
ERROR
AMP
AND
SWITCH
DRIVER
SW
0.1Ω
22µF
I
=
OUT
7
–
0A TO 1.5A
GND
13
OUT
V
11
MODE/
SYNC INTV
RT
3
PGFB
4
ITH PGOOD
ISET
CC
1
6
10
2
12
0k TO 3k
1µF
3600 TA07
±2V Fan Speed Controller
INTV
CC
*
80.6k
12V
DC FAN
V
IN
+
V
+
–
LT1784
16.2k
49.9k
9
LTC3600
V
IN
BOOST
15V
8
RUN
50µA
100k
10µF
0.1µF
5
+
PWM
CONTROL
AND
SWITCH
DRIVER
ERROR
AMP
2.2µH
SW
7
–
GND
13
22µF
V
OUT
11
ITH PGOOD
12
MODE/
SYNC INTV
RT
3
PGFB
4
ISET
CC
1
6
10
2
113k
ALARM:
100k
LOGIC 1
IF TEMP
> 85°C
1µF
6.04k
*10k NTC THERMISTOR
MURATA NCP18XH103F03RB
3600 TA08
3600fd
22
LTC3600
Typical applicaTions
±5V, 3A Dual Phase Single-Output Regulator
9
LTC3600
V
IN
BOOST
V
IN
8
5
4V TO 15V
RUN
50µA
100k
10µF
0.1µF
2.2µH
+
PWM CONTROL
AND SWITCH
DRIVER
ERROR
AMP
SW
OUT
7
–
22µF
V
11
MODE/
SYNC INTV
RT
3
GND PGFB ITH PGOOD
13 12
ISET
CC
1
6
10
4
2
10pF
1µF
V
3A
= 2.5V
OUT
27k
9
LTC3600
V
150pF
IN
BOOST
V
IN
8
5
4V TO 15V
RUN
50µA
100k
10µF
0.1µF
2.2µH
+
PWM CONTROL
AND SWITCH
DRIVER
ERROR
AMP
SW
OUT
7
–
22µF
V
11
MODE/
SYNC INTV
RT
GND PGFB ITH PGOOD
ISET
CC
6
10
3
13
4
2
12
1
3600 TA09
24.9k
0.1µF
1µF
10pF
INTV
V+
OUT1
OUT2
MOD
CC
LTC6908-1*
100k
GND
SET
*EXTERNAL CLOCK FOR FREQUENCY SYNCHRONIZATION IS RECOMMENDED
3600fd
23
LTC3600
Typical applicaTions
±.5A Lab Supply with Programmable Current Limit
9
LTC3600
V
IN
BOOST
15V
8
5
RUN
50µA
100k
10µF
0.1µF
2.2µH
PWM
CONTROL
AND
SWITCH
DRIVER
+
ERROR
AMP
SW
0.1Ω
22µF
I
=
OUT
7
–
0A TO 1.5A
GND
13
V
OUT
11
MODE/
SYNC INTV
RT
3
PGFB
4
ITH PGOOD
ISET
CC
1
6
10
2
12
1µF
0k TO 3k
9
LTC3600
V
IN
BOOST
8
5
RUN
50µA
100k
10µF
0.1µF
2.2µH
+
PWM
CONTROL
AND
SWITCH
DRIVER
ERROR
AMP
SW
V
=
OUT
7
–
0V TO 12V
22µF
GND
13
V
OUT
11
MODE/
SYNC INTV
RT
3
PGFB
4
ITH PGOOD
12
ISET
CC
3600 TA10
6
10
2
1
0k TO 240k
1µF
3600fd
24
LTC3600
package DescripTion
Please refer to http://www.linear.com/product/LTC3600#packaging for the most recent package drawings.
DD Package
12-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-ꢀ725 Rev A)
0.70 0.05
2.38 0.05
ꢀ.65 0.05
3.50 0.05
2.ꢀ0 0.05
PACKAGE
OUTLINE
0.25 0.05
0.45 BSC
2.25 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.ꢀꢀ5
TYP
7
0.40 0.ꢀ0
ꢀ2
2.38 0.ꢀ0
ꢀ.65 0.ꢀ0
3.00 0.ꢀ0
(4 SIDES)
PIN ꢀ NOTCH
PIN ꢀ
TOP MARK
R = 0.20 OR
0.25 × 45°
CHAMFER
(SEE NOTE 6)
6
ꢀ
0.23 0.05
0.45 BSC
0.75 0.05
0.200 REF
2.25 REF
(DDꢀ2) DFN 0ꢀ06 REV A
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
ꢀ. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.ꢀ5mm ON ANY SIDE
5. EXPOSED PAD AND TIE BARS SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN ꢀ LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3600fd
25
LTC3600
package DescripTion
Please refer to http://www.linear.com/product/LTC3600#packaging for the most recent package drawings.
MSE Package
±2-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1666 Rev F)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ± 0.102
2.845 ± 0.102
(.112 ± .004)
0.889 ± 0.127
(.035 ± .005)
(.112 ± .004)
1
6
0.35
REF
1.651 ± 0.102
(.065 ± .004)
5.23
(.206)
MIN
1.651 ± 0.102
(.065 ± .004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
DETAIL “B”
12
4.039 ± 0.102
7
0.65
(.0256)
BSC
0.42 ± 0.038
(.0165 ± .0015)
(.159 ± .004)
TYP
(NOTE 3)
0.406 ± 0.076
RECOMMENDED SOLDER PAD LAYOUT
(.016 ± .003)
12 11 10 9 8 7
REF
DETAIL “A”
0.254
(.010)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
0° – 6° TYP
4.90 ± 0.152
(.193 ± .006)
GAUGE PLANE
0.53 ± 0.152
(.021 ± .006)
1
2 3 4 5 6
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MSE12) 0911 REV F
0.650
(.0256)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
3600fd
26
LTC3600
revision hisTory
REV
DATE
DESCRꢀPTꢀON
PAGE NUMBER
A
03/12 Clarified Feature and Description
Clarified Electrical Characteristics
Clarified ISET (Pin 1) Description
Clarified Functional Diagram
1
3
8
9
Modified Application Circuit
28
3
B
C
04/12 Changed MODE/SYNC Threshold SYNC V
from 1V to 2.5V
IH(MIN)
07/12 Clarified Supply Shutdown Current to Zero
Clarified Absolute Maximum Ratings to include Note 5
1
2
Clarified Conditions on Electrical Table, V = 12V
3
IN
Clarified Pin Functions
8
D
06/16 Revised Minimum Off Time Considerations section
11
3600fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTC3600
Typical applicaTion
High Efficiency, Low Noise ±A Supply
9
LTC3600
V
IN
BOOST
V
IN
8
5
0.1µF
3.3µH
8V TO 15V
RUN
50µA
100k
10µF
SW
OUT
PWM CONTROL
+
V
V
=
TRACK
AND SWITCH
7
ERROR
+ 0.5V
DRIVER
OUT
AMP
–
22µF
V
11
MODE/
SYNC INTV
RT
3
GND PGFB ITH PGOOD
ISET
CC
1
6
10
13
4
2
12
56k
68pF
1µF
10k
3600 TA11
IN
LT3080
V
CONTROL
10µA
LT3080
SET
OUT
V
OUT
= 0V TO 5V
1mA TO 1A
10µF
0.1µF
0k to 499k
relaTeD parTs
PART NUMBER DESCRꢀPTꢀON
COMMENTS
95% Efficiency, V : 4.5V to 15V, V
LTC3601
LTC3603
LTC3633
LTC3605
LTC3604
LT3080
15V, 1.5A (I ), 4MHz, Synchronous Step-Down DC/DC
= 0.6V, I = 300µA,
Q
OUT
IN
OUT(MIN)
OUT(MIN)
Converter
I
< 1µA, 4mm × 4mm QFN-20 and MSOP-16E Packages
SD
15V, 2.5A (I ), 3MHz, Synchronous Step-Down DC/DC
95% Efficiency, V : 4.5V to 15V, V
= 0.6V, I = 75µA,
Q
OUT
IN
Converter
I
< 1µA, 4mm × 4mm QFN-20 and MSOP-16E Packages
SD
15V, Dual 3A (I ), 4MHz, Synchronous Step-Down DC/
95% Efficiency, V : 3.6V to 15V, V
= 0.6V, I = 500µA,
OUT(MIN) Q
OUT
IN
DC Converter
I
< 15µA, 4mm × 5mm QFN-28 and TSSOP-28E Packages
SD
15V, 5A (I ), 4MHz, Synchronous Step-Down DC/DC
95% Efficiency, V : 4V to 15V, V
= 0.6V, I = 2mA,
OUT(MIN) Q
OUT
IN
Converter
I
< 15µA, 4mm × 4mm QFN-24 and MSOP-16E Packages
SD
15V, 2.5A (I ), 4MHz, Synchronous Step-Down DC/DC
95% Efficiency, V : 3.6V to 15V, V
= 0.6V, I = 300µA,
OUT(MIN) Q
OUT
IN
Converter
I
< 14µA, 3mm × 3mm QFN-16 and MSOP-16E Packages
SD
1.1A, Parallelable, Low Noise, Low Dropout Linear
Regulator
300mV Dropout Voltage (2 Supply Operation), Low Noise = 40µV
RMS
V : 1.2V to 36V, V : 0V to 35.7V, MSOP-8, 3mm × 3mm DFN Packages
IN
OUT
LT3083
Adjustable 3A Single Resistor Low Dropout Regulator
310mV Dropout Voltage, Low Noise 40µV
OUT
V : 1.2V to 23V,
RMS IN
V
: 0V to 22.7V, 4mm × 4mm DFN, TSSOP-16E Packages
3600fd
LT 0616 REV D • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
28
●
●
LINEAR TECHNOLOGY CORPORATION 2011
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC3600
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