LTC3601EMSEPBF_技术文档

LTC3601

1.5A, 15V Monolithic

Synchronous Step-Down

Regulator

FEATURES

DESCRIPTION

TheLTC^®3601isahighefﬁciency,monolithicsynchronous

buck regulator using a phase-lockable controlled on-time,

current mode architecture capable of supplying up to 1.5A

of output current. The operating supply voltage range is

from 4V to 15V, making it suitable for a wide range of

power supply applications.

n

4V to 15V Operating Input Voltage Range

n

1.5A Output Current

n

Up to 96% Efﬁciency

n

Very Low Duty Cycle Operation: 5% at 2.25MHz

n

Adjustable Switching Frequency: 800kHz to 4MHz

n

External Frequency Synchronization

n

Current Mode Operation for Excellent Line and Load

Theoperatingfrequencyisprogrammablefrom800kHzto

4MHz with an external resistor enabling the use of small

surface mount inductors. For switching noise sensitive

applications, the LTC3601 can be externally synchronized

over the same frequency range. An internal phase-locked

loop aligns the on-time of the top power MOSFET to the

internalorexternalclock. Thisuniqueconstantfrequency/

controlledon-timearchitectureisidealforhighstep-down

ratioapplicationsthatdemandhighswitchingfrequencies

and fast transient response.

Transient Response

User Selectable Burst Mode^®(No Load I = 300μA) or

n

Q

Forced Continuous Operation

0.6V Reference Allows Low Output Voltages

Short-Circuit Protected

Output Voltage Tracking Capability

Programmable Soft-Start

Power Good Status Output

Available in Small, Thermally Enhanced, 16-Pin QFN

n

(3mm × 3mm) and MSOP Packages

The LTC3601 offers two operational modes: Burst Mode

operation and forced continuous mode to allow the user

to optimize output voltage ripple, noise, and light load

efﬁciency for a given application. Maximum light load

efﬁciency is achieved with the selection of Burst Mode

operationwhileforcedcontinuousmodeprovidesminimum

output ripple and constant frequency operation.

APPLICATIONS

n

Distributed Power Systems

n

Lithium-Ion Battery-Powered Instruments

n

Point-of-Load Power Supply

L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks

of Linear Technology Corporation. All other trademarks are the property of their respective

owners. Protected by U.S. Patents, including 5481178, 5847554, 6580258, 6304066, 6476589,

6774611.

TYPICAL APPLICATION

Efﬁciency and Power Loss vs Load Current

100

90

80

70

60

50

40

30

20

10

0

1000

100

10

V

IN

V

BOOST

SW

IN

4V TO 15V

RUN

0.1μF

22μF

2.2μH

V

3.3V

1.5A

OUT

PGOOD

TRACK

V

ON

180k

22μF

10pF

LTC3601

INTV

ITH

RT

FB

CC

2.2μF

40k

MODE/SYNC

3601 TA01a

V

IN

V

IN

= 5V

SGND

PGND

= 12V

1

0.001

0.01

0.1

1

10

LOAD CURRENT (A)

3601 TA01b

3601f

1

LTC3601

ABSOLUTE MAXIMUM RATINGS ^{(Note 1)}

SW, RUN .......................................... –0.3V to V + 0.3V

V ............................................................. –0.3V to 16V

IN

SW Source Current (DC).............................................2A

Peak SW Source Current..........................................3.5A

Operating Junction Temperature Range

V Transient Voltage.................................................18V

BOOST .................................................... –0.3V to 18.6V

BOOST-SW................................................ –0.3V to 3.6V

(Notes 2, 3) ........................................... –40°C to 125°C

Storage Temperature Range................... –65°C to 125°C

Lead Temperature (Soldering, 10 sec)

INTV ...................................................... –0.3V to 3.6V

CC

ITH, RT....................................... –0.3V to INTV + 0.3V

CC

MODE/SYNC, FB ........................ –0.3V to INTV + 0.3V

CC

MSOP ............................................................... 300°C

TRACK ....................................... –0.3V to INTV + 0.3V

CC

PGOOD, V .............................................. –0.3V to 16V

ON

PIN CONFIGURATION

TOP VIEW

16 15 14 13

1

2

3

4

5

6

7

8

SW

16 PGOOD

MODE/SYNC

PGOOD

SW

1

2

3

4

12 ITH

11 FB

15 MODE/SYNC

PGND

BOOST

14

13

V

IN

17

12 RUN

RT

10

9

INTV

11 TRACK

10

9

CC

ON

SW

SGND

V

I

TH

RT

FB

5

6

7

8

MSE PACKAGE

16-LEAD PLASTIC MSOP

T

= 125°C, θ = 38°C/W

JA

JMAX

UD PACKAGE

16-LEAD (3mm s 3mm) PLASTIC QFN

EXPOSED PAD (PIN 17) IS SGND, MUST BE SOLDERED TO PCB

T

= 125°C, θ = 45°C/W

JA

JMAX

EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB

ORDER INFORMATION

LEAD FREE FINISH

LTC3601EUD#PBF

LTC3601IUD#PBF

LTC3601EMSE#PBF

LTC3601IMSE#PBF

TAPE AND REEL

PART MARKING*

PACKAGE DESCRIPTION

16-Lead (3mm × 3mm) Plastic QFN

TEMPERATURE RANGE

–40°C to 85°C

LTC3601EUD#TRPBF

LTC3601IUD#TRPBF

LTC3601EMSE#TRPBF

LTC3601IMSE#TRPBF

LFJC

3601

16-Lead (3mm × 3mm) Plastic QFN

16-Lead Plastic MSOP

–40°C to 125°C

–40°C to 85°C

–40°C to 125°C

16-Lead Plastic MSOP

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *The temperature grade is identiﬁed by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

3601f

2

LTC3601

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

junction temperature range, otherwise speciﬁcations are at T_A= 25°C. V_VIN= 12V, unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

l

V

Input Supply Range

4

15

V

VIN

I

Input DC Supply Current

Forced Continuous Operation

Sleep Current

Q

MODE = 0V

700

300

14

1000

500

25

μA

MODE = INTV , V > 0.6V

CC FB

Shutdown

RUN = 0V

l

V

Feedback Reference Voltage

Reference Voltage Line Regulation

Output Voltage Load Regulation

Feedback Pin Input Current

Error Ampliﬁer Transconductance

Minimum On-Time

0.594

0.600

0.01

0.1

0.606

V

%/V

%

FB

ΔV

V

= 4V to 15V

VIN

LINEREG

ITH = 0.6V to 1.6V

= 0.6V

LOADREG

I

V

30

nA

mS

ns

FB

g

ITH = 1.2V

2.0

20

m(EA)

t

I

f

V

= 1V, V = 4V

ON(MIN)

OFF(MIN)

LIM

ON

IN

Minimum Off-Time

= 6V

40

60

ns

Valley Switch Current Limit

Oscillator Frequency

1.7

2.2

2.8

A

V

R

= INTV

= 160k

= 80k

1.4

1.7

3.4

2

4

2.6

2.3

4.6

MHz

OSC

RT

CC

R

V

Top Switch On-Resistance

130

100

mΩ

DS(ON)

Bottom Switch On-Resistance

l

V

Overvoltage Lockout Threshold

V

Rising

Falling

16.8

15.8

17.5

16.5

18

17

V

VIN-OV

IN

V

INTV Voltage

4V < V < 15V

3.15

3.3

0.6

3.45

V

INTVCC

CC

IN

ΔINTV

INTV Load Regulation (Note 4)

I = 0mA to 20mA

INTVCC

%

CC

V

INTV Undervoltage Lockout

INTV Rising, V = INTV

CC

2.75

2.45

2.9

V

UVLO

CC

IN

Threshold

INTV Falling, V = INTV

CC

IN

CC

l

V

RUN Threshold

RUN Rising

RUN Falling

1.21

0.97

1.25

1.0

1.29

1.03

V

RUN

I

RUN Leakage Current

V

= 15V

VIN

0

3

μA

RUN(LKG)

V

PGOOD Good-to-Bad Threshold

FB Rising

FB Falling

8

10

%

FB_GB

FB_BG

PGOOD

–8

–10

V

PGOOD Bad-to-Good Threshold

FB Rising

FB Falling

–3

3

–5

5

%

t

Power Good Filter Time

PGOOD Pull-Down Resistance

Switch Leakage Current

Internal Soft-Start Time

TRACK Pin

20

40

15

μs

Ω

R

10mA Load

PGOOD

SW(LKG)

SS

I

t

V

= 0V

0.01

400

0.3

1.4

1

μA

μs

RUN

from 10% to 90% Full Scale

700

FB

V

TRACK = 0.3V

0.28

0.315

mV

μA

FB_TRACK

TRACK

I

TRACK Pull-Up Current

MODE Threshold Voltage

l

V

MODE V

1.0

V

MODE/

SYNC

IH

IL

0.4

l

SYNC Threshold Voltage

MODE Input Current

SYNC V

0.95

V

IH

I

MODE = 0V

MODE = INTV

–1.5

1.5

μA

MODE

CC

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC3601E is guaranteed to meet performance speciﬁcations

from 0°C to 85°C. Speciﬁcations over the –40°C to 125°C operating

junction temperature range are assured by design, characterization, and

correlation with statistical process controls. The LTC3601I is guaranteed

over the –40°C to 125°C operating junction temperature range.

3601f

3

LTC3601

ELECTRICAL CHARACTERISTICS

Note 3: T is calculated from the ambient temperature, T , and power

Note 4: Maximum allowed current draw when used as a regulated output

is 5mA. This supply is only intended to provide additional DC load current

as needed and not intended to regulate large transient or ac behavior as

these waveforms may impact LTC3601 operation.

J

A

dissipation, P , according to the following formula:

D

T = T + (P • θ )

JA

J

A

D

where θ = 45°C/W for the QFN package and θ = 38°C/W for the MSOP

JA

package.

TYPICAL PERFORMANCE CHARACTERISTICS

T_A= 25°C, V_IN= 12V, f_O= 1MHz, L = 2.2μH unless otherwise noted.

Efﬁciency vs Load Current

Burst Mode Operation

Efﬁciency vs Load Current

Forced Continuous Mode

Efﬁciency vs Load Current

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

V

= 1.8V

V

= 1.8V

OUT

BURST

FORCED

CONTINUOUS

V

= 4V

= 8V

= 12V

V

= 4V

= 8V

= 12V

IN

V

OUT

= 3.3V

= 5V

OUT

V

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

10

LOAD CURRENT (A)

3601 G01

3601 G03

3601 G02

Efﬁciency vs Input Voltage

Burst Mode Operation

Efﬁciency vs Frequency

Forced Continuous Mode

Reference Voltage vs

Temperature

0.605

0.603

0.601

0.599

0.597

0.595

100

95

92

90

V

LOAD

=1.8V

= 500mA

OUT

I

= 100mA

LOAD

I

= 500mA

LOAD

90

88

86

85

L = 2.2μH

I

= 1.5A

LOAD

80

75

L = 1μH

I

= 10mA

LOAD

84

82

80

70

65

60

V

= 1.8V

OUT

FIGURE 7 CIRCUIT

6

8

12

–50 –25

0

25

50

75

125

4

14

16

100

10

0.5

1.0

1.5

2.0

2.5

3.0

TEMPERATURE (°C)

FREQUENCY (MHz)

INPUT VOLTAGE (V)

3601 G04

3601 G06

3601 G05

3601f

4

LTC3601

TYPICAL PERFORMANCE CHARACTERISTICS

T_A= 25°C, V_IN= 12V, f_O= 1MHz, L = 2.2μH unless otherwise noted.

Quiescent Current vs

Supply Voltage

R_DS(ON)vs Temperature

Switch Leakage vs Temperature

200

160

120

80

380

340

300

260

6000

5000

4000

3000

V

= 12V

DS

TOP SWITCH

R

DS(ON)

BOTTOM SWITCH

R

DS(ON)

2000

1000

0

TOP SWITCH

BOTTOM SWITCH

40

220

0

–50 –25

0

25

50

75 100 125

4

6

8

10

12

14

16

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

3601 G09

3601 G07

3601 G08

TRACK Pull-Up Current

vs Temperature

Oscillator Frequency vs

Temperature

Oscillator Internal Set Frequency

vs Temperature

2.0

2.75

2.50

2.25

2.00

2.0

1.8

R

= I

NTVCC

T

1.5

1.0

1.6

1.4

1.2

1.0

0.8

0.5

0

–0.5

–1.0

–1.5

1.75

1.50

1.25

–2.0

0.6

–25

0

50

75 100 125

–50

25

50

75

100 125

–50

25

50

75

100 125

–50

25

–25

0

–25

0

TEMPERATURE (°C)

3601 G10

3601 G22

3601 G23

Bottom Switch Current Limit

vs Temperature

Load Regulation

1.2

1.0

0.8

0.6

0.4

0.2

0

3.5

3.0

Burst Mode OPERATION

FORCED CONTINUOUS

2.5

2.0

1.5

1.0

0.5

0

–0.2

50

TEMPERATURE (°C)

100 125

1000

1500

–50 –25

0

25

75

0

250

500

750

(mA)

1250

I

LOAD

3601 G11

3601 G21

3601f

5

LTC3601

TYPICAL PERFORMANCE CHARACTERISTICS

T_A= 25°C, V_IN= 12V, f_O= 1MHz, L = 2.2μH unless otherwise noted.

Output Voltage vs Time

Burst Mode Operation

Output Voltage vs Time

Forced Continuous Mode

Output Tracking

V

OUT

SW

5V/DIV

SW

5V/DIV

TRACK

V

OUT

20mV/DIV

AC COUPLED

V

FB

I

L

I

L

1A/DIV

3601 G12

3601 G13

3601 G14

V

LOAD

= 12V

2μs/DIV

V

LOAD

= 12V

2μs/DIV

V

R

= 12V

2ms/DIV

IN

OUT

= 1.8V

= 36Ω

OUT

I

= 100mA

I

= 100mA

LOAD

Start-Up from Shutdown

Burst Mode Operation

Start-Up from Shutdown

Forced Continuous Mode

Load Step

Burst Mode Operation

RUN

2V/DIV

V

OUT

2V/DIV

100mV

PGOOD

5V/DIV

AC COUPLED

V

I

OUT

L

V

1V/DIV

OUT

1A/DIV

2V/DIV

I

L

I

LOAD

1A/DIV

I

L

1A/DIV

3601 G16

3601 G15

3601 G17

V

I

= 12V

200μs/DIV

V

I

= 12V

200μs/DIV

V

I

= 12V

10μs/DIV

IN

OUT

IN

OUT

IN

OUT

= 1.8V

= 1.5A

= 1.8V

= 150mA TO 1.5A

= 20mA

LOAD

Start-Up Into Pre-Biased Output

(1V Pre-Bias) Burst Mode

Operation

Load Step

Forced Continuous Mode

Short-Circuit Waveforms

Forced Continuous Mode

RUN

PGOOD

2V/DIV

V

OUT

10V/DIV

100mV

PGOOD

5V/DIV

AC COUPLED

V

I

L

OUT

1V/DIV

V

1A/DIV

OUT

1V/DIV

I

L

I

LOAD

2A/DIV

I

L

1A/DIV

3601 G19

3601 G18

3601 G20

V

= 12V

100μs/DIV

V

I

= 12V

10μs/DIV

IN

OUT

V

I

= 12V

1ms/DIV

IN

OUT

IN

OUT

= 1.8V

= 150mA TO 1.5A

= 1.8V

= 5mA

LOAD

3601f

6

LTC3601

PIN FUNCTIONS ^(QFN/MSE)

MODE/SYNC (Pin 1/Pin 15): Mode Selection and External

Synchronization Input Pin. This pin places the LTC3601

into forced continuous operation when tied to ground.

High efﬁciency Burst Mode operation is enabled by either

RT(Pin10/Pin8):OscillatorFrequencyProgramPin.Con-

nect an external resistor, between 80k to 400k, from this

pin to SGND to program the LTC3601 switching frequency

from 800kHz to 4MHz. When RT is tied to INTV , the

CC

ﬂoatingthispinorbytyingthispintoINTV . Whendriven

switching frequency will default to 2MHz.

CC

with an external clock, an internal phase-locked loop will

synchronize the phase and frequency of the internal oscil-

lator to that of the incoming clock signal. During external

clock synchronization, the LTC3601 will default to forced

continuous operation.

FB (Pin 11/Pin 9): Output Voltage Feedback Pin. Input to

the error ampliﬁer that compares the feedback voltage to

the internal 0.6V reference voltage. Connect this pin to

the appropriate resistor divider network to program the

desired output voltage.

PGOOD (Pin 2/Pin 16): Open-Drain Power Good Output

Pin. PGOOD is pulled to ground when the voltage at the

FB pin is not within 8% (typical) of the internal 0.6V

reference. PGOOD becomes high impedance once the

voltage at the FB pin returns to within 5% (typical) of

the internal reference.

ITH (Pin 12/Pin 10): Error Ampliﬁer Output and Switching

Regulator Compensation Pin. Connect this pin to appro-

priate external components to compensate the regulator

loop frequency response. Connect this pin to INTV to

CC

use the default internal compensation.

TRACK/SS (Pin 13/Pin 11): Output Voltage Tracking and

Soft-Start Input Pin. Forcing a voltage below 0.6V on

this pin overrides the internal reference input to the error

ampliﬁer. The LTC3601 will servo the FB pin to the TRACK

voltageunderthiscondition.Above0.6V,thetrackingfunc-

tion stops and the internal reference resumes control of

the error ampliﬁer. An internal 1.4μA pull-up current from

SW (Pins 3, 4/Pins 1, 2): Switch Node Output Pin. Con-

nect this pin to the SW side of the external inductor. The

normal operation voltage swing of this pin ranges from

ground to PV .

IN

BOOST (Pin 6/Pin 5): Boosted Floating Driver Supply

Pin. The (+) terminal of the external bootstrap capacitor

connects to this pin while the (–) terminal connects to

the SW pin. The normal operation voltage swing of this

pin ranges from a diode voltage drop below INTV_CCup

to PV_IN+ INTV_CC.

INTV allows a soft-start function to be implemented by

CC

connecting an external capacitor between this pin and

ground. See Applications Information section for more

details.

INTV (Pin 7/Pin 6): Internal 3.3V Regulator Output Pin.

RUN (Pin 14/Pin 12): Regulator Enable Pin. Enables chip

operation by applying a voltage above 1.25V. A voltage

below 1V on this pin places the part into shutdown. Do

not ﬂoat this pin.

CC

This pin should be decoupled to PGND with a low ESR

ceramic capacitor of 1μF or more.

V

(Pin 8/Pin 7): On-Time Voltage Input Pin. This pin

ON

setsthevoltagetrippointfortheon-timecomparator.Con-

nect this pin to the regulated output to make the on-time

proportional to the output voltage. The pin impedance is

normally 180kΩ.

V (Pins 15, 16/Pins 13, 14): Main Power Supply Input

IN

Pins. These pins should be closely decoupled to PGND

with a low ESR capacitor of 10μF or more.

PGND (Pin 17/Pins 3, 4): Power Ground Pin. The (–)

SGND (Pin 9/Pin 17): Signal Ground Pin. This pin should

have a low noise connection to reference ground. The

feedbackresistornetwork,externalcompensationnetwork

and RT resistor should be connected to this ground. In

the MSE package, this pin must be soldered to the PCB

to provide a good thermal contact to the PCB.

terminal of the input bypass capacitor, C , and the (–)

IN

terminal of the output capacitor, C , should be tied to

OUT

this pin with a low impedance connection. In the QFN

package this pin must be soldered to the PCB to provide

low impedance electrical contact to ground and good

thermal contact to the PCB.

3601f

7

LTC3601

FUNCTIONAL BLOCK DIAGRAM ^{QFN Package}

C

IN

V

ON

V

IN

ON

0.72V

6V

180k

V

IN

3.3V

REG

V

IN

I

ON

CONTROLLER

I

ON

INTV

CC

V

I

C

VCC

VON

t

=

R

S

ON

ION

Q

BOOST

RT

OSC

TG

C

BOOST

M1

SW

R

RT

SWITCH

LOGIC

L1

ON

AND

15k

ANTI-

SHOOT

THROUGH

+

–

+

C

OUT

I

CMP

REV

+

–

SENSE

–

MODE/SYNC

OSC

PLL-SYNC

SENSE

RUN

BG

M2

PGND

FOLDBACK

DISABLED

AT START-UP

INTV

PGOOD

CC

0.3V

+

–

FOLDBACK

0.648V

–

+

Q2 Q4

OV

UV

R2

R1

I

FB

THB

Q6

SGND

Q1

–

+

0.552V

INT

VCC

1.4μA

RUN

SS

–

+

+ ^EA+

–

0.48V

1.25V

0.6V

REF

INTERNAL

SOFT-START

ITH

RUN

TRACK

C

SS

C1

R

C

3605 BD

3601f

8

LTC3601

OPERATION

The LTC3601 is a current mode, monolithic, step-down

regulatorcapableofprovidingupto1.5Aofoutputcurrent.

Itsuniquecontrolledon-timearchitectureallowsextremely

lowstep-downratioswhilemaintainingaconstantswitch-

ing frequency. Part operation is enabled by raising the

voltage on the RUN pin above 1.25V nominally.

the part into a low quiescent current sleep state resulting

in discontinuous operation and increased efﬁciency at low

load currents. Both power MOSFETs will remain off with

the part in sleep and the output capacitor supplying the

load current until the ITH voltage rises sufﬁciently to initi-

ate another cycle. Discontinuous operation is disabled by

tying the MODE/SYNC pin to ground placing the LTC3601

into forced continuous mode. During forced continuous

mode, continuous synchronous operation occurs regard-

less of the output load current.

Main Control Loop

In normal operation the internal top power MOSFET is

turned on for a ﬁxed interval determined by an internal

one-shot timer (“ON” signal in the Block Diagram). When

the top power MOSFET turns off, the bottom power

“Power Good” Status Output

MOSFET turns on until the current comparator, I

,

The PGOOD open-drain output will be pulled low if the

regulatoroutputexitsa 8%windowaroundtheregulation

point. This condition is released once regulation within

a 5% window is achieved. To prevent unwanted PGOOD

CMP

trips, thus restarting the one-shot timer and initiating the

next cycle. The inductor current is monitored by sensing

the voltage drop across the SW and PGND nodes of the

bottom power MOSFET. The voltage at the ITH pin sets the

glitches during transients or dynamic V

changes, the

OUT

I

comparator threshold corresponding to the induc-

LTC3601 PGOOD falling edge includes a ﬁlter time of ap-

proximately 40μs.

CMP

tor valley current. The error ampliﬁer EA adjusts this ITH

voltage by comparing an internal 0.6V reference to the

feedbacksignal,V ,derivedfromtheoutputvoltage.If,for

V Overvoltage Protection

IN

FB

example, the load current increases, the feedback voltage

will decrease relative to the internal 0.6V reference. The

ITH voltage then rises until the average inductor current

matches that of the load current.

In order to protect the internal power MOSFET devices

against transient voltage spikes, the LTC3601 constantly

monitors the V pin for an overvoltage condition. When

IN

V rises above 17.5V, the regulator suspends operation

IN

by shutting off both power MOSFETs. Once V drops

The operating frequency is determined by the value of the

RT resistor, which programs the current for the internal

oscillator.Aninternalphase-lockedloopservostheswitch-

ing regulator on-time to track the internal oscillator edge

and force a constant switching frequency. A clock signal

can be applied to the SYNC/MODE pin to synchronize the

switching frequency to an external source. The regulator

defaults to forced continuous operation once the clock

signal is applied.

IN

below 16.5V, the regulator immediately resumes normal

operation. The regulator does not execute its soft-start

function when exiting an overvoltage condition.

Short-Circuit Protection

Foldback current limiting is provided in the event the

output is inadvertently shorted to ground. During this

condition the internal current limit (I ) will be lowered

LIM

to approximately one-third its normal value. This feature

reduces the heat dissipation in the LTC3601 during short-

circuit conditions and protects both the IC and the input

supply from any potential damage.

At low load currents the inductor current can drop to

zero or become negative. If the LTC3601 is conﬁgured for

Burst Mode operation, this inductor current condition is

detected by the current reversal comparator, I , which

REV

in turn shuts off the bottom power MOSFET and places

3601f

9

LTC3601

APPLICATIONS INFORMATION

A general LTC3601 application circuit is shown on the ﬁrst

page of this data sheet. External component selection is

largely driven by the load requirement and begins with the

selectionoftheinductorL.Oncetheinductorischosen,the

Connecting the RT pin to INTV will default the converter

CC

to f = 2MHz; however, this switching frequency will be

O

moresensitivetoprocessandtemperaturevariationsthan

when using a resistor on RT (see Typical Performance

Characteristics).

inputcapacitor,C ,theoutputcapacitor,C ,theinternal

IN

OUT

regulatorcapacitor,C

,andtheboostcapacitor,C

,

INTVCC

BOOST

Inductor Selection

canbeselected.Next,thefeedbackresistorsareselectedto

setthedesiredoutputvoltage.Finally,theremainingoption-

al external components can be selected for functions such

asexternalloopcompensation, track/soft-start, externally

programmedoscillatorfrequencyandPGOOD.

Foragiveninputandoutputvoltage,theinductorvalueand

operatingfrequencydeterminetheinductorripplecurrent.

More speciﬁcally, the inductor ripple current decreases

with higher inductor value or higher operating frequency

according to the following equation:

Operating Frequency

ꢁ

ꢃ

ꢂ

ꢄ

ꢁ

ꢃ

ꢂ

ꢄ

ꢆ

ꢅ

V_OUT

f •L

V

^OUTꢆ

IN

ꢀI =

1–

Selectionoftheoperatingfrequencyisatrade-offbetween

efﬁciency and component size. High frequency operation

allows the use of smaller inductor and capacitor values.

Operation at lower frequencies improves efﬁciency by

reducing internal gate charge losses but requires larger

inductance values and/or capacitance to maintain low

output ripple voltage.

L

ꢅ

whereΔI =inductorripplecurrent,f=operatingfrequency

L

and L = inductor value. A trade-off between component

size, efﬁciency and operating frequency can be seen from

this equation. Accepting larger values of ΔI allows the

L

use of lower value inductors but results in greater core

loss in the inductor, greater ESR loss in the output capaci-

tor, and larger output ripple. Generally, highest efﬁciency

operation is obtained at low operating frequency with

small ripple current.

The operating frequency, f , of the LTC3601 is determined

O

by an external resistor that is connected between the RT

pin and ground. The value of the resistor sets the ramp

current that is used to charge and discharge an internal

timingcapacitorwithintheoscillatorandcanbecalculated

by using the following equation:

A reasonable starting point for setting the ripple current is

about40%ofI

.Notethatthelargestripplecurrent

IN

OUT(MAX)

occurs at the highest V . To guarantee the ripple current

3.2 E11

R_RT=

does not exceed a speciﬁed maximum the inductance

should be chosen according to:

f_O

where R is in Ω and f is in Hz.

RT

O

ꢁ

ꢃ

ꢂ

ꢄꢁ

ꢆꢃ

ꢅꢂ

ꢄ

V_OUT

f • ꢀI_L(MAX)

V_OUT

ꢆ

L =

1–

6000

_IN(MAX)ꢆ

V

ꢅ

5000

4000

3000

2000

1000

0

Once the value for L is known the type of inductor must

be selected. Actual core loss is independent of core size

for a ﬁxed inductor value but is very dependent on the

inductanceselected.Astheinductanceincreases,coreloss

decreases. Unfortunately, increased inductance requires

more turns of wire leading to increased copper loss.

Ferrite designs exhibit very low core loss and are pre-

ferred at high switching frequencies, so design goals can

concentrate on copper loss and preventing saturation.

Ferrite core materials saturate “hard,” meaning the induc-

0

200

300

RT (kΩ)

400

500

600

100

3601 F01

Figure 1. Switching Frequency vs RT

tance collapses abruptly when the peak design current is

3601f

10

LTC3601

APPLICATIONS INFORMATION

exceeded. This collapse will result in an abrupt increase

in inductor ripple current, so it is important to ensure the

core will not saturate.

C and C

Selection

IN

OUT

Theinputcapacitance,C ,isneededtoﬁlterthetrapezoidal

IN

wave current at the drain of the top power MOSFET. To

prevent large voltage transients from occurring a low ESR

input capacitor sized for the maximum RMS current is

recommended. The maximum RMS current is given by:

Different core materials and shapes will change the

size/current and price/current relationship of an induc-

tor. Toroid or shielded pot cores in ferrite or permalloy

materials are small and don’t radiate much energy but

generally cost more than powdered iron core inductors

with similar characteristics. The choice of which style

inductor to use mainly depends on the price versus size

requirements and any radiated ﬁeld/EMI requirements.

New designs for surface mount inductors are available

from Toko, Vishay, NEC/Tokin, Cooper, Coilcraft, TDK and

Würth Electronik. Table 1 gives a sampling of available

surface mount inductors.

V_OUTV – V

(

)

IN

OUT

I_RMS= I_OUT(MAX)

V

IN

where I

equals the maximum average output

OUT(MAX)

current. This formula has a maximum at V = 2V

,

IN

OUT

where I

= I /2. This simple worst-case condition

RMS

OUT

is commonly used for design because even signiﬁcant

deviations do not offer much relief. Note that ripple cur-

rent ratings from capacitor manufacturers are often based

on only 2000 hours of life which makes it advisable to

further de-rate the capacitor or choose a capacitor rated

at a higher temperature than required.

Table 1. Inductor Selection Table

INDUCTANCE DCR

MAX

CURRENT

(A)

DIMENSIONS

(mm)

HEIGHT

(mm)

(μH) (mΩ)

Würth Electronik WE-PD2 Typ MS Series

0.56

0.82

1.2

9.5

14

21

27

36

6.5

5.4

4.8

4

5.2 × 5.8

5.2 × 5.5

2

Several capacitors may be paralleled to meet the require-

ments of the design. For low input voltage applications

sufﬁcient bulk input capacitance is needed to minimize

transient effects during output load changes. Even though

the LTC3601 design includes an overvoltage protection

circuit, care must always be taken to ensure input volt-

age transients do not pose an overvoltage hazard to the

part.

1.7

2.2

3.6

Vishay IHLP-2020BZ-01 Series

0.47

0.68

1

8.8

12.4

20

11.5

10

7

4.2

2.2

50.1

Toko DE3518C Series

0.56

1.2

24

30

35

3.3

2.4

2.1

3.5 × 3.7

3.2 × 3.2

5.5 × 5.5

1.8

2

The selection of C

is primarily determined by the effec-

OUT

tive series resistance (ESR) that is required to minimize

1.7

voltage ripple and load step transients. The output ripple,

Sumida CDRH2D18/HP Series

0.56

0.82

1.1

33

39

43

3.7

2.9

2.5

ΔV , is determined by:

OUT

ꢁ

ꢄ

ꢆ

ꢅ

ESR+1

ꢀV_OUT< ꢀI

Cooper SD18 Series

_Lꢃ

8 • f • C

ꢂ

0.47

0.82

1.2

1.5

2.2

20.1

3.58

3.24

2.97

2.73

2.55

1.8

OUT

24.7

29.4

34.5

39.8

The output ripple is highest at maximum input voltage

since ΔI increases with input voltage. Multiple capacitors

L

Coilcraft LPS4018 Series

placed in parallel may be needed to meet the ESR and

RMScurrenthandlingrequirements.Drytantalum,special

polymer,aluminumelectrolytic,andceramiccapacitorsare

all available in surface mount packages. Special polymer

capacitors offer low ESR but have lower capacitance

density than other types. Tantalum capacitors have the

0.56

1

2.2

30

40

70

4.8

2.8

2.7

4 × 4

1.7

1.2

TDK VLS252012 Series

0.47

1

1.5

2.2

56

88

126

155

3.3

2.4

2

2.5 × 2

1.8

3601f

11

LTC3601

APPLICATIONS INFORMATION

highest capacitance density, but it is important to only

use types that have been surge tested for use in switching

power supplies. Aluminum electrolytic capacitors have

signiﬁcantly higher ESR but can be used in cost-sensitive

applications provided that consideration is given to ripple

currentratingsandlong-termreliability.Ceramiccapacitors

haveexcellentlowESRcharacteristicsandsmallfootprints.

Their relatively low value of bulk capacitance may require

multiple capacitors in parallel.

results.Furthermore,thissupplyisintendedonlytosupply

additional DC load currents as desired and not intended

to regulate large transient or AC behavior this may impact

LTC3601 operation.

Boost Capacitor

Theboostcapacitor, C

, isusedtocreateavoltagerail

BOOST

above the applied input voltage V . Speciﬁcally, the boost

IN

capacitor is charged to a voltage equal to approximately

INTV each time the bottom power MOSFET is turned

CC

Using Ceramic Input and Output Capacitors

on. The charge on this capacitor is then used to supply

the required transient current during the remainder of the

switching cycle. When the top MOSFET is turned on, the

Higher value, lower cost ceramic capacitors are now

available in small case sizes. Their high voltage rating

and low ESR make them ideal for switching regulator

applications.However,duetotheself-resonantandhigh-Q

characteristics of some types of ceramic capacitors, care

must be taken when these capacitors are used at the input

and output. When a ceramic capacitor is used at the input,

and the power is supplied by a wall adapter through long

wires, a load step at the output can induce ringing at the

BOOST pin voltage will be equal to approximately V

+

IN

3.3V. For most applications a 0.1μF ceramic capacitor will

provide adequate performance.

Output Voltage Programming

The LTC3601 will adjust the output voltage such that V

equals the reference voltage of 0.6V according to:

FB

V input. Atbest, thisringingcancoupletotheoutputand

IN

ꢀ

ꢃ

R1

R2

be mistaken as loop instability. At worst, a sudden inrush

V_OUT= 0.6V 1+

ꢂ

ꢅ

of current through the long wires can potentially cause a

ꢁ

ꢄ

voltage spike at V large enough to damage the part. For

IN

Thedesiredoutputvoltageissetbyappropriateselectionof

resistors R1 and R2 as shown in Figure 2. Choosing large

values for R1 and R2 will result in improved efﬁciency but

may lead to undesirable noise coupling or phase margin

reduction due to stray capacitances at the FB node. Care

should be taken to route the FB line away from any noise

source, such as the SW line.

a more detailed discussion, refer to Application Note 88.

When choosing the input and output ceramic capacitors

choose the X5R or X7R dielectric formulations. These

dielectrics provide the best temperature and voltage

characteristics for a given value and size.

INTV Regulator Bypass Capacitor

CC

To improve the frequency response of the main control

An internal low dropout (LDO) regulator produces a

3.3V supply voltage used to power much of the internal

LTC3601 circuitry including the power MOSFET gate

loop a feedforward capacitor, C , may be used as shown

F

in Figure 2.

drivers. The INTV pin connects to the output of this

V

OUT

CC

R1

C

F

regulator and must have a minimum of 1μF of decoupling

FB

LTC3601

SGND

capacitance to ground. The decoupling capacitor should

R2

have low impedance electrical connections to the INTV

CC

and PGND pins to provide the transient currents required

by the LTC3601. The user may connect a maximum load

current of 5mA to this pin but must take into account the

increased power dissipation and die temperature that

3601 F02

Figure 2. Optional Feedforward Capacitor

3601f

12

LTC3601

APPLICATIONS INFORMATION

Minimum Off-Time/On-Time Considerations

importance in most cases, and high switching frequen-

cies may be used in the design without any fear of severe

consequences. As the sections on Inductor and Capacitor

Selection show, high switching frequencies allow the use

of smaller board components, thus reducing the footprint

of the application circuit.

The minimum off-time is the smallest amount of time that

the LTC3601 can turn on the bottom power MOSFET, trip

the current comparator and turn the power MOSFET back

off. This time is typically 40ns. For the controlled on-time

current mode control architecture, the minimum off-time

limit imposes a maximum duty cycle of:

Internal/External Loop Compensation

DC_(MAX)= 1– f • t

(

)

The LTC3601 provides the option to use a ﬁxed internal

loop compensation network to reduce both the required

external component count and design time. The internal

loopcompensationnetworkcanbeselectedbyconnecting

OFF(MIN)

where f is the switching frequency and t

is the

OFF(MIN)

minimumoff-time.Ifthemaximumdutycycleissurpassed,

due to a dropping input voltage for example, the output

will drop out of regulation. The minimum input voltage to

avoid this dropout condition is:

theITHpintotheINTV pin.Toensurestability,itisrecom-

CC

mended that the output capacitance be at least 47μF when

using internal compensation. Alternatively, the user may

choose speciﬁc external loop compensation components

to optimize the main control loop transient response as

desired. External loop compensation is chosen by simply

connecting the desired network to the ITH pin.

V_OUT

V

=

IN(MIN)

1− f• t

(

)

OFF(MIN)

Conversely, the minimum on-time is the smallest dura-

tion of time in which the top power MOSFET can be in

its “on” state. This time is typically 20ns. In continuous

mode operation, the minimum on-time limit imposes a

minimum duty cycle of:

Suggestedcompensationcomponentvaluesareshownin

Figure 3. For a 2MHz application, an R-C network of 220pF

and 13kΩ provides a good starting point. The bandwidth

of the loop increases with decreasing C. If R is increased

by the same factor that C is decreased, the zero frequency

will be kept the same, thereby keeping the phase the same

in the most critical frequency range of the feedback loop.

A 10pF bypass capacitor on the ITH pin is recommended

for the purposes of ﬁltering out high frequency coupling

from stray board capacitance. In addition, a feedforward

DC_(MIN)= f • t

(

)

ON(MIN)

where t

is the minimum on-time. As the equation

ON(MIN)

shows, reducing the operating frequency will alleviate the

minimum duty cycle constraint.

capacitor C can be added to improve the high frequency

F

In the rare cases where the minimum duty cycle is

surpassed, the output voltage will still remain in regula-

tion, but the switching frequency will decrease from its

programmed value. This is an acceptable result in many

applications, so this constraint may not be of critical

response, as previously shown in Figure 2. Capacitor C

F

provides phase lead by creating a high frequency zero

with R1 which improves the phase margin.

ITH

R

COMP

13k

C

LTC3601

BYP

C

COMP

220pF

SGND

3601 F03

Figure 3. Compensation Components

3601f

13

LTC3601

APPLICATIONS INFORMATION

Checking Transient Response

In some applications severe transients can be caused by

switchinginloadswithlarge(>10μF)inputcapacitors.The

discharged input capacitors are effectively put in parallel

The regulator loop response can be checked by observing

the response of the system to a load step. When conﬁg-

ured for external compensation, the availability of the

ITH pin not only allows optimization of the control loop

behavior but also provides a DC coupled and AC ﬁltered

closed-loop response test point. The DC step, rise time,

and settling behavior at this test point reﬂect the system’s

closed-loop response. Assuming a predominantly second

ordersystem,thephasemarginand/ordampingfactorcan

be estimated by observing the percentage of overshoot

seen at this pin. The ITH external components shown in

Figure 3 will provide an adequate starting point for most

applications. The series R-C ﬁlter sets the pole-zero loop

compensation. The values can be modiﬁed slightly, from

approximately 0.5 to 2 times their suggested values, to

optimize transient response once the ﬁnal PC layout is

done and the particular output capacitor type and value

have been determined. The output capacitors need to be

selectedbecausetheirvarioustypesandvaluesdetermine

the loop feedback factor gain and phase. An output cur-

rent pulse of 20% to 100% of full load current with a rise

time of 1μs to 10μs will produce output voltage and ITH

pin waveforms that will give a sense of the overall loop

stability without breaking the feedback loop

with C , causing a rapid drop in V . No regulator can

OUT

deliver enough current to prevent this output droop if the

switchconnectingtheloadhaslowresistanceandisdriven

quickly.Thesolutionistolimittheturn-onspeedoftheload

™

switch driver. A Hot Swap controller is designed speciﬁ-

callyforthispurposeandusuallyincorporatescurrentlimit,

short-circuit protection and soft-start functions.

MODE/SYNC Operation

The MODE/SYNC pin is a multipurpose pin allowing both

mode selection and operating frequency synchroniza-

tion. Connecting this pin to INTV enables Burst Mode

CC

operationforsuperiorefﬁciencyatlowloadcurrentsatthe

expense of slightly higher output voltage ripple. When the

MODE/SYNC pin is pulled to ground, forced continuous

modeoperationisselectedcreatingthelowestﬁxedoutput

ripple at the expense of light load efﬁciency.

The LTC3601 will detect the presence of the external clock

signalontheMODE/SYNCpinandsynchronizetheinternal

oscillatortothephaseandfrequencyoftheincomingclock.

The presence of an external clock will place the LTC3601

into forced continuous mode operation.

When observing the response of V

to a load step, the

OUT

Output Voltage Tracking and Soft-Start

initialoutputvoltagestepmaynotbewithinthebandwidth

of the feedback loop. As a result, the standard second

order overshoot/DC ratio cannot be used to estimate

phase margin. The output voltage settling behavior is

related to the stability of the closed-loop system and will

demonstrate the actual overall supply performance. For

a detailed explanation of optimizing the compensation

components, including a review of control loop theory,

refer to Linear Technology Application Note 76. As shown

in Figure 2 a feedforward capacitor, C_F, may be added

acrossfeedbackresistorR1toimprovethehighfrequency

response of the system. Capacitor C_Fprovides phase lead

by creating a high frequency zero with R1.

The LTC3601 allows the user to control the output voltage

ramp rate by means of the TRACK pin. From 0V to 0.6V

the TRACK pin will override the internal reference input

to the error ampliﬁer forcing regulation of the feedback

voltage to that seen at the TRACK pin. When the voltage

at the TRACK pin rises above 0.6V, tracking is disabled

and the feedback voltage will be regulated to the internal

reference voltage.

The voltage at the TRACK pin may be driven from an ex-

ternal source, or alternatively, the user may leverage the

internal 1.4μA pull-up current on TRACK to implement

Hot Swap is a trademark of Linear Technology Corporation.

3601f

14

LTC3601

APPLICATIONS INFORMATION

a soft-start function by connecting a capacitor from the

TRACK pin to ground. The relationship between output

rise time and TRACK capacitance is given by:

NOMINAL OUTPUT

PGOOD

VOLTAGE

t

= 430,000 × C

TRACK/SS

SS

V

OUT

A default internal soft-start timer forces a minimum soft-

start time of 400μs by overriding the TRACK pin input

during this time period. Hence, capacitance values less

than approximately 1000pF will not signiﬁcantly affect

soft-start behavior.

3601 F04

–8% –5% 0% 5%

8%

Figure 4. PGOOD Pin Behavior

Efﬁciency Considerations

When using the TRACK pin, the regulator defaults to

Burst Mode operation until the output exceeds 80% of

The percent efﬁciency of a switching regulator is equal to

the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine

what is limiting the efﬁciency and which change would

produce the most improvement. Percent efﬁciency can

be expressed as:

its ﬁnal value (V > 0.48V). Once the output reaches this

FB

voltage, the operating mode of the regulator switches to

the mode selected by the MODE/SYNC pin as described

above. During normal operation, if the output drops below

10% of its ﬁnal value (as it may when tracking down, for

instance), the regulator will automatically switch to Burst

Modeoperationtopreventinductorsaturationandimprove

TRACK pin accuracy.

% Efﬁciency = 100% – (L1 + L2 + L3 +…)

where L1, L2, etc. are the individual loss terms as a per-

centage of input power.

Output Power Good

Although all dissipative elements in the circuit produce

losses, three main sources account for the majority of the

losses in the LTC3601: 1) I R loss, 2) switching losses

and quiescent current loss, 3) transition losses and other

system losses.

The PGOOD output of the LTC3601 is driven by a 15ꢀ

(typical) open-drain pull-down device. This device will be

turned off once the output voltage is within 5% (typical) of

the target regulation point allowing the voltage at PGOOD

to rise via an external pull-up resistor (100k typical). If

the output voltage exits a 8% (typical) regulation window

around the target regulation point the open-drain output

will pull down with 15ꢀ output resistance to ground,

thus dropping the PGOOD pin voltage. A ﬁlter time of

40μs (typical) acts to prevent unwanted PGOOD output

2

1. I R loss is calculated from the DC resistances of the

internal switches, R , and external inductor, R . In

SW

L

continuous mode, the average output current will

ﬂow through inductor L but is “chopped” between the

internal top and bottom power MOSFETs. Thus, the

series resistance looking into the SW pin is a function

changes during V

transient events. As a result, the

OUT

of both the top and bottom MOSFET’s R

duty cycle (DC) as follows:

and the

DS(ON)

output voltage must be within the target regulation win-

dow of 5% for 40μs before the PGOOD pin is pulled high.

Conversely,theoutputvoltagemustexitthe8%regulation

window for 40μs before the PGOOD pin pulls to ground

(see Figure 4).

R

SW

= (R )(DC) + (R

DS(ON)TOP

)(1 – DC)

DS(ON)BOT

3601f

15

LTC3601

APPLICATIONS INFORMATION

Thermal Considerations

TheR

forboththetopandbottomMOSFETscanbe

DS(ON)

obtained from the Typical Performance Characteristics

The LTC3601 requires the exposed package backplane

metal (PGND pin on the QFN, SGND pin on the MSOP

package) to be well soldered to the PC board to provide

good thermal contact. This gives the QFN and MSOP

packages exceptional thermal properties, compared to

other packages of similar size, making it difﬁcult in normal

operation to exceed the maximum junction temperature

of the part. In many applications, the LTC3601 does not

dissipate much heat due to its high efﬁciency and low

thermalresistancepackagebackplane.However,inapplica-

tions in which the LTC3601 is running at a high ambient

temperature,highinputvoltage,highswitchingfrequency,

and maximum output current, the heat dissipated may

exceed the maximum junction temperature of the part. If

the junction temperature reaches approximately 150°C,

both power switches will be turned off until temperature

decreases approximately 10°C.

2

curves. Thus to obtain I R loss:

2

“I R LOSS” = I

· (R + R )

SW L

OUT

2. The internal LDO supplies the power to the INTV rail.

CC

The total power loss here is the sum of the switching

losses and quiescent current losses from the control

circuitry.

Each time a power MOSFET gate is switched from low

to high to low again, a packet of charge dQ moves

from V to ground. The resulting dQ/dt is a current

IN

out of INTV that is typically much larger than the DC

CC

control bias current. In continuous mode, I

GATECHG

= f(Q + Q ), where Q and Q are the gate charges

T

B

T

B

of the internal top and bottom power MOSFETs and f

is the switching frequency. For estimation purposes,

(Q + Q ) on the LTC3601 is approximately 1nC.

T

B

To calculate the total power loss from the LDO load,

simply add the gate charge current and quiescent cur-

Thermal analysis should always be performed by the user

to ensure the LTC3601 does not exceed the maximum

junction temperature.

rent and multiply by V :

IN

P

= (I + I ) • V

GATECHG Q IN

The temperature rise is given by:

LDO

3. Other “hidden” losses such as transition loss, cop-

per trace resistances, and internal load currents can

account for additional efﬁciency degradations in the

overall power system. Transition loss arises from the

brief amount of time the top power MOSFET spends in

thesaturatedregionduringswitchnodetransitions.The

LTC3601 internal power devices switch quickly enough

that these losses are not signiﬁcant compared to other

sources.

T

= P θ

D JA

RISE

where P is the power dissipated by the regulator and θ

D

JA

is the thermal resistance from the junction of the die to

the ambient temperature.

Consider the example in which an LTC3601EUD is operat-

ing with I

= 1.5A, V = 12V, f = 4MHz, V

= 1.8V,

OUT

IN

OUT

and an ambient temperature of 70°C. From the Typical

PerformanceCharacteristicssectiontheR ofthetop

DS(ON)

switch is found to be nominally 130mꢀ while that of the

Other losses, including diode conduction losses during

dead time and inductor core losses, generally account

for less than 2% total additional loss.

bottom switch is nominally 100mꢀ yielding an equivalent

power MOSFET resistance R of:

SW

R

TOP • 1.8/12 + R

BOT • 10.2/12 = 105mꢀ.

DS(ON)

3601f

16

LTC3601

APPLICATIONS INFORMATION

From the previous section, I

is ~4mA when f =

2. The output capacitor, C , and inductor L1 should

GATECHG

OUT

4MHz, and the spec table lists the typical I to be 1mA.

be closely connected to minimize loss. The (–) plate

Q

Therefore, the total power dissipation due to resistive

losses and LDO losses is:

of C

should be closely connected to PGND and the

OUT

(–) plate of C .

IN

2

P = I

• R + V • (I

I )

GATECHG + Q

3. The resistive divider, R1 and R2, must be connected

D

OUT

SW

IN

between the (+) plate of C

and a ground line termi-

2

OUT

P = (1.5) • (0.105) + 12V • 5mA = 296mW

D

nated near SGND. The feedback signal, V , should be

FB

TheQFN3mm×3mmpackagejunction-to-ambientthermal

routedawayfromnoisycomponentsandtracessuchas

the SW line, and its trace length should be minimized.

Inaddition,RTandtheloopcompensationcomponents

should be terminated to SGND.

resistance, θ , is around 45°C/W. Therefore, the junction

JA

temperature of the regulator operating in a 70°C ambient

temperature is approximately:

T = 0.296 • 45 + 70 = 83.3°C

J

4. Keep sensitive components away from the SW pin. The

R

resistor, the feedback resistors, the compensation

RT

which is well below the speciﬁed maximum junction

temperature of 125°C.

components,andtheINTV bypasscapacitorshouldall

CC

be routed away from the SW trace and the inductor.

Board Layout Considerations

5. A ground plane is preferred, but if not available the

signal and power grounds should be segregated with

both connecting to a common, low noise reference

point. The point at which the ground terminals of the

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the LTC3601.

V and V

bypass capacitors are connected makes a

IN

OUT

1. DothecapacitorsC connecttoV andPGNDasclose

IN

good, low noise reference point. The connection to the

PGND pin should be made with a minimal resistance

trace from the reference point.

tothepinsaspossible?ThesecapacitorsprovidetheAC

current to the internal power MOSFETs and drivers. The

(–) plate of C should be closely connected to PGND

IN

6. Flood all unused areas on all layers with copper in order

to reduce the temperature rise of power components.

Thesecopperareasshouldbeconnectedtotheexposed

backside connection of the IC.

and the (–) plate of C

.

OUT

3601f

17

LTC3601

APPLICATIONS INFORMATION

V

IN

C

IN

VIAS TO

PGND

VIAS TO

INTV

VIAS TO

GROUND

PLANE

CC

16 15 14 13

PGND

1

2

3

4

12

11

10

9

C

FWD

VIA TO

V

OUT

R2

17

SW

R1

VIA TO

PGND

VIAS TO

GROUND

PLANE

5

6

7

8

L1

C

INTVCC

C

BOOST

C

OUT

VIAS

TO PGND

VIA TO R2

V

OUT

3601 F05

Figure 5. QFN Layout Example

V

PGND

V

IN

OUT

C

IN

OUT

PIN 1

L1

C

17

BOOST

SW

VIA TO INTV

CC

C

FWD

VIA TO V

OUT

C

INTVCC

R2

VIA TO

INTV

R1

CC

VIA TO

V

OUT

3601 F06

Figure 6. MSE Layout Example

3601f

18

LTC3601

APPLICATIONS INFORMATION

Design Example

Next, C

is selected based on the required output

OUT

transient performance and the required ESR to satisfy

the output voltage ripple. For this design, a 22μF ceramic

capacitor will be used.

As a design example, consider using the LTC3601 in an

application with the following speciﬁcations:

V

IN

= 12V, V

= 1.8V, I

= 1.5A, I

=

OUT(MIN)

OUT

OUT(MAX)

C should be sized for a maximum current rating of:

IN

10mA, f = 1MHz

ꢀ

ꢂ

ꢁ

ꢃ

ꢅ

ꢄ

1.8V 12V – 1.8V

Because efﬁciency is important at both high and low load

currents, Burst Mode operation is selected.

(

)

I

_RMS= 1.5A

= 0.54A

12V

First, the correct R resistor value for 1MHz switching

RT

frequency must be chosen. Based on the equation dis-

Decoupling the V pins with a 22μF ceramic capacitor

should be adequate for most applications. A 0.1μF boost

capacitor should also work for most applications.

IN

cussed earlier, R should be 324k.

RT

Next, determine the inductor value for approximately 40%

ripple current using:

To save board space the I pin is connected to the INTV

pin to select an internal compensation network.

TH

CC

ꢀ

ꢃꢀ

ꢃ

1.8V

1MHz •600mA

1.8V

12V

L =

1–

= 2.55μH

ꢂ

ꢅꢂ

ꢅ

The PGOOD pin is connected to V through a 100k

ꢁ

ꢄꢁ

ꢄ

IN

resistor.

A standard value 2.2μH inductor will work well for this

application.

V

IN

V

BOOST

SW

IN

4V TO 15V

C1

0.1μF

C

IN

L1

2.2μH

RUN

22μF

V

1.8V

1.5A

OUT

MODE/SYNC

C

OUT

47μF

R3

80k

C

FWD

10pF

INTV

CC

V

ON

LTC3601

2.2μF

100k

324k

FB

R4

40k

PGOOD

ITH

TRACK

RT

SGND

PGND

C

: TDK C3225X5R1C226M

IN

: TDK C3225X5R0J476M

OUT

L1: VISHAY IHLP2020BZER2R2M01

3601 F05

Figure 7. 1.8V, 1.5A Regulator at 1MHz

3601f

19

LTC3601

TYPICAL APPLICATIONS

12V Input to 1.8V Output at 4MHz Synchronized

Frequency with 6V UVLO and 4.3ms Soft-Start

V

IN

V

BOOST

IN

12V

C

0.1μF

IN

154k

40k

L1

0.68μH

22μF

V

1.8V

1.5A

OUT

RUN

SW

V

ON

C

OUT

80k

40k

10pF

22μF

LTC3601

INTV

FB

CC

2.2μF

100k

80k

PGOOD

ITH

RT

TRACK

MODE/SYNC

PGND

10nF

10k

270pF

EXTERNAL

CLOCK

C

: TDK C3225X5R1C226M

SGND

IN

: TDK C3216X5R0J226M

OUT

L1: VISHAY IHLP2020BZERR68M01

3601 TA02a

Efﬁciency vs Load Current

90

80

70

60

50

40

30

20

10

0

0.01

0.1

1

10

3601 TA02b

LOAD CURRENT (A)

3601f

20

LTC3601

TYPICAL APPLICATIONS

8.4V Input to 3.3V Output at 2MHz Operating

Frequency Using Forced Continuous Mode

C2

2.2μF

V

IN

V

INTV

IN

CC

8.4V

C1

47μF

RUN

ITH

RT

PGOOD MODE/SYNC

TRACK

BOOST

L1

2.2μH

0.1μF

LTC3601

V

3.3V

1.5A

OUT

SW

ON

C

R1

C

FF

10pF

V

OUT

47μF

90.9k

FB

PGND

R2

20k

SGND

C

: TDK C3225X5R1C476M

IN

OUT

: TDK C3216X5R0J476M

L1: VISHAY IHLP2020BZER2R2M01

3601 TA03a

Efﬁciency vs Load Current

100

90

80

70

60

50

40

30

20

10

0

0.01

0.1

1

10

3601 TA03b

LOAD CURRENT (A)

3601f

21

LTC3601

PACKAGE DESCRIPTION

UD Package

16-Lead Plastic QFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1691)

0.70 p0.05

3.50 p 0.05

1.45 p 0.05

(4 SIDES)

2.10 p 0.05

PACKAGE

OUTLINE

0.25 p0.05

0.50 BSC

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

BOTTOM VIEW—EXPOSED PAD

PIN 1 NOTCH R = 0.20 TYP

OR 0.25 s 45o CHAMFER

15 16

R = 0.115

TYP

0.75 p 0.05

3.00 p 0.10

(4 SIDES)

PIN 1

TOP MARK

(NOTE 6)

0.40 p 0.10

1

2

1.45 p 0.10

(4-SIDES)

(UD16) QFN 0904

0.25 p 0.05

0.50 BSC

0.200 REF

0.00 – 0.05

NOTE:

1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

3601f

22

LTC3601

PACKAGE DESCRIPTION

MSE Package

16-Lead Plastic MSOP, Exposed Die Pad

(Reference LTC DWG # 05-08-1667 Rev A)

BOTTOM VIEW OF

EXPOSED PAD OPTION

2.845 p 0.102

(.112 p .004)

2.845 p 0.102

(.112 p .004)

0.889 p 0.127

(.035 p .005)

1

8

0.35

REF

5.23

(.206)

MIN

1.651 p 0.102

(.065 p .004)

1.651 p 0.102

(.065 p .004)

3.20 – 3.45

(.126 – .136)

0.12 REF

DETAIL “B”

CORNER TAIL IS PART OF

THE LEADFRAME FEATURE.

FOR REFERENCE ONLY

DETAIL “B”

16

9

0.305 p 0.038

0.50

(.0197)

BSC

NO MEASUREMENT PURPOSE

4.039 p 0.102

(.159 p .004)

(NOTE 3)

(.0120 p .0015)

TYP

0.280 p 0.076

(.011 p .003)

RECOMMENDED SOLDER PAD LAYOUT

16151413121110

9

REF

DETAIL “A”

0o – 6o TYP

0.254

(.010)

3.00 p 0.102

(.118 p .004)

(NOTE 4)

4.90 p 0.152

(.193 p .006)

GAUGE PLANE

0.53 p 0.152

(.021 p .006)

1 2 3 4 5 6 7 8

DETAIL “A”

0.86

(.034)

REF

1.10

(.043)

MAX

0.18

(.007)

SEATING

PLANE

0.17 – 0.27

(.007 – .011)

TYP

0.1016 p 0.0508

(.004 p .002)

MSOP (MSE16) 0608 REV A

0.50

(.0197)

BSC

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

3601f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

23

LTC3601

TYPICAL APPLICATION

1.2V Output at 2MHz Operating Frequency

Efﬁciency vs Load Current

100

90

C2

2.2μF

V

IN

V

INTV

IN

CC

12V

80

C1

22μF

RUN

ITH

RT

V

= 8V

IN

70

V

= 15V

PGOOD MODE/SYNC

TRACK

IN

60

50

BOOST

L1

1μH

0.1μF

LTC3601

V

1.2V

1.5A

OUT

SW

40

30

20

10

0

C

R1

C

FF

10pF

V

ON

OUT

47μF

20k

FB

PGND

R2

20k

SGND

3601 TA04

C

: TDK C3225X5R1C226M

: TDK C3225X5R0J476M

0.01

0.1

1

10

IN

OUT

LOAD CURRENT (A)

L1: VISHAY IHLP2020BZER1R0M01

3601 TA04b

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3601f

LT 0709 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

24

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3601EMSEPBF
厂家：	Linear
描述：	1.5A, 15V Monolithic Synchronous Step-Down Regulator 1.5A ， 15V单片同步降压型稳压器稳压器
文件：	总24页 (文件大小：324K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC3601EMSEPBF [Linear]

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