LTC3607 [Linear]
Dual 600mA 15V Monolithic Synchronous Step-Down DC/DC Regulator;
| 型号： | LTC3607 |
| 厂家： | 
Linear |
| 描述： | Dual 600mA 15V Monolithic Synchronous Step-Down DC/DC Regulator |
| 文件： | 总20页 (文件大小：370K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3607
Dual 600mA 15V Monolithic
Synchronous Step-Down
DC/DC Regulator
FeaTures
DescripTion
The LTC®3607 is a 15V dual 600mA monolithic synchro-
nous step-down regulator which has only 55µA quiescent
current. Intended for a variety of applications, including
dual lithium-ion battery products, it operates from a wide
4.5V to 15V input voltage range. It features a constant
2.25MHz switching frequency, enabling the use of tiny,
low cost capacitors and inductors 1mm or less in height.
n
High Efficiency: Up to 96%
n
Very Low Quiescent Current: 55µA Total
n
2.25MHz Constant Frequency Operation
n
Low Dropout Operation: 100% Duty Cycle
®
n
Low-Ripple (Typical 30mV ) Burst Mode
P-P
Operation
n
Peak Current-Mode Control Architecture for Excellent
Line and Load Transient Response
Each output voltage is adjustable from 0.6V to V . The
IN
n
n
n
n
n
n
n
n
n
n
Wide Voltage Input Range: 4.5V to 15V
600mA/Channel Rated Output Current
0.6V Reference Allows Low Output Voltages
1.5% Output Voltage Accuracy
internal synchronous power switches provide high ef-
ficiency without the need for external Schottky diodes.
A user selectable mode input is provided to allow the user
to trade off ripple noise for light load efficiency; Burst
Mode operation provides the highest efficiency at light
loads, while pulse-skipping mode provides the lowest
ripple noise.
Ultralow Shutdown Current: I < 1µA
Q
Internal Compensation
Power Good Outputs
Externally Frequency Synchronization (1MHz to 4MHz)
Independent Internal Soft-Start for Each Channel
Small 16-Lead Thermally Enhanced Thin QFN
(3mm × 3mm) and MSE Packages
To further the maximize battery run time, the P-channel
MOSFETs are turned on continuously in dropout (100%
duty cycle). In shutdown, the device draws <1µA.
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 5481178, 5847554,
6580258, 6304066, 6476589, 6774611.
applicaTions
n
Dual Lithium-Ion Battery Supplies
n
Automotive Applications
n
Servers
Typical applicaTion
Efficiency and Power Loss
vs Load Current
100
90
80
70
60
50
40
30
20
10
0
1
V
12V
IN
V
= 12V
IN
10µF
×2
PV
IN1
RUN1
SV
PV
IN IN2
RUN2
0.1
4.7µH
4.7µH
22pF
LTC3607
V
V
OUT1
5V AT 600mA
OUT2
3.3V AT 600mA
SW1
SW2
22pF
0.01
887k
549k
121k
V
FB1
V
FB2
GND
V
OUT
V
OUT
= 5V
= 3.3V
10µF
10µF
121k
0.001
3607 TA01a
1
10
100
1000
LOAD CURRENT (mA)
3607 TA01b
3607fb
For more information www.linear.com/LTC3607
1
LTC3607
absoluTe MaxiMuM raTings
(Note 1)
Operating Junction Temperature Range
PV , SV Voltages.................................... –0.3V to 15V
IN
IN
(Notes 2, 7)............................................ –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
RUN1, RUN2 Voltages................. –0.3V to (SV + 0.3V)
IN
V
, V Voltages................................... –0.3V to 3.6V
FB1 FB2
MODE/SYNC Voltage................................. –0.3V to 3.6V
PGOOD1, PGOOD2 Voltages...................... –0.3V to 15V
MSOP Package .................................................300°C
pin conFiguraTion
TOP VIEW
TOP VIEW
16 15 14 13
1
2
3
4
5
6
7
8
SV
16 PGOOD1
15 MODE/SYNC
14 RUN1
IN
PGND1
SW1
MODE/SYNC
PGOOD1
1
2
3
4
12 SGND
11 PGOOD2
PV
PV
13
12
V
V
17
PGND
IN1
IN2
FB1
FB2
17
PGND
SV
IN
SGND
10
9
SW2
PGND2
SGND
11 RUN2
PGND1
PGND2
10
9
SGND
PGOOD2
5
6
7
8
MSE PACKAGE
16-LEAD PLASTIC MSOP
T
= 125°C, θ = 37°C/W, θ = 10°C/W
JA JC
JMAX
UD PACKAGE
16-LEAD (3mm × 3mm) PLASTIC QFN
EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB
T
= 125°C, θ = 68°C/W, θ = 7.5°C/W
JA JC
JMAX
EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH
LTC3607EUD#PBF
LTC3607IUD#PBF
LTC3607EMSE#PBF
LTC3607IMSE#PBF
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3607EUD#TRPBF
LTC3607IUD#TRPBF
LTC3607EMSE#TRPBF
LTC3607IMSE#TRPBF
LFNB
LFNB
3607
3607
16-Lead (3mm × 3mm) Plastic QFN
16-Lead (3mm × 3mm) Plastic QFN
16-Lead Plastic MSOP
–40°C to 125°C (Note 2)
–40°C to 125°C (Note 2)
–40°C to 125°C (Note 2)
–40°C to 125°C (Note 2)
16-Lead Plastic MSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3607fb
2
For more information www.linear.com/LTC3607
LTC3607
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, unless otherwise specified. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
4.5
4.5
0.6
TYP
MAX
15
UNITS
l
l
SV
PV
Operating Voltage Range
Operating Voltage Range
Output Voltage Range
Feedback Voltage (Note 3)
V
V
V
IN
IN
15
V
V
PV
IN
OUT
FB
0.591
0.588
0.6
0.6
0.609
0.612
V
V
l
I
Feedback Pin Input Current
30
nA
%/V
%
FB
ΔV
ΔV
Reference Voltage Line Regulation
Output Voltage Load Regulation
V
= 4.5V to 15V (Note 3)
IN
0.1
0.5
0.15
LINE REG
MODE/SYNC = 0V (Note 3)
LOAD REG
I
Input DC Supply Current
Active Mode
(Note 4)
S
3.2
55
V
V
V
= V
= V
= 0.5V
mA
µA
µA
µA
FB1
FB1
FB(1 or 2)
FB2
FB2
90
60
1
Sleep Mode (Both Channels)
Sleep Mode (Single Channel)
Shutdown
= 0.64V
35
= 0.64V
0.1
RUN1 = RUN2 = 0V
l
f
f
I
Oscillator Frequency
V
V
= 0.6V
1.8
1.0
2.25
2.7
4.0
MHz
MHz
A
OSC
SYNC
LIM
FB1, 2
Synchronization Frequency
Peak Switch Current Limit
= 0.5V, Duty Cycle < 35%
0.75
1
1.25
FB1, 2
R
Top Switch On-Resistance
Bottom Switch On-Resistance
(Note 6)
(Note 6)
0.6
0.25
Ω
Ω
DS(ON)
UVLO
SV Undervoltage Lockout Threshold
SV Rising
3.4
4.3
11
V
IN
IN
PGOOD
PGOOD1/2 Overvoltage Threshold
PGOOD1/2 Undervoltage Threshold
PGOOD1/2 On-Resistance
V
V
Rising
Hysteresis
8.5
–3
%
%
FB1, 2
FB1, 2
V
V
Ramping Down
Hysteresis
–11
–8.5
3
%
%
FB1, 2
FB1, 2
Channel 1 or Channel 2 Active
RUN1 = RUN2 = 0V
70
700
Ω
Ω
t
I
Power Good Blanking Time
PGOOD Leakage
64
Cycles
µA
PGOOD
1
PGOOD
l
l
V
RUN1/2 V
RUN1/2 V
0.55
0.3
V
V
RUN
IL
IH
3.0
1
l
I
RUN1/2 Leakage Current
0.01
0.35
µA
RUN
l
l
V
MODE/SYNC V
MODE/SYNC V
V
V
MODE/SYNC
IL
IH
1.0
t
Internal Soft-Start Time
V
from 10% to 90% Full Scale
ms
SOFTSTART
FB
PV = PV = SV = 4.5V
IN1
IN2
IN
Note 1. Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
specific operating conditions in conjunction with board layout, the rated
package thermal resistance and other environmental factors.
Note 3. The LTC3607 is tested in a proprietary test mode that connects
V
to the output of the error amplifier to an external servo loop.
FB
Note 2. The LTC3607 is tested under pulsed load conditions such that
Note 4. Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
T ≈ T . The LTC3607E is guaranteed to meet specifications from
J
A
0°C to 85°C junction temperature. Specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3607I is guaranteed over the full –40°C to 125°C operating junction
temperature range.
Note 5. T is calculated from the ambient T and power dissipation P
D
J
A
according to the following formula: T = T + (PD • θ ).
J
A
JA
Note 6. The QFN switch on-resistance is guaranteed by correlation to
wafer level measurements.
Note 7. This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
The junction temperature (T ) is calculated from the ambient temperature
J
(T ) and power dissipation (P ) according to the formula:
A
D
T = T + (P • θ °C/W)
J
A
D
JA
where θ is the package thermal impedance. Note that the maximum
JA
ambient temperature is consistent with these specifications determined by
3607fb
For more information www.linear.com/LTC3607
3
LTC3607
Typical perForMance characTerisTics TA = 25°C, unless otherwise noted.
Efficiency vs Load Current
Burst Mode Operation
Efficiency vs Load Current
Burst Mode Operation
Efficiency vs Load Current
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 2.5V
V
= 3.3V
V
V
= 8.4V
OUT
OUT
OUT
IN
= 5V
V
V
V
= 5V
= 8.4V
= 12V
V
V
V
= 5V
= 8.4V
= 12V
IN
IN
IN
IN
IN
IN
Burst Mode OPERATION
PULSE SKIP
0.1
1
10
100
1000
0.1
1
10
100
1000
0.1
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3607 G01
3607 G02
3607 G03
Efficiency vs Input Voltage
Burst Mode Operation
Burst Mode Operation
Pulse-Skipping Mode
100
95
90
85
80
75
70
65
60
55
50
V
= 3.3V
OUT
SW
SW
5V/DIV
5V/DIV
V
V
OUT
50mV/DIV
OUT
50mV/DIV
I
I
L
L
200mA/DIV
200mA/DIV
I
I
I
I
= 1mA
LOAD
LOAD
LOAD
LOAD
= 10mA
= 100mA
= 600mA
3607 G05
3607 G06
2µs/DIV
2µs/DIV
V
V
I
= 8.4V
V
V
I
= 8.4V
IN
OUT
IN
OUT
= 2.5V
= 2.5V
= 100mA
= 20mA
4
6
8
10
12
14
16
LOAD
LOAD
INPUT VOLTAGE (V)
3607 G04
Load Step in Burst Mode
Operation
VOUT Short to GND (Burst Mode
Operation)
Start-Up (Burst Mode Operation)
PGOOD
2V/DIV
RUN
V
OUT
2V/DIV
V
OUT
100mV/DIV
PGOOD
2V/DIV
1V/DIV
V
OUT
2V/DIV
I
L
I
I
L
200mA/DIV
L
0.5A/DIV
1A/DIV
3607 G07
3607 G08
3607 G09
20µs/DIV
200µs/DIV
100µs/DIV
V
V
I
= 8.4V
V
V
I
= 8.4V
V
V
I
= 8.4V
IN
OUT
IN
OUT
IN
OUT
= 2.5V
= 2.5V
= 2.5V
= 0A
= 30mA TO 600mA
= 20mA
LOAD
LOAD
LOAD
3607fb
4
For more information www.linear.com/LTC3607
LTC3607
Typical perForMance characTerisTics TA = 25°C, unless otherwise noted.
Oscillator Frequency vs
Temperature
Reference Voltage vs
Temperature
RDS(ON) vs Input Voltage
1.0
0.9
0.8
0.7
0.6
0.5
0.605
0.603
0.601
0.599
0.597
0.595
2
0
V
= 12V
IN
TOP SWITCH
–2
–4
–6
0.4
0.3
0.2
0.1
0
BOTTOM SWITCH
–8
–10
–12
4
6
8
10
(V)
12
14
16
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
V
TEMPERATURE (°C)
TEMPERATURE (°C)
IN
3607 G12
3607 G11
3607 G10
R
DS(ON) vs Temperature
Switch Leakage vs Temperature
Line Regulation
7000
6000
5000
4000
3000
2000
1000
0
0.4
0.3
1.0
0.9
0.8
0.7
0.6
0.5
V
= 12V
TOP SWITCH
BOTTOM SWITCH
IN
V
= 12V
IN
0.2
TOP SWITCH
0.1
0
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
BOTTOM SWITCH
–50 –25
0
25 50 75 100 125 150
4
6
8
10
(V)
12
14
16
–50
–25
0
50
75
100
125
TEMPERATURE (°C)
V
TEMPERATURE (°C)
IN
3607 G14
3607 G15
3607 G13
Peak Current Limit vs
Temperature
Load Regulation
1200
1150
1100
1050
1000
950
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 12V
IN
PULSE SKIP
Burst Mode OPERATION
V
OUT
= 3.3V
900
–0.5
–50 –25
0
25
50
75 100 125
0
100
200
300
400
500
600
TEMPERATURE (°C)
LOAD CURRENT (mA)
3607 G16
3607 G17
3607fb
For more information www.linear.com/LTC3607
5
LTC3607
pin FuncTions (QFN/MSE)
PV , PV , SV (Pins6, 7, 3/Pins4, 5, 1):Main Power
PGOOD1 (Pin 2/Pin 16): Regulator 1 Power Good. This
common-drain logic output is pulled to SGND when the
channel1outputvoltageisnotwithin 8.5%ofregulation.
IN1
IN2
IN
Supply. Must be closely decoupled to GND. These inputs
may each be powered from different supply voltages.
Connect SV to either PV or PV , whichever one
IN
IN1
IN2
V
(Pin 14/Pin 12): Regulator 2 Output Feedback.
FB2
is higher. For applications where it’s not known which
Receives the feedback voltage from the external resistor
divider across the regulator 2 output. Nominal voltage for
this pin is 0.6V.
PV ishigher,connectexternaldiodesbetweenSV
IN(1or2)
IN
to both PV and PV to ensure that SV is less than a
IN1
IN2
IN
IN2
diode drop from the higher of PV or PV
.
IN1
SW2 (Pin 8/Pin 6): Regulator 2 Switch Node Connection
PGND1,PGND2,SGND,PGND(Pins4,9,10,12,Exposed
to the Inductor. This pin switches from PV to PGND2.
IN2
Pad Pin 17/Pins 2, 7, 8, 10, Exposed Pad Pin 17): Main
RUN2 (Pin 13/Pin 11): Regulator 2 Enable. Forcing this
pin high (above 3.0V) enables regulator 2, while forcing
it to SGND causes regulator 2 to shut down. It is possible
Ground. Connect to the (–) terminals of C
, C
, and
OUT1 OUT2
C . The exposed pad must be soldered to PCB ground for
IN
electricalcontactandratedthermalperformance.AllSGND
to use a 3.3V source to drive this pin, or tie it to SV .
and PGND pins must be externally connected to ground.
IN
An internal soft-start limits the rise time to a minimum
V
(Pin 15/Pin 13): Regulator 1 Output Feedback.
FB1
of 0.35ms.
Receives the feedback voltage from the external resistor
divider across the regulator 1 output. Nominal voltage for
this pin is 0.6V.
PGOOD2 (Pin 11/Pin 9): Regulator 2 Power Good. This
common-drain logic output is pulled to SGND when the
channel2outputvoltageisnotwithin 8.5%ofregulation.
SW1 (Pin 5/Pin 3): Regulator 1 Switch Node Connection
to the Inductor. This pin switches from PV to PGND1.
MODE/SYNC (Pin 1/Pin 15): Combination Mode Selec-
tion and Oscillator Synchronization. This pin controls the
light-load behavior of the device. Forcing this pin to SGND
selects pulse-skipping mode. Floating this pin or forcing
it above 1V selects Burst Mode operation. The internal
oscillation frequency can be synchronized to an external
oscillator applied to this pin and pulse-skipping mode is
automatically selected.
IN1
RUN1 (Pin 16/Pin 14): Regulator 1 Enable. Forcing this
pin high (above 3V) enables regulator 1, while forcing it
to SGND causes regulator 1 to shut down. It is possible
to use a 3.3V source to drive this pin, or tie it to SV .
IN
An internal soft-start limits the rise time to a minimum
of 0.35ms.
3607fb
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For more information www.linear.com/LTC3607
LTC3607
block DiagraM
REGULATOR 1
RUN1
PV
IN1
V
+
FB1
LEVEL
SHIFT
OVCOMP
ICMP
HV
0.65V
0.6V
–
CONTROL
LOGIC
+
–
I
TH
SW1
EA
0.55V
+
RCMP
HV
LEVEL
SHIFT
UVCOMP
–
PGND1
PGOOD1
PGOOD1
SV
IN
MODE
3.3V
0.65V
0.6V
3MΩ
BANDGAP
REFERENCE
CLK
MODE/SYNC
3.3V
OSC
LDO
0.55V
SGND
RUN2
REGULATOR 2 (IDENTICAL TO REGULATOR 1)
PV
IN2
SW2
PGND2
V
FB2
PGOOD2
3607 BD
3607fb
For more information www.linear.com/LTC3607
7
LTC3607
operaTion
The LTC3607 uses a constant-frequency, peak current
mode architecture. The operating frequency is set at
2.25MHzandcanbesynchronizedtoanexternaloscillator
between 1MHz and 4MHz. Both channels share the same
clock and run in-phase. To suit a variety of applications,
the selectable MODE/SYNC pin allows the user to trade-
off ripple for efficiency.
Low Current Operation
Two discontinuous-conduction modes (DCMs) are avail-
able to control the operation of the LTC3607 at low output
currents. Both modes, Burst Mode operation and pulse-
skipping, automaticallyswitchfromcontinuousoperation
to the selected mode when the load current is low.
To optimize efficiency, Burst Mode operation can be se-
lected by floating the MODE/SYNC pin or setting it to 1V
or greater. When the load is relatively light, the LTC3607
automaticallyswitchesintoBurstModeoperationinwhich
the PMOS switch operates intermittently based on load
demand with a fixed peak inductor current. By running
cycles periodically, the switching losses, which are domi-
nated by the gate charge losses of the power MOSFETs,
are minimized. The main control loop is interrupted when
the output voltage reaches the desired regulated value.
A voltage comparator trips when the ITH voltage drops
below an internal clamp voltage, shutting off the switch
and reducing the power. The output capacitor and the
inductor supply the power to the load until ITH exceeds
an internal clamp voltage, turning on the switch and the
main control loop, which starts another cycle.
The output voltage is set by an external divider returned
to the V pins. An error amplifier compares the divided
FB
output voltage with a reference voltage of 0.6V and ad-
justs the peak inductor current accordingly. Overvoltage
and undervoltage comparators will pull the independent
PGOOD outputs low if the output voltage is not within
8.5%. The PGOOD outputs will go high 64 clock cycles
after achieving regulation and will go low 64 cycles after
falling out of regulation.
Whether in Burst Mode or pulse-skipping operation, the
overvoltageprotectioncircuitisstillenabledwhentherest
of the regulator is asleep. Hence, if V
rises above the
OUT
overvoltage threshold, the regulator is forced out of sleep.
Main Control Loop
Duringnormaloperation,thetoppowerswitch(P-channel
MOSFET) is turned on at the beginning of a clock cycle
To optimize ripple, pulse-skipping mode can be selected
by grounding the MODE/SYNC pin. In the LTC3607, pulse-
skipping mode is implemented similarly to Burst Mode
operation with the ITH clamp set to a lower internal clamp
voltage. This results in lower ripple than in Burst Mode
operationwiththetrade-offbeingslightlylowerefficiency.
when the V voltage is below the reference voltage. The
FB
current into the inductor and the load increases until the
current limit is reached. The switch turns off and energy
stored in the inductor flows through the bottom switch
(N-channelMOSFET)intotheloaduntilthenextclockcycle.
The peak inductor current is controlled by the internally
compensated ITH voltage, which is the output of the error
Dropout Operation
Whentheinputsupplyvoltagedecreasestowardtheoutput
voltage, the duty cycle increases to 100% which is the
dropout condition. In dropout, the PMOS switch is turned
on continuously with the output voltage being equal to the
input voltage minus the voltage drops across the internal
P-channel MOSFET and the inductor.
amplifier. This amplifier compares the V pin to the 0.6V
FB
internal reference. When the load current increases, the
V
voltage decreases slightly below the reference. This
FB
decrease causes the error amplifier to increase the ITH
voltage until the average inductor current matches the
new load current.
The main control loop is shut down by pulling the RUN
pin to ground.
3607fb
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For more information www.linear.com/LTC3607
LTC3607
applicaTions inForMaTion
An important design consideration is that the R
DS(ON)
VOUT
fO • ∆IL
VOUT
VIN(MAX)
L=
• 1–
of the P-channel switch increases with decreasing input
supply voltage (see Typical Performance Characteristics).
Therefore, the user should calculate the power dissipation
when the LTC3607 is used at 100% duty cycle with low
input voltage (see Thermal Considerations in the Applica-
tions Information section).
The inductor value will also have an effect on Burst Mode
operation. The transition from low current operation
begins when the peak inductor current falls below a level
set by the burst clamp. Lower inductor values result in
higher ripple current which causes this transition to occur
at lower load currents. This causes a dip in efficiency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to increase.
Low/High Supply Operation
TheLTC3607incorporatesanundervoltagelockoutcircuit
which shuts down the part when the input voltage drops
below about 3.7V to prevent unstable operation.
AgeneralLTC3607applicationcircuitisshowninFigure1.
Externalcomponentselectionisdrivenbytheloadrequire-
ment,andbeginswiththeselectionoftheinductorL.Once
Inductor Core Selection
Different core materials and shapes will change the size/
currentandprice/currentrelationshipofaninductor.Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar elec-
tricalcharacteristics.Thechoiceofwhichstyleinductorto
use often depends more on the price vs size requirements
and any radiated field/EMI requirements than on what the
LTC3607 requires to operate. Table 1 shows the websites
of several surface mount inductor manufacturers.
the inductor is chosen, C and C
can be selected.
IN
OUT
Inductor Selection
The operating frequency directly effects both the inductor
value, and the ripple current. The inductor ripple current
ΔI decreases with higher frequency and/or inductance
L
and increases with higher V :
IN
V
fO •L
V
VIN
OUT
∆IL = OUT • 1–
Table 1. Inductor Manufacturer
Coilcraft
http://www.coilcraft.com/powersel_lowl.html
Accepting larger values of ΔI allows the use of low
L
Cooper Bussmann http://www.cooperindustries.com/content/public/
en/bussmann/electronics/products/coiltronics_
inductances, but results in higher output voltage ripple,
greater core losses, and lower output current capability.
A reasonable starting point for setting ripple current is
inductorandtransformermagnetics.html
Würth Electronic
Murata
http://katalog.we-online.com/en/pbs/browse/
Power-Magnetics/Speicherdrosseln
ΔI = 0.4 • I
, where I
is the maximum rated
L
O(MAX)
O(MAX)
http://www.murata.com/products/inductor/index.
html
output current. The largest ripple current ΔI occurs at
L
the maximum input voltage. To guarantee that the ripple
current stays below a specified maximum, the inductor
valueshouldbechosenaccordingtothefollowingequation:
TDK
http://www.tdk.co.jp/tefe02/coil.htm
Vishay
http://www.vishay.com/inductors/power-
inductors/
Sumida
http://www.sumida.com/en/products/
power_main.php
3607fb
For more information www.linear.com/LTC3607
9
LTC3607
applicaTions inForMaTion
be less than 100mV at maximum V and f = 2.25MHz
Input Capacitor (C ) Selection
IN
O
IN
with: ESR
< 150mΩ.
COUT
In continuous mode, the input current of the converter is a
Once the ESR requirements for C
have been met, the
square wave with a duty cycle of approximately V /V .
OUT
OUT IN
RMS current rating generally far exceeds the I
Topreventlargevoltagetransients,alowequivalentseries
resistance (ESR) input capacitor sized for the maximum
RMS current must be used. The maximum RMS capacitor
current is given by:
RIPPLE(P-P)
requirement, except for an all ceramic solution.
Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must instead fulfill a charge storage
requirement.Duringaloadstep,theoutputcapacitormust
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
looptorespondisdependentonthecompensationandthe
output capacitor size. Typically, 3 to 4 cycles are required
to respond to a load step, but only in the first cycle does
V
(V – V
)
OUT IN
OUT
I
≈I
RMS OUT(MAX)
V
IN
where the maximum average output current I
equals
MAX
the peak current minus half the peak-to-peak ripple cur-
rent, I = I – ΔI /2.
MAX
LIM
L
This formula has a maximum at V = 2V , where I
RMS
IN
OUT
the output drop linearly. The output droop, V
, is
DROOP
= I /2. This simple worst-case is commonly used to
OUT
usually about five times the linear drop of the first cycle.
Thus, a good place to start is with the output capacitor
size of approximately:
design because even significant deviations do not offer
muchrelief. Notethatcapacitormanufacturer’sripplecur-
rent ratings are often based on only 2000 hours lifetime.
This makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required.Severalcapacitorsmayalsobeparalleledtomeet
thesizeorheightrequirementsofthedesign.Anadditional
0.1μF to 1μF ceramic capacitor is also recommended on
∆IOUT
COUT ≈5
fO •VDROOP
Thoughthisequationprovidesagoodapproximation,more
capacitance may be required depending on the duty cycle
and load step requirements.
V for high frequency decoupling, when not using an all
IN
ceramic capacitor solution.
Ceramic Input and Output Capacitors
Output Capacitor (C ) Selection
OUT
High value, low cost ceramic capacitors are available in
small case sizes. Their high ripple current, high voltage
rating,andlowESRmakethemidealforswitchingregulator
applications.However,duetotheself-resonantandhigh-Q
characteristics of some types of ceramic capacitors, care
mustbetakenwhenthesecapacitorsareusedattheinput.
The selection of C
is driven by the required ESR to
OUT
minimizevoltagerippleandloadsteptransients.Typically,
once the ESR requirement is satisfied, the capacitance
is adequate for filtering. The output ripple (ΔV ) is
OUT
determined by:
1
∆VOUT ≈∆I ESR+
L
Whenaceramiccapacitorisusedattheinputandthepower
is being supplied through long wires, such as from a wall
adapter, a load step at the output can induce ringing at
8f C
O OUT
wheref =operatingfrequency,C
=outputcapacitance
the V pin. At best, this ringing can couple to the output
O
L
OUT
IN
and ΔI = ripple current in the inductor. The output ripple
and be mistaken as loop instability. At worst, the ringing
at the input can be large enough to damage the part. For
a more detailed discussion, refer to Application Note 88.
is highest at maximum input voltage since ΔI increases
L
with input voltage. With ΔI = 240mA the output ripple will
L
3607fb
10
For more information www.linear.com/LTC3607
LTC3607
applicaTions inForMaTion
Setting the Output Voltage
is selected. This mode provides the lowest output ripple,
at the cost of slightly lower light load efficiency.
The LTC3607 develops a 0.6V reference voltage between
the feedback pins, V
and V , and ground as shown
TheLTC3607canalsobesynchronizedtoanotherLTC3607
by the MODE/SYNC pin. During synchronization, the
mode is set to pulse-skipping and the top switch turn-on
is synchronized to the rising edge of the external clock.
Pulse-skipping mode is also the default mode during
start-up.
FB1
FB2
in Figure 1. The output voltage is set by a resistive divider
according to the following formula:
R1
R2
VOUT =0.6V 1+
Checking Transient Response
Keeping the current small (<5μA) in these resistors maxi-
mizes efficiency, but making them too small may allow
stray capacitance to cause noise problems and reduce
the phase margin of the error amp loop.
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
immediately shifts by an amount
To improve the frequency response, a feed-forward ca-
OUT
equal to ΔI
• ESR, where ESR is the effective series
pacitor C may also be used. Great care should be taken
LOAD
FF
resistance of C . ΔI
also begins to charge or dis-
to route the V traces away from noise sources, such as
OUT
LOAD
FB
chargeC
generatingafeedbackerrorsignalusedbythe
the inductor or the SW traces.
OUT
regulator to return V
this recovery time, V
or ringing that would indicate a stability problem.
to its steady-state value. During
can be monitored for overshoot
OUT
OUT
For continuous mode operation with a fixed maximum
input voltage, the minimum value that the output voltage
can be reduced to is set by the minimum on-time, which
is approximately 65ns. For fixed frequency (2.25MHz) ap-
plications, the relation between minimum output voltage
and maximum input voltage is:
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second
order overshoot/DC ratio cannot be used to determine
phasemargin.Inaddition,afeed-forwardcapacitorcanbe
added to improve the high frequency response, as shown
in Figure 1. Capacitors C1 and C2 provide phase lead by
creatinghighfrequencyzeroswithR1andR3respectively,
which improve the phase margin.
V
= 0.14625 • V
IN(MAX)
OUT(MIN)
If the output voltage drops below that limit, the output will
still regulate, but the part will skip cycles.
Power Good Outputs
The output voltage settling behavior is related to the
stability of the closed-loop system and will demonstrate
the actual overall supply performance.
The PGOOD1 and PGOOD2 are open-drain outputs which
pull low when a regulator is out of regulation. When the
output voltage is within 8.5% of regulation, a timer is
started which releases the relevant PGOOD pin after 64
clock cycles.
Insomeapplications,amoreseveretransientcanbecaused
by switching in loads with large (>1μF) input capacitors.
Thedischargedinputcapacitorsareeffectivelyputinparal-
lel with C , causing a rapid drop in V . No regulator
OUT
OUT
Mode Selection & Frequency Synchronization
can deliver enough current to prevent this problem if the
switchconnectingtheloadhaslowresistanceandisdriven
quickly. The solution is to limit the turn-on speed of the
load switch driver. A Hot Swap™ controller is designed
specifically for this purpose and usually incorporates cur-
rent limiting, short-circuit protection, and soft-starting.
TheMODE/SYNCpinisamultipurposepinwhichprovides
mode selection and frequency synchronization. Floating
thispinorconnectingittoa3.3VsourceenablesBurstMode
operation, which provides optimal light load efficiency at
the cost of a slightly higher output voltage ripple. When
this pin is connected to ground, pulse-skipping operation
3607fb
For more information www.linear.com/LTC3607
11
LTC3607
applicaTions inForMaTion
Efficiency Considerations
The R
for both the top and bottom MOSFETs can
DS(ON)
be obtained from the Typical Performance Characteristics
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
2
curves. Thus, to obtain I R losses:
2
2
I R losses = I
(R + R )
SW L
OUT
4) Other hidden losses such as copper trace and internal
battery resistances can account for additional efficiency
degradations in portable systems. It is very important to
includethesesystemlevellossesinthedesignofasystem.
The internal battery and fuse resistance losses can be
%Efficiency = 100% - (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power. Although all dissipative elements in
the circuit produce losses, four main sources usually
minimized by making sure that C has adequate charge
IN
storage and very low ESR at the switching frequency.
Other losses including diode conduction losses during
dead-time and inductor core losses generally account for
less than 2% total additional loss.
account for most of the losses in LTC3607 circuits: 1)
2
V quiescent current, 2) switching losses, 3) I R losses,
IN
4) other losses.
1) The V current is the DC supply current given in the
Thermal Considerations
IN
Electrical Characteristics which excludes MOSFET driver
In a majority of applications, the LTC3607 does not dis-
sipate much heat due to its high efficiency. However, in
applicationswheretheLTC3607isrunningathighambient
temperaturewithlowsupplyvoltageandhighdutycycles,
such as in dropout, the heat dissipated may exceed the
maximum junction temperature of the part. If the junction
temperature reaches approximately 150°C, both power
switches for each channel will be turned off and the SW
nodes will become high impedance.
and control currents. V current results in a small loss
IN
that increases with V , even at no load.
IN
2) The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current results
fromswitchingthegatecapacitanceofthepowerMOSFETs.
Each time a MOSFET gate is switched from low to high
to low again, a packet of charge dQ moves from V to
IN
ground. The resulting dQ/dt is a current out of V that is
IN
typically much larger than the DC bias current. In continu-
To prevent the LTC3607 from exceeding the maximum
junctiontemperature,theuserwillneedtodosomethermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum
junction temperature of the part. The temperature rise
is given by:
ous mode, I
= f (Q + Q ), where Q and Q are
GATECHG
O T B T B
the gate charges of the internal top and bottom MOSFET
switches. The gate charge losses are proportional to V
IN
and thus their effects will be more pronounced at higher
supply voltages.
2
3) I R losses are calculated from the DC resistances of
T
= P • θ
D JA
RISE
the internal switches, R , and external inductor, R . In
SW
L
where P is the power dissipated by the regulator and θ
continuousmode,theaverageoutputcurrentflowsthrough
inductor L, but is chopped between the internal top and
bottom switches. Thus, the series resistance looking into
the SW pin is a function of both top and bottom MOSFET
D
JA
is the thermal resistance from the junction of the die to
the ambient temperature.
The junction temperature, T , is given by:
J
R
and the duty cycle (D) as follows:
DS(ON)
T = T
J
+ T
AMBIENT
RISE
R
SW
= (R
)(D) + (R
)(1 – D)
DS(ON)TOP
DS(ON)BOT
3607fb
12
For more information www.linear.com/LTC3607
LTC3607
applicaTions inForMaTion
For cost reasons, a ceramic capacitor will be used. C
As an example, consider the case when the LTC3607 is in
dropout on both channels at an input voltage of 5V with
a load current of 600mA and an ambient temperature
of 25°C. From the Typical Performance Characteristics
OUT
selection is then based on load step droop instead of ESR
requirements. For a 5% output droop:
600mA
2.25MHz •(5%•3.3V)
COUT1≈5•
COUT2 ≈5•
=8.1µF
graph of Switch Resistance, the R
resistance of
DS(ON)
the main switch is 0.9Ω. Therefore, power dissipated by
each channel is:
600mA
2.25MHz •(5%•2.5V)
2
=10.7µF
P = I • R
= 324mW
D
DS(ON)
Running the two regulator channels under the same con-
ditions will result in a total power dissipation of 0.648W.
TheMSEpackagejunction-to-ambientthermalresistance,
For both outputs, a close standard value is 10µF. Since
the output impedance of a lithium-ion battery is very low,
each C is chosen to be 10µF also.
θ , is 37°C/W. Therefore, the junction temperature of
IN
JA
the regulator operating in a 25°C ambient temperature is
approximately:
Theoutputvoltagescannowbeprogrammedbychoosing
the values of R1 thru R4. To maintain high efficiency, the
current in these resistors should be kept small. Choosing
5µA with the 0.6V feedback voltage makes R2 and R4 ~
120k. Close standard 1% resistor values is 121k and then
R1 and R3 are 549k and 383k, respectively.
T = 0.648W • 37°C/W + 25°C = 49°C
J
Design Example
As a design example, consider using the LTC3607 in a
portable application with a dual lithium-ion battery. The
The PGOOD pins are common drain outputs, thus requir-
ing pull-up resistors. Two 100k resistors are used for
adequate speed.
battery provides a V = 5.6V to 8.4V. The loads require a
IN
maximum of 600mA in active mode and 2mA in standby
mode. The output voltages are V
= 3.3V and V
OUT1
OUT2
Figure 1 shows the complete schematic for this design
example. The specific passive components chosen allow
for a 1mm height power supply that maintains a high ef-
ficiency across load.
= 2.5V. Since the load still needs power in standby, Burst
Mode operation is selected for good light load efficiency.
First, calculate the inductor values for about 240mA ripple
current at maximum V :
IN
Board Layout Considerations
3.3V
L1=
3.3V
8.4V
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3607. These items are also illustrated graphically
in the layout diagram of Figure 2. Check the following in
your layout:
• 1–
=3.7µH
2.25MHz •240mA
Choosingthecloseststandardizedinductorvalueof3.3μH
results in a maximum ripple current of:
1. Do the input capacitors C connect to PV , PV
,
IN2
IN
IN1
3.3V
2.25MHz •3.3µH
3.3V
8.4V
∆IL1=
• 1–
=270mA
PGND1, and PGND2 as closely as possible? These ca-
pacitors provides the AC current to the internal power
MOSFETs and their drivers.
The same calculations for L2 result in a standard inductor
value of 3.3µH and a maximum current ripple of 236mA.
2. Are C
and L closely connected? The (–) plate of
OUT
C
returns current to GND and the (–) plate of C .
OUT
IN
3607fb
For more information www.linear.com/LTC3607
13
LTC3607
applicaTions inForMaTion
5. A ground plane is preferred, but if not available keep
the signal and power grounds segregated with small
signal components returning to the GND pin at one
point. Additionally, the two grounds should not share
3. The resistor divider formed by R1 and R2 must be
connected between the (+) plate of C
and a ground
OUT
sense line terminated near GND (exposed pad). The
feedback signals V and V should be routed away
FB1
FB2
the high current paths of C or C
.
from noisy components and traces (such as the SW
lines) and their traces should be minimized.
IN
OUT
6. Flood all unused areas on all layers with copper.
Flooding with copper will reduce the temperature rise
of power components. These copper areas should be
4. Keep sensitive components away from the SW pins.
ThefeedbackresistorsR1toR4shouldberoutedaway
from the SW traces and the inductors.
connected to V or GND. Refer to Figures 2 and 3 for
IN
board layout examples.
V
8.4V
IN
C
IN2
10µF
C
IN1
10µF
PV
SV
PV
IN2
IN1
IN
MODE/SYNC
RUN1
RUN2
RUN2
100k
L2
3.3µH
RUN1
V
OUT2
2.5V AT 600mA
L1
3.3µH
SW2
LTC3607
V
OUT1
3.3V AT 600mA
SW1
PGOOD2
100k
C2, 22pF
PGOOD1
C1, 22pF
V
FB2
R3, 383k
1%
V
FB1
PGND1 GND SGND PGND2
C
C
R2
121k
1%
OUT2
R1, 549k
1%
OUT1
10µF
R4
121k
1%
10µF
3607 F01
C1: TDK C2012X5R1C106K/1.25
, C : C2012X5R0J106K/1.25
C
OUT1 OUT2
L1, L2: WÜRTH ELEKTRONIK 744025003
Figure 1. Design Example Circuit
V
OUT1
VIAS TO GROUND
PLANE
C
OUT1
VIAS TO GROUND
PLANE
16 15 14 13
1
2
3
4
12
11
10
9
L
VIA TO V
IN
17
C
IN
PIN 1
VIA TO V
GND
IN
5
6
7
8
V
IN
17
GND
VIAS TO
GROUND
PLANE
VIAS TO
GROUND
PLANE
C
IN
C
IN
C
IN
C
OUT1
C
OUT2
L
L
L
VIAS TO GROUND
PLANE
C
OUT2
V
V
V
OUT2
OUT1
IN
V
OUT2
3607 F02
3607 F03
Figure 2. Example of Power Component Layout for
QFN Package
Figure 3. Example of Power Component Layout for
MSE Package
3607fb
14
For more information www.linear.com/LTC3607
LTC3607
Typical applicaTions
5V/2.5V 2.25MHz Buck Regulator
V
IN
6V TO 15V
C
C
IN2
10µF
IN1
10µF
PV
SV
PV
IN2
IN1
IN
MODE/SYNC
RUN1
RUN2
RUN2
RUN1
L2, 3.3µH
V
OUT2
L1, 4.7µH
SW2
LTC3607
V
2.5V AT 600mA
OUT1
SW1
5V AT 600mA
100k
100k
PGOOD2
PGOOD1
C2, 22pF
C1, 22pF
V
FB2
V
FB1
R4
121k
1%
R3
383k
1%
C
OUT2
R1
887k
1%
R2
121k
1%
C
OUT1
10µF
PGND1 GND SGND PGND2
10µF
L1: SUMIDA CDRH3D16/HPNP-4R7NC
L2: SUMIDA CDRH3D16/HPNP-3R3NC
3607 TA02
Low Output Voltage and Main Supply
V
IN
12V
V
OUT1
5V AT 400mA
C
IN
10µF
PV
SV
PV
IN2
IN1
IN
100k
1000pF
MODE/SYNC
RUN1
PGOOD1
RUN2
RUN1
LTC3607
PGOOD2
L2
L1
4.7µH
1.5µH
C2, 22pF
V
OUT2
SW1
SW2
1V AT 600mA
C1, 22pF
V
V
FB2
FB1
R4
121k
1%
R1
887k
1%
R3
80.6k
1%
R2
121k
1%
C
OUT2
22µF
C
OUT1
PGND1 GND SGND PGND2
10µF
L1: VISHAY IHLP1616BZER4R7M11
L2: VISHAY IHLP1616ABER1R5M11
3607 TA03
3607fb
For more information www.linear.com/LTC3607
15
LTC3607
Typical applicaTions
Sequenced Power Supplies
V
IN
4.5V TO 15V
C
C
IN2
10µF
IN1
V
10µF
OUT1
PV
SV
PV
IN2
IN1
IN
1000pF
RUN1
MODE/SYNC
PGOOD2
100k
PGOOD1
RUN2
LTC3607
L1, 3.3µH
L2, 3.3µH
V
V
OUT1
3.3V AT 600mA
OUT2
SW1
SW2
2.5V AT 600mA
C1, 22pF
C2, 22pF
V
V
FB2
FB1
R4
121k
1%
R1
549k
1%
R3
383k
1%
R2
121k
1%
C
OUT2
10µF
PGND1 GND SGND PGND2
C
OUT1
10µF
3607 TA04
L1, L2: TDK VLCF4018T-3R3N1R2-2
3607fb
16
For more information www.linear.com/LTC3607
LTC3607
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691 Rev Ø)
0.70 ±0.05
3.50 ±0.05
2.10 ±0.05
1.45 ±0.05
(4 SIDES)
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
BOTTOM VIEW—EXPOSED PAD
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
R = 0.115
TYP
0.75 ±0.05
3.00 ±0.10
(4 SIDES)
15 16
PIN 1
TOP MARK
(NOTE 6)
0.40 ±0.10
1
2
1.45 ± 0.10
(4-SIDES)
(UD16) QFN 0904
0.200 REF
0.25 ±0.05
0.00 – 0.05
0.50 BSC
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3607fb
For more information www.linear.com/LTC3607
17
LTC3607
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev F)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
1
8
0.35
REF
5.10
(.201)
MIN
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
16
9
0.305 ±0.038
0.50
(.0197)
BSC
NO MEASUREMENT PURPOSE
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
(.0120 ±.0015)
TYP
0.280 ±0.076
(.011 ±.003)
RECOMMENDED SOLDER PAD LAYOUT
16151413121110
9
REF
DETAIL “A”
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0° – 6° TYP
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
1 2 3 4 5 6 7 8
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16) 0213 REV F
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
3607fb
18
For more information www.linear.com/LTC3607
LTC3607
revision hisTory
REV
DATE DESCRIPTION
PAGE NUMBER
A
11/13 Clarified RUN 1/2 voltages
Clarified Electrical table
2
3
Clarified Pin Function descriptions
6
B
8/14
Clarified ripple feature
1
Clarified Electrical Characteristics table
Clarified Output Voltage formula
3
11
3607fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However,noresponsibilityisassumedforitsuse.LinearTechnologyCorporationmakesnorepresenta-
19
tionthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
LTC3607
Typical applicaTion
1mm Height, 1.8V/3.3V Buck Regulator Using Chip Inductors
V
IN
R2
R4
5.6V TO 8.4V
C
10µF
×2
IN
PV
SV
PV
IN2
C1
R1
C2
R3
IN1
IN
VIA TO V
OUT1
VIA TO V
OUT2
RUN1
SW1
RUN2
SW2
L2, 3.3µH
C2, 22pF
V
OUT2
L1, 2.2µH
V
OUT1
1.8V
3.3V
16 15 14 13
17
AT 600mA
AT 600mA
LTC3607
GND
1
2
3
4
12
11
10
9
C1, 22pF
VIA TO V
IN
11mm
V
V
FB2
FB1
GND
GND
5
6
7 8
R1
R3
549k
C
OUT2
10µF
R4
R2
121k
243k
121k
C
C
IN
C
IN
OUT1
10µF
C
C
OUT2
OUT1
V
V
OUT1
L1
OUT2
C
C
: TDK C2012X5R1C106K/0.85
IN
OUT1 OUT2
, C
: TDK C2012X5R0JI06K/0.85
L1: MURATA LQM2HPN2R2MGS
L2: MURATA LQM2HPN3R3MGS
V
IN
L2
3607 TA05
10mm
3607 TA06
relaTeD parTs
PART NUMBER DESCRIPTION
COMMENTS
95% Efficiency, V : 4.5V to 15V, 3mm × 3mm QFN-16, MSOP-16E
LTC3601
15V, 1.5A (I ), 4MHz, Synchronous Step-Down
OUT
IN
DC/DC Converter
LTC3603
15V, 2.5A (I ), 3MHz, Synchronous Step-Down
95% Efficiency, V : 4.5V to 15V, 4mm × 4mm QFN-20, MSOP-16E
IN
OUT
DC/DC Converter
LTC3633
15V, Dual 3A (I ), 4MHz, Synchronous Step-Down
95% Efficiency, V : 3.6V to 15V, 4mm × 5mm QFN-28, TSSOP-28E
IN
OUT
DC/DC Converter
LTC3605
15V, 5A (I ), 4MHz, Synchronous Step-Down
95% Efficiency, V : 4V to 15V, 4mm × 4mm QFN-24
IN
OUT
DC/DC Converter
LTC3604
15V, 2.5A (I ), 4MHz, Synchronous Step-Down
95% Efficiency, V : 3.6V to 15V, 3mm × 3mm QFN-16, MSOP-16E
IN
OUT
DC/DC Converter
LTC3417A-2
LTC3407A/-2
LTC3419/-1
LTC3548A-1/-2
5.5V, Dual 1.5A/1A, 4MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, V = 2.3V, 3mm × 5mm DFN-16, TSSOP-16E
IN
5.5V, Dual 600mA/600mA 1.5MHz, Synchronous
Step-Down DC/DC Converter
95% Efficiency, V = 2.5V, 3mm × 3mm DFN-10, MS-10E
IN
5.5V, Dual 600mA/600mA 2.25MHz, Synchronous
Step-Down DC/DC Converter
95% Efficiency, V = 2.5V, 3mm × 3mm DFN-10, MS-10
IN
5.5V, Dual 400mA and 800mA I , 2.25MHz,
95% Efficiency, V = 2.5V, 3mm × 3mm DFN-10, MS-10E
IN
OUT
Synchronous Step-Down DC/DC Converter
LTC3547/
LTC3547B
5.5V, Dual Monolithic 300mA, 2.25MHz, Synchronous
Step-Down DC/DC Converter
95% Efficiency, V = 2.5V, I = 40µA, I < 1µA,
IN
Q
SD
3mm × 2mm DFN-8
LTC3621
17V, 1A (I ), 2.25MHz Synchronous Step-Down DC/DC 95% Efficiency, V = 2.7V to 17V, 3mm × 2mm DFN-6, MS-8E
OUT IN
Converter with 3.5µA I
Q
3607fb
LT 0814 REV B • PRINTED IN USA
20 LinearTechnology Corporation
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC3607
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
LINEAR TECHNOLOGY CORPORATION 2013
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