LTC3621IDCB-5#TRMPBF [Linear]
LTC3621 - 17V, 1A Synchronous Step-Down Regulator with 3.5µA Quiescent Current; Package: DFN; Pins: 6; Temperature Range: -40°C to 85°C;
| 型号： | LTC3621IDCB-5#TRMPBF |
| 厂家： | 
Linear |
| 描述： | LTC3621 - 17V, 1A Synchronous Step-Down Regulator with 3.5µA Quiescent Current; Package: DFN; Pins: 6; Temperature Range: -40°C to 85°C |
| 文件： | 总18页 (文件大小：291K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3621/LTC3621-2
17V, 1A Synchronous
Step-Down Regulator with
3.5µA Quiescent Current
FeaTures
DescripTion
n
Wide V Range: 2.7V to 17V
The LTC®3621/LTC3621-2 is a high efficiency 17V, 1A
synchronousmonolithicstep-downregulator.Theswitch-
ing frequency is fixed to 1MHz or 2.25MHz with a ±±40
synchronizingrange.Theregulatorfeaturesultralowquies-
IN
OUT
n
Wide V
Range: 0.6V to V
IN
n
n
n
n
n
n
n
95% Max Efficiency
Low I < 3.5µA, Zero-Current Shutdown
Q
cent current and high efficiencies over a wide V
range.
Constant Frequency (1MHz/2.25MHz)
OUT
Full Dropout Operation with Low I
1A Rated Output Current
Q
The step-down regulator operates from an input voltage
range of 2.7V to 17V and provides an adjustable output
±10 Output Voltage Accuracy
range from 4.6V to V while delivering up to 1A of output
IN
Current Mode Operation for Excellent Line and Load
Transient Response
current. A user-selectable mode input is provided to allow
the user to trade off ripple noise for light load efficiency;
Burst Mode operation provides the highest efficiency at
lightloads,whilepulse-skippingmodeprovidesthelowest
voltage ripple. The MODE pin can also be used to allow the
user to sync the switching frequency to an external clock.
n
n
Synchronizable to External Clock
Pulse-Skipping, Forced Continuous, Burst Mode®
Operation
n
n
n
Internal Compensation and Soft-Start
Overtemperature Protection
Compact 6-Lead DFN (2mm × 3mm) Package or
Thermally-Enhanced MS8E Package with Power
Good Output and Independent SGND Pin
LTC3621 Options
PART NAME
LTC3621
FREQUENCY
1.44MHz
1.44MHz
1.44MHz
2.25MHz
2.25MHz
2.25MHz
V
OUT
Adjustable
3.3V
LTC3621-3.3
LTC3621-5
LTC3621-2
LTC3621-23.3
LTC3621-25
5V
applicaTions
Adjustable
3.3V
n
Portable-Handheld Scanners
n
Industrial and Embedded Computing
5V
n
Automotive Applications
Emergency Radio
L, LT, LTC, LTM, Burst Mode, Linear Technology, the Linear logo and LTSpice are registered
trademarks and Hot Swap and LTpowerCAD are trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by U.S. Patents,
including 5±81178, 6584258, 6±98±66, 6611131, 6177787, 5745919, 58±755±.
n
Typical applicaTion
Efficiency and Power Loss vs Load at 1MHz
100
90
80
70
60
50
40
30
20
10
0
0.6
0.5
0.4
0.3
0.2
0.1
0
2.5V VOUT with 400mA Burst Clamp, fSW = 1MHz
V
= 12V
IN
4.7µH
V
2.5V
1A
EFFICIENCY
OUT
V
IN
2.7V TO 17V
V
SW
IN
10µF
604k
191k
22pF
LTC3621
RUN
FB
22µF
MODE/SYNC
3621 TA01a
INTV
POWER LOSS
CC
GND
1µF
V
V
V
= 5V
= 3.3V
= 2.5V
OUT
OUT
OUT
0
0.2
0.4
0.6
0.8
1
LOAD CURRENT (A)
3621 TA01b
3621fc
1
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
absoluTe MaxiMuM raTings (Note 1)
V Voltage................................................. 17V to –4.3V
Operating Junction Temperature Range (Notes 3, 6, 7)
LTC3621E, LTC3621I.......................... –±4°C to 125°C
LTC3621H .......................................... –±4°C to 154°C
Storage Temperature Range .................. –65°C to 154°C
IN
RUN Voltage................................................ V to –4.3V
IN
MODE/SYNC, FB Voltages............................ 6V to –4.3V
PGOOD Voltages.......................................... 6V to –4.3V
pin conFiguraTion
TOP VIEW
TOP VIEW
6
5
4
MODE/SYNC
SW
1
2
3
SW
1
2
3
4
8 SGND
7 MODE/SYNC
7
GND
V
IN
9
GND
V
IN
INTV
CC
6 INTV
5 FB
RUN
CC
PGOOD
RUN
FB
MS8E PACKAGE
8-LEAD PLASTIC MSOP
= 154°C, θ = ±4°C/W, θ = 14°C/W
JA JC
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
DCB PACKAGE
T
JMAX
6-LEAD (2mm × 3mm) PLASTIC DFN
T
= 125°C, θ = 6±°C/W, θ = 9.6°C/W
JA JC
EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PCB
JMAX
orDer inForMaTion
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
LGDG
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3621EDCB#PBF
LTC3621EDCB#TRPBF
LTC3621IDCB#TRPBF
LTC3621EDCB-3.3#TRPBF
LTC3621IDCB-3.3#TRPBF
LTC3621EDCB-5#TRPBF
LTC3621IDCB-5#TRPBF
LTC3621EMS8E#TRPBF
LTC3621IMS8E#TRPBF
LTC3621HMS8E#TRPBF
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 154°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 154°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 154°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 125°C
6-Lead (2mm × 3mm) Plastic DFN
6-Lead (2mm × 3mm) Plastic DFN
6-Lead (2mm × 3mm) Plastic DFN
6-Lead (2mm × 3mm) Plastic DFN
6-Lead (2mm × 3mm) Plastic DFN
6-Lead (2mm × 3mm) Plastic DFN
8-Lead Plastic MSOP
LTC3621IDCB#PBF
LGDG
LTC3621EDCB-3.3#PBF
LTC3621IDCB-3.3#PBF
LTC3621EDCB-5#PBF
LTC3621IDCB-5#PBF
LTC3621EMS8E#PBF
LTC3621IMS8E#PBF
LTC3621HMS8E#PBF
LTC3621EMS8E-3.3#PBF
LTC3621IMS8E-3.3#PBF
LGQF
LGQF
LGQC
LGQC
LTGDH
LTGDH
LTGDH
8-Lead Plastic MSOP
8-Lead Plastic MSOP
LTC3621EMS8E-3.3#TRPBF LTGNY
LTC3621IMS8E-3.3#TRPBF LTGNY
8-Lead Plastic MSOP
8-Lead Plastic MSOP
LTC3621HMS8E-3.3#PBF LTC3621HMS8E-3.3#TRPBF LTGNY
8-Lead Plastic MSOP
LTC3621EMS8E-5#PBF
LTC3621IMS8E-5#PBF
LTC3621HMS8E-5#PBF
LTC3621EDCB-2#PBF
LTC3621IDCB-2#PBF
LTC3621EDCB-23.3#PBF
LTC3621IDCB-23.3#PBF
LTC3621EDCB-25#PBF
LTC3621IDCB-25#PBF
LTC3621EMS8E-5#TRPBF
LTC3621IMS8E-5#TRPBF
LTC3621HMS8E-5#TRPBF
LTC3621EDCB-2#TRPBF
LTC3621IDCB-2#TRPBF
LTC3621EDCB-23.3#TRPBF
LTC3621IDCB-23.3#TRPBF
LTC3621EDCB-25#TRPBF
LTC3621IDCB-25#TRPBF
LTGNX
LTGNX
LTGNX
LGHY
LGHY
LGQG
LGQG
LGQD
LGQD
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
6-Lead (2mm × 3mm) Plastic DFN
6-Lead (2mm × 3mm) Plastic DFN
6-Lead (2mm × 3mm) Plastic DFN
6-Lead (2mm × 3mm) Plastic DFN
6-Lead (2mm × 3mm) Plastic DFN
6-Lead (2mm × 3mm) Plastic DFN
3621fc
2
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
orDer inForMaTion
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
LTGHZ
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 154°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 154°C
–±4°C to 125°C
–±4°C to 125°C
–±4°C to 154°C
LTC3621EMS8E-2#PBF
LTC3621IMS8E-2#PBF
LTC3621HMS8E-2#PBF
LTC3621EMS8E-2#TRPBF
LTC3621IMS8E-2#TRPBF
LTC3621HMS8E-2#TRPBF
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic MSOP
LTGHZ
LTGHZ
LTC3621EMS8E-23.3#PBF LTC3621EMS8E-23.3#TRPBF LTGNZ
LTC3621IMS8E-23.3#PBF LTC3621IMS8E-23.3#TRPBF LTGNZ
LTC3621HMS8E-23.3#PBF LTC3621HMS8E-23.3#TRPBF LTGNZ
LTC3621EMS8E-25#PBF
LTC3621IMS8E-25#PBF
LTC3621HMS8E-25#PBF
LTC3621EMS8E-25#TRPBF
LTC3621IMS8E-25#TRPBF
LTC3621HMS8E-25#TRPBF
LTGQB
LTGQB
LTGQB
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TJ = 25°C. (Note 3) VIN = 12V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
2.7
TYP
MAX
UNITS
V
V
Operating Voltage
Operating Voltage
Input Quiescent Current
17
V
V
IN
4.6
V
IN
OUT
VIN
I
Shutdown Mode, V
Burst Mode Operation
Forced Continuous Mode (Note ±), V
< 4.6V
= 4V
4.1
3.5
1.5
1.4
7
µA
µA
mA
RUN
FB
V
Regulated Feedback Voltage
LTC3621/LTC3621-2
4.59±
4.591
4.6
4.6
4.646
4.649
V
V
FB
l
I
FB Input Current
LTC3621/LTC3621-2
14
nA
FB
V
Regulated Fixed Output Voltage
LTC3621-3.3/LTC3621-23.3
3.267
3.254
3.3
3.3
3.333
3.354
V
V
OUT
l
l
LTC3621-5/LTC3621-25
Fixed Output Versions
±.954
±.925
5.4
5.4
5.454
5.475
V
V
I
Feedback Input Leakage Current
Reference Voltage Line Regulation
Output Voltage Load Regulation
2
14
µA
0/V
0
FB(VOUT)
ΔV
ΔV
V
IN
= 2.7V to 17V (Note 5)
4.41
4.1
4.415
LINE(REG)
LOAD(REG)
(Note 5)
I
NMOS Switch Leakage
PMOS Switch Leakage
4.1
4.1
1
1
µA
µA
LSW
R
D
NMOS On-Resistance (Bottom FET)
PMOS On-Resistance (Top FET)
Maximum Duty Cycle
V
V
= 5V
4.15
4.37
144
64
Ω
Ω
DS(ON)
IN
l
= 4.5V, V = 1.5V
MODE/SYNC
0
ns
MAX
FB
t
Minimum On-Time
ON(MIN)
V
RUN Input High Threshold
RUN Input Low Threshold
1.4
24
V
V
RUN
4.3
I
RUN Input Current
V
RUN
= 12V
4
nA
RUN
3621fc
3
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TJ = 25°C. (Note 3) VIN = 12V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Pulse-Skipping Mode
Burst Mode Operation
Forced Continuous Mode
4.3
V
V
V
MODE/SYNC
V
– 4.±
INTVCC
1.4
V
– 1.2
INTVCC
I
t
I
MODE/SYNC Input Current
Internal Soft-Start Time
Peak Current Limit
4
24
nA
MODE/SYNC
4.8
ms
SS
1.±±
1.34
1.2
1.64
1.76
1.84
1.84
A
A
A
LIM
l
l
(E/I-Grade)
(H-Grade)
V
V
V
V
V
V
V
V
Undervoltage Lockout
V Ramping Up
IN
2.±
2.6
254
19
2.7
V
mV
V
UVLO
INTVCC
INTVCC
Undervoltage Lockout Hysteresis
UVLO(HYS)
OVLO
l
Overvoltage Lockout Rising
18
24
IN
IN
Overvoltage Lockout Hysteresis
344
1.44
mV
OVLO(HYS)
OSC
f
Oscillator Frequency
LTC3621/LTC3621-3.3/LTC3621-5
(E/I-Grade)
(H-Grade)
4.92
4.82
4.78
1.48
1.16
1.16
MHz
MHz
MHz
l
l
LTC3621-2/LTC3621-23.3/LTC3621-25
(E/I-Grade)
(H-Grade)
2.45
1.8
1.7
2.25
2.±5
2.6
2.6
MHz
MHz
MHz
l
l
f
SYNC Capture Range
64
1±4
0
V
SYNC
V
V
LDO Output Voltage
V > ±V
IN
3.6
±7.5
275
INTVCC
INTVCC
ΔV
Power Good Range
Power Good Resistance
PGOOD Delay
±12.5
354
0
Ω
PGOOD
R
PGOOD R
at 544µA
PGOOD
DS(ON)
t
PGOOD Low to High
PGOOD High to Low
4
32
Cycles
Cycles
PGOOD
I
PGOOD Leakage Current
144
nA
PGOOD
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: The quiescent current in forced continuous mode does not include
switching loss of the power FETs.
Note 5: The LTC3621 is tested in a proprietary test mode that connects V
FB
to the output of error amplifier.
Note 2: Transient absolute maximum voltages should not be applied for
more than ±0 of the switching duty cycle.
Note 6: T is calculated from the ambient, T , and power dissipation, P ,
according to the following formula:
J
A
D
Note 3: The LTC3621 is tested under pulsed load conditions such that
T = T + (P • θ )
JA
Note 7: This IC includes overtemperature protection that is intended
J
A
D
T ≈ T . The LTC3621E is guaranteed to meet specifications from
J
A
4°C to 85°C junction temperature. Specifications over the –±4°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3621I is guaranteed over the –±4°C to 125°C operating junction
temperature range, and the LTC3621H is guaranteed over the –±4°C to
154°C operating junction temperature range. High junction temperatures
degrade operating lifetimes; operating lifetime is derated for junction
temperatures greater than 125°C. Note that the maximum ambient
temperature consistent with these specifications is determined by specific
operating conditions in conjunction with board layout, the rated package
thermal impedance and other environmental factors.
to protect the device during momentary overload conditions. Junction
temperature will exceed 154°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
3621fc
4
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
Typical perForMance characTerisTics TJ = 25°C, unless otherwise noted.
Efficiency vs Load Current
(Burst Mode Operation)
VIN Supply Current
vs Input Voltage
Efficiency vs Load at Dropout
Operation
100
90
80
70
60
50
40
30
20
10
0
5
4
3
100
90
80
70
60
50
40
30
20
10
0
Burst Mode
OPERATION
SLEEP
FORCED
CONTINUOUS
MODE
2
1
0
V
V
V
= 2.5V
= 3.3V
= 5V
OUT
OUT
OUT
V
= 5V
V
= 12V
IN
IN
SD
FREQUENCY = 2.25MHz
FREQUENCY = 2.25MHz
0.001 0.01
LOAD CURRENT (A)
0.1
1
0
2
4
6
8
10 12 14 16 18 20
0.0001
0.001
0.01
0.1
1
LOAD CURRENT (A)
INPUT VOLTAGE (V)
3621 G01
3621 G03
3621 G02
Burst Mode Operation
Pulse-Skipping Mode Operation
Load Step
SW
5V/DIV
SW
5V/DIV
V
OUT
100mV/DIV
V
V
OUT
AC-COUPLED
50mV/DIV
OUT
I
L
AC-COUPLED
50mV/DIV
500mA/DIV
I
I
I
LOAD
L
L
500mA/DIV
500mA/DIV
500mA/DIV
3621 G04
3621 G05
3621 G06
4µs/DIV
4µs/DIV
40µs/DIV
V
V
= 12V
V
V
= 12V
V
V
LOAD
= 12V
IN
IN
OUT
IN
OUT
= 3.3V
= 3.3V
= 3.3V
OUT
Burst Mode OPERATION
= 50mA
PULSE SKIP MODE
= 10mA
I
= 0.05A
I
I
OUT
OUT
L = 2.2µH
L = 2.2µH
Oscillator Frequency
vs Temperature
Soft-Start Operation
Efficiency vs Input Voltage
96
94
92
90
88
86
84
82
80
78
76
74
72
70
2.50
2.45
2.40
2.35
2.30
2.25
2.20
2.15
2.10
2.05
2.00
V
OUT
= 2.5V
RUN
5V/DIV
I
= 1A
I
LOAD
L
0.5A/DIV
V
OUT
1V/DIV
I
= 10mA
LOAD
PGOOD
2V/DIV
3621 G07
400µs/DIV
50
125 150
3621 G09
–50 –25
0
25
75 100
0
20
5
10
INPUT VOLTAGE (V)
15
TEMPERATURE (°C)
3621 G08
3621fc
5
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
Typical perForMance characTerisTics TJ = 25°C, unless otherwise noted.
Oscillator Frequency
vs Supply Voltage
Reference Voltage
vs Temperature
Efficiency vs Load at 1MHz
100
90
80
70
60
50
40
30
20
10
0
2.50
2.45
2.40
2.35
2.30
2.25
2.20
2.15
2.10
2.05
2.00
600.5
600.0
599.5
599.0
598.5
598.0
597.5
V
V
V
= 2.5V
= 3.3V
= 5V
OUT
OUT
OUT
V
= 12V
IN
50
TEMPERATURE (°C)
100
150
12
SUPPLY VOLTAGE (V)
–100
–50
0
0.0001
0.001
0.01
0.1
1
2
7
17
LOAD CURRENT (A)
3621 G16
3521 G11
3621 G10
RDS(ON) vs Input Voltage
RDS(ON) vs Temperature
Load Regulation
700
600
600
550
500
450
400
350
300
250
200
150
100
5
4
V
V
= 12V
IN
OUT
= 3.3V
FORCED CONTINUOUS MODE
3
TOP FET
2
500
400
1
TOP FET
0
–1
–2
–3
–4
–5
300
200
100
BOTTOM FET
BOTTOM FET
0
2
4
6
8
10 12 14 16 18 20
–50
0
25 50 75 100 125 150
TEMPERATURE (°C)
0
1500
–25
500
1000
INPUT VOLTAGE (V)
LOAD CURRENT (mA)
3621 G14
3621 G12
3621 G13
VIN Supply Current
vs Temperature
Switch Leakage
vs Temperature
Line Regulation
0.5
0.3
6
5
4
3
30
27
24
21
18
15
12
9
0.1
SLEEP
–0.1
–0.3
–0.5
2
1
0
BOTTOM FET
6
3
0
TOP FET
125 150
SHUTDOWN
50
TEMPERATURE (°C)
–3
100 125 150
0
1314151617
–50 –25
0
25
75
1 2 3 4 5 6 7 8 9 101112
INPUT VOLTAGE (V)
–50 –25
0
25
TEMPERATURE (°C)
50 75 100
3621 G15
3521 G17
3621 G18
3621fc
6
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
pin FuncTions (DFN/MSOP)
SW(Pin1/Pin1):SwitchNodeConnectiontotheInductor
of the Step-Down Regulator.
INTV (Pin5/Pin6):LowDropoutRegulator.Bypasswith
CC
at least 1µF to Ground.
V (Pin2/Pin2):InputVoltageoftheStep-DownRegulator.
MODE/SYNC(Pin6/Pin7):BurstModeSelectandExternal
IN
Clock Synchronization of the Step-Down Regulator. Tie
RUN (Pin 3/Pin 3): Logic Controlled RUN Input. Do not
leave this pin floating. Logic high activates the step-down
regulator.
MODE/SYNC to INTV for Burst Mode operation with a
CC
±44mA peak current clamp, tie MODE/SYNC to GND for
pulse skipping operation, and tie MODE/SYNC to a volt-
FB (Pin 4/Pin 5): Feedback Input to the Error Amplifier
of the Step-Down Regulator. Connect a resistor divider
tap to this pin. The output voltage can be adjusted from
age between 1V and V
– 1.2V for forced continuous
INTVCC
mode.Furthermore,connectingMODE/SYNCtoanexternal
clock will sync the system clock to the external clock and
put the part in forced continuous mode.
4.6V to V by:
IN
V
= 0.6V • [1 + (R2/R1)]
GND (Exposed Pad Pin 7/Pin 9): Ground Backplane for
PowerandSignalGround.MustbesolderedtoPCBground.
OUT
ForFixedV
options,connecttheFBpindirectlytoV
.
OUT
OUT
SGND (Pin 8, MSOP Package Only): Signal Ground.
PGOOD (Pin 4, MSOP Package Only): V
lation Indicator.
within Regu-
OUT
block DiagraM
V
IN
0.8ms
SOFT-START
SLOPE
COMPENSATION
ERROR
AMPLIFIER
BURST
AMPLIFIER
MAIN
I-COMPARATOR
+
+
–
ITH
+
–
+
–
0.6V
FB
V
FIXED V
OUT
CLK
MODE/SYNC
OSCILLATOR
OVERCURRENT
COMPARATOR
V
– 5V
IN
INTV
CC
SW
BUCK
LOGIC
+
–
LDO
AND
GATE DRIVE
RUN
INTV
CC
PGOOD
+
–
REVERSE
COMPARATOR
GND
MS8E PACKAGE ONLY
3621 BD
3621fc
7
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
operaTion
The LTC3621 uses a constant-frequency, peak current
mode architecture. It operates through a wide V range
Tooptimizeefficiency,BurstModeoperationcanbeselected
by tying the MODE/SYNC pin to INTV . In Burst Mode
IN
CC
and regulates with ultralow quiescent current. The opera-
tion frequency is set at either 2.25MHz or 1MHz and can
be synchronized to an external oscillator ±±40 of the
inherent frequency. To suit a variety of applications, the
selectable MODE/SYNC pin allows the user to trade off
output ripple for efficiency.
operation, the peak inductor current is set to be at least
±44mA, even if the output of the error amplifier demands
less.Thus,whentheswitcherisonatrelativelylightoutput
loads, FB voltage will rise and cause the ITH voltage to
drop. Once the ITH voltage goes below 4.2V, the switcher
goes into its sleep mode with both power switches off.
The switcher remains in this sleep state until the external
load pulls the output voltage below its regulation point.
During sleep mode, the part draws an ultralow 3.5µA of
The output voltage is set by an external divider returned to
the FB pin. An error amplifier compares the divided output
voltage with a reference voltage of 4.6V and adjusts the
peak inductor current accordingly. In the MS8E package,
overvoltage and undervoltage comparators will pull the
PGOOD output low if the output voltage is not within 7.50
of the programmed value. The PGOOD output will go high
immediately after achieving regulation and will go low 32
clock cycles after falling out of regulation.
quiescent current from V .
IN
To minimize V
ripple, pulse-skipping mode can be se-
OUT
lected by grounding the MODE/SYNC pin. In the LTC3621,
pulse-skipping mode is implemented similarly to Burst
Mode operation with the peak inductor current set to be
at about 66mA. This results in lower output voltage ripple
than in Burst Mode operation with the trade-off being
slightly lower efficiency.
Main Control Loop
Duringnormaloperation,thetoppowerswitch(P-channel
MOSFET) is turned on at the beginning of a clock cycle.
The inductor current is allowed to ramp up to a peak level.
Once that level is reached, the top power switch is turned
off and the bottom switch (N-channel MOSFET) is turned
on until the next clock cycle. The peak current level is con-
trolledbytheinternallycompensatedITHvoltage,whichis
the output of the error amplifier. This amplifier compares
the FB voltage to the 4.6V internal reference. When the
load current increases, the FB voltage decreases slightly
below the reference, which causes the error amplifier to
increase the ITH voltage until the average inductor current
matches the new load current.
Forced Continuous Mode Operation
Aside from the two discontinuous-conduction modes,
the LTC3621 also has the ability to operate in the forced
continuous mode by setting the MODE/SYNC voltage
between 1V and V
– 1V. In forced continuous mode,
INTVCC
the switcher will switch cycle by cycle regardless of what
the output load current is. If forced continuous mode is
selected, the minimum peak current is set to be –133mA
in order to ensure that the part can operate continuously
at zero output load.
High Duty Cycle/Dropout Operation
Whentheinputsupplyvoltagedecreasestowardstheoutput
voltage, the duty cycle increases and slope compensation
is required to maintain the fixed switching frequency. The
LTC3621 has internal circuitry to accurately maintain the
The main control loop is shut down by pulling the RUN
pin to ground.
Low Current Operation
peak current limit (I ) of 1.6A even at high duty cycles.
LIM
Twodiscontinuous-conductionmodes(DCMs)areavailable
to control the operation of the LTC3621 at low currents.
Both modes, Burst Mode operation and pulse-skipping,
automatically switch from continuous operation to the
selected mode when the load current is low.
As the duty cycle approaches 1440, the LTC3621 enters
dropout operation. During dropout, if force continuous
mode is selected, the top PMOS switch is turned on
continuously, and all active circuitry is kept alive. How-
ever, if Burst Mode operation or pulse-skipping mode is
3621fc
8
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
operaTion
selected, the part will transition in and out of sleep mode
depending on the output load current. This significantly
reduces the quiescent current, thus prolonging the use
of the input supply.
Low Supply Operation
TheLTC3621incorporatesanundervoltagelockoutcircuit
which shuts down the part when the input voltage drops
below 2.7V. As the input voltage rises slightly above the
undervoltage threshold, the switcher will begin its basic
V Overvoltage Protection
IN
operation. However, the R
of the top and bottom
DS(ON)
In order to protect the internal power MOSFET devices
against transient voltage spikes, the LTC3621 constantly
switch will be slightly higher than that specified in the
electrical characteristics due to lack of gate drive. Refer
monitors the V pin for an overvoltage condition. When
to graph of R
versus V for more details.
IN
IN
DS(ON)
V rises above 19V, the regulator suspends operation by
IN
shutting off both power MOSFETs. Once V drops below
Soft-Start
IN
18.7V, the regulator immediately resumes normal opera-
tion. The regulator executes its soft-start function when
exiting an overvoltage condition.
TheLTC3621hasaninternal844µssoft-startramp.During
start-up soft-start operation, the switcher will operate in
pulse-skipping mode.
applicaTions inForMaTion
Output Voltage Programming
VOUT
V
IN
VOUT
IRMS ≅ IOUT(MAX)
–1
For non-fixed output voltage parts, the output voltage is
set by external resistive divider according to the following
equation:
V
IN
This formula has a maximum at V = 2V , where:
IN
OUT
IOUT
2
R2
R1
IRMS
≅
VOUT =0.6V • 1+
This simple worst-case condition is commonly used for
design because even significant deviations do not offer
muchrelief.Notethatripplecurrentratingsfromcapacitor
manufacturers are often based on only 2444 hours of life
which makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required.Severalcapacitorsmayalsobeparalleledtomeet
size or height requirements in the design. For low input
voltage applications, sufficient bulk input capacitance is
needed to minimize transient effects during output load
changes.
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 1.
V
OUT
R2
C
FF
FB
R1
LTC3621
SGND
3621 F01
Figure 1. Setting the Output Voltage
Input Capacitor (C ) Selection
Output Capacitor (C ) Selection
IN
OUT
The input capacitance, C , is needed to filter the square
The selection of C
is determined by the effective series
IN
OUT
wave current at the drain of the top power MOSFET. To
prevent large voltage transients from occurring, a low
ESR input capacitor sized for the maximum RMS current
should be used. The maximum RMS current is given by:
resistance(ESR)thatisrequiredtominimizevoltageripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
3621fc
9
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
applicaTions inForMaTion
the load transient response. The output ripple, ∆V , is
determined by:
requirement.Duringaloadstep,theoutputcapacitormust
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. Typically, five cycles are required to
respond to a load step, but only in the first cycle does the
OUT
1
V
< I
∆
+ESR
∆
L
OUT
8•f•COUT
output voltage drop linearly. The output droop, V
, is
DROOP
The output ripple is highest at maximum input voltage
usually about three times the linear drop of the first cycle.
Thus, a good place to start with the output capacitor value
is approximately:
since ∆I increases with input voltage. Multiple capaci-
L
tors placed in parallel may be needed to meet the ESR
and RMS current handling requirements. Dry tantalum,
special polymer, aluminum electrolytic, and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors are very low ESR but have
lower capacitance density than other types. Tantalum
capacitors have the highest capacitance density but it is
important to only use types that have been surge tested
foruseinswitchingpowersupplies.Aluminumelectrolytic
capacitors have significantly higher ESR, but can be used
in cost-sensitive applications provided that consideration
is given to ripple current ratings and long-term reliability.
CeramiccapacitorshaveexcellentlowESRcharacteristics
and small footprints.
∆IOUT
COUT =3
f•VDROOP
More capacitance may be required depending on the duty
cycle and load-step requirements. In most applications,
the input capacitor is merely required to supply high
frequency bypassing, since the impedance to the supply
is very low. A 14μF ceramic capacitor is usually enough
for these conditions. Place this input capacitor as close
to the V
pin as possible.
IN
Output Power Good
In the MS8E package, when the LTC3621’s output voltage
is within the ±7.50 window of the regulation point, the
output voltage is good and the PGOOD pin is pulled high
withanexternalresistor.Otherwise,aninternalopen-drain
pull-down device (275Ω) will pull the PGOOD pin low.
To prevent unwanted PGOOD glitches during transients
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
or dynamic V
changes, the LTC3621’s PGOOD fall-
OUT
ing edge includes a blanking delay of approximately 32
switching cycles.
Frequency Sync Capability
V input. Atbest, thisringingcancoupletotheoutputand
IN
be mistaken as loop instability. At worst, a sudden inrush
TheLTC3621hasthecapabilitytosynctoafrequencywithin
a ±±40 range of the internal programmed frequency. It
takes 2 to 3 cycles of external clock pulses to engage the
syncmode.Iftheexternalclocksignalweretostopswitch-
ing during operation, it will take roughly 7μs for the part’s
internal sync signal to go low and respond accordingly.
Once engaged in sync, the LTC3621 immediately runs at
the external clock frequency in forced continuous mode.
of current through the long wires can potentially cause
a voltage spike at V large enough to damage the part.
IN
When choosing the input and output ceramic capacitors,
choose the X5R and X7R dielectric formulations. These
dielectrics have the best temperature and voltage char-
acteristics of all the ceramics for a given value and size.
Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must instead fulfill a charge storage
3621fc
10
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
applicaTions inForMaTion
Inductor Selection
characteristics. The choice of which style inductor to use
mainly depends on the price versus size requirements
and any radiated field/EMI requirements. New designs
for surface mount inductors are available from Coilcraft,
Toko, Vishay, NEC/Tokin, TDK and Würth Electronik. Refer
to Table 1 for more details.
Given the desired input and output voltages, the inductor
valueandoperatingfrequencydeterminetheripplecurrent:
VOUT
f•L
VOUT
V
IN(MAX)
∆IL =
1–
Checking Transient Response
Lower ripple current reduces power losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Highest efficiency operation is obtained at low
frequency with small ripple current. However, achieving
this requires a large inductor. There is a trade-off between
component size, efficiency and operating frequency.
Theregularloopresponsecanbecheckedbylookingatthe
loadtransientresponse. Switchingregulatorstakeseveral
cyclestorespondtoastepinloadcurrent.Whenaloadstep
occurs, V
immediatelyshiftsbyanamountequaltothe
OUT
∆I
• ESR, where ESR is the effective series resistance
LOAD
of C . ∆I
also begins to charge or discharge C
OUT
LOAD
OUT
A reasonable starting point is to choose a ripple current
generatingafeedbackerrorsignalusedbytheregulatorto
that is about ±40 of I
. To guarantee that ripple
OUT(MAX)
return V to its steady-state value. During this recovery
OUT
OUT
current does not exceed a specified maximum, the induc-
tance should be chosen according to:
time, V
can be monitored for overshoot or ringing that
would indicate a stability problem.
VOUT
f•∆IL(MAX)
VOUT
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second
order overshoot/DC ratio cannot be used to determine
phase margin. In addition, a feedforward capacitor can
be added to improve the high frequency response, as
L=
1–
V
IN(MAX)
Once the value for L is known, the type of inductor must
be selected. Actual core loss is independent of core size
for a fixed inductor value, but is very dependent on the
inductance selected. As the inductance or frequency in-
creases, core losses decrease. Unfortunately, increased
inductance requires more turns of wire and therefore
copper losses will increase. Copper losses also increase
as frequency increases.
shown in Figure 1. Capacitor C provides phase lead by
FF
creating a high frequency zero with R2, which improves
the phase margin.
The output voltage settling behavior is related to the sta-
bility of the closed-loop system and will demonstrate the
actual overall supply performance. LTpowerCAD™ and
LTSpice® can be used to check control loop and transient
performance.
Ferrite designs have very low core losses and are pre-
ferred at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductancecollapsesabruptlywhenthepeakdesigncurrent
is exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Insomeapplications,amoreseveretransientcanbecaused
by switching in loads with large (>1µF) load capacitors.
Thedischargedloadcapacitorsareeffectivelyputinparal-
lel with C , causing a rapid drop in V . No regulator
OUT
OUT
can deliver enough current to prevent this problem if the
switchconnectingtheloadhaslowresistanceandisdriven
quickly. The solution is to limit the turn-on speed of the
load switch driver. A Hot Swap™ controller is designed
specifically for this purpose and usually incorporates
currentlimiting, short-circuitprotectionandsoft-starting.
Different core materials and shapes will change the size/
currentandprice/currentrelationshipofaninductor.Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
3621fc
11
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
applicaTions inForMaTion
Table 1. Inductor Selection Table
INDUCTANCE
(µH)
DCR
(mΩ)
MAX CURRENT
(A)
DIMENSIONS
(mm)
HEIGHT
(mm)
INDUCTOR
MANUFACTURER
IHLP-1616BZ-11 Series
1.4
2.2
±.7
2±
61
95
±.5
3.25
1.7
±.3 × ±.7
±.3 × ±.7
±.3 × ±.7
2
2
2
Vishay
www.vishay.com
IHLP-2424BZ-41 Series
FDV4624 Series
1
18.9
±5.6
79.2
148
113
139
18
37
51
68
7
5.± × 5.7
5.± × 5.7
5.± × 5.7
5.± × 5.7
5.± × 5.7
5.± × 5.7
6.7 × 7.±
6.7 × 7.±
6.7 × 7.±
6.7 × 7.±
2
2
2
2
2
2
2
2
2
2
2.2
3.3
±.7
5.6
6.8
±.2
3.3
2.8
2.5
2.±
1
5.7
±
3.2
2.8
Toko
www.toko.com
2.2
3.3
±.7
MPLC4525L Series
XFL±424 Series
1
16
2±
±4
14.8
1±.±
21.3
3±.8
52.2
6.±
5.2
±.1
5.1
±.±
3.5
2.5
2.5
6.2 × 5.±
6.2 × 5.±
6.2 × 5.±
± × ±
± × ±
± × ±
± × ±
± × ±
2.5
2.5
2.5
2.1
2.1
2.1
2.1
2.1
NEC/Tokin
1.5
2.2
www.nec-tokin.com
1.4
1.5
2.2
3.3
±.7
Coilcraft
www.coilcraft.com
RLF7434 Series
1
8.8
9.6
12
24
31
±5
6.±
6.1
5.±
±.1
3.±
2.8
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
3.2
3.2
3.2
3.2
3.2
3.2
TDK
www.tdk.com
1.5
2.2
3.3
±.7
6.8
WE-TPC ±828 Series
1.2
1.8
2.2
2.7
3.3
3.9
±.7
17
24
23
27
34
±7
52
3.1
2.7
±.8 × ±.8
±.8 × ±.8
±.8 × ±.8
±.8 × ±.8
±.8 × ±.8
±.8 × ±.8
±.8 × ±.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
Würth Elektronik
www.we-online.com
2.5
2.35
2.15
1.72
1.55
2
Efficiency Considerations
1. I R losses are calculated from the DC resistances of
the internal switches, R , and external inductor, R .
SW
L
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 1440.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
In continuous mode, the average output current flows
through inductor L but is “chopped” between the
internal top and bottom power MOSFETs. Thus, the
series resistance looking into the SW pin is a function
of both top and bottom MOSFET R
cycle (DC) as follows:
and the duty
DS(ON)
0 Efficiency = 1440 – (Loss1 + Loss2 + …)
R
SW
= (R )(DC) + (R )(1 – DC)
DS(ON)TOP DS(ON)BOT
where Loss1, Loss2, etc. are the individual losses as a
percentageofinputpower.Althoughalldissipativeelements
in the circuit produce losses, three main sources usually
TheR
forboththetopandbottomMOSFETscanbe
DS(ON)
obtained from the Typical Performance Characteristics
2
curves. Thus to obtain I R losses:
2
account for most of the losses in LTC3621 circuits: 1) I R
2
2
losses, 2) switching and biasing losses, 3) other losses.
I R losses = I
(R + R )
OUT SW L
3621fc
12
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
applicaTions inForMaTion
2. The switching current is the sum of the MOSFET driver
andcontrolcurrents.ThepowerMOSFETdrivercurrent
resultsfromswitchingthegatecapacitanceofthepower
MOSFETs. Each time a power MOSFET gate is switched
from low to high to low again, a packet of charge dQ
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum
junction temperature of the part. The temperature rise is
given by:
T
RISE
= P • θ
D JA
moves from V to ground. The resulting dQ/dt is a
IN
As an example, consider the case when the LTC3621
is used in applications where V = 12V, I = 1A,
current out of V that is typically much larger than the
IN
DC control bias current. In continuous mode, I
IN
OUT
GATECHG
f = 2.25MHz, V
= 1.8V. The equivalent power MOSFET
= f(Q + Q ), where Q and Q are the gate charges of
OUT
T
B
T
B
resistance R is:
the internal top and bottom power MOSFETs and f is
the switching frequency. The power loss is thus:
SW
V
V
V
OUT
RSW =RDS(ON)TOP
•
OUT +RDS(ON)BOT • 1–
Switching Loss = I
• V
IN
GATECHG
V
IN
IN
The gate charge loss is proportional to V and f and
IN
1.8V
12V
1.8V
12V
thus their effects will be more pronounced at higher
=370mΩ•
=183mΩ
+150mΩ • 1–
supply voltages and higher frequencies.
3. Other “hidden” losses such as transition loss and cop-
per trace and internal load resistances can account for
additional efficiency degradations in the overall power
system. It is very important to include these “system”
level losses in the design of a system. Transition loss
arises from the brief amount of time the top power
MOSFET spends in the saturated region during switch
node transitions. The LTC3621 internal power devices
switch quickly enough that these losses are not sig-
nificant compared to other sources. These losses plus
other losses, including diode conduction losses during
dead-time and inductor core losses, generally account
for less than 20 total additional loss.
The V current during 2.25MHz force continuous opera-
IN
tion with no load is about 5mA, which includes switching
and internal biasing current loss, transition loss, inductor
core loss and other losses in the application. Therefore,
the total power dissipated by the part is:
2
P = I
• R + V • I
SW IN IN(Q)
= 1A • 183mΩ + 12V • 5mA
D
OUT
2
= 2±3mW
TheDFN2mm× 3mmpackagejunction-to-ambientthermal
resistance, θ , is around 6±°C/W. Therefore, the junction
JA
temperature of the regulator operating in a 25°C ambient
Thermal Conditions
temperature is approximately:
In a majority of applications, the LTC3621 does not dis-
sipatemuchheatduetoitshighefficiencyandlowthermal
resistance of its exposed pad package. However, in ap-
plications where the LTC3621 is running at high ambient
T = 0.243W • 64°C/W + 25°C = 40.6°C
J
Remembering that the above junction temperature is
obtained from an R
at 25°C, we might recalculate
DS(ON)
the junction temperature based on a higher R
since
DS(ON)
temperature, high V , high switching frequency, and
IN
it increases with temperature. Redoing the calculation
maximum output current load, the heat dissipated may
exceed the maximum junction temperature of the part. If
the junction temperature reaches approximately 164°C,
bothpowerswitcheswillbeturnedoffuntilthetemperature
drops about 15°C cooler.
assuming that R increased 50 at ±4.6°C yields a new
SW
junction temperature of ±1.1°C. If the application calls
for a higher ambient temperature and/or higher switching
frequency, care should be takentoreducethe temperature
rise of the part by using a heat sink or forced air flow.
To avoid the LTC3621 from exceeding the maximum junc-
tion temperature, the user will need to do some thermal
3621fc
13
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
applicaTions inForMaTion
Board Layout Considerations
5. Keep sensitive components away from the SW pin. The
feedbackresistorsandINTV bypasscapacitorsshould
CC
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3621 (refer to Figure 3). Check the following in
your layout:
be routed away from the SW trace and the inductor.
6. A ground plane is preferred.
7. Flood all unused areas on all layers with copper, which
reduces the temperature rise of power components.
These copper areas should be connected to GND.
Design Example
L1
As a design example, consider using the LTC3621 in an
application with the following specifications:
C
IN
V
V
IN
OUT
V = 14.8V to 13.2V
IN
V
OUT
= 3.3V
I
I
f
= 1A
= 4A
OUT(MAX)
OUT(MIN)
GND
C
OUT
= 2.25MHz
SW
Because efficiency and quiescent current is important at
both 544mA and 4A current states, Burst Mode operation
will be utilized.
Given the internal oscillator of 2.25MHz, we can calcu-
late the inductor value for about ±40 ripple current at
3621 F03
Figure 3. Sample PCB Layout
maximum V :
IN
3.3V
2.25MHz •0.4A
3.3V
13.2V
1–
1. Do the capacitors C connect to the V pin and GND
IN
IN
L=
=2.75µH
pin as close as possible? These capacitors provide the
AC current to the internal power MOSFETs and their
drivers.
Giventhis,a2.7µHor3.3µH,>1.2Ainductorwouldsuffice.
will be selected based on the ESR that is required to
satisfy the output voltage ripple requirement and the bulk
capacitance needed for loop stability. For this design, a
22µF ceramic capacitor will be used.
C
2. Are C
and L closely connected? The (–) plate of
OUT
OUT
C
returns current to GND.
OUT
3. The resistive divider, R1 and R2, must be connected
between the (+) plate of C
and a ground line ter-
OUT
C should be sized for a maximum current rating of:
minated near GND. The feedback signal V should be
IN
FB
routed away from noisy components and traces, such
as the SW line, and its trace should be minimized. Keep
R1 and R2 close to the IC.
1/2
3.3V 13.2V
13.2V 3.3V
IRMS =1A
–1 =0.43A
±. Solder the exposed pad (Pin 7 for DFN, Pin 9 for MSOP)
onthebottomofthepackagetotheGNDplane.Connect
this GND plane to other layers with thermal vias to help
dissipate heat from the LTC3621.
Decoupling the V pin with 14µF ceramic capacitors is
IN
adequate for most applications.
3621fc
14
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DCB Package
6-Lead Plastic DFN (2mm × 3mm)
(Reference LTC DWG # 05-08-ꢀ7ꢀ5 Rev A)
0.70 0.05
ꢀ.65 0.05
3.55 0.05
(2 SIDES)
2.ꢀ5 0.05
PACKAGE
OUTLINE
0.25 0.05
0.50 BSC
ꢀ.35 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.ꢀꢀ5
2.00 0.ꢀ0
(2 SIDES)
0.40 0.ꢀ0
TYP
R = 0.05
TYP
4
6
3.00 0.ꢀ0 ꢀ.65 0.ꢀ0
(2 SIDES)
(2 SIDES)
PIN ꢀ BAR
TOP MARK
(SEE NOTE 6)
PIN ꢀ NOTCH
R0.20 OR 0.25
× 45° CHAMFER
(DCB6) DFN 0405
3
ꢀ
0.25 0.05
0.50 BSC
0.75 0.05
0.200 REF
ꢀ.35 0.ꢀ0
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
ꢀ. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (TBD)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.ꢀ5mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN ꢀ LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3621fc
15
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MS8E Package
8-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1662 Rev K)
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.88
(.074)
1
0.29
REF
1.88 ±0.102
(.074 ±.004)
1.68
(.066)
0.889 ±0.127
(.035 ±.005)
0.05 REF
DETAIL “B”
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
1.68 ±0.102
(.066 ±.004)
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
8
NO MEASUREMENT PURPOSE
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.65
(.0256)
BSC
0.52
(.0205)
REF
0.42 ±0.038
(.0165 ±.0015)
8
7 6 5
TYP
RECOMMENDED SOLDER PAD LAYOUT
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
DETAIL “A”
0.254
(.010)
0° – 6° TYP
GAUGE PLANE
1
2
3
4
0.53 ±0.152
(.021 ±.006)
1.10
(.043)
MAX
0.86
(.034)
REF
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.1016 ±0.0508
(.004 ±.002)
0.65
(.0256)
BSC
MSOP (MS8E) 0213 REV K
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
3621fc
16
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
revision hisTory
REV
DATE
48/13 Updated Efficiency curve
Input quiescent current limits changed
DESCRIPTION
PAGE NUMBER
A
1
2
Oscillator frequency (f ) conditions changed
2
OSC
B
43/1± Clarified Features and Description
Clarified options
1
1
Clarified ordering info and Absolute Maximum Ratings
Added Note 7
2
2 - 3
3
Clarified electrical specifications
Clarified pin descriptions, Block Diagram
Clarified Operation description
Added box to figure
6
7
7
Clarified Applications Information
Clarified Typical Application
9 - 13
16
18
2, 3
±
Swapped locations of C and R1
FB
C
4±/15 Added H-Grade Options and Specifications
Added H-Grade Options and Specifications
Clarified Graphs to Accommodate 154°C Performance
5, 6
3621fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
17
LTC3621/LTC3621-2
Typical applicaTion
5VOUT with 400mA Burst Mode Operation, 2.25MHz
L1
3.3µH
V
IN
12V
V
OUT
5V
V
SW
IN
C
FB
22pF
C
OUT
C
IN
10µF
R3
LTC3621-2
RUN
22µF
187k
3621 TA02
FB
R4
25.5k
MODE/SYNC
INTV
CC
C1
1µF
GND
3621 TA02
1.2VOUT, Forced Continuous Mode, 1MHz
L1
3.3µH
2.7V TO 17V
1.2V
V
IN
V
SW
FB
V
OUT
IN
C
OUT
22µF
C
IN
10µF
R1
C
FB
22pF
LTC3621
604k
RUN
R5
604k
MODE/SYNC
INTV
CC
C1
1µF
GND
V
1V
3621 TA03
1.2VOUT, Synchronized to 600kHz, Forced Continuous Mode
L1
4.7µH
2.7V TO 17V
1.2V
V
IN
V
SW
V
OUT
IN
C
OUT
22µF
C
IN
R1
C
FB
22pF
LTC3621
10µF
604k
RUN
FB
R5
604k
MODE/SYNC
INTV
CC
C1
1µF
GND
V
600kHz CLK
3621 TA04
relaTeD parTs
PART NUMBER DESCRIPTION
COMMENTS
950 Efficiency, V : ±V to ±4V, V
LTC36±6/
±4V, 1A (I ), 3MHz Synchronous Step-Down
= 4.6V, I = 1±4µA, I < 8µA,
OUT(MIN) Q SD
OUT
IN
LTC36±6-1
DC/DC Converter
3mm × ±mm DFN-1±, MSOP-16E Packages
LTC3644
LTC3641
LTC3643
1.5A, 15V, ±MHz Synchronous Rail-to-Rail Single
Resistor Step-Down Regulator
950 Efficiency, V : ±V to 15V, V = 4V, I = 744µA, I < 1µA,
IN
OUT(MIN)
Q
SD
3mm × 3mm DFN-12, MSOP-12E Packages
15V, 1.5A (I ) ±MHz Synchronous Step-Down
950 Efficiency, V : ±.5V to 15V, V = 4.6V, I = 344µA, I < 1µA,
OUT
IN
OUT(MIN)
Q
SD
DC/DC Converter
±mm × ±mm QFN-24, MSOP-16E Packages
15V, 2.5A (I ) 3MHz Synchronous Step-Down
950 Efficiency, V : ±.5V to 15V, V = 4.6V, I = 75µA, I < 1µA,
OUT
IN
OUT(MIN)
Q
SD
DC/DC Converter
±mm × ±mm QFN-24, MSOP-16E Packages
LTC3633/
LTC3633A
15V/24V, Dual 3A (I ) ±MHz Synchronous Step-Down 950 Efficiency, V : 3.6V to 15V/24V, V
= 4.6V, I = 544µA, I < 15µA,
OUT
IN
OUT(MIN) Q SD
DC/DC Converter
±mm × 5mm QFN-28, TSSOP-28E Packages. A Version Up to 24V
IN
LTC3645/
LTC3645A
15V/24V, 5A (I ) ±MHz Synchronous Step-Down
950 Efficiency, V : ±V to 15V/24V, V
= 4.6V, I = 2mA, I < 15µA,
OUT(MIN) Q SD
OUT
IN
DC/DC Converter
±mm × ±mm QFN-2± Package. A Version Up to 24V
IN
LTC364±
15V, 2.5A (I ) ±MHz Synchronous Step-Down
950 Efficiency, V : 3.6V to 15V, V
= 4.6V, I = 344µA, I < 1±µA,
OUT(MIN) Q SD
OUT
IN
DC/DC Converter
3mm × 3mm QFN-16, MSOP-16E Packages
LTC1877
644mA (I ) 554kHz Synchronous Step-Down
V : 2.7V to 14V, V
IN
= 4.8V, I = 14µA, I < 1µA, MSOP-8 Package
OUT
OUT(MIN)
O
SD
DC/DC Converter
LT8614/LT8611 ±2V, 2.5A (I ) Synchronous Step-Down
960 Efficiency, V : 3.±V to ±2V, V
= 4.97V, I = 2.5µA, I < 1µA,
OUT(MIN) Q SD
OUT
IN
DC/DC Converter
MSOP-16E Package
3621fc
LT 0415 REV C • PRINTED IN USA
LinearTechnology Corporation
1634 McCarthy Blvd., Milpitas, CA 95435-7±17
18
●
●
LINEAR TECHNOLOGY CORPORATION 2013
(±48)±32-1944 FAX: (±48) ±3±-4547 www.linear.com/LTC3621
相关型号：
LTC3622EDE#TRPBF
LTC3622 - 17V, Dual 1A Synchronous Step-Down Regulator with Ultralow Quiescent Current; Package: DFN; Pins: 14; Temperature Range: -40°C to 85°C
Linear
LTC3622EDE-2#PBF
LTC3622 - 17V, Dual 1A Synchronous Step-Down Regulator with Ultralow Quiescent Current; Package: DFN; Pins: 14; Temperature Range: -40°C to 85°C
Linear
LTC3622IDE#PBF
LTC3622 - 17V, Dual 1A Synchronous Step-Down Regulator with Ultralow Quiescent Current; Package: DFN; Pins: 14; Temperature Range: -40°C to 85°C
Linear
LTC3622IDE-2#PBF
LTC3622 - 17V, Dual 1A Synchronous Step-Down Regulator with Ultralow Quiescent Current; Package: DFN; Pins: 14; Temperature Range: -40°C to 85°C
Linear
©2020 ICPDF网 联系我们和版权申明